#ifndef ARCH_X86_64_h
#define ARCH_X86_64_h
-#define ARCH (arch_x86_64)
+#define FIO_ARCH (arch_x86_64)
#ifndef __NR_ioprio_set
#define __NR_ioprio_set 251
#define read_barrier() __asm__ __volatile__("lfence":::"memory")
#define write_barrier() __asm__ __volatile__("sfence":::"memory")
-static inline unsigned int arch_ffz(unsigned int bitmask)
+static inline unsigned long arch_ffz(unsigned long bitmask)
{
- __asm__("bsfl %1,%0" :"=r" (bitmask) :"r" (~bitmask));
+ __asm__("bsf %1,%0" :"=r" (bitmask) :"r" (~bitmask));
return bitmask;
}
-#define ARCH_HAVE_FFZ
-
-typedef struct {
- unsigned int lock;
-} spinlock_t;
-static inline void spin_lock(spinlock_t *lock)
+static inline unsigned long long get_cpu_clock(void)
{
- short inc = 0x0100;
-
- __asm__ __volatile__("xaddw %w0, %1\n"
- "1:\t"
- "cmpb %h0, %b0\n\t"
- "je 2f\n\t"
- "rep ; nop\n\t"
- "movb %1, %b0\n\t"
- "jmp 1b\n"
- "2:"
- : "+Q" (inc), "+m" (lock->lock)
- :
- : "memory", "cc");
-}
+ unsigned int lo, hi;
-static inline void spin_unlock(spinlock_t *lock)
-{
- __asm__ __volatile__("incb %0"
- : "+m" (lock->lock)
- :
- : "memory", "cc");
+ __asm__ __volatile__("rdtsc" : "=a" (lo), "=d" (hi));
+ return ((unsigned long long) hi << 32ULL) | lo;
}
-#define __SPIN_LOCK_UNLOCKED { 0 }
+#define ARCH_HAVE_FFZ
+#define ARCH_HAVE_SSE4_2
+#define ARCH_HAVE_CPU_CLOCK
#endif