Documentation: arm64: correct spelling

[linux-block.git] / Documentation / arm64 / sve.rst

diff --git a/Documentation/arm64/sve.rst b/Documentation/arm64/sve.rst
index c7a356bf4e8f824fffb38dfaf7307d5e503549ff..1b90a30382ac04e46b75061dd3ea8a4432eb76a5 100644 (file)
--- a/Documentation/arm64/sve.rst
+++ b/Documentation/arm64/sve.rst
@@ -175,7 +175,7 @@ the SVE instruction set architecture.
 When returning from a signal handler:
 
 * If there is no sve_context record in the signal frame, or if the record is
-  present but contains no register data as desribed in the previous section,
+  present but contains no register data as described in the previous section,
   then the SVE registers/bits become non-live and take unspecified values.
 
 * If sve_context is present in the signal frame and contains full register
@@ -223,7 +223,7 @@ prctl(PR_SVE_SET_VL, unsigned long arg)
            Defer the requested vector length change until the next execve()
            performed by this thread.
 
-           The effect is equivalent to implicit exceution of the following
+           The effect is equivalent to implicit execution of the following
            call immediately after the next execve() (if any) by the thread:
 
                prctl(PR_SVE_SET_VL, arg & ~PR_SVE_SET_VL_ONEXEC)