virt/kvm/ioapic.c

   1 /*
   2  *  Copyright (C) 2001  MandrakeSoft S.A.
   3  *  Copyright 2010 Red Hat, Inc. and/or its affiliates.
   4  *
   5  *    MandrakeSoft S.A.
   6  *    43, rue d'Aboukir
   7  *    75002 Paris - France
   8  *    http://www.linux-mandrake.com/
   9  *    http://www.mandrakesoft.com/
  10  *
  11  *  This library is free software; you can redistribute it and/or
  12  *  modify it under the terms of the GNU Lesser General Public
  13  *  License as published by the Free Software Foundation; either
  14  *  version 2 of the License, or (at your option) any later version.
  15  *
  16  *  This library is distributed in the hope that it will be useful,
  17  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  18  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  19  *  Lesser General Public License for more details.
  20  *
  21  *  You should have received a copy of the GNU Lesser General Public
  22  *  License along with this library; if not, write to the Free Software
  23  *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  24  *
  25  *  Yunhong Jiang <yunhong.jiang@intel.com>
  26  *  Yaozu (Eddie) Dong <eddie.dong@intel.com>
  27  *  Based on Xen 3.1 code.
  28  */
  29
  30 #include <linux/kvm_host.h>
  31 #include <linux/kvm.h>
  32 #include <linux/mm.h>
  33 #include <linux/highmem.h>
  34 #include <linux/smp.h>
  35 #include <linux/hrtimer.h>
  36 #include <linux/io.h>
  37 #include <linux/slab.h>
  38 #include <linux/export.h>
  39 #include <asm/processor.h>
  40 #include <asm/page.h>
  41 #include <asm/current.h>
  42 #include <trace/events/kvm.h>
  43
  44 #include "ioapic.h"
  45 #include "lapic.h"
  46 #include "irq.h"
  47
  48 #if 0
  49 #define ioapic_debug(fmt,arg...) printk(KERN_WARNING fmt,##arg)
  50 #else
  51 #define ioapic_debug(fmt, arg...)
  52 #endif
  53 static int ioapic_deliver(struct kvm_ioapic *vioapic, int irq);
  54
  55 static unsigned long ioapic_read_indirect(struct kvm_ioapic *ioapic,
  56                                           unsigned long addr,
  57                                           unsigned long length)
  58 {
  59         unsigned long result = 0;
  60
  61         switch (ioapic->ioregsel) {
  62         case IOAPIC_REG_VERSION:
  63                 result = ((((IOAPIC_NUM_PINS - 1) & 0xff) << 16)
  64                           | (IOAPIC_VERSION_ID & 0xff));
  65                 break;
  66
  67         case IOAPIC_REG_APIC_ID:
  68         case IOAPIC_REG_ARB_ID:
  69                 result = ((ioapic->id & 0xf) << 24);
  70                 break;
  71
  72         default:
  73                 {
  74                         u32 redir_index = (ioapic->ioregsel - 0x10) >> 1;
  75                         u64 redir_content;
  76
  77                         if (redir_index < IOAPIC_NUM_PINS)
  78                                 redir_content =
  79                                         ioapic->redirtbl[redir_index].bits;
  80                         else
  81                                 redir_content = ~0ULL;
  82
  83                         result = (ioapic->ioregsel & 0x1) ?
  84                             (redir_content >> 32) & 0xffffffff :
  85                             redir_content & 0xffffffff;
  86                         break;
  87                 }
  88         }
  89
  90         return result;
  91 }
  92
  93 static void rtc_irq_eoi_tracking_reset(struct kvm_ioapic *ioapic)
  94 {
  95         ioapic->rtc_status.pending_eoi = 0;
  96         bitmap_zero(ioapic->rtc_status.dest_map, KVM_MAX_VCPUS);
  97 }
  98
  99 static void __rtc_irq_eoi_tracking_restore_one(struct kvm_vcpu *vcpu)
 100 {
 101         bool new_val, old_val;
 102         struct kvm_ioapic *ioapic = vcpu->kvm->arch.vioapic;
 103         union kvm_ioapic_redirect_entry *e;
 104
 105         e = &ioapic->redirtbl[RTC_GSI];
 106         if (!kvm_apic_match_dest(vcpu, NULL, 0, e->fields.dest_id,
 107                                 e->fields.dest_mode))
 108                 return;
 109
 110         new_val = kvm_apic_pending_eoi(vcpu, e->fields.vector);
 111         old_val = test_bit(vcpu->vcpu_id, ioapic->rtc_status.dest_map);
 112
 113         if (new_val == old_val)
 114                 return;
 115
 116         if (new_val) {
 117                 __set_bit(vcpu->vcpu_id, ioapic->rtc_status.dest_map);
 118                 ioapic->rtc_status.pending_eoi++;
 119         } else {
 120                 __clear_bit(vcpu->vcpu_id, ioapic->rtc_status.dest_map);
 121                 ioapic->rtc_status.pending_eoi--;
 122         }
 123
 124         WARN_ON(ioapic->rtc_status.pending_eoi < 0);
 125 }
 126
 127 void kvm_rtc_eoi_tracking_restore_one(struct kvm_vcpu *vcpu)
 128 {
 129         struct kvm_ioapic *ioapic = vcpu->kvm->arch.vioapic;
 130
 131         spin_lock(&ioapic->lock);
 132         __rtc_irq_eoi_tracking_restore_one(vcpu);
 133         spin_unlock(&ioapic->lock);
 134 }
 135
 136 static void kvm_rtc_eoi_tracking_restore_all(struct kvm_ioapic *ioapic)
 137 {
 138         struct kvm_vcpu *vcpu;
 139         int i;
 140
 141         if (RTC_GSI >= IOAPIC_NUM_PINS)
 142                 return;
 143
 144         rtc_irq_eoi_tracking_reset(ioapic);
 145         kvm_for_each_vcpu(i, vcpu, ioapic->kvm)
 146             __rtc_irq_eoi_tracking_restore_one(vcpu);
 147 }
 148
 149 static int ioapic_service(struct kvm_ioapic *ioapic, unsigned int idx)
 150 {
 151         union kvm_ioapic_redirect_entry *pent;
 152         int injected = -1;
 153
 154         pent = &ioapic->redirtbl[idx];
 155
 156         if (!pent->fields.mask) {
 157                 injected = ioapic_deliver(ioapic, idx);
 158                 if (injected && pent->fields.trig_mode == IOAPIC_LEVEL_TRIG)
 159                         pent->fields.remote_irr = 1;
 160         }
 161
 162         return injected;
 163 }
 164
 165 static void update_handled_vectors(struct kvm_ioapic *ioapic)
 166 {
 167         DECLARE_BITMAP(handled_vectors, 256);
 168         int i;
 169
 170         memset(handled_vectors, 0, sizeof(handled_vectors));
 171         for (i = 0; i < IOAPIC_NUM_PINS; ++i)
 172                 __set_bit(ioapic->redirtbl[i].fields.vector, handled_vectors);
 173         memcpy(ioapic->handled_vectors, handled_vectors,
 174                sizeof(handled_vectors));
 175         smp_wmb();
 176 }
 177
 178 void kvm_ioapic_calculate_eoi_exitmap(struct kvm_vcpu *vcpu,
 179                                         u64 *eoi_exit_bitmap)
 180 {
 181         struct kvm_ioapic *ioapic = vcpu->kvm->arch.vioapic;
 182         union kvm_ioapic_redirect_entry *e;
 183         int index;
 184
 185         spin_lock(&ioapic->lock);
 186         /* traverse ioapic entry to set eoi exit bitmap*/
 187         for (index = 0; index < IOAPIC_NUM_PINS; index++) {
 188                 e = &ioapic->redirtbl[index];
 189                 if (!e->fields.mask &&
 190                         (e->fields.trig_mode == IOAPIC_LEVEL_TRIG ||
 191                          kvm_irq_has_notifier(ioapic->kvm, KVM_IRQCHIP_IOAPIC,
 192                                  index))) {
 193                         if (kvm_apic_match_dest(vcpu, NULL, 0,
 194                                 e->fields.dest_id, e->fields.dest_mode))
 195                                 __set_bit(e->fields.vector, (unsigned long *)eoi_exit_bitmap);
 196                 }
 197         }
 198         spin_unlock(&ioapic->lock);
 199 }
 200 EXPORT_SYMBOL_GPL(kvm_ioapic_calculate_eoi_exitmap);
 201
 202 void kvm_ioapic_make_eoibitmap_request(struct kvm *kvm)
 203 {
 204         struct kvm_ioapic *ioapic = kvm->arch.vioapic;
 205
 206         if (!kvm_apic_vid_enabled(kvm) || !ioapic)
 207                 return;
 208         kvm_make_update_eoibitmap_request(kvm);
 209 }
 210
 211 static void ioapic_write_indirect(struct kvm_ioapic *ioapic, u32 val)
 212 {
 213         unsigned index;
 214         bool mask_before, mask_after;
 215         union kvm_ioapic_redirect_entry *e;
 216
 217         switch (ioapic->ioregsel) {
 218         case IOAPIC_REG_VERSION:
 219                 /* Writes are ignored. */
 220                 break;
 221
 222         case IOAPIC_REG_APIC_ID:
 223                 ioapic->id = (val >> 24) & 0xf;
 224                 break;
 225
 226         case IOAPIC_REG_ARB_ID:
 227                 break;
 228
 229         default:
 230                 index = (ioapic->ioregsel - 0x10) >> 1;
 231
 232                 ioapic_debug("change redir index %x val %x\n", index, val);
 233                 if (index >= IOAPIC_NUM_PINS)
 234                         return;
 235                 e = &ioapic->redirtbl[index];
 236                 mask_before = e->fields.mask;
 237                 if (ioapic->ioregsel & 1) {
 238                         e->bits &= 0xffffffff;
 239                         e->bits |= (u64) val << 32;
 240                 } else {
 241                         e->bits &= ~0xffffffffULL;
 242                         e->bits |= (u32) val;
 243                         e->fields.remote_irr = 0;
 244                 }
 245                 update_handled_vectors(ioapic);
 246                 mask_after = e->fields.mask;
 247                 if (mask_before != mask_after)
 248                         kvm_fire_mask_notifiers(ioapic->kvm, KVM_IRQCHIP_IOAPIC, index, mask_after);
 249                 if (e->fields.trig_mode == IOAPIC_LEVEL_TRIG
 250                     && ioapic->irr & (1 << index))
 251                         ioapic_service(ioapic, index);
 252                 kvm_ioapic_make_eoibitmap_request(ioapic->kvm);
 253                 break;
 254         }
 255 }
 256
 257 static int ioapic_deliver(struct kvm_ioapic *ioapic, int irq)
 258 {
 259         union kvm_ioapic_redirect_entry *entry = &ioapic->redirtbl[irq];
 260         struct kvm_lapic_irq irqe;
 261
 262         ioapic_debug("dest=%x dest_mode=%x delivery_mode=%x "
 263                      "vector=%x trig_mode=%x\n",
 264                      entry->fields.dest_id, entry->fields.dest_mode,
 265                      entry->fields.delivery_mode, entry->fields.vector,
 266                      entry->fields.trig_mode);
 267
 268         irqe.dest_id = entry->fields.dest_id;
 269         irqe.vector = entry->fields.vector;
 270         irqe.dest_mode = entry->fields.dest_mode;
 271         irqe.trig_mode = entry->fields.trig_mode;
 272         irqe.delivery_mode = entry->fields.delivery_mode << 8;
 273         irqe.level = 1;
 274         irqe.shorthand = 0;
 275
 276         return kvm_irq_delivery_to_apic(ioapic->kvm, NULL, &irqe, NULL);
 277 }
 278
 279 int kvm_ioapic_set_irq(struct kvm_ioapic *ioapic, int irq, int irq_source_id,
 280                        int level)
 281 {
 282         u32 old_irr;
 283         u32 mask = 1 << irq;
 284         union kvm_ioapic_redirect_entry entry;
 285         int ret, irq_level;
 286
 287         BUG_ON(irq < 0 || irq >= IOAPIC_NUM_PINS);
 288
 289         spin_lock(&ioapic->lock);
 290         old_irr = ioapic->irr;
 291         irq_level = __kvm_irq_line_state(&ioapic->irq_states[irq],
 292                                          irq_source_id, level);
 293         entry = ioapic->redirtbl[irq];
 294         irq_level ^= entry.fields.polarity;
 295         if (!irq_level) {
 296                 ioapic->irr &= ~mask;
 297                 ret = 1;
 298         } else {
 299                 int edge = (entry.fields.trig_mode == IOAPIC_EDGE_TRIG);
 300                 ioapic->irr |= mask;
 301                 if ((edge && old_irr != ioapic->irr) ||
 302                     (!edge && !entry.fields.remote_irr))
 303                         ret = ioapic_service(ioapic, irq);
 304                 else
 305                         ret = 0; /* report coalesced interrupt */
 306         }
 307         trace_kvm_ioapic_set_irq(entry.bits, irq, ret == 0);
 308         spin_unlock(&ioapic->lock);
 309
 310         return ret;
 311 }
 312
 313 void kvm_ioapic_clear_all(struct kvm_ioapic *ioapic, int irq_source_id)
 314 {
 315         int i;
 316
 317         spin_lock(&ioapic->lock);
 318         for (i = 0; i < KVM_IOAPIC_NUM_PINS; i++)
 319                 __clear_bit(irq_source_id, &ioapic->irq_states[i]);
 320         spin_unlock(&ioapic->lock);
 321 }
 322
 323 static void __kvm_ioapic_update_eoi(struct kvm_vcpu *vcpu,
 324                         struct kvm_ioapic *ioapic, int vector, int trigger_mode)
 325 {
 326         int i;
 327
 328         for (i = 0; i < IOAPIC_NUM_PINS; i++) {
 329                 union kvm_ioapic_redirect_entry *ent = &ioapic->redirtbl[i];
 330
 331                 if (ent->fields.vector != vector)
 332                         continue;
 333
 334                 /*
 335                  * We are dropping lock while calling ack notifiers because ack
 336                  * notifier callbacks for assigned devices call into IOAPIC
 337                  * recursively. Since remote_irr is cleared only after call
 338                  * to notifiers if the same vector will be delivered while lock
 339                  * is dropped it will be put into irr and will be delivered
 340                  * after ack notifier returns.
 341                  */
 342                 spin_unlock(&ioapic->lock);
 343                 kvm_notify_acked_irq(ioapic->kvm, KVM_IRQCHIP_IOAPIC, i);
 344                 spin_lock(&ioapic->lock);
 345
 346                 if (trigger_mode != IOAPIC_LEVEL_TRIG)
 347                         continue;
 348
 349                 ASSERT(ent->fields.trig_mode == IOAPIC_LEVEL_TRIG);
 350                 ent->fields.remote_irr = 0;
 351                 if (!ent->fields.mask && (ioapic->irr & (1 << i)))
 352                         ioapic_service(ioapic, i);
 353         }
 354 }
 355
 356 bool kvm_ioapic_handles_vector(struct kvm *kvm, int vector)
 357 {
 358         struct kvm_ioapic *ioapic = kvm->arch.vioapic;
 359         smp_rmb();
 360         return test_bit(vector, ioapic->handled_vectors);
 361 }
 362
 363 void kvm_ioapic_update_eoi(struct kvm_vcpu *vcpu, int vector, int trigger_mode)
 364 {
 365         struct kvm_ioapic *ioapic = vcpu->kvm->arch.vioapic;
 366
 367         spin_lock(&ioapic->lock);
 368         __kvm_ioapic_update_eoi(vcpu, ioapic, vector, trigger_mode);
 369         spin_unlock(&ioapic->lock);
 370 }
 371
 372 static inline struct kvm_ioapic *to_ioapic(struct kvm_io_device *dev)
 373 {
 374         return container_of(dev, struct kvm_ioapic, dev);
 375 }
 376
 377 static inline int ioapic_in_range(struct kvm_ioapic *ioapic, gpa_t addr)
 378 {
 379         return ((addr >= ioapic->base_address &&
 380                  (addr < ioapic->base_address + IOAPIC_MEM_LENGTH)));
 381 }
 382
 383 static int ioapic_mmio_read(struct kvm_io_device *this, gpa_t addr, int len,
 384                             void *val)
 385 {
 386         struct kvm_ioapic *ioapic = to_ioapic(this);
 387         u32 result;
 388         if (!ioapic_in_range(ioapic, addr))
 389                 return -EOPNOTSUPP;
 390
 391         ioapic_debug("addr %lx\n", (unsigned long)addr);
 392         ASSERT(!(addr & 0xf));  /* check alignment */
 393
 394         addr &= 0xff;
 395         spin_lock(&ioapic->lock);
 396         switch (addr) {
 397         case IOAPIC_REG_SELECT:
 398                 result = ioapic->ioregsel;
 399                 break;
 400
 401         case IOAPIC_REG_WINDOW:
 402                 result = ioapic_read_indirect(ioapic, addr, len);
 403                 break;
 404
 405         default:
 406                 result = 0;
 407                 break;
 408         }
 409         spin_unlock(&ioapic->lock);
 410
 411         switch (len) {
 412         case 8:
 413                 *(u64 *) val = result;
 414                 break;
 415         case 1:
 416         case 2:
 417         case 4:
 418                 memcpy(val, (char *)&result, len);
 419                 break;
 420         default:
 421                 printk(KERN_WARNING "ioapic: wrong length %d\n", len);
 422         }
 423         return 0;
 424 }
 425
 426 static int ioapic_mmio_write(struct kvm_io_device *this, gpa_t addr, int len,
 427                              const void *val)
 428 {
 429         struct kvm_ioapic *ioapic = to_ioapic(this);
 430         u32 data;
 431         if (!ioapic_in_range(ioapic, addr))
 432                 return -EOPNOTSUPP;
 433
 434         ioapic_debug("ioapic_mmio_write addr=%p len=%d val=%p\n",
 435                      (void*)addr, len, val);
 436         ASSERT(!(addr & 0xf));  /* check alignment */
 437
 438         switch (len) {
 439         case 8:
 440         case 4:
 441                 data = *(u32 *) val;
 442                 break;
 443         case 2:
 444                 data = *(u16 *) val;
 445                 break;
 446         case 1:
 447                 data = *(u8  *) val;
 448                 break;
 449         default:
 450                 printk(KERN_WARNING "ioapic: Unsupported size %d\n", len);
 451                 return 0;
 452         }
 453
 454         addr &= 0xff;
 455         spin_lock(&ioapic->lock);
 456         switch (addr) {
 457         case IOAPIC_REG_SELECT:
 458                 ioapic->ioregsel = data & 0xFF; /* 8-bit register */
 459                 break;
 460
 461         case IOAPIC_REG_WINDOW:
 462                 ioapic_write_indirect(ioapic, data);
 463                 break;
 464 #ifdef  CONFIG_IA64
 465         case IOAPIC_REG_EOI:
 466                 __kvm_ioapic_update_eoi(NULL, ioapic, data, IOAPIC_LEVEL_TRIG);
 467                 break;
 468 #endif
 469
 470         default:
 471                 break;
 472         }
 473         spin_unlock(&ioapic->lock);
 474         return 0;
 475 }
 476
 477 void kvm_ioapic_reset(struct kvm_ioapic *ioapic)
 478 {
 479         int i;
 480
 481         for (i = 0; i < IOAPIC_NUM_PINS; i++)
 482                 ioapic->redirtbl[i].fields.mask = 1;
 483         ioapic->base_address = IOAPIC_DEFAULT_BASE_ADDRESS;
 484         ioapic->ioregsel = 0;
 485         ioapic->irr = 0;
 486         ioapic->id = 0;
 487         rtc_irq_eoi_tracking_reset(ioapic);
 488         update_handled_vectors(ioapic);
 489 }
 490
 491 static const struct kvm_io_device_ops ioapic_mmio_ops = {
 492         .read     = ioapic_mmio_read,
 493         .write    = ioapic_mmio_write,
 494 };
 495
 496 int kvm_ioapic_init(struct kvm *kvm)
 497 {
 498         struct kvm_ioapic *ioapic;
 499         int ret;
 500
 501         ioapic = kzalloc(sizeof(struct kvm_ioapic), GFP_KERNEL);
 502         if (!ioapic)
 503                 return -ENOMEM;
 504         spin_lock_init(&ioapic->lock);
 505         kvm->arch.vioapic = ioapic;
 506         kvm_ioapic_reset(ioapic);
 507         kvm_iodevice_init(&ioapic->dev, &ioapic_mmio_ops);
 508         ioapic->kvm = kvm;
 509         mutex_lock(&kvm->slots_lock);
 510         ret = kvm_io_bus_register_dev(kvm, KVM_MMIO_BUS, ioapic->base_address,
 511                                       IOAPIC_MEM_LENGTH, &ioapic->dev);
 512         mutex_unlock(&kvm->slots_lock);
 513         if (ret < 0) {
 514                 kvm->arch.vioapic = NULL;
 515                 kfree(ioapic);
 516         }
 517
 518         return ret;
 519 }
 520
 521 void kvm_ioapic_destroy(struct kvm *kvm)
 522 {
 523         struct kvm_ioapic *ioapic = kvm->arch.vioapic;
 524
 525         if (ioapic) {
 526                 kvm_io_bus_unregister_dev(kvm, KVM_MMIO_BUS, &ioapic->dev);
 527                 kvm->arch.vioapic = NULL;
 528                 kfree(ioapic);
 529         }
 530 }
 531
 532 int kvm_get_ioapic(struct kvm *kvm, struct kvm_ioapic_state *state)
 533 {
 534         struct kvm_ioapic *ioapic = ioapic_irqchip(kvm);
 535         if (!ioapic)
 536                 return -EINVAL;
 537
 538         spin_lock(&ioapic->lock);
 539         memcpy(state, ioapic, sizeof(struct kvm_ioapic_state));
 540         spin_unlock(&ioapic->lock);
 541         return 0;
 542 }
 543
 544 int kvm_set_ioapic(struct kvm *kvm, struct kvm_ioapic_state *state)
 545 {
 546         struct kvm_ioapic *ioapic = ioapic_irqchip(kvm);
 547         if (!ioapic)
 548                 return -EINVAL;
 549
 550         spin_lock(&ioapic->lock);
 551         memcpy(ioapic, state, sizeof(struct kvm_ioapic_state));
 552         update_handled_vectors(ioapic);
 553         kvm_ioapic_make_eoibitmap_request(kvm);
 554         kvm_rtc_eoi_tracking_restore_all(ioapic);
 555         spin_unlock(&ioapic->lock);
 556         return 0;
 557 }