4 * Copyright (C) 2015,2016 ARM Ltd.
5 * Author: Andre Przywara <andre.przywara@arm.com>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
20 #include <linux/cpu.h>
21 #include <linux/kvm.h>
22 #include <linux/kvm_host.h>
23 #include <linux/interrupt.h>
24 #include <linux/list.h>
25 #include <linux/uaccess.h>
26 #include <linux/list_sort.h>
28 #include <linux/irqchip/arm-gic-v3.h>
30 #include <asm/kvm_emulate.h>
31 #include <asm/kvm_arm.h>
32 #include <asm/kvm_mmu.h>
35 #include "vgic-mmio.h"
37 static int vgic_its_save_tables_v0(struct vgic_its *its);
38 static int vgic_its_restore_tables_v0(struct vgic_its *its);
39 static int vgic_its_commit_v0(struct vgic_its *its);
40 static int update_lpi_config(struct kvm *kvm, struct vgic_irq *irq,
41 struct kvm_vcpu *filter_vcpu);
44 * Creates a new (reference to a) struct vgic_irq for a given LPI.
45 * If this LPI is already mapped on another ITS, we increase its refcount
46 * and return a pointer to the existing structure.
47 * If this is a "new" LPI, we allocate and initialize a new struct vgic_irq.
48 * This function returns a pointer to the _unlocked_ structure.
50 static struct vgic_irq *vgic_add_lpi(struct kvm *kvm, u32 intid,
51 struct kvm_vcpu *vcpu)
53 struct vgic_dist *dist = &kvm->arch.vgic;
54 struct vgic_irq *irq = vgic_get_irq(kvm, NULL, intid), *oldirq;
57 /* In this case there is no put, since we keep the reference. */
61 irq = kzalloc(sizeof(struct vgic_irq), GFP_KERNEL);
63 return ERR_PTR(-ENOMEM);
65 INIT_LIST_HEAD(&irq->lpi_list);
66 INIT_LIST_HEAD(&irq->ap_list);
67 spin_lock_init(&irq->irq_lock);
69 irq->config = VGIC_CONFIG_EDGE;
70 kref_init(&irq->refcount);
72 irq->target_vcpu = vcpu;
74 spin_lock(&dist->lpi_list_lock);
77 * There could be a race with another vgic_add_lpi(), so we need to
78 * check that we don't add a second list entry with the same LPI.
80 list_for_each_entry(oldirq, &dist->lpi_list_head, lpi_list) {
81 if (oldirq->intid != intid)
84 /* Someone was faster with adding this LPI, lets use that. */
89 * This increases the refcount, the caller is expected to
90 * call vgic_put_irq() on the returned pointer once it's
91 * finished with the IRQ.
93 vgic_get_irq_kref(irq);
98 list_add_tail(&irq->lpi_list, &dist->lpi_list_head);
99 dist->lpi_list_count++;
102 spin_unlock(&dist->lpi_list_lock);
105 * We "cache" the configuration table entries in our struct vgic_irq's.
106 * However we only have those structs for mapped IRQs, so we read in
107 * the respective config data from memory here upon mapping the LPI.
109 ret = update_lpi_config(kvm, irq, NULL);
113 ret = vgic_v3_lpi_sync_pending_status(kvm, irq);
121 struct list_head dev_list;
123 /* the head for the list of ITTEs */
124 struct list_head itt_head;
125 u32 num_eventid_bits;
130 #define COLLECTION_NOT_MAPPED ((u32)~0)
132 struct its_collection {
133 struct list_head coll_list;
139 #define its_is_collection_mapped(coll) ((coll) && \
140 ((coll)->target_addr != COLLECTION_NOT_MAPPED))
143 struct list_head ite_list;
145 struct vgic_irq *irq;
146 struct its_collection *collection;
151 * struct vgic_its_abi - ITS abi ops and settings
152 * @cte_esz: collection table entry size
153 * @dte_esz: device table entry size
154 * @ite_esz: interrupt translation table entry size
155 * @save tables: save the ITS tables into guest RAM
156 * @restore_tables: restore the ITS internal structs from tables
157 * stored in guest RAM
158 * @commit: initialize the registers which expose the ABI settings,
159 * especially the entry sizes
161 struct vgic_its_abi {
165 int (*save_tables)(struct vgic_its *its);
166 int (*restore_tables)(struct vgic_its *its);
167 int (*commit)(struct vgic_its *its);
170 static const struct vgic_its_abi its_table_abi_versions[] = {
171 [0] = {.cte_esz = 8, .dte_esz = 8, .ite_esz = 8,
172 .save_tables = vgic_its_save_tables_v0,
173 .restore_tables = vgic_its_restore_tables_v0,
174 .commit = vgic_its_commit_v0,
178 #define NR_ITS_ABIS ARRAY_SIZE(its_table_abi_versions)
180 inline const struct vgic_its_abi *vgic_its_get_abi(struct vgic_its *its)
182 return &its_table_abi_versions[its->abi_rev];
185 int vgic_its_set_abi(struct vgic_its *its, int rev)
187 const struct vgic_its_abi *abi;
190 abi = vgic_its_get_abi(its);
191 return abi->commit(its);
195 * Find and returns a device in the device table for an ITS.
196 * Must be called with the its_lock mutex held.
198 static struct its_device *find_its_device(struct vgic_its *its, u32 device_id)
200 struct its_device *device;
202 list_for_each_entry(device, &its->device_list, dev_list)
203 if (device_id == device->device_id)
210 * Find and returns an interrupt translation table entry (ITTE) for a given
211 * Device ID/Event ID pair on an ITS.
212 * Must be called with the its_lock mutex held.
214 static struct its_ite *find_ite(struct vgic_its *its, u32 device_id,
217 struct its_device *device;
220 device = find_its_device(its, device_id);
224 list_for_each_entry(ite, &device->itt_head, ite_list)
225 if (ite->event_id == event_id)
231 /* To be used as an iterator this macro misses the enclosing parentheses */
232 #define for_each_lpi_its(dev, ite, its) \
233 list_for_each_entry(dev, &(its)->device_list, dev_list) \
234 list_for_each_entry(ite, &(dev)->itt_head, ite_list)
237 * We only implement 48 bits of PA at the moment, although the ITS
238 * supports more. Let's be restrictive here.
240 #define BASER_ADDRESS(x) ((x) & GENMASK_ULL(47, 16))
241 #define CBASER_ADDRESS(x) ((x) & GENMASK_ULL(47, 12))
243 #define GIC_LPI_OFFSET 8192
245 #define VITS_TYPER_IDBITS 16
246 #define VITS_TYPER_DEVBITS 16
247 #define VITS_DTE_MAX_DEVID_OFFSET (BIT(14) - 1)
248 #define VITS_ITE_MAX_EVENTID_OFFSET (BIT(16) - 1)
251 * Finds and returns a collection in the ITS collection table.
252 * Must be called with the its_lock mutex held.
254 static struct its_collection *find_collection(struct vgic_its *its, int coll_id)
256 struct its_collection *collection;
258 list_for_each_entry(collection, &its->collection_list, coll_list) {
259 if (coll_id == collection->collection_id)
266 #define LPI_PROP_ENABLE_BIT(p) ((p) & LPI_PROP_ENABLED)
267 #define LPI_PROP_PRIORITY(p) ((p) & 0xfc)
270 * Reads the configuration data for a given LPI from guest memory and
271 * updates the fields in struct vgic_irq.
272 * If filter_vcpu is not NULL, applies only if the IRQ is targeting this
273 * VCPU. Unconditionally applies if filter_vcpu is NULL.
275 static int update_lpi_config(struct kvm *kvm, struct vgic_irq *irq,
276 struct kvm_vcpu *filter_vcpu)
278 u64 propbase = GICR_PROPBASER_ADDRESS(kvm->arch.vgic.propbaser);
282 ret = kvm_read_guest(kvm, propbase + irq->intid - GIC_LPI_OFFSET,
288 spin_lock(&irq->irq_lock);
290 if (!filter_vcpu || filter_vcpu == irq->target_vcpu) {
291 irq->priority = LPI_PROP_PRIORITY(prop);
292 irq->enabled = LPI_PROP_ENABLE_BIT(prop);
294 vgic_queue_irq_unlock(kvm, irq);
296 spin_unlock(&irq->irq_lock);
303 * Create a snapshot of the current LPIs targeting @vcpu, so that we can
304 * enumerate those LPIs without holding any lock.
305 * Returns their number and puts the kmalloc'ed array into intid_ptr.
307 static int vgic_copy_lpi_list(struct kvm_vcpu *vcpu, u32 **intid_ptr)
309 struct vgic_dist *dist = &vcpu->kvm->arch.vgic;
310 struct vgic_irq *irq;
312 int irq_count = dist->lpi_list_count, i = 0;
315 * We use the current value of the list length, which may change
316 * after the kmalloc. We don't care, because the guest shouldn't
317 * change anything while the command handling is still running,
318 * and in the worst case we would miss a new IRQ, which one wouldn't
319 * expect to be covered by this command anyway.
321 intids = kmalloc_array(irq_count, sizeof(intids[0]), GFP_KERNEL);
325 spin_lock(&dist->lpi_list_lock);
326 list_for_each_entry(irq, &dist->lpi_list_head, lpi_list) {
327 /* We don't need to "get" the IRQ, as we hold the list lock. */
328 if (irq->target_vcpu != vcpu)
330 intids[i++] = irq->intid;
332 spin_unlock(&dist->lpi_list_lock);
339 * Promotes the ITS view of affinity of an ITTE (which redistributor this LPI
340 * is targeting) to the VGIC's view, which deals with target VCPUs.
341 * Needs to be called whenever either the collection for a LPIs has
342 * changed or the collection itself got retargeted.
344 static void update_affinity_ite(struct kvm *kvm, struct its_ite *ite)
346 struct kvm_vcpu *vcpu;
348 if (!its_is_collection_mapped(ite->collection))
351 vcpu = kvm_get_vcpu(kvm, ite->collection->target_addr);
353 spin_lock(&ite->irq->irq_lock);
354 ite->irq->target_vcpu = vcpu;
355 spin_unlock(&ite->irq->irq_lock);
359 * Updates the target VCPU for every LPI targeting this collection.
360 * Must be called with the its_lock mutex held.
362 static void update_affinity_collection(struct kvm *kvm, struct vgic_its *its,
363 struct its_collection *coll)
365 struct its_device *device;
368 for_each_lpi_its(device, ite, its) {
369 if (!ite->collection || coll != ite->collection)
372 update_affinity_ite(kvm, ite);
376 static u32 max_lpis_propbaser(u64 propbaser)
378 int nr_idbits = (propbaser & 0x1f) + 1;
380 return 1U << min(nr_idbits, INTERRUPT_ID_BITS_ITS);
384 * Sync the pending table pending bit of LPIs targeting @vcpu
385 * with our own data structures. This relies on the LPI being
388 static int its_sync_lpi_pending_table(struct kvm_vcpu *vcpu)
390 gpa_t pendbase = GICR_PENDBASER_ADDRESS(vcpu->arch.vgic_cpu.pendbaser);
391 struct vgic_irq *irq;
392 int last_byte_offset = -1;
397 nr_irqs = vgic_copy_lpi_list(vcpu, &intids);
401 for (i = 0; i < nr_irqs; i++) {
402 int byte_offset, bit_nr;
405 byte_offset = intids[i] / BITS_PER_BYTE;
406 bit_nr = intids[i] % BITS_PER_BYTE;
409 * For contiguously allocated LPIs chances are we just read
410 * this very same byte in the last iteration. Reuse that.
412 if (byte_offset != last_byte_offset) {
413 ret = kvm_read_guest(vcpu->kvm, pendbase + byte_offset,
419 last_byte_offset = byte_offset;
422 irq = vgic_get_irq(vcpu->kvm, NULL, intids[i]);
423 spin_lock(&irq->irq_lock);
424 irq->pending_latch = pendmask & (1U << bit_nr);
425 vgic_queue_irq_unlock(vcpu->kvm, irq);
426 vgic_put_irq(vcpu->kvm, irq);
434 static unsigned long vgic_mmio_read_its_typer(struct kvm *kvm,
435 struct vgic_its *its,
436 gpa_t addr, unsigned int len)
438 const struct vgic_its_abi *abi = vgic_its_get_abi(its);
439 u64 reg = GITS_TYPER_PLPIS;
442 * We use linear CPU numbers for redistributor addressing,
443 * so GITS_TYPER.PTA is 0.
444 * Also we force all PROPBASER registers to be the same, so
445 * CommonLPIAff is 0 as well.
446 * To avoid memory waste in the guest, we keep the number of IDBits and
447 * DevBits low - as least for the time being.
449 reg |= GIC_ENCODE_SZ(VITS_TYPER_DEVBITS, 5) << GITS_TYPER_DEVBITS_SHIFT;
450 reg |= GIC_ENCODE_SZ(VITS_TYPER_IDBITS, 5) << GITS_TYPER_IDBITS_SHIFT;
451 reg |= GIC_ENCODE_SZ(abi->ite_esz, 4) << GITS_TYPER_ITT_ENTRY_SIZE_SHIFT;
453 return extract_bytes(reg, addr & 7, len);
456 static unsigned long vgic_mmio_read_its_iidr(struct kvm *kvm,
457 struct vgic_its *its,
458 gpa_t addr, unsigned int len)
462 val = (its->abi_rev << GITS_IIDR_REV_SHIFT) & GITS_IIDR_REV_MASK;
463 val |= (PRODUCT_ID_KVM << GITS_IIDR_PRODUCTID_SHIFT) | IMPLEMENTER_ARM;
467 static int vgic_mmio_uaccess_write_its_iidr(struct kvm *kvm,
468 struct vgic_its *its,
469 gpa_t addr, unsigned int len,
472 u32 rev = GITS_IIDR_REV(val);
474 if (rev >= NR_ITS_ABIS)
476 return vgic_its_set_abi(its, rev);
479 static unsigned long vgic_mmio_read_its_idregs(struct kvm *kvm,
480 struct vgic_its *its,
481 gpa_t addr, unsigned int len)
483 switch (addr & 0xffff) {
485 return 0x92; /* part number, bits[7:0] */
487 return 0xb4; /* part number, bits[11:8] */
489 return GIC_PIDR2_ARCH_GICv3 | 0x0b;
491 return 0x40; /* This is a 64K software visible page */
492 /* The following are the ID registers for (any) GIC. */
507 * Find the target VCPU and the LPI number for a given devid/eventid pair
508 * and make this IRQ pending, possibly injecting it.
509 * Must be called with the its_lock mutex held.
510 * Returns 0 on success, a positive error value for any ITS mapping
511 * related errors and negative error values for generic errors.
513 static int vgic_its_trigger_msi(struct kvm *kvm, struct vgic_its *its,
514 u32 devid, u32 eventid)
516 struct kvm_vcpu *vcpu;
522 ite = find_ite(its, devid, eventid);
523 if (!ite || !its_is_collection_mapped(ite->collection))
524 return E_ITS_INT_UNMAPPED_INTERRUPT;
526 vcpu = kvm_get_vcpu(kvm, ite->collection->target_addr);
528 return E_ITS_INT_UNMAPPED_INTERRUPT;
530 if (!vcpu->arch.vgic_cpu.lpis_enabled)
533 spin_lock(&ite->irq->irq_lock);
534 ite->irq->pending_latch = true;
535 vgic_queue_irq_unlock(kvm, ite->irq);
540 static struct vgic_io_device *vgic_get_its_iodev(struct kvm_io_device *dev)
542 struct vgic_io_device *iodev;
544 if (dev->ops != &kvm_io_gic_ops)
547 iodev = container_of(dev, struct vgic_io_device, dev);
549 if (iodev->iodev_type != IODEV_ITS)
556 * Queries the KVM IO bus framework to get the ITS pointer from the given
558 * We then call vgic_its_trigger_msi() with the decoded data.
559 * According to the KVM_SIGNAL_MSI API description returns 1 on success.
561 int vgic_its_inject_msi(struct kvm *kvm, struct kvm_msi *msi)
564 struct kvm_io_device *kvm_io_dev;
565 struct vgic_io_device *iodev;
568 if (!vgic_has_its(kvm))
571 if (!(msi->flags & KVM_MSI_VALID_DEVID))
574 address = (u64)msi->address_hi << 32 | msi->address_lo;
576 kvm_io_dev = kvm_io_bus_get_dev(kvm, KVM_MMIO_BUS, address);
580 iodev = vgic_get_its_iodev(kvm_io_dev);
584 mutex_lock(&iodev->its->its_lock);
585 ret = vgic_its_trigger_msi(kvm, iodev->its, msi->devid, msi->data);
586 mutex_unlock(&iodev->its->its_lock);
592 * KVM_SIGNAL_MSI demands a return value > 0 for success and 0
593 * if the guest has blocked the MSI. So we map any LPI mapping
594 * related error to that.
602 /* Requires the its_lock to be held. */
603 static void its_free_ite(struct kvm *kvm, struct its_ite *ite)
605 list_del(&ite->ite_list);
607 /* This put matches the get in vgic_add_lpi. */
609 vgic_put_irq(kvm, ite->irq);
614 static u64 its_cmd_mask_field(u64 *its_cmd, int word, int shift, int size)
616 return (le64_to_cpu(its_cmd[word]) >> shift) & (BIT_ULL(size) - 1);
619 #define its_cmd_get_command(cmd) its_cmd_mask_field(cmd, 0, 0, 8)
620 #define its_cmd_get_deviceid(cmd) its_cmd_mask_field(cmd, 0, 32, 32)
621 #define its_cmd_get_size(cmd) (its_cmd_mask_field(cmd, 1, 0, 5) + 1)
622 #define its_cmd_get_id(cmd) its_cmd_mask_field(cmd, 1, 0, 32)
623 #define its_cmd_get_physical_id(cmd) its_cmd_mask_field(cmd, 1, 32, 32)
624 #define its_cmd_get_collection(cmd) its_cmd_mask_field(cmd, 2, 0, 16)
625 #define its_cmd_get_ittaddr(cmd) (its_cmd_mask_field(cmd, 2, 8, 44) << 8)
626 #define its_cmd_get_target_addr(cmd) its_cmd_mask_field(cmd, 2, 16, 32)
627 #define its_cmd_get_validbit(cmd) its_cmd_mask_field(cmd, 2, 63, 1)
630 * The DISCARD command frees an Interrupt Translation Table Entry (ITTE).
631 * Must be called with the its_lock mutex held.
633 static int vgic_its_cmd_handle_discard(struct kvm *kvm, struct vgic_its *its,
636 u32 device_id = its_cmd_get_deviceid(its_cmd);
637 u32 event_id = its_cmd_get_id(its_cmd);
641 ite = find_ite(its, device_id, event_id);
642 if (ite && ite->collection) {
644 * Though the spec talks about removing the pending state, we
645 * don't bother here since we clear the ITTE anyway and the
646 * pending state is a property of the ITTE struct.
648 its_free_ite(kvm, ite);
652 return E_ITS_DISCARD_UNMAPPED_INTERRUPT;
656 * The MOVI command moves an ITTE to a different collection.
657 * Must be called with the its_lock mutex held.
659 static int vgic_its_cmd_handle_movi(struct kvm *kvm, struct vgic_its *its,
662 u32 device_id = its_cmd_get_deviceid(its_cmd);
663 u32 event_id = its_cmd_get_id(its_cmd);
664 u32 coll_id = its_cmd_get_collection(its_cmd);
665 struct kvm_vcpu *vcpu;
667 struct its_collection *collection;
669 ite = find_ite(its, device_id, event_id);
671 return E_ITS_MOVI_UNMAPPED_INTERRUPT;
673 if (!its_is_collection_mapped(ite->collection))
674 return E_ITS_MOVI_UNMAPPED_COLLECTION;
676 collection = find_collection(its, coll_id);
677 if (!its_is_collection_mapped(collection))
678 return E_ITS_MOVI_UNMAPPED_COLLECTION;
680 ite->collection = collection;
681 vcpu = kvm_get_vcpu(kvm, collection->target_addr);
683 spin_lock(&ite->irq->irq_lock);
684 ite->irq->target_vcpu = vcpu;
685 spin_unlock(&ite->irq->irq_lock);
691 * Check whether an ID can be stored into the corresponding guest table.
692 * For a direct table this is pretty easy, but gets a bit nasty for
693 * indirect tables. We check whether the resulting guest physical address
694 * is actually valid (covered by a memslot and guest accessible).
695 * For this we have to read the respective first level entry.
697 static bool vgic_its_check_id(struct vgic_its *its, u64 baser, u32 id,
700 int l1_tbl_size = GITS_BASER_NR_PAGES(baser) * SZ_64K;
701 u64 indirect_ptr, type = GITS_BASER_TYPE(baser);
702 int esz = GITS_BASER_ENTRY_SIZE(baser);
707 case GITS_BASER_TYPE_DEVICE:
708 if (id >= BIT_ULL(VITS_TYPER_DEVBITS))
711 case GITS_BASER_TYPE_COLLECTION:
712 /* as GITS_TYPER.CIL == 0, ITS supports 16-bit collection ID */
713 if (id >= BIT_ULL(16))
720 if (!(baser & GITS_BASER_INDIRECT)) {
723 if (id >= (l1_tbl_size / esz))
726 addr = BASER_ADDRESS(baser) + id * esz;
727 gfn = addr >> PAGE_SHIFT;
731 return kvm_is_visible_gfn(its->dev->kvm, gfn);
734 /* calculate and check the index into the 1st level */
735 index = id / (SZ_64K / esz);
736 if (index >= (l1_tbl_size / sizeof(u64)))
739 /* Each 1st level entry is represented by a 64-bit value. */
740 if (kvm_read_guest(its->dev->kvm,
741 BASER_ADDRESS(baser) + index * sizeof(indirect_ptr),
742 &indirect_ptr, sizeof(indirect_ptr)))
745 indirect_ptr = le64_to_cpu(indirect_ptr);
747 /* check the valid bit of the first level entry */
748 if (!(indirect_ptr & BIT_ULL(63)))
752 * Mask the guest physical address and calculate the frame number.
753 * Any address beyond our supported 48 bits of PA will be caught
754 * by the actual check in the final step.
756 indirect_ptr &= GENMASK_ULL(51, 16);
758 /* Find the address of the actual entry */
759 index = id % (SZ_64K / esz);
760 indirect_ptr += index * esz;
761 gfn = indirect_ptr >> PAGE_SHIFT;
764 *eaddr = indirect_ptr;
765 return kvm_is_visible_gfn(its->dev->kvm, gfn);
768 static int vgic_its_alloc_collection(struct vgic_its *its,
769 struct its_collection **colp,
772 struct its_collection *collection;
774 if (!vgic_its_check_id(its, its->baser_coll_table, coll_id, NULL))
775 return E_ITS_MAPC_COLLECTION_OOR;
777 collection = kzalloc(sizeof(*collection), GFP_KERNEL);
779 collection->collection_id = coll_id;
780 collection->target_addr = COLLECTION_NOT_MAPPED;
782 list_add_tail(&collection->coll_list, &its->collection_list);
788 static void vgic_its_free_collection(struct vgic_its *its, u32 coll_id)
790 struct its_collection *collection;
791 struct its_device *device;
795 * Clearing the mapping for that collection ID removes the
796 * entry from the list. If there wasn't any before, we can
799 collection = find_collection(its, coll_id);
803 for_each_lpi_its(device, ite, its)
804 if (ite->collection &&
805 ite->collection->collection_id == coll_id)
806 ite->collection = NULL;
808 list_del(&collection->coll_list);
812 /* Must be called with its_lock mutex held */
813 static struct its_ite *vgic_its_alloc_ite(struct its_device *device,
814 struct its_collection *collection,
819 ite = kzalloc(sizeof(*ite), GFP_KERNEL);
821 return ERR_PTR(-ENOMEM);
823 ite->event_id = event_id;
824 ite->collection = collection;
826 list_add_tail(&ite->ite_list, &device->itt_head);
831 * The MAPTI and MAPI commands map LPIs to ITTEs.
832 * Must be called with its_lock mutex held.
834 static int vgic_its_cmd_handle_mapi(struct kvm *kvm, struct vgic_its *its,
837 u32 device_id = its_cmd_get_deviceid(its_cmd);
838 u32 event_id = its_cmd_get_id(its_cmd);
839 u32 coll_id = its_cmd_get_collection(its_cmd);
841 struct kvm_vcpu *vcpu = NULL;
842 struct its_device *device;
843 struct its_collection *collection, *new_coll = NULL;
844 struct vgic_irq *irq;
847 device = find_its_device(its, device_id);
849 return E_ITS_MAPTI_UNMAPPED_DEVICE;
851 if (event_id >= BIT_ULL(device->num_eventid_bits))
852 return E_ITS_MAPTI_ID_OOR;
854 if (its_cmd_get_command(its_cmd) == GITS_CMD_MAPTI)
855 lpi_nr = its_cmd_get_physical_id(its_cmd);
858 if (lpi_nr < GIC_LPI_OFFSET ||
859 lpi_nr >= max_lpis_propbaser(kvm->arch.vgic.propbaser))
860 return E_ITS_MAPTI_PHYSICALID_OOR;
862 /* If there is an existing mapping, behavior is UNPREDICTABLE. */
863 if (find_ite(its, device_id, event_id))
866 collection = find_collection(its, coll_id);
868 int ret = vgic_its_alloc_collection(its, &collection, coll_id);
871 new_coll = collection;
874 ite = vgic_its_alloc_ite(device, collection, event_id);
877 vgic_its_free_collection(its, coll_id);
881 if (its_is_collection_mapped(collection))
882 vcpu = kvm_get_vcpu(kvm, collection->target_addr);
884 irq = vgic_add_lpi(kvm, lpi_nr, vcpu);
887 vgic_its_free_collection(its, coll_id);
888 its_free_ite(kvm, ite);
896 /* Requires the its_lock to be held. */
897 static void vgic_its_unmap_device(struct kvm *kvm, struct its_device *device)
899 struct its_ite *ite, *temp;
902 * The spec says that unmapping a device with still valid
903 * ITTEs associated is UNPREDICTABLE. We remove all ITTEs,
904 * since we cannot leave the memory unreferenced.
906 list_for_each_entry_safe(ite, temp, &device->itt_head, ite_list)
907 its_free_ite(kvm, ite);
909 list_del(&device->dev_list);
913 /* Must be called with its_lock mutex held */
914 static struct its_device *vgic_its_alloc_device(struct vgic_its *its,
915 u32 device_id, gpa_t itt_addr,
918 struct its_device *device;
920 device = kzalloc(sizeof(*device), GFP_KERNEL);
922 return ERR_PTR(-ENOMEM);
924 device->device_id = device_id;
925 device->itt_addr = itt_addr;
926 device->num_eventid_bits = num_eventid_bits;
927 INIT_LIST_HEAD(&device->itt_head);
929 list_add_tail(&device->dev_list, &its->device_list);
934 * MAPD maps or unmaps a device ID to Interrupt Translation Tables (ITTs).
935 * Must be called with the its_lock mutex held.
937 static int vgic_its_cmd_handle_mapd(struct kvm *kvm, struct vgic_its *its,
940 u32 device_id = its_cmd_get_deviceid(its_cmd);
941 bool valid = its_cmd_get_validbit(its_cmd);
942 u8 num_eventid_bits = its_cmd_get_size(its_cmd);
943 gpa_t itt_addr = its_cmd_get_ittaddr(its_cmd);
944 struct its_device *device;
946 if (!vgic_its_check_id(its, its->baser_device_table, device_id, NULL))
947 return E_ITS_MAPD_DEVICE_OOR;
949 if (valid && num_eventid_bits > VITS_TYPER_IDBITS)
950 return E_ITS_MAPD_ITTSIZE_OOR;
952 device = find_its_device(its, device_id);
955 * The spec says that calling MAPD on an already mapped device
956 * invalidates all cached data for this device. We implement this
957 * by removing the mapping and re-establishing it.
960 vgic_its_unmap_device(kvm, device);
963 * The spec does not say whether unmapping a not-mapped device
964 * is an error, so we are done in any case.
969 device = vgic_its_alloc_device(its, device_id, itt_addr,
972 return PTR_ERR(device);
978 * The MAPC command maps collection IDs to redistributors.
979 * Must be called with the its_lock mutex held.
981 static int vgic_its_cmd_handle_mapc(struct kvm *kvm, struct vgic_its *its,
986 struct its_collection *collection;
989 valid = its_cmd_get_validbit(its_cmd);
990 coll_id = its_cmd_get_collection(its_cmd);
991 target_addr = its_cmd_get_target_addr(its_cmd);
993 if (target_addr >= atomic_read(&kvm->online_vcpus))
994 return E_ITS_MAPC_PROCNUM_OOR;
997 vgic_its_free_collection(its, coll_id);
999 collection = find_collection(its, coll_id);
1004 ret = vgic_its_alloc_collection(its, &collection,
1008 collection->target_addr = target_addr;
1010 collection->target_addr = target_addr;
1011 update_affinity_collection(kvm, its, collection);
1019 * The CLEAR command removes the pending state for a particular LPI.
1020 * Must be called with the its_lock mutex held.
1022 static int vgic_its_cmd_handle_clear(struct kvm *kvm, struct vgic_its *its,
1025 u32 device_id = its_cmd_get_deviceid(its_cmd);
1026 u32 event_id = its_cmd_get_id(its_cmd);
1027 struct its_ite *ite;
1030 ite = find_ite(its, device_id, event_id);
1032 return E_ITS_CLEAR_UNMAPPED_INTERRUPT;
1034 ite->irq->pending_latch = false;
1040 * The INV command syncs the configuration bits from the memory table.
1041 * Must be called with the its_lock mutex held.
1043 static int vgic_its_cmd_handle_inv(struct kvm *kvm, struct vgic_its *its,
1046 u32 device_id = its_cmd_get_deviceid(its_cmd);
1047 u32 event_id = its_cmd_get_id(its_cmd);
1048 struct its_ite *ite;
1051 ite = find_ite(its, device_id, event_id);
1053 return E_ITS_INV_UNMAPPED_INTERRUPT;
1055 return update_lpi_config(kvm, ite->irq, NULL);
1059 * The INVALL command requests flushing of all IRQ data in this collection.
1060 * Find the VCPU mapped to that collection, then iterate over the VM's list
1061 * of mapped LPIs and update the configuration for each IRQ which targets
1062 * the specified vcpu. The configuration will be read from the in-memory
1063 * configuration table.
1064 * Must be called with the its_lock mutex held.
1066 static int vgic_its_cmd_handle_invall(struct kvm *kvm, struct vgic_its *its,
1069 u32 coll_id = its_cmd_get_collection(its_cmd);
1070 struct its_collection *collection;
1071 struct kvm_vcpu *vcpu;
1072 struct vgic_irq *irq;
1076 collection = find_collection(its, coll_id);
1077 if (!its_is_collection_mapped(collection))
1078 return E_ITS_INVALL_UNMAPPED_COLLECTION;
1080 vcpu = kvm_get_vcpu(kvm, collection->target_addr);
1082 irq_count = vgic_copy_lpi_list(vcpu, &intids);
1086 for (i = 0; i < irq_count; i++) {
1087 irq = vgic_get_irq(kvm, NULL, intids[i]);
1090 update_lpi_config(kvm, irq, vcpu);
1091 vgic_put_irq(kvm, irq);
1100 * The MOVALL command moves the pending state of all IRQs targeting one
1101 * redistributor to another. We don't hold the pending state in the VCPUs,
1102 * but in the IRQs instead, so there is really not much to do for us here.
1103 * However the spec says that no IRQ must target the old redistributor
1104 * afterwards, so we make sure that no LPI is using the associated target_vcpu.
1105 * This command affects all LPIs in the system that target that redistributor.
1107 static int vgic_its_cmd_handle_movall(struct kvm *kvm, struct vgic_its *its,
1110 struct vgic_dist *dist = &kvm->arch.vgic;
1111 u32 target1_addr = its_cmd_get_target_addr(its_cmd);
1112 u32 target2_addr = its_cmd_mask_field(its_cmd, 3, 16, 32);
1113 struct kvm_vcpu *vcpu1, *vcpu2;
1114 struct vgic_irq *irq;
1116 if (target1_addr >= atomic_read(&kvm->online_vcpus) ||
1117 target2_addr >= atomic_read(&kvm->online_vcpus))
1118 return E_ITS_MOVALL_PROCNUM_OOR;
1120 if (target1_addr == target2_addr)
1123 vcpu1 = kvm_get_vcpu(kvm, target1_addr);
1124 vcpu2 = kvm_get_vcpu(kvm, target2_addr);
1126 spin_lock(&dist->lpi_list_lock);
1128 list_for_each_entry(irq, &dist->lpi_list_head, lpi_list) {
1129 spin_lock(&irq->irq_lock);
1131 if (irq->target_vcpu == vcpu1)
1132 irq->target_vcpu = vcpu2;
1134 spin_unlock(&irq->irq_lock);
1137 spin_unlock(&dist->lpi_list_lock);
1143 * The INT command injects the LPI associated with that DevID/EvID pair.
1144 * Must be called with the its_lock mutex held.
1146 static int vgic_its_cmd_handle_int(struct kvm *kvm, struct vgic_its *its,
1149 u32 msi_data = its_cmd_get_id(its_cmd);
1150 u64 msi_devid = its_cmd_get_deviceid(its_cmd);
1152 return vgic_its_trigger_msi(kvm, its, msi_devid, msi_data);
1156 * This function is called with the its_cmd lock held, but the ITS data
1157 * structure lock dropped.
1159 static int vgic_its_handle_command(struct kvm *kvm, struct vgic_its *its,
1164 mutex_lock(&its->its_lock);
1165 switch (its_cmd_get_command(its_cmd)) {
1167 ret = vgic_its_cmd_handle_mapd(kvm, its, its_cmd);
1170 ret = vgic_its_cmd_handle_mapc(kvm, its, its_cmd);
1173 ret = vgic_its_cmd_handle_mapi(kvm, its, its_cmd);
1175 case GITS_CMD_MAPTI:
1176 ret = vgic_its_cmd_handle_mapi(kvm, its, its_cmd);
1179 ret = vgic_its_cmd_handle_movi(kvm, its, its_cmd);
1181 case GITS_CMD_DISCARD:
1182 ret = vgic_its_cmd_handle_discard(kvm, its, its_cmd);
1184 case GITS_CMD_CLEAR:
1185 ret = vgic_its_cmd_handle_clear(kvm, its, its_cmd);
1187 case GITS_CMD_MOVALL:
1188 ret = vgic_its_cmd_handle_movall(kvm, its, its_cmd);
1191 ret = vgic_its_cmd_handle_int(kvm, its, its_cmd);
1194 ret = vgic_its_cmd_handle_inv(kvm, its, its_cmd);
1196 case GITS_CMD_INVALL:
1197 ret = vgic_its_cmd_handle_invall(kvm, its, its_cmd);
1200 /* we ignore this command: we are in sync all of the time */
1204 mutex_unlock(&its->its_lock);
1209 static u64 vgic_sanitise_its_baser(u64 reg)
1211 reg = vgic_sanitise_field(reg, GITS_BASER_SHAREABILITY_MASK,
1212 GITS_BASER_SHAREABILITY_SHIFT,
1213 vgic_sanitise_shareability);
1214 reg = vgic_sanitise_field(reg, GITS_BASER_INNER_CACHEABILITY_MASK,
1215 GITS_BASER_INNER_CACHEABILITY_SHIFT,
1216 vgic_sanitise_inner_cacheability);
1217 reg = vgic_sanitise_field(reg, GITS_BASER_OUTER_CACHEABILITY_MASK,
1218 GITS_BASER_OUTER_CACHEABILITY_SHIFT,
1219 vgic_sanitise_outer_cacheability);
1221 /* Bits 15:12 contain bits 51:48 of the PA, which we don't support. */
1222 reg &= ~GENMASK_ULL(15, 12);
1224 /* We support only one (ITS) page size: 64K */
1225 reg = (reg & ~GITS_BASER_PAGE_SIZE_MASK) | GITS_BASER_PAGE_SIZE_64K;
1230 static u64 vgic_sanitise_its_cbaser(u64 reg)
1232 reg = vgic_sanitise_field(reg, GITS_CBASER_SHAREABILITY_MASK,
1233 GITS_CBASER_SHAREABILITY_SHIFT,
1234 vgic_sanitise_shareability);
1235 reg = vgic_sanitise_field(reg, GITS_CBASER_INNER_CACHEABILITY_MASK,
1236 GITS_CBASER_INNER_CACHEABILITY_SHIFT,
1237 vgic_sanitise_inner_cacheability);
1238 reg = vgic_sanitise_field(reg, GITS_CBASER_OUTER_CACHEABILITY_MASK,
1239 GITS_CBASER_OUTER_CACHEABILITY_SHIFT,
1240 vgic_sanitise_outer_cacheability);
1243 * Sanitise the physical address to be 64k aligned.
1244 * Also limit the physical addresses to 48 bits.
1246 reg &= ~(GENMASK_ULL(51, 48) | GENMASK_ULL(15, 12));
1251 static unsigned long vgic_mmio_read_its_cbaser(struct kvm *kvm,
1252 struct vgic_its *its,
1253 gpa_t addr, unsigned int len)
1255 return extract_bytes(its->cbaser, addr & 7, len);
1258 static void vgic_mmio_write_its_cbaser(struct kvm *kvm, struct vgic_its *its,
1259 gpa_t addr, unsigned int len,
1262 /* When GITS_CTLR.Enable is 1, this register is RO. */
1266 mutex_lock(&its->cmd_lock);
1267 its->cbaser = update_64bit_reg(its->cbaser, addr & 7, len, val);
1268 its->cbaser = vgic_sanitise_its_cbaser(its->cbaser);
1271 * CWRITER is architecturally UNKNOWN on reset, but we need to reset
1272 * it to CREADR to make sure we start with an empty command buffer.
1274 its->cwriter = its->creadr;
1275 mutex_unlock(&its->cmd_lock);
1278 #define ITS_CMD_BUFFER_SIZE(baser) ((((baser) & 0xff) + 1) << 12)
1279 #define ITS_CMD_SIZE 32
1280 #define ITS_CMD_OFFSET(reg) ((reg) & GENMASK(19, 5))
1282 /* Must be called with the cmd_lock held. */
1283 static void vgic_its_process_commands(struct kvm *kvm, struct vgic_its *its)
1288 /* Commands are only processed when the ITS is enabled. */
1292 cbaser = CBASER_ADDRESS(its->cbaser);
1294 while (its->cwriter != its->creadr) {
1295 int ret = kvm_read_guest(kvm, cbaser + its->creadr,
1296 cmd_buf, ITS_CMD_SIZE);
1298 * If kvm_read_guest() fails, this could be due to the guest
1299 * programming a bogus value in CBASER or something else going
1300 * wrong from which we cannot easily recover.
1301 * According to section 6.3.2 in the GICv3 spec we can just
1302 * ignore that command then.
1305 vgic_its_handle_command(kvm, its, cmd_buf);
1307 its->creadr += ITS_CMD_SIZE;
1308 if (its->creadr == ITS_CMD_BUFFER_SIZE(its->cbaser))
1314 * By writing to CWRITER the guest announces new commands to be processed.
1315 * To avoid any races in the first place, we take the its_cmd lock, which
1316 * protects our ring buffer variables, so that there is only one user
1317 * per ITS handling commands at a given time.
1319 static void vgic_mmio_write_its_cwriter(struct kvm *kvm, struct vgic_its *its,
1320 gpa_t addr, unsigned int len,
1328 mutex_lock(&its->cmd_lock);
1330 reg = update_64bit_reg(its->cwriter, addr & 7, len, val);
1331 reg = ITS_CMD_OFFSET(reg);
1332 if (reg >= ITS_CMD_BUFFER_SIZE(its->cbaser)) {
1333 mutex_unlock(&its->cmd_lock);
1338 vgic_its_process_commands(kvm, its);
1340 mutex_unlock(&its->cmd_lock);
1343 static unsigned long vgic_mmio_read_its_cwriter(struct kvm *kvm,
1344 struct vgic_its *its,
1345 gpa_t addr, unsigned int len)
1347 return extract_bytes(its->cwriter, addr & 0x7, len);
1350 static unsigned long vgic_mmio_read_its_creadr(struct kvm *kvm,
1351 struct vgic_its *its,
1352 gpa_t addr, unsigned int len)
1354 return extract_bytes(its->creadr, addr & 0x7, len);
1357 static int vgic_mmio_uaccess_write_its_creadr(struct kvm *kvm,
1358 struct vgic_its *its,
1359 gpa_t addr, unsigned int len,
1365 mutex_lock(&its->cmd_lock);
1372 cmd_offset = ITS_CMD_OFFSET(val);
1373 if (cmd_offset >= ITS_CMD_BUFFER_SIZE(its->cbaser)) {
1378 its->creadr = cmd_offset;
1380 mutex_unlock(&its->cmd_lock);
1384 #define BASER_INDEX(addr) (((addr) / sizeof(u64)) & 0x7)
1385 static unsigned long vgic_mmio_read_its_baser(struct kvm *kvm,
1386 struct vgic_its *its,
1387 gpa_t addr, unsigned int len)
1391 switch (BASER_INDEX(addr)) {
1393 reg = its->baser_device_table;
1396 reg = its->baser_coll_table;
1403 return extract_bytes(reg, addr & 7, len);
1406 #define GITS_BASER_RO_MASK (GENMASK_ULL(52, 48) | GENMASK_ULL(58, 56))
1407 static void vgic_mmio_write_its_baser(struct kvm *kvm,
1408 struct vgic_its *its,
1409 gpa_t addr, unsigned int len,
1412 const struct vgic_its_abi *abi = vgic_its_get_abi(its);
1413 u64 entry_size, device_type;
1414 u64 reg, *regptr, clearbits = 0;
1416 /* When GITS_CTLR.Enable is 1, we ignore write accesses. */
1420 switch (BASER_INDEX(addr)) {
1422 regptr = &its->baser_device_table;
1423 entry_size = abi->dte_esz;
1424 device_type = GITS_BASER_TYPE_DEVICE;
1427 regptr = &its->baser_coll_table;
1428 entry_size = abi->cte_esz;
1429 device_type = GITS_BASER_TYPE_COLLECTION;
1430 clearbits = GITS_BASER_INDIRECT;
1436 reg = update_64bit_reg(*regptr, addr & 7, len, val);
1437 reg &= ~GITS_BASER_RO_MASK;
1440 reg |= (entry_size - 1) << GITS_BASER_ENTRY_SIZE_SHIFT;
1441 reg |= device_type << GITS_BASER_TYPE_SHIFT;
1442 reg = vgic_sanitise_its_baser(reg);
1447 static unsigned long vgic_mmio_read_its_ctlr(struct kvm *vcpu,
1448 struct vgic_its *its,
1449 gpa_t addr, unsigned int len)
1453 mutex_lock(&its->cmd_lock);
1454 if (its->creadr == its->cwriter)
1455 reg |= GITS_CTLR_QUIESCENT;
1457 reg |= GITS_CTLR_ENABLE;
1458 mutex_unlock(&its->cmd_lock);
1463 static void vgic_mmio_write_its_ctlr(struct kvm *kvm, struct vgic_its *its,
1464 gpa_t addr, unsigned int len,
1467 mutex_lock(&its->cmd_lock);
1470 * It is UNPREDICTABLE to enable the ITS if any of the CBASER or
1471 * device/collection BASER are invalid
1473 if (!its->enabled && (val & GITS_CTLR_ENABLE) &&
1474 (!(its->baser_device_table & GITS_BASER_VALID) ||
1475 !(its->baser_coll_table & GITS_BASER_VALID) ||
1476 !(its->cbaser & GITS_CBASER_VALID)))
1479 its->enabled = !!(val & GITS_CTLR_ENABLE);
1482 * Try to process any pending commands. This function bails out early
1483 * if the ITS is disabled or no commands have been queued.
1485 vgic_its_process_commands(kvm, its);
1488 mutex_unlock(&its->cmd_lock);
1491 #define REGISTER_ITS_DESC(off, rd, wr, length, acc) \
1493 .reg_offset = off, \
1495 .access_flags = acc, \
1500 #define REGISTER_ITS_DESC_UACCESS(off, rd, wr, uwr, length, acc)\
1502 .reg_offset = off, \
1504 .access_flags = acc, \
1507 .uaccess_its_write = uwr, \
1510 static void its_mmio_write_wi(struct kvm *kvm, struct vgic_its *its,
1511 gpa_t addr, unsigned int len, unsigned long val)
1516 static struct vgic_register_region its_registers[] = {
1517 REGISTER_ITS_DESC(GITS_CTLR,
1518 vgic_mmio_read_its_ctlr, vgic_mmio_write_its_ctlr, 4,
1520 REGISTER_ITS_DESC_UACCESS(GITS_IIDR,
1521 vgic_mmio_read_its_iidr, its_mmio_write_wi,
1522 vgic_mmio_uaccess_write_its_iidr, 4,
1524 REGISTER_ITS_DESC(GITS_TYPER,
1525 vgic_mmio_read_its_typer, its_mmio_write_wi, 8,
1526 VGIC_ACCESS_64bit | VGIC_ACCESS_32bit),
1527 REGISTER_ITS_DESC(GITS_CBASER,
1528 vgic_mmio_read_its_cbaser, vgic_mmio_write_its_cbaser, 8,
1529 VGIC_ACCESS_64bit | VGIC_ACCESS_32bit),
1530 REGISTER_ITS_DESC(GITS_CWRITER,
1531 vgic_mmio_read_its_cwriter, vgic_mmio_write_its_cwriter, 8,
1532 VGIC_ACCESS_64bit | VGIC_ACCESS_32bit),
1533 REGISTER_ITS_DESC_UACCESS(GITS_CREADR,
1534 vgic_mmio_read_its_creadr, its_mmio_write_wi,
1535 vgic_mmio_uaccess_write_its_creadr, 8,
1536 VGIC_ACCESS_64bit | VGIC_ACCESS_32bit),
1537 REGISTER_ITS_DESC(GITS_BASER,
1538 vgic_mmio_read_its_baser, vgic_mmio_write_its_baser, 0x40,
1539 VGIC_ACCESS_64bit | VGIC_ACCESS_32bit),
1540 REGISTER_ITS_DESC(GITS_IDREGS_BASE,
1541 vgic_mmio_read_its_idregs, its_mmio_write_wi, 0x30,
1545 /* This is called on setting the LPI enable bit in the redistributor. */
1546 void vgic_enable_lpis(struct kvm_vcpu *vcpu)
1548 if (!(vcpu->arch.vgic_cpu.pendbaser & GICR_PENDBASER_PTZ))
1549 its_sync_lpi_pending_table(vcpu);
1552 static int vgic_register_its_iodev(struct kvm *kvm, struct vgic_its *its,
1555 struct vgic_io_device *iodev = &its->iodev;
1558 mutex_lock(&kvm->slots_lock);
1559 if (!IS_VGIC_ADDR_UNDEF(its->vgic_its_base)) {
1564 its->vgic_its_base = addr;
1565 iodev->regions = its_registers;
1566 iodev->nr_regions = ARRAY_SIZE(its_registers);
1567 kvm_iodevice_init(&iodev->dev, &kvm_io_gic_ops);
1569 iodev->base_addr = its->vgic_its_base;
1570 iodev->iodev_type = IODEV_ITS;
1572 ret = kvm_io_bus_register_dev(kvm, KVM_MMIO_BUS, iodev->base_addr,
1573 KVM_VGIC_V3_ITS_SIZE, &iodev->dev);
1575 mutex_unlock(&kvm->slots_lock);
1580 #define INITIAL_BASER_VALUE \
1581 (GIC_BASER_CACHEABILITY(GITS_BASER, INNER, RaWb) | \
1582 GIC_BASER_CACHEABILITY(GITS_BASER, OUTER, SameAsInner) | \
1583 GIC_BASER_SHAREABILITY(GITS_BASER, InnerShareable) | \
1584 GITS_BASER_PAGE_SIZE_64K)
1586 #define INITIAL_PROPBASER_VALUE \
1587 (GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, RaWb) | \
1588 GIC_BASER_CACHEABILITY(GICR_PROPBASER, OUTER, SameAsInner) | \
1589 GIC_BASER_SHAREABILITY(GICR_PROPBASER, InnerShareable))
1591 static int vgic_its_create(struct kvm_device *dev, u32 type)
1593 struct vgic_its *its;
1595 if (type != KVM_DEV_TYPE_ARM_VGIC_ITS)
1598 its = kzalloc(sizeof(struct vgic_its), GFP_KERNEL);
1602 mutex_init(&its->its_lock);
1603 mutex_init(&its->cmd_lock);
1605 its->vgic_its_base = VGIC_ADDR_UNDEF;
1607 INIT_LIST_HEAD(&its->device_list);
1608 INIT_LIST_HEAD(&its->collection_list);
1610 dev->kvm->arch.vgic.msis_require_devid = true;
1611 dev->kvm->arch.vgic.has_its = true;
1612 its->enabled = false;
1615 its->baser_device_table = INITIAL_BASER_VALUE |
1616 ((u64)GITS_BASER_TYPE_DEVICE << GITS_BASER_TYPE_SHIFT);
1617 its->baser_coll_table = INITIAL_BASER_VALUE |
1618 ((u64)GITS_BASER_TYPE_COLLECTION << GITS_BASER_TYPE_SHIFT);
1619 dev->kvm->arch.vgic.propbaser = INITIAL_PROPBASER_VALUE;
1623 return vgic_its_set_abi(its, NR_ITS_ABIS - 1);
1626 static void vgic_its_free_device(struct kvm *kvm, struct its_device *dev)
1628 struct its_ite *ite, *tmp;
1630 list_for_each_entry_safe(ite, tmp, &dev->itt_head, ite_list)
1631 its_free_ite(kvm, ite);
1632 list_del(&dev->dev_list);
1636 static void vgic_its_destroy(struct kvm_device *kvm_dev)
1638 struct kvm *kvm = kvm_dev->kvm;
1639 struct vgic_its *its = kvm_dev->private;
1640 struct list_head *cur, *temp;
1643 * We may end up here without the lists ever having been initialized.
1644 * Check this and bail out early to avoid dereferencing a NULL pointer.
1646 if (!its->device_list.next)
1649 mutex_lock(&its->its_lock);
1650 list_for_each_safe(cur, temp, &its->device_list) {
1651 struct its_device *dev;
1653 dev = list_entry(cur, struct its_device, dev_list);
1654 vgic_its_free_device(kvm, dev);
1657 list_for_each_safe(cur, temp, &its->collection_list) {
1658 struct its_collection *coll;
1660 coll = list_entry(cur, struct its_collection, coll_list);
1664 mutex_unlock(&its->its_lock);
1669 int vgic_its_has_attr_regs(struct kvm_device *dev,
1670 struct kvm_device_attr *attr)
1672 const struct vgic_register_region *region;
1673 gpa_t offset = attr->attr;
1676 align = (offset < GITS_TYPER) || (offset >= GITS_PIDR4) ? 0x3 : 0x7;
1681 region = vgic_find_mmio_region(its_registers,
1682 ARRAY_SIZE(its_registers),
1690 int vgic_its_attr_regs_access(struct kvm_device *dev,
1691 struct kvm_device_attr *attr,
1692 u64 *reg, bool is_write)
1694 const struct vgic_register_region *region;
1695 struct vgic_its *its;
1701 offset = attr->attr;
1704 * Although the spec supports upper/lower 32-bit accesses to
1705 * 64-bit ITS registers, the userspace ABI requires 64-bit
1706 * accesses to all 64-bit wide registers. We therefore only
1707 * support 32-bit accesses to GITS_CTLR, GITS_IIDR and GITS ID
1710 if ((offset < GITS_TYPER) || (offset >= GITS_PIDR4))
1718 mutex_lock(&dev->kvm->lock);
1720 if (IS_VGIC_ADDR_UNDEF(its->vgic_its_base)) {
1725 region = vgic_find_mmio_region(its_registers,
1726 ARRAY_SIZE(its_registers),
1733 if (!lock_all_vcpus(dev->kvm)) {
1738 addr = its->vgic_its_base + offset;
1740 len = region->access_flags & VGIC_ACCESS_64bit ? 8 : 4;
1743 if (region->uaccess_its_write)
1744 ret = region->uaccess_its_write(dev->kvm, its, addr,
1747 region->its_write(dev->kvm, its, addr, len, *reg);
1749 *reg = region->its_read(dev->kvm, its, addr, len);
1751 unlock_all_vcpus(dev->kvm);
1753 mutex_unlock(&dev->kvm->lock);
1757 static u32 compute_next_devid_offset(struct list_head *h,
1758 struct its_device *dev)
1760 struct its_device *next;
1763 if (list_is_last(&dev->dev_list, h))
1765 next = list_next_entry(dev, dev_list);
1766 next_offset = next->device_id - dev->device_id;
1768 return min_t(u32, next_offset, VITS_DTE_MAX_DEVID_OFFSET);
1771 static u32 compute_next_eventid_offset(struct list_head *h, struct its_ite *ite)
1773 struct its_ite *next;
1776 if (list_is_last(&ite->ite_list, h))
1778 next = list_next_entry(ite, ite_list);
1779 next_offset = next->event_id - ite->event_id;
1781 return min_t(u32, next_offset, VITS_ITE_MAX_EVENTID_OFFSET);
1785 * entry_fn_t - Callback called on a table entry restore path
1787 * @id: id of the entry
1788 * @entry: pointer to the entry
1789 * @opaque: pointer to an opaque data
1791 * Return: < 0 on error, 0 if last element was identified, id offset to next
1794 typedef int (*entry_fn_t)(struct vgic_its *its, u32 id, void *entry,
1798 * scan_its_table - Scan a contiguous table in guest RAM and applies a function
1802 * @base: base gpa of the table
1803 * @size: size of the table in bytes
1804 * @esz: entry size in bytes
1805 * @start_id: the ID of the first entry in the table
1806 * (non zero for 2d level tables)
1807 * @fn: function to apply on each entry
1809 * Return: < 0 on error, 0 if last element was identified, 1 otherwise
1810 * (the last element may not be found on second level tables)
1812 static int scan_its_table(struct vgic_its *its, gpa_t base, int size, int esz,
1813 int start_id, entry_fn_t fn, void *opaque)
1815 struct kvm *kvm = its->dev->kvm;
1816 unsigned long len = size;
1822 memset(entry, 0, esz);
1828 ret = kvm_read_guest(kvm, gpa, entry, esz);
1832 next_offset = fn(its, id, entry, opaque);
1833 if (next_offset <= 0)
1836 byte_offset = next_offset * esz;
1845 * vgic_its_save_ite - Save an interrupt translation entry at @gpa
1847 static int vgic_its_save_ite(struct vgic_its *its, struct its_device *dev,
1848 struct its_ite *ite, gpa_t gpa, int ite_esz)
1850 struct kvm *kvm = its->dev->kvm;
1854 next_offset = compute_next_eventid_offset(&dev->itt_head, ite);
1855 val = ((u64)next_offset << KVM_ITS_ITE_NEXT_SHIFT) |
1856 ((u64)ite->irq->intid << KVM_ITS_ITE_PINTID_SHIFT) |
1857 ite->collection->collection_id;
1858 val = cpu_to_le64(val);
1859 return kvm_write_guest(kvm, gpa, &val, ite_esz);
1863 * vgic_its_restore_ite - restore an interrupt translation entry
1864 * @event_id: id used for indexing
1865 * @ptr: pointer to the ITE entry
1866 * @opaque: pointer to the its_device
1868 static int vgic_its_restore_ite(struct vgic_its *its, u32 event_id,
1869 void *ptr, void *opaque)
1871 struct its_device *dev = (struct its_device *)opaque;
1872 struct its_collection *collection;
1873 struct kvm *kvm = its->dev->kvm;
1874 struct kvm_vcpu *vcpu = NULL;
1876 u64 *p = (u64 *)ptr;
1877 struct vgic_irq *irq;
1878 u32 coll_id, lpi_id;
1879 struct its_ite *ite;
1884 val = le64_to_cpu(val);
1886 coll_id = val & KVM_ITS_ITE_ICID_MASK;
1887 lpi_id = (val & KVM_ITS_ITE_PINTID_MASK) >> KVM_ITS_ITE_PINTID_SHIFT;
1890 return 1; /* invalid entry, no choice but to scan next entry */
1892 if (lpi_id < VGIC_MIN_LPI)
1895 offset = val >> KVM_ITS_ITE_NEXT_SHIFT;
1896 if (event_id + offset >= BIT_ULL(dev->num_eventid_bits))
1899 collection = find_collection(its, coll_id);
1903 ite = vgic_its_alloc_ite(dev, collection, event_id);
1905 return PTR_ERR(ite);
1907 if (its_is_collection_mapped(collection))
1908 vcpu = kvm_get_vcpu(kvm, collection->target_addr);
1910 irq = vgic_add_lpi(kvm, lpi_id, vcpu);
1912 return PTR_ERR(irq);
1918 static int vgic_its_ite_cmp(void *priv, struct list_head *a,
1919 struct list_head *b)
1921 struct its_ite *itea = container_of(a, struct its_ite, ite_list);
1922 struct its_ite *iteb = container_of(b, struct its_ite, ite_list);
1924 if (itea->event_id < iteb->event_id)
1930 static int vgic_its_save_itt(struct vgic_its *its, struct its_device *device)
1932 const struct vgic_its_abi *abi = vgic_its_get_abi(its);
1933 gpa_t base = device->itt_addr;
1934 struct its_ite *ite;
1936 int ite_esz = abi->ite_esz;
1938 list_sort(NULL, &device->itt_head, vgic_its_ite_cmp);
1940 list_for_each_entry(ite, &device->itt_head, ite_list) {
1941 gpa_t gpa = base + ite->event_id * ite_esz;
1943 ret = vgic_its_save_ite(its, device, ite, gpa, ite_esz);
1951 * vgic_its_restore_itt - restore the ITT of a device
1954 * @dev: device handle
1956 * Return 0 on success, < 0 on error
1958 static int vgic_its_restore_itt(struct vgic_its *its, struct its_device *dev)
1960 const struct vgic_its_abi *abi = vgic_its_get_abi(its);
1961 gpa_t base = dev->itt_addr;
1963 int ite_esz = abi->ite_esz;
1964 size_t max_size = BIT_ULL(dev->num_eventid_bits) * ite_esz;
1966 ret = scan_its_table(its, base, max_size, ite_esz, 0,
1967 vgic_its_restore_ite, dev);
1969 /* scan_its_table returns +1 if all ITEs are invalid */
1977 * vgic_its_save_dte - Save a device table entry at a given GPA
1983 static int vgic_its_save_dte(struct vgic_its *its, struct its_device *dev,
1984 gpa_t ptr, int dte_esz)
1986 struct kvm *kvm = its->dev->kvm;
1987 u64 val, itt_addr_field;
1990 itt_addr_field = dev->itt_addr >> 8;
1991 next_offset = compute_next_devid_offset(&its->device_list, dev);
1992 val = (1ULL << KVM_ITS_DTE_VALID_SHIFT |
1993 ((u64)next_offset << KVM_ITS_DTE_NEXT_SHIFT) |
1994 (itt_addr_field << KVM_ITS_DTE_ITTADDR_SHIFT) |
1995 (dev->num_eventid_bits - 1));
1996 val = cpu_to_le64(val);
1997 return kvm_write_guest(kvm, ptr, &val, dte_esz);
2001 * vgic_its_restore_dte - restore a device table entry
2004 * @id: device id the DTE corresponds to
2005 * @ptr: kernel VA where the 8 byte DTE is located
2008 * Return: < 0 on error, 0 if the dte is the last one, id offset to the
2009 * next dte otherwise
2011 static int vgic_its_restore_dte(struct vgic_its *its, u32 id,
2012 void *ptr, void *opaque)
2014 struct its_device *dev;
2016 u8 num_eventid_bits;
2017 u64 entry = *(u64 *)ptr;
2022 entry = le64_to_cpu(entry);
2024 valid = entry >> KVM_ITS_DTE_VALID_SHIFT;
2025 num_eventid_bits = (entry & KVM_ITS_DTE_SIZE_MASK) + 1;
2026 itt_addr = ((entry & KVM_ITS_DTE_ITTADDR_MASK)
2027 >> KVM_ITS_DTE_ITTADDR_SHIFT) << 8;
2032 /* dte entry is valid */
2033 offset = (entry & KVM_ITS_DTE_NEXT_MASK) >> KVM_ITS_DTE_NEXT_SHIFT;
2035 dev = vgic_its_alloc_device(its, id, itt_addr, num_eventid_bits);
2037 return PTR_ERR(dev);
2039 ret = vgic_its_restore_itt(its, dev);
2041 vgic_its_free_device(its->dev->kvm, dev);
2048 static int vgic_its_device_cmp(void *priv, struct list_head *a,
2049 struct list_head *b)
2051 struct its_device *deva = container_of(a, struct its_device, dev_list);
2052 struct its_device *devb = container_of(b, struct its_device, dev_list);
2054 if (deva->device_id < devb->device_id)
2061 * vgic_its_save_device_tables - Save the device table and all ITT
2064 * L1/L2 handling is hidden by vgic_its_check_id() helper which directly
2065 * returns the GPA of the device entry
2067 static int vgic_its_save_device_tables(struct vgic_its *its)
2069 const struct vgic_its_abi *abi = vgic_its_get_abi(its);
2070 u64 baser = its->baser_device_table;
2071 struct its_device *dev;
2072 int dte_esz = abi->dte_esz;
2074 if (!(baser & GITS_BASER_VALID))
2077 list_sort(NULL, &its->device_list, vgic_its_device_cmp);
2079 list_for_each_entry(dev, &its->device_list, dev_list) {
2083 if (!vgic_its_check_id(its, baser,
2084 dev->device_id, &eaddr))
2087 ret = vgic_its_save_itt(its, dev);
2091 ret = vgic_its_save_dte(its, dev, eaddr, dte_esz);
2099 * handle_l1_dte - callback used for L1 device table entries (2 stage case)
2102 * @id: index of the entry in the L1 table
2106 * L1 table entries are scanned by steps of 1 entry
2107 * Return < 0 if error, 0 if last dte was found when scanning the L2
2108 * table, +1 otherwise (meaning next L1 entry must be scanned)
2110 static int handle_l1_dte(struct vgic_its *its, u32 id, void *addr,
2113 const struct vgic_its_abi *abi = vgic_its_get_abi(its);
2114 int l2_start_id = id * (SZ_64K / abi->dte_esz);
2115 u64 entry = *(u64 *)addr;
2116 int dte_esz = abi->dte_esz;
2120 entry = le64_to_cpu(entry);
2122 if (!(entry & KVM_ITS_L1E_VALID_MASK))
2125 gpa = entry & KVM_ITS_L1E_ADDR_MASK;
2127 ret = scan_its_table(its, gpa, SZ_64K, dte_esz,
2128 l2_start_id, vgic_its_restore_dte, NULL);
2134 * vgic_its_restore_device_tables - Restore the device table and all ITT
2135 * from guest RAM to internal data structs
2137 static int vgic_its_restore_device_tables(struct vgic_its *its)
2139 const struct vgic_its_abi *abi = vgic_its_get_abi(its);
2140 u64 baser = its->baser_device_table;
2142 int l1_tbl_size = GITS_BASER_NR_PAGES(baser) * SZ_64K;
2145 if (!(baser & GITS_BASER_VALID))
2148 l1_gpa = BASER_ADDRESS(baser);
2150 if (baser & GITS_BASER_INDIRECT) {
2151 l1_esz = GITS_LVL1_ENTRY_SIZE;
2152 ret = scan_its_table(its, l1_gpa, l1_tbl_size, l1_esz, 0,
2153 handle_l1_dte, NULL);
2155 l1_esz = abi->dte_esz;
2156 ret = scan_its_table(its, l1_gpa, l1_tbl_size, l1_esz, 0,
2157 vgic_its_restore_dte, NULL);
2160 /* scan_its_table returns +1 if all entries are invalid */
2167 static int vgic_its_save_cte(struct vgic_its *its,
2168 struct its_collection *collection,
2173 val = (1ULL << KVM_ITS_CTE_VALID_SHIFT |
2174 ((u64)collection->target_addr << KVM_ITS_CTE_RDBASE_SHIFT) |
2175 collection->collection_id);
2176 val = cpu_to_le64(val);
2177 return kvm_write_guest(its->dev->kvm, gpa, &val, esz);
2180 static int vgic_its_restore_cte(struct vgic_its *its, gpa_t gpa, int esz)
2182 struct its_collection *collection;
2183 struct kvm *kvm = its->dev->kvm;
2184 u32 target_addr, coll_id;
2188 BUG_ON(esz > sizeof(val));
2189 ret = kvm_read_guest(kvm, gpa, &val, esz);
2192 val = le64_to_cpu(val);
2193 if (!(val & KVM_ITS_CTE_VALID_MASK))
2196 target_addr = (u32)(val >> KVM_ITS_CTE_RDBASE_SHIFT);
2197 coll_id = val & KVM_ITS_CTE_ICID_MASK;
2199 if (target_addr >= atomic_read(&kvm->online_vcpus))
2202 collection = find_collection(its, coll_id);
2205 ret = vgic_its_alloc_collection(its, &collection, coll_id);
2208 collection->target_addr = target_addr;
2213 * vgic_its_save_collection_table - Save the collection table into
2216 static int vgic_its_save_collection_table(struct vgic_its *its)
2218 const struct vgic_its_abi *abi = vgic_its_get_abi(its);
2219 u64 baser = its->baser_coll_table;
2220 gpa_t gpa = BASER_ADDRESS(baser);
2221 struct its_collection *collection;
2223 size_t max_size, filled = 0;
2224 int ret, cte_esz = abi->cte_esz;
2226 if (!(baser & GITS_BASER_VALID))
2229 max_size = GITS_BASER_NR_PAGES(baser) * SZ_64K;
2231 list_for_each_entry(collection, &its->collection_list, coll_list) {
2232 ret = vgic_its_save_cte(its, collection, gpa, cte_esz);
2239 if (filled == max_size)
2243 * table is not fully filled, add a last dummy element
2244 * with valid bit unset
2247 BUG_ON(cte_esz > sizeof(val));
2248 ret = kvm_write_guest(its->dev->kvm, gpa, &val, cte_esz);
2253 * vgic_its_restore_collection_table - reads the collection table
2254 * in guest memory and restores the ITS internal state. Requires the
2255 * BASER registers to be restored before.
2257 static int vgic_its_restore_collection_table(struct vgic_its *its)
2259 const struct vgic_its_abi *abi = vgic_its_get_abi(its);
2260 u64 baser = its->baser_coll_table;
2261 int cte_esz = abi->cte_esz;
2262 size_t max_size, read = 0;
2266 if (!(baser & GITS_BASER_VALID))
2269 gpa = BASER_ADDRESS(baser);
2271 max_size = GITS_BASER_NR_PAGES(baser) * SZ_64K;
2273 while (read < max_size) {
2274 ret = vgic_its_restore_cte(its, gpa, cte_esz);
2288 * vgic_its_save_tables_v0 - Save the ITS tables into guest ARM
2289 * according to v0 ABI
2291 static int vgic_its_save_tables_v0(struct vgic_its *its)
2293 struct kvm *kvm = its->dev->kvm;
2296 mutex_lock(&kvm->lock);
2297 mutex_lock(&its->its_lock);
2299 if (!lock_all_vcpus(kvm)) {
2300 mutex_unlock(&its->its_lock);
2301 mutex_unlock(&kvm->lock);
2305 ret = vgic_its_save_device_tables(its);
2309 ret = vgic_its_save_collection_table(its);
2312 unlock_all_vcpus(kvm);
2313 mutex_unlock(&its->its_lock);
2314 mutex_unlock(&kvm->lock);
2319 * vgic_its_restore_tables_v0 - Restore the ITS tables from guest RAM
2320 * to internal data structs according to V0 ABI
2323 static int vgic_its_restore_tables_v0(struct vgic_its *its)
2325 struct kvm *kvm = its->dev->kvm;
2328 mutex_lock(&kvm->lock);
2329 mutex_lock(&its->its_lock);
2331 if (!lock_all_vcpus(kvm)) {
2332 mutex_unlock(&its->its_lock);
2333 mutex_unlock(&kvm->lock);
2337 ret = vgic_its_restore_collection_table(its);
2341 ret = vgic_its_restore_device_tables(its);
2343 unlock_all_vcpus(kvm);
2344 mutex_unlock(&its->its_lock);
2345 mutex_unlock(&kvm->lock);
2350 static int vgic_its_commit_v0(struct vgic_its *its)
2352 const struct vgic_its_abi *abi;
2354 abi = vgic_its_get_abi(its);
2355 its->baser_coll_table &= ~GITS_BASER_ENTRY_SIZE_MASK;
2356 its->baser_device_table &= ~GITS_BASER_ENTRY_SIZE_MASK;
2358 its->baser_coll_table |= (GIC_ENCODE_SZ(abi->cte_esz, 5)
2359 << GITS_BASER_ENTRY_SIZE_SHIFT);
2361 its->baser_device_table |= (GIC_ENCODE_SZ(abi->dte_esz, 5)
2362 << GITS_BASER_ENTRY_SIZE_SHIFT);
2366 static int vgic_its_has_attr(struct kvm_device *dev,
2367 struct kvm_device_attr *attr)
2369 switch (attr->group) {
2370 case KVM_DEV_ARM_VGIC_GRP_ADDR:
2371 switch (attr->attr) {
2372 case KVM_VGIC_ITS_ADDR_TYPE:
2376 case KVM_DEV_ARM_VGIC_GRP_CTRL:
2377 switch (attr->attr) {
2378 case KVM_DEV_ARM_VGIC_CTRL_INIT:
2380 case KVM_DEV_ARM_ITS_SAVE_TABLES:
2382 case KVM_DEV_ARM_ITS_RESTORE_TABLES:
2386 case KVM_DEV_ARM_VGIC_GRP_ITS_REGS:
2387 return vgic_its_has_attr_regs(dev, attr);
2392 static int vgic_its_set_attr(struct kvm_device *dev,
2393 struct kvm_device_attr *attr)
2395 struct vgic_its *its = dev->private;
2398 switch (attr->group) {
2399 case KVM_DEV_ARM_VGIC_GRP_ADDR: {
2400 u64 __user *uaddr = (u64 __user *)(long)attr->addr;
2401 unsigned long type = (unsigned long)attr->attr;
2404 if (type != KVM_VGIC_ITS_ADDR_TYPE)
2407 if (copy_from_user(&addr, uaddr, sizeof(addr)))
2410 ret = vgic_check_ioaddr(dev->kvm, &its->vgic_its_base,
2415 return vgic_register_its_iodev(dev->kvm, its, addr);
2417 case KVM_DEV_ARM_VGIC_GRP_CTRL: {
2418 const struct vgic_its_abi *abi = vgic_its_get_abi(its);
2420 switch (attr->attr) {
2421 case KVM_DEV_ARM_VGIC_CTRL_INIT:
2424 case KVM_DEV_ARM_ITS_SAVE_TABLES:
2425 return abi->save_tables(its);
2426 case KVM_DEV_ARM_ITS_RESTORE_TABLES:
2427 return abi->restore_tables(its);
2430 case KVM_DEV_ARM_VGIC_GRP_ITS_REGS: {
2431 u64 __user *uaddr = (u64 __user *)(long)attr->addr;
2434 if (get_user(reg, uaddr))
2437 return vgic_its_attr_regs_access(dev, attr, ®, true);
2443 static int vgic_its_get_attr(struct kvm_device *dev,
2444 struct kvm_device_attr *attr)
2446 switch (attr->group) {
2447 case KVM_DEV_ARM_VGIC_GRP_ADDR: {
2448 struct vgic_its *its = dev->private;
2449 u64 addr = its->vgic_its_base;
2450 u64 __user *uaddr = (u64 __user *)(long)attr->addr;
2451 unsigned long type = (unsigned long)attr->attr;
2453 if (type != KVM_VGIC_ITS_ADDR_TYPE)
2456 if (copy_to_user(uaddr, &addr, sizeof(addr)))
2460 case KVM_DEV_ARM_VGIC_GRP_ITS_REGS: {
2461 u64 __user *uaddr = (u64 __user *)(long)attr->addr;
2465 ret = vgic_its_attr_regs_access(dev, attr, ®, false);
2468 return put_user(reg, uaddr);
2477 static struct kvm_device_ops kvm_arm_vgic_its_ops = {
2478 .name = "kvm-arm-vgic-its",
2479 .create = vgic_its_create,
2480 .destroy = vgic_its_destroy,
2481 .set_attr = vgic_its_set_attr,
2482 .get_attr = vgic_its_get_attr,
2483 .has_attr = vgic_its_has_attr,
2486 int kvm_vgic_register_its_device(void)
2488 return kvm_register_device_ops(&kvm_arm_vgic_its_ops,
2489 KVM_DEV_TYPE_ARM_VGIC_ITS);