tools/power/x86/turbostat/turbostat.c

   1 /*
   2  * turbostat -- show CPU frequency and C-state residency
   3  * on modern Intel and AMD processors.
   4  *
   5  * Copyright (c) 2013 Intel Corporation.
   6  * Len Brown <len.brown@intel.com>
   7  *
   8  * This program is free software; you can redistribute it and/or modify it
   9  * under the terms and conditions of the GNU General Public License,
  10  * version 2, as published by the Free Software Foundation.
  11  *
  12  * This program is distributed in the hope it will be useful, but WITHOUT
  13  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  15  * more details.
  16  *
  17  * You should have received a copy of the GNU General Public License along with
  18  * this program; if not, write to the Free Software Foundation, Inc.,
  19  * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  20  */
  21
  22 #define _GNU_SOURCE
  23 #include MSRHEADER
  24 #include INTEL_FAMILY_HEADER
  25 #include <stdarg.h>
  26 #include <stdio.h>
  27 #include <err.h>
  28 #include <unistd.h>
  29 #include <sys/types.h>
  30 #include <sys/wait.h>
  31 #include <sys/stat.h>
  32 #include <sys/select.h>
  33 #include <sys/resource.h>
  34 #include <fcntl.h>
  35 #include <signal.h>
  36 #include <sys/time.h>
  37 #include <stdlib.h>
  38 #include <getopt.h>
  39 #include <dirent.h>
  40 #include <string.h>
  41 #include <ctype.h>
  42 #include <sched.h>
  43 #include <time.h>
  44 #include <cpuid.h>
  45 #include <linux/capability.h>
  46 #include <errno.h>
  47 #include <math.h>
  48
  49 char *proc_stat = "/proc/stat";
  50 FILE *outf;
  51 int *fd_percpu;
  52 struct timeval interval_tv = {5, 0};
  53 struct timespec interval_ts = {5, 0};
  54 struct timespec one_msec = {0, 1000000};
  55 unsigned int num_iterations;
  56 unsigned int debug;
  57 unsigned int quiet;
  58 unsigned int shown;
  59 unsigned int sums_need_wide_columns;
  60 unsigned int rapl_joules;
  61 unsigned int summary_only;
  62 unsigned int list_header_only;
  63 unsigned int dump_only;
  64 unsigned int do_snb_cstates;
  65 unsigned int do_knl_cstates;
  66 unsigned int do_slm_cstates;
  67 unsigned int use_c1_residency_msr;
  68 unsigned int has_aperf;
  69 unsigned int has_epb;
  70 unsigned int do_irtl_snb;
  71 unsigned int do_irtl_hsw;
  72 unsigned int units = 1000000;   /* MHz etc */
  73 unsigned int genuine_intel;
  74 unsigned int authentic_amd;
  75 unsigned int max_level, max_extended_level;
  76 unsigned int has_invariant_tsc;
  77 unsigned int do_nhm_platform_info;
  78 unsigned int no_MSR_MISC_PWR_MGMT;
  79 unsigned int aperf_mperf_multiplier = 1;
  80 double bclk;
  81 double base_hz;
  82 unsigned int has_base_hz;
  83 double tsc_tweak = 1.0;
  84 unsigned int show_pkg_only;
  85 unsigned int show_core_only;
  86 char *output_buffer, *outp;
  87 unsigned int do_rapl;
  88 unsigned int do_dts;
  89 unsigned int do_ptm;
  90 unsigned long long  gfx_cur_rc6_ms;
  91 unsigned long long cpuidle_cur_cpu_lpi_us;
  92 unsigned long long cpuidle_cur_sys_lpi_us;
  93 unsigned int gfx_cur_mhz;
  94 unsigned int tcc_activation_temp;
  95 unsigned int tcc_activation_temp_override;
  96 double rapl_power_units, rapl_time_units;
  97 double rapl_dram_energy_units, rapl_energy_units;
  98 double rapl_joule_counter_range;
  99 unsigned int do_core_perf_limit_reasons;
 100 unsigned int has_automatic_cstate_conversion;
 101 unsigned int do_gfx_perf_limit_reasons;
 102 unsigned int do_ring_perf_limit_reasons;
 103 unsigned int crystal_hz;
 104 unsigned long long tsc_hz;
 105 int base_cpu;
 106 double discover_bclk(unsigned int family, unsigned int model);
 107 unsigned int has_hwp;   /* IA32_PM_ENABLE, IA32_HWP_CAPABILITIES */
 108                         /* IA32_HWP_REQUEST, IA32_HWP_STATUS */
 109 unsigned int has_hwp_notify;            /* IA32_HWP_INTERRUPT */
 110 unsigned int has_hwp_activity_window;   /* IA32_HWP_REQUEST[bits 41:32] */
 111 unsigned int has_hwp_epp;               /* IA32_HWP_REQUEST[bits 31:24] */
 112 unsigned int has_hwp_pkg;               /* IA32_HWP_REQUEST_PKG */
 113 unsigned int has_misc_feature_control;
 114 unsigned int first_counter_read = 1;
 115
 116 #define RAPL_PKG                (1 << 0)
 117                                         /* 0x610 MSR_PKG_POWER_LIMIT */
 118                                         /* 0x611 MSR_PKG_ENERGY_STATUS */
 119 #define RAPL_PKG_PERF_STATUS    (1 << 1)
 120                                         /* 0x613 MSR_PKG_PERF_STATUS */
 121 #define RAPL_PKG_POWER_INFO     (1 << 2)
 122                                         /* 0x614 MSR_PKG_POWER_INFO */
 123
 124 #define RAPL_DRAM               (1 << 3)
 125                                         /* 0x618 MSR_DRAM_POWER_LIMIT */
 126                                         /* 0x619 MSR_DRAM_ENERGY_STATUS */
 127 #define RAPL_DRAM_PERF_STATUS   (1 << 4)
 128                                         /* 0x61b MSR_DRAM_PERF_STATUS */
 129 #define RAPL_DRAM_POWER_INFO    (1 << 5)
 130                                         /* 0x61c MSR_DRAM_POWER_INFO */
 131
 132 #define RAPL_CORES_POWER_LIMIT  (1 << 6)
 133                                         /* 0x638 MSR_PP0_POWER_LIMIT */
 134 #define RAPL_CORE_POLICY        (1 << 7)
 135                                         /* 0x63a MSR_PP0_POLICY */
 136
 137 #define RAPL_GFX                (1 << 8)
 138                                         /* 0x640 MSR_PP1_POWER_LIMIT */
 139                                         /* 0x641 MSR_PP1_ENERGY_STATUS */
 140                                         /* 0x642 MSR_PP1_POLICY */
 141
 142 #define RAPL_CORES_ENERGY_STATUS        (1 << 9)
 143                                         /* 0x639 MSR_PP0_ENERGY_STATUS */
 144 #define RAPL_PER_CORE_ENERGY    (1 << 10)
 145                                         /* Indicates cores energy collection is per-core,
 146                                          * not per-package. */
 147 #define RAPL_AMD_F17H           (1 << 11)
 148                                         /* 0xc0010299 MSR_RAPL_PWR_UNIT */
 149                                         /* 0xc001029a MSR_CORE_ENERGY_STAT */
 150                                         /* 0xc001029b MSR_PKG_ENERGY_STAT */
 151 #define RAPL_CORES (RAPL_CORES_ENERGY_STATUS | RAPL_CORES_POWER_LIMIT)
 152 #define TJMAX_DEFAULT   100
 153
 154 /* MSRs that are not yet in the kernel-provided header. */
 155 #define MSR_RAPL_PWR_UNIT       0xc0010299
 156 #define MSR_CORE_ENERGY_STAT    0xc001029a
 157 #define MSR_PKG_ENERGY_STAT     0xc001029b
 158
 159 #define MAX(a, b) ((a) > (b) ? (a) : (b))
 160
 161 /*
 162  * buffer size used by sscanf() for added column names
 163  * Usually truncated to 7 characters, but also handles 18 columns for raw 64-bit counters
 164  */
 165 #define NAME_BYTES 20
 166 #define PATH_BYTES 128
 167
 168 int backwards_count;
 169 char *progname;
 170
 171 #define CPU_SUBSET_MAXCPUS      1024    /* need to use before probe... */
 172 cpu_set_t *cpu_present_set, *cpu_affinity_set, *cpu_subset;
 173 size_t cpu_present_setsize, cpu_affinity_setsize, cpu_subset_size;
 174 #define MAX_ADDED_COUNTERS 8
 175 #define MAX_ADDED_THREAD_COUNTERS 24
 176 #define BITMASK_SIZE 32
 177
 178 struct thread_data {
 179         struct timeval tv_begin;
 180         struct timeval tv_end;
 181         unsigned long long tsc;
 182         unsigned long long aperf;
 183         unsigned long long mperf;
 184         unsigned long long c1;
 185         unsigned long long  irq_count;
 186         unsigned int smi_count;
 187         unsigned int cpu_id;
 188         unsigned int apic_id;
 189         unsigned int x2apic_id;
 190         unsigned int flags;
 191 #define CPU_IS_FIRST_THREAD_IN_CORE     0x2
 192 #define CPU_IS_FIRST_CORE_IN_PACKAGE    0x4
 193         unsigned long long counter[MAX_ADDED_THREAD_COUNTERS];
 194 } *thread_even, *thread_odd;
 195
 196 struct core_data {
 197         unsigned long long c3;
 198         unsigned long long c6;
 199         unsigned long long c7;
 200         unsigned long long mc6_us;      /* duplicate as per-core for now, even though per module */
 201         unsigned int core_temp_c;
 202         unsigned int core_energy;       /* MSR_CORE_ENERGY_STAT */
 203         unsigned int core_id;
 204         unsigned long long counter[MAX_ADDED_COUNTERS];
 205 } *core_even, *core_odd;
 206
 207 struct pkg_data {
 208         unsigned long long pc2;
 209         unsigned long long pc3;
 210         unsigned long long pc6;
 211         unsigned long long pc7;
 212         unsigned long long pc8;
 213         unsigned long long pc9;
 214         unsigned long long pc10;
 215         unsigned long long cpu_lpi;
 216         unsigned long long sys_lpi;
 217         unsigned long long pkg_wtd_core_c0;
 218         unsigned long long pkg_any_core_c0;
 219         unsigned long long pkg_any_gfxe_c0;
 220         unsigned long long pkg_both_core_gfxe_c0;
 221         long long gfx_rc6_ms;
 222         unsigned int gfx_mhz;
 223         unsigned int package_id;
 224         unsigned int energy_pkg;        /* MSR_PKG_ENERGY_STATUS */
 225         unsigned int energy_dram;       /* MSR_DRAM_ENERGY_STATUS */
 226         unsigned int energy_cores;      /* MSR_PP0_ENERGY_STATUS */
 227         unsigned int energy_gfx;        /* MSR_PP1_ENERGY_STATUS */
 228         unsigned int rapl_pkg_perf_status;      /* MSR_PKG_PERF_STATUS */
 229         unsigned int rapl_dram_perf_status;     /* MSR_DRAM_PERF_STATUS */
 230         unsigned int pkg_temp_c;
 231         unsigned long long counter[MAX_ADDED_COUNTERS];
 232 } *package_even, *package_odd;
 233
 234 #define ODD_COUNTERS thread_odd, core_odd, package_odd
 235 #define EVEN_COUNTERS thread_even, core_even, package_even
 236
 237 #define GET_THREAD(thread_base, thread_no, core_no, node_no, pkg_no)          \
 238         ((thread_base) +                                                      \
 239          ((pkg_no) *                                                          \
 240           topo.nodes_per_pkg * topo.cores_per_node * topo.threads_per_core) + \
 241          ((node_no) * topo.cores_per_node * topo.threads_per_core) +          \
 242          ((core_no) * topo.threads_per_core) +                                \
 243          (thread_no))
 244
 245 #define GET_CORE(core_base, core_no, node_no, pkg_no)                   \
 246         ((core_base) +                                                  \
 247          ((pkg_no) *  topo.nodes_per_pkg * topo.cores_per_node) +       \
 248          ((node_no) * topo.cores_per_node) +                            \
 249          (core_no))
 250
 251
 252 #define GET_PKG(pkg_base, pkg_no) (pkg_base + pkg_no)
 253
 254 enum counter_scope {SCOPE_CPU, SCOPE_CORE, SCOPE_PACKAGE};
 255 enum counter_type {COUNTER_ITEMS, COUNTER_CYCLES, COUNTER_SECONDS, COUNTER_USEC};
 256 enum counter_format {FORMAT_RAW, FORMAT_DELTA, FORMAT_PERCENT};
 257
 258 struct msr_counter {
 259         unsigned int msr_num;
 260         char name[NAME_BYTES];
 261         char path[PATH_BYTES];
 262         unsigned int width;
 263         enum counter_type type;
 264         enum counter_format format;
 265         struct msr_counter *next;
 266         unsigned int flags;
 267 #define FLAGS_HIDE      (1 << 0)
 268 #define FLAGS_SHOW      (1 << 1)
 269 #define SYSFS_PERCPU    (1 << 1)
 270 };
 271
 272 struct sys_counters {
 273         unsigned int added_thread_counters;
 274         unsigned int added_core_counters;
 275         unsigned int added_package_counters;
 276         struct msr_counter *tp;
 277         struct msr_counter *cp;
 278         struct msr_counter *pp;
 279 } sys;
 280
 281 struct system_summary {
 282         struct thread_data threads;
 283         struct core_data cores;
 284         struct pkg_data packages;
 285 } average;
 286
 287 struct cpu_topology {
 288         int physical_package_id;
 289         int die_id;
 290         int logical_cpu_id;
 291         int physical_node_id;
 292         int logical_node_id;    /* 0-based count within the package */
 293         int physical_core_id;
 294         int thread_id;
 295         cpu_set_t *put_ids; /* Processing Unit/Thread IDs */
 296 } *cpus;
 297
 298 struct topo_params {
 299         int num_packages;
 300         int num_die;
 301         int num_cpus;
 302         int num_cores;
 303         int max_cpu_num;
 304         int max_node_num;
 305         int nodes_per_pkg;
 306         int cores_per_node;
 307         int threads_per_core;
 308 } topo;
 309
 310 struct timeval tv_even, tv_odd, tv_delta;
 311
 312 int *irq_column_2_cpu;  /* /proc/interrupts column numbers */
 313 int *irqs_per_cpu;              /* indexed by cpu_num */
 314
 315 void setup_all_buffers(void);
 316
 317 int cpu_is_not_present(int cpu)
 318 {
 319         return !CPU_ISSET_S(cpu, cpu_present_setsize, cpu_present_set);
 320 }
 321 /*
 322  * run func(thread, core, package) in topology order
 323  * skip non-present cpus
 324  */
 325
 326 int for_all_cpus(int (func)(struct thread_data *, struct core_data *, struct pkg_data *),
 327         struct thread_data *thread_base, struct core_data *core_base, struct pkg_data *pkg_base)
 328 {
 329         int retval, pkg_no, core_no, thread_no, node_no;
 330
 331         for (pkg_no = 0; pkg_no < topo.num_packages; ++pkg_no) {
 332                 for (node_no = 0; node_no < topo.nodes_per_pkg; node_no++) {
 333                         for (core_no = 0; core_no < topo.cores_per_node; ++core_no) {
 334                                 for (thread_no = 0; thread_no <
 335                                         topo.threads_per_core; ++thread_no) {
 336                                         struct thread_data *t;
 337                                         struct core_data *c;
 338                                         struct pkg_data *p;
 339
 340                                         t = GET_THREAD(thread_base, thread_no,
 341                                                        core_no, node_no,
 342                                                        pkg_no);
 343
 344                                         if (cpu_is_not_present(t->cpu_id))
 345                                                 continue;
 346
 347                                         c = GET_CORE(core_base, core_no,
 348                                                      node_no, pkg_no);
 349                                         p = GET_PKG(pkg_base, pkg_no);
 350
 351                                         retval = func(t, c, p);
 352                                         if (retval)
 353                                                 return retval;
 354                                 }
 355                         }
 356                 }
 357         }
 358         return 0;
 359 }
 360
 361 int cpu_migrate(int cpu)
 362 {
 363         CPU_ZERO_S(cpu_affinity_setsize, cpu_affinity_set);
 364         CPU_SET_S(cpu, cpu_affinity_setsize, cpu_affinity_set);
 365         if (sched_setaffinity(0, cpu_affinity_setsize, cpu_affinity_set) == -1)
 366                 return -1;
 367         else
 368                 return 0;
 369 }
 370 int get_msr_fd(int cpu)
 371 {
 372         char pathname[32];
 373         int fd;
 374
 375         fd = fd_percpu[cpu];
 376
 377         if (fd)
 378                 return fd;
 379
 380         sprintf(pathname, "/dev/cpu/%d/msr", cpu);
 381         fd = open(pathname, O_RDONLY);
 382         if (fd < 0)
 383                 err(-1, "%s open failed, try chown or chmod +r /dev/cpu/*/msr, or run as root", pathname);
 384
 385         fd_percpu[cpu] = fd;
 386
 387         return fd;
 388 }
 389
 390 int get_msr(int cpu, off_t offset, unsigned long long *msr)
 391 {
 392         ssize_t retval;
 393
 394         retval = pread(get_msr_fd(cpu), msr, sizeof(*msr), offset);
 395
 396         if (retval != sizeof *msr)
 397                 err(-1, "cpu%d: msr offset 0x%llx read failed", cpu, (unsigned long long)offset);
 398
 399         return 0;
 400 }
 401
 402 /*
 403  * This list matches the column headers, except
 404  * 1. built-in only, the sysfs counters are not here -- we learn of those at run-time
 405  * 2. Core and CPU are moved to the end, we can't have strings that contain them
 406  *    matching on them for --show and --hide.
 407  */
 408 struct msr_counter bic[] = {
 409         { 0x0, "usec" },
 410         { 0x0, "Time_Of_Day_Seconds" },
 411         { 0x0, "Package" },
 412         { 0x0, "Node" },
 413         { 0x0, "Avg_MHz" },
 414         { 0x0, "Busy%" },
 415         { 0x0, "Bzy_MHz" },
 416         { 0x0, "TSC_MHz" },
 417         { 0x0, "IRQ" },
 418         { 0x0, "SMI", "", 32, 0, FORMAT_DELTA, NULL},
 419         { 0x0, "sysfs" },
 420         { 0x0, "CPU%c1" },
 421         { 0x0, "CPU%c3" },
 422         { 0x0, "CPU%c6" },
 423         { 0x0, "CPU%c7" },
 424         { 0x0, "ThreadC" },
 425         { 0x0, "CoreTmp" },
 426         { 0x0, "CoreCnt" },
 427         { 0x0, "PkgTmp" },
 428         { 0x0, "GFX%rc6" },
 429         { 0x0, "GFXMHz" },
 430         { 0x0, "Pkg%pc2" },
 431         { 0x0, "Pkg%pc3" },
 432         { 0x0, "Pkg%pc6" },
 433         { 0x0, "Pkg%pc7" },
 434         { 0x0, "Pkg%pc8" },
 435         { 0x0, "Pkg%pc9" },
 436         { 0x0, "Pk%pc10" },
 437         { 0x0, "CPU%LPI" },
 438         { 0x0, "SYS%LPI" },
 439         { 0x0, "PkgWatt" },
 440         { 0x0, "CorWatt" },
 441         { 0x0, "GFXWatt" },
 442         { 0x0, "PkgCnt" },
 443         { 0x0, "RAMWatt" },
 444         { 0x0, "PKG_%" },
 445         { 0x0, "RAM_%" },
 446         { 0x0, "Pkg_J" },
 447         { 0x0, "Cor_J" },
 448         { 0x0, "GFX_J" },
 449         { 0x0, "RAM_J" },
 450         { 0x0, "Mod%c6" },
 451         { 0x0, "Totl%C0" },
 452         { 0x0, "Any%C0" },
 453         { 0x0, "GFX%C0" },
 454         { 0x0, "CPUGFX%" },
 455         { 0x0, "Core" },
 456         { 0x0, "CPU" },
 457         { 0x0, "APIC" },
 458         { 0x0, "X2APIC" },
 459         { 0x0, "Die" },
 460 };
 461
 462 #define MAX_BIC (sizeof(bic) / sizeof(struct msr_counter))
 463 #define BIC_USEC        (1ULL << 0)
 464 #define BIC_TOD         (1ULL << 1)
 465 #define BIC_Package     (1ULL << 2)
 466 #define BIC_Node        (1ULL << 3)
 467 #define BIC_Avg_MHz     (1ULL << 4)
 468 #define BIC_Busy        (1ULL << 5)
 469 #define BIC_Bzy_MHz     (1ULL << 6)
 470 #define BIC_TSC_MHz     (1ULL << 7)
 471 #define BIC_IRQ         (1ULL << 8)
 472 #define BIC_SMI         (1ULL << 9)
 473 #define BIC_sysfs       (1ULL << 10)
 474 #define BIC_CPU_c1      (1ULL << 11)
 475 #define BIC_CPU_c3      (1ULL << 12)
 476 #define BIC_CPU_c6      (1ULL << 13)
 477 #define BIC_CPU_c7      (1ULL << 14)
 478 #define BIC_ThreadC     (1ULL << 15)
 479 #define BIC_CoreTmp     (1ULL << 16)
 480 #define BIC_CoreCnt     (1ULL << 17)
 481 #define BIC_PkgTmp      (1ULL << 18)
 482 #define BIC_GFX_rc6     (1ULL << 19)
 483 #define BIC_GFXMHz      (1ULL << 20)
 484 #define BIC_Pkgpc2      (1ULL << 21)
 485 #define BIC_Pkgpc3      (1ULL << 22)
 486 #define BIC_Pkgpc6      (1ULL << 23)
 487 #define BIC_Pkgpc7      (1ULL << 24)
 488 #define BIC_Pkgpc8      (1ULL << 25)
 489 #define BIC_Pkgpc9      (1ULL << 26)
 490 #define BIC_Pkgpc10     (1ULL << 27)
 491 #define BIC_CPU_LPI     (1ULL << 28)
 492 #define BIC_SYS_LPI     (1ULL << 29)
 493 #define BIC_PkgWatt     (1ULL << 30)
 494 #define BIC_CorWatt     (1ULL << 31)
 495 #define BIC_GFXWatt     (1ULL << 32)
 496 #define BIC_PkgCnt      (1ULL << 33)
 497 #define BIC_RAMWatt     (1ULL << 34)
 498 #define BIC_PKG__       (1ULL << 35)
 499 #define BIC_RAM__       (1ULL << 36)
 500 #define BIC_Pkg_J       (1ULL << 37)
 501 #define BIC_Cor_J       (1ULL << 38)
 502 #define BIC_GFX_J       (1ULL << 39)
 503 #define BIC_RAM_J       (1ULL << 40)
 504 #define BIC_Mod_c6      (1ULL << 41)
 505 #define BIC_Totl_c0     (1ULL << 42)
 506 #define BIC_Any_c0      (1ULL << 43)
 507 #define BIC_GFX_c0      (1ULL << 44)
 508 #define BIC_CPUGFX      (1ULL << 45)
 509 #define BIC_Core        (1ULL << 46)
 510 #define BIC_CPU         (1ULL << 47)
 511 #define BIC_APIC        (1ULL << 48)
 512 #define BIC_X2APIC      (1ULL << 49)
 513 #define BIC_Die         (1ULL << 50)
 514
 515 #define BIC_DISABLED_BY_DEFAULT (BIC_USEC | BIC_TOD | BIC_APIC | BIC_X2APIC)
 516
 517 unsigned long long bic_enabled = (0xFFFFFFFFFFFFFFFFULL & ~BIC_DISABLED_BY_DEFAULT);
 518 unsigned long long bic_present = BIC_USEC | BIC_TOD | BIC_sysfs | BIC_APIC | BIC_X2APIC;
 519
 520 #define DO_BIC(COUNTER_NAME) (bic_enabled & bic_present & COUNTER_NAME)
 521 #define ENABLE_BIC(COUNTER_NAME) (bic_enabled |= COUNTER_NAME)
 522 #define BIC_PRESENT(COUNTER_BIT) (bic_present |= COUNTER_BIT)
 523 #define BIC_NOT_PRESENT(COUNTER_BIT) (bic_present &= ~COUNTER_BIT)
 524
 525
 526 #define MAX_DEFERRED 16
 527 char *deferred_skip_names[MAX_DEFERRED];
 528 int deferred_skip_index;
 529
 530 /*
 531  * HIDE_LIST - hide this list of counters, show the rest [default]
 532  * SHOW_LIST - show this list of counters, hide the rest
 533  */
 534 enum show_hide_mode { SHOW_LIST, HIDE_LIST } global_show_hide_mode = HIDE_LIST;
 535
 536 void help(void)
 537 {
 538         fprintf(outf,
 539         "Usage: turbostat [OPTIONS][(--interval seconds) | COMMAND ...]\n"
 540         "\n"
 541         "Turbostat forks the specified COMMAND and prints statistics\n"
 542         "when COMMAND completes.\n"
 543         "If no COMMAND is specified, turbostat wakes every 5-seconds\n"
 544         "to print statistics, until interrupted.\n"
 545         "  -a, --add    add a counter\n"
 546         "                 eg. --add msr0x10,u64,cpu,delta,MY_TSC\n"
 547         "  -c, --cpu    cpu-set limit output to summary plus cpu-set:\n"
 548         "                 {core | package | j,k,l..m,n-p }\n"
 549         "  -d, --debug  displays usec, Time_Of_Day_Seconds and more debugging\n"
 550         "  -D, --Dump   displays the raw counter values\n"
 551         "  -e, --enable [all | column]\n"
 552         "               shows all or the specified disabled column\n"
 553         "  -H, --hide [column|column,column,...]\n"
 554         "               hide the specified column(s)\n"
 555         "  -i, --interval sec.subsec\n"
 556         "               Override default 5-second measurement interval\n"
 557         "  -J, --Joules displays energy in Joules instead of Watts\n"
 558         "  -l, --list   list column headers only\n"
 559         "  -n, --num_iterations num\n"
 560         "               number of the measurement iterations\n"
 561         "  -o, --out file\n"
 562         "               create or truncate \"file\" for all output\n"
 563         "  -q, --quiet  skip decoding system configuration header\n"
 564         "  -s, --show [column|column,column,...]\n"
 565         "               show only the specified column(s)\n"
 566         "  -S, --Summary\n"
 567         "               limits output to 1-line system summary per interval\n"
 568         "  -T, --TCC temperature\n"
 569         "               sets the Thermal Control Circuit temperature in\n"
 570         "                 degrees Celsius\n"
 571         "  -h, --help   print this help message\n"
 572         "  -v, --version        print version information\n"
 573         "\n"
 574         "For more help, run \"man turbostat\"\n");
 575 }
 576
 577 /*
 578  * bic_lookup
 579  * for all the strings in comma separate name_list,
 580  * set the approprate bit in return value.
 581  */
 582 unsigned long long bic_lookup(char *name_list, enum show_hide_mode mode)
 583 {
 584         int i;
 585         unsigned long long retval = 0;
 586
 587         while (name_list) {
 588                 char *comma;
 589
 590                 comma = strchr(name_list, ',');
 591
 592                 if (comma)
 593                         *comma = '\0';
 594
 595                 if (!strcmp(name_list, "all"))
 596                         return ~0;
 597
 598                 for (i = 0; i < MAX_BIC; ++i) {
 599                         if (!strcmp(name_list, bic[i].name)) {
 600                                 retval |= (1ULL << i);
 601                                 break;
 602                         }
 603                 }
 604                 if (i == MAX_BIC) {
 605                         if (mode == SHOW_LIST) {
 606                                 fprintf(stderr, "Invalid counter name: %s\n", name_list);
 607                                 exit(-1);
 608                         }
 609                         deferred_skip_names[deferred_skip_index++] = name_list;
 610                         if (debug)
 611                                 fprintf(stderr, "deferred \"%s\"\n", name_list);
 612                         if (deferred_skip_index >= MAX_DEFERRED) {
 613                                 fprintf(stderr, "More than max %d un-recognized --skip options '%s'\n",
 614                                         MAX_DEFERRED, name_list);
 615                                 help();
 616                                 exit(1);
 617                         }
 618                 }
 619
 620                 name_list = comma;
 621                 if (name_list)
 622                         name_list++;
 623
 624         }
 625         return retval;
 626 }
 627
 628
 629 void print_header(char *delim)
 630 {
 631         struct msr_counter *mp;
 632         int printed = 0;
 633
 634         if (DO_BIC(BIC_USEC))
 635                 outp += sprintf(outp, "%susec", (printed++ ? delim : ""));
 636         if (DO_BIC(BIC_TOD))
 637                 outp += sprintf(outp, "%sTime_Of_Day_Seconds", (printed++ ? delim : ""));
 638         if (DO_BIC(BIC_Package))
 639                 outp += sprintf(outp, "%sPackage", (printed++ ? delim : ""));
 640         if (DO_BIC(BIC_Die))
 641                 outp += sprintf(outp, "%sDie", (printed++ ? delim : ""));
 642         if (DO_BIC(BIC_Node))
 643                 outp += sprintf(outp, "%sNode", (printed++ ? delim : ""));
 644         if (DO_BIC(BIC_Core))
 645                 outp += sprintf(outp, "%sCore", (printed++ ? delim : ""));
 646         if (DO_BIC(BIC_CPU))
 647                 outp += sprintf(outp, "%sCPU", (printed++ ? delim : ""));
 648         if (DO_BIC(BIC_APIC))
 649                 outp += sprintf(outp, "%sAPIC", (printed++ ? delim : ""));
 650         if (DO_BIC(BIC_X2APIC))
 651                 outp += sprintf(outp, "%sX2APIC", (printed++ ? delim : ""));
 652         if (DO_BIC(BIC_Avg_MHz))
 653                 outp += sprintf(outp, "%sAvg_MHz", (printed++ ? delim : ""));
 654         if (DO_BIC(BIC_Busy))
 655                 outp += sprintf(outp, "%sBusy%%", (printed++ ? delim : ""));
 656         if (DO_BIC(BIC_Bzy_MHz))
 657                 outp += sprintf(outp, "%sBzy_MHz", (printed++ ? delim : ""));
 658         if (DO_BIC(BIC_TSC_MHz))
 659                 outp += sprintf(outp, "%sTSC_MHz", (printed++ ? delim : ""));
 660
 661         if (DO_BIC(BIC_IRQ)) {
 662                 if (sums_need_wide_columns)
 663                         outp += sprintf(outp, "%s     IRQ", (printed++ ? delim : ""));
 664                 else
 665                         outp += sprintf(outp, "%sIRQ", (printed++ ? delim : ""));
 666         }
 667
 668         if (DO_BIC(BIC_SMI))
 669                 outp += sprintf(outp, "%sSMI", (printed++ ? delim : ""));
 670
 671         for (mp = sys.tp; mp; mp = mp->next) {
 672
 673                 if (mp->format == FORMAT_RAW) {
 674                         if (mp->width == 64)
 675                                 outp += sprintf(outp, "%s%18.18s", (printed++ ? delim : ""), mp->name);
 676                         else
 677                                 outp += sprintf(outp, "%s%10.10s", (printed++ ? delim : ""), mp->name);
 678                 } else {
 679                         if ((mp->type == COUNTER_ITEMS) && sums_need_wide_columns)
 680                                 outp += sprintf(outp, "%s%8s", (printed++ ? delim : ""), mp->name);
 681                         else
 682                                 outp += sprintf(outp, "%s%s", (printed++ ? delim : ""), mp->name);
 683                 }
 684         }
 685
 686         if (DO_BIC(BIC_CPU_c1))
 687                 outp += sprintf(outp, "%sCPU%%c1", (printed++ ? delim : ""));
 688         if (DO_BIC(BIC_CPU_c3))
 689                 outp += sprintf(outp, "%sCPU%%c3", (printed++ ? delim : ""));
 690         if (DO_BIC(BIC_CPU_c6))
 691                 outp += sprintf(outp, "%sCPU%%c6", (printed++ ? delim : ""));
 692         if (DO_BIC(BIC_CPU_c7))
 693                 outp += sprintf(outp, "%sCPU%%c7", (printed++ ? delim : ""));
 694
 695         if (DO_BIC(BIC_Mod_c6))
 696                 outp += sprintf(outp, "%sMod%%c6", (printed++ ? delim : ""));
 697
 698         if (DO_BIC(BIC_CoreTmp))
 699                 outp += sprintf(outp, "%sCoreTmp", (printed++ ? delim : ""));
 700
 701         if (do_rapl && !rapl_joules) {
 702                 if (DO_BIC(BIC_CorWatt) && (do_rapl & RAPL_PER_CORE_ENERGY))
 703                         outp += sprintf(outp, "%sCorWatt", (printed++ ? delim : ""));
 704         } else if (do_rapl && rapl_joules) {
 705                 if (DO_BIC(BIC_Cor_J) && (do_rapl & RAPL_PER_CORE_ENERGY))
 706                         outp += sprintf(outp, "%sCor_J", (printed++ ? delim : ""));
 707         }
 708
 709         for (mp = sys.cp; mp; mp = mp->next) {
 710                 if (mp->format == FORMAT_RAW) {
 711                         if (mp->width == 64)
 712                                 outp += sprintf(outp, "%s%18.18s", delim, mp->name);
 713                         else
 714                                 outp += sprintf(outp, "%s%10.10s", delim, mp->name);
 715                 } else {
 716                         if ((mp->type == COUNTER_ITEMS) && sums_need_wide_columns)
 717                                 outp += sprintf(outp, "%s%8s", delim, mp->name);
 718                         else
 719                                 outp += sprintf(outp, "%s%s", delim, mp->name);
 720                 }
 721         }
 722
 723         if (DO_BIC(BIC_PkgTmp))
 724                 outp += sprintf(outp, "%sPkgTmp", (printed++ ? delim : ""));
 725
 726         if (DO_BIC(BIC_GFX_rc6))
 727                 outp += sprintf(outp, "%sGFX%%rc6", (printed++ ? delim : ""));
 728
 729         if (DO_BIC(BIC_GFXMHz))
 730                 outp += sprintf(outp, "%sGFXMHz", (printed++ ? delim : ""));
 731
 732         if (DO_BIC(BIC_Totl_c0))
 733                 outp += sprintf(outp, "%sTotl%%C0", (printed++ ? delim : ""));
 734         if (DO_BIC(BIC_Any_c0))
 735                 outp += sprintf(outp, "%sAny%%C0", (printed++ ? delim : ""));
 736         if (DO_BIC(BIC_GFX_c0))
 737                 outp += sprintf(outp, "%sGFX%%C0", (printed++ ? delim : ""));
 738         if (DO_BIC(BIC_CPUGFX))
 739                 outp += sprintf(outp, "%sCPUGFX%%", (printed++ ? delim : ""));
 740
 741         if (DO_BIC(BIC_Pkgpc2))
 742                 outp += sprintf(outp, "%sPkg%%pc2", (printed++ ? delim : ""));
 743         if (DO_BIC(BIC_Pkgpc3))
 744                 outp += sprintf(outp, "%sPkg%%pc3", (printed++ ? delim : ""));
 745         if (DO_BIC(BIC_Pkgpc6))
 746                 outp += sprintf(outp, "%sPkg%%pc6", (printed++ ? delim : ""));
 747         if (DO_BIC(BIC_Pkgpc7))
 748                 outp += sprintf(outp, "%sPkg%%pc7", (printed++ ? delim : ""));
 749         if (DO_BIC(BIC_Pkgpc8))
 750                 outp += sprintf(outp, "%sPkg%%pc8", (printed++ ? delim : ""));
 751         if (DO_BIC(BIC_Pkgpc9))
 752                 outp += sprintf(outp, "%sPkg%%pc9", (printed++ ? delim : ""));
 753         if (DO_BIC(BIC_Pkgpc10))
 754                 outp += sprintf(outp, "%sPk%%pc10", (printed++ ? delim : ""));
 755         if (DO_BIC(BIC_CPU_LPI))
 756                 outp += sprintf(outp, "%sCPU%%LPI", (printed++ ? delim : ""));
 757         if (DO_BIC(BIC_SYS_LPI))
 758                 outp += sprintf(outp, "%sSYS%%LPI", (printed++ ? delim : ""));
 759
 760         if (do_rapl && !rapl_joules) {
 761                 if (DO_BIC(BIC_PkgWatt))
 762                         outp += sprintf(outp, "%sPkgWatt", (printed++ ? delim : ""));
 763                 if (DO_BIC(BIC_CorWatt) && !(do_rapl & RAPL_PER_CORE_ENERGY))
 764                         outp += sprintf(outp, "%sCorWatt", (printed++ ? delim : ""));
 765                 if (DO_BIC(BIC_GFXWatt))
 766                         outp += sprintf(outp, "%sGFXWatt", (printed++ ? delim : ""));
 767                 if (DO_BIC(BIC_RAMWatt))
 768                         outp += sprintf(outp, "%sRAMWatt", (printed++ ? delim : ""));
 769                 if (DO_BIC(BIC_PKG__))
 770                         outp += sprintf(outp, "%sPKG_%%", (printed++ ? delim : ""));
 771                 if (DO_BIC(BIC_RAM__))
 772                         outp += sprintf(outp, "%sRAM_%%", (printed++ ? delim : ""));
 773         } else if (do_rapl && rapl_joules) {
 774                 if (DO_BIC(BIC_Pkg_J))
 775                         outp += sprintf(outp, "%sPkg_J", (printed++ ? delim : ""));
 776                 if (DO_BIC(BIC_Cor_J) && !(do_rapl & RAPL_PER_CORE_ENERGY))
 777                         outp += sprintf(outp, "%sCor_J", (printed++ ? delim : ""));
 778                 if (DO_BIC(BIC_GFX_J))
 779                         outp += sprintf(outp, "%sGFX_J", (printed++ ? delim : ""));
 780                 if (DO_BIC(BIC_RAM_J))
 781                         outp += sprintf(outp, "%sRAM_J", (printed++ ? delim : ""));
 782                 if (DO_BIC(BIC_PKG__))
 783                         outp += sprintf(outp, "%sPKG_%%", (printed++ ? delim : ""));
 784                 if (DO_BIC(BIC_RAM__))
 785                         outp += sprintf(outp, "%sRAM_%%", (printed++ ? delim : ""));
 786         }
 787         for (mp = sys.pp; mp; mp = mp->next) {
 788                 if (mp->format == FORMAT_RAW) {
 789                         if (mp->width == 64)
 790                                 outp += sprintf(outp, "%s%18.18s", delim, mp->name);
 791                         else
 792                                 outp += sprintf(outp, "%s%10.10s", delim, mp->name);
 793                 } else {
 794                         if ((mp->type == COUNTER_ITEMS) && sums_need_wide_columns)
 795                                 outp += sprintf(outp, "%s%8s", delim, mp->name);
 796                         else
 797                                 outp += sprintf(outp, "%s%s", delim, mp->name);
 798                 }
 799         }
 800
 801         outp += sprintf(outp, "\n");
 802 }
 803
 804 int dump_counters(struct thread_data *t, struct core_data *c,
 805         struct pkg_data *p)
 806 {
 807         int i;
 808         struct msr_counter *mp;
 809
 810         outp += sprintf(outp, "t %p, c %p, p %p\n", t, c, p);
 811
 812         if (t) {
 813                 outp += sprintf(outp, "CPU: %d flags 0x%x\n",
 814                         t->cpu_id, t->flags);
 815                 outp += sprintf(outp, "TSC: %016llX\n", t->tsc);
 816                 outp += sprintf(outp, "aperf: %016llX\n", t->aperf);
 817                 outp += sprintf(outp, "mperf: %016llX\n", t->mperf);
 818                 outp += sprintf(outp, "c1: %016llX\n", t->c1);
 819
 820                 if (DO_BIC(BIC_IRQ))
 821                         outp += sprintf(outp, "IRQ: %lld\n", t->irq_count);
 822                 if (DO_BIC(BIC_SMI))
 823                         outp += sprintf(outp, "SMI: %d\n", t->smi_count);
 824
 825                 for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) {
 826                         outp += sprintf(outp, "tADDED [%d] msr0x%x: %08llX\n",
 827                                 i, mp->msr_num, t->counter[i]);
 828                 }
 829         }
 830
 831         if (c) {
 832                 outp += sprintf(outp, "core: %d\n", c->core_id);
 833                 outp += sprintf(outp, "c3: %016llX\n", c->c3);
 834                 outp += sprintf(outp, "c6: %016llX\n", c->c6);
 835                 outp += sprintf(outp, "c7: %016llX\n", c->c7);
 836                 outp += sprintf(outp, "DTS: %dC\n", c->core_temp_c);
 837                 outp += sprintf(outp, "Joules: %0X\n", c->core_energy);
 838
 839                 for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) {
 840                         outp += sprintf(outp, "cADDED [%d] msr0x%x: %08llX\n",
 841                                 i, mp->msr_num, c->counter[i]);
 842                 }
 843                 outp += sprintf(outp, "mc6_us: %016llX\n", c->mc6_us);
 844         }
 845
 846         if (p) {
 847                 outp += sprintf(outp, "package: %d\n", p->package_id);
 848
 849                 outp += sprintf(outp, "Weighted cores: %016llX\n", p->pkg_wtd_core_c0);
 850                 outp += sprintf(outp, "Any cores: %016llX\n", p->pkg_any_core_c0);
 851                 outp += sprintf(outp, "Any GFX: %016llX\n", p->pkg_any_gfxe_c0);
 852                 outp += sprintf(outp, "CPU + GFX: %016llX\n", p->pkg_both_core_gfxe_c0);
 853
 854                 outp += sprintf(outp, "pc2: %016llX\n", p->pc2);
 855                 if (DO_BIC(BIC_Pkgpc3))
 856                         outp += sprintf(outp, "pc3: %016llX\n", p->pc3);
 857                 if (DO_BIC(BIC_Pkgpc6))
 858                         outp += sprintf(outp, "pc6: %016llX\n", p->pc6);
 859                 if (DO_BIC(BIC_Pkgpc7))
 860                         outp += sprintf(outp, "pc7: %016llX\n", p->pc7);
 861                 outp += sprintf(outp, "pc8: %016llX\n", p->pc8);
 862                 outp += sprintf(outp, "pc9: %016llX\n", p->pc9);
 863                 outp += sprintf(outp, "pc10: %016llX\n", p->pc10);
 864                 outp += sprintf(outp, "pc10: %016llX\n", p->pc10);
 865                 outp += sprintf(outp, "cpu_lpi: %016llX\n", p->cpu_lpi);
 866                 outp += sprintf(outp, "sys_lpi: %016llX\n", p->sys_lpi);
 867                 outp += sprintf(outp, "Joules PKG: %0X\n", p->energy_pkg);
 868                 outp += sprintf(outp, "Joules COR: %0X\n", p->energy_cores);
 869                 outp += sprintf(outp, "Joules GFX: %0X\n", p->energy_gfx);
 870                 outp += sprintf(outp, "Joules RAM: %0X\n", p->energy_dram);
 871                 outp += sprintf(outp, "Throttle PKG: %0X\n",
 872                         p->rapl_pkg_perf_status);
 873                 outp += sprintf(outp, "Throttle RAM: %0X\n",
 874                         p->rapl_dram_perf_status);
 875                 outp += sprintf(outp, "PTM: %dC\n", p->pkg_temp_c);
 876
 877                 for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) {
 878                         outp += sprintf(outp, "pADDED [%d] msr0x%x: %08llX\n",
 879                                 i, mp->msr_num, p->counter[i]);
 880                 }
 881         }
 882
 883         outp += sprintf(outp, "\n");
 884
 885         return 0;
 886 }
 887
 888 /*
 889  * column formatting convention & formats
 890  */
 891 int format_counters(struct thread_data *t, struct core_data *c,
 892         struct pkg_data *p)
 893 {
 894         double interval_float, tsc;
 895         char *fmt8;
 896         int i;
 897         struct msr_counter *mp;
 898         char *delim = "\t";
 899         int printed = 0;
 900
 901          /* if showing only 1st thread in core and this isn't one, bail out */
 902         if (show_core_only && !(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
 903                 return 0;
 904
 905          /* if showing only 1st thread in pkg and this isn't one, bail out */
 906         if (show_pkg_only && !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
 907                 return 0;
 908
 909         /*if not summary line and --cpu is used */
 910         if ((t != &average.threads) &&
 911                 (cpu_subset && !CPU_ISSET_S(t->cpu_id, cpu_subset_size, cpu_subset)))
 912                 return 0;
 913
 914         if (DO_BIC(BIC_USEC)) {
 915                 /* on each row, print how many usec each timestamp took to gather */
 916                 struct timeval tv;
 917
 918                 timersub(&t->tv_end, &t->tv_begin, &tv);
 919                 outp += sprintf(outp, "%5ld\t", tv.tv_sec * 1000000 + tv.tv_usec);
 920         }
 921
 922         /* Time_Of_Day_Seconds: on each row, print sec.usec last timestamp taken */
 923         if (DO_BIC(BIC_TOD))
 924                 outp += sprintf(outp, "%10ld.%06ld\t", t->tv_end.tv_sec, t->tv_end.tv_usec);
 925
 926         interval_float = tv_delta.tv_sec + tv_delta.tv_usec/1000000.0;
 927
 928         tsc = t->tsc * tsc_tweak;
 929
 930         /* topo columns, print blanks on 1st (average) line */
 931         if (t == &average.threads) {
 932                 if (DO_BIC(BIC_Package))
 933                         outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
 934                 if (DO_BIC(BIC_Die))
 935                         outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
 936                 if (DO_BIC(BIC_Node))
 937                         outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
 938                 if (DO_BIC(BIC_Core))
 939                         outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
 940                 if (DO_BIC(BIC_CPU))
 941                         outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
 942                 if (DO_BIC(BIC_APIC))
 943                         outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
 944                 if (DO_BIC(BIC_X2APIC))
 945                         outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
 946         } else {
 947                 if (DO_BIC(BIC_Package)) {
 948                         if (p)
 949                                 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), p->package_id);
 950                         else
 951                                 outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
 952                 }
 953                 if (DO_BIC(BIC_Die)) {
 954                         if (c)
 955                                 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), cpus[t->cpu_id].die_id);
 956                         else
 957                                 outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
 958                 }
 959                 if (DO_BIC(BIC_Node)) {
 960                         if (t)
 961                                 outp += sprintf(outp, "%s%d",
 962                                                 (printed++ ? delim : ""),
 963                                               cpus[t->cpu_id].physical_node_id);
 964                         else
 965                                 outp += sprintf(outp, "%s-",
 966                                                 (printed++ ? delim : ""));
 967                 }
 968                 if (DO_BIC(BIC_Core)) {
 969                         if (c)
 970                                 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), c->core_id);
 971                         else
 972                                 outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
 973                 }
 974                 if (DO_BIC(BIC_CPU))
 975                         outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), t->cpu_id);
 976                 if (DO_BIC(BIC_APIC))
 977                         outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), t->apic_id);
 978                 if (DO_BIC(BIC_X2APIC))
 979                         outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), t->x2apic_id);
 980         }
 981
 982         if (DO_BIC(BIC_Avg_MHz))
 983                 outp += sprintf(outp, "%s%.0f", (printed++ ? delim : ""),
 984                         1.0 / units * t->aperf / interval_float);
 985
 986         if (DO_BIC(BIC_Busy))
 987                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * t->mperf/tsc);
 988
 989         if (DO_BIC(BIC_Bzy_MHz)) {
 990                 if (has_base_hz)
 991                         outp += sprintf(outp, "%s%.0f", (printed++ ? delim : ""), base_hz / units * t->aperf / t->mperf);
 992                 else
 993                         outp += sprintf(outp, "%s%.0f", (printed++ ? delim : ""),
 994                                 tsc / units * t->aperf / t->mperf / interval_float);
 995         }
 996
 997         if (DO_BIC(BIC_TSC_MHz))
 998                 outp += sprintf(outp, "%s%.0f", (printed++ ? delim : ""), 1.0 * t->tsc/units/interval_float);
 999
1000         /* IRQ */
1001         if (DO_BIC(BIC_IRQ)) {
1002                 if (sums_need_wide_columns)
1003                         outp += sprintf(outp, "%s%8lld", (printed++ ? delim : ""), t->irq_count);
1004                 else
1005                         outp += sprintf(outp, "%s%lld", (printed++ ? delim : ""), t->irq_count);
1006         }
1007
1008         /* SMI */
1009         if (DO_BIC(BIC_SMI))
1010                 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), t->smi_count);
1011
1012         /* Added counters */
1013         for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) {
1014                 if (mp->format == FORMAT_RAW) {
1015                         if (mp->width == 32)
1016                                 outp += sprintf(outp, "%s0x%08x", (printed++ ? delim : ""), (unsigned int) t->counter[i]);
1017                         else
1018                                 outp += sprintf(outp, "%s0x%016llx", (printed++ ? delim : ""), t->counter[i]);
1019                 } else if (mp->format == FORMAT_DELTA) {
1020                         if ((mp->type == COUNTER_ITEMS) && sums_need_wide_columns)
1021                                 outp += sprintf(outp, "%s%8lld", (printed++ ? delim : ""), t->counter[i]);
1022                         else
1023                                 outp += sprintf(outp, "%s%lld", (printed++ ? delim : ""), t->counter[i]);
1024                 } else if (mp->format == FORMAT_PERCENT) {
1025                         if (mp->type == COUNTER_USEC)
1026                                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), t->counter[i]/interval_float/10000);
1027                         else
1028                                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * t->counter[i]/tsc);
1029                 }
1030         }
1031
1032         /* C1 */
1033         if (DO_BIC(BIC_CPU_c1))
1034                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * t->c1/tsc);
1035
1036
1037         /* print per-core data only for 1st thread in core */
1038         if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
1039                 goto done;
1040
1041         if (DO_BIC(BIC_CPU_c3))
1042                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * c->c3/tsc);
1043         if (DO_BIC(BIC_CPU_c6))
1044                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * c->c6/tsc);
1045         if (DO_BIC(BIC_CPU_c7))
1046                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * c->c7/tsc);
1047
1048         /* Mod%c6 */
1049         if (DO_BIC(BIC_Mod_c6))
1050                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * c->mc6_us / tsc);
1051
1052         if (DO_BIC(BIC_CoreTmp))
1053                 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), c->core_temp_c);
1054
1055         for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) {
1056                 if (mp->format == FORMAT_RAW) {
1057                         if (mp->width == 32)
1058                                 outp += sprintf(outp, "%s0x%08x", (printed++ ? delim : ""), (unsigned int) c->counter[i]);
1059                         else
1060                                 outp += sprintf(outp, "%s0x%016llx", (printed++ ? delim : ""), c->counter[i]);
1061                 } else if (mp->format == FORMAT_DELTA) {
1062                         if ((mp->type == COUNTER_ITEMS) && sums_need_wide_columns)
1063                                 outp += sprintf(outp, "%s%8lld", (printed++ ? delim : ""), c->counter[i]);
1064                         else
1065                                 outp += sprintf(outp, "%s%lld", (printed++ ? delim : ""), c->counter[i]);
1066                 } else if (mp->format == FORMAT_PERCENT) {
1067                         outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * c->counter[i]/tsc);
1068                 }
1069         }
1070
1071         /*
1072          * If measurement interval exceeds minimum RAPL Joule Counter range,
1073          * indicate that results are suspect by printing "**" in fraction place.
1074          */
1075         if (interval_float < rapl_joule_counter_range)
1076                 fmt8 = "%s%.2f";
1077         else
1078                 fmt8 = "%6.0f**";
1079
1080         if (DO_BIC(BIC_CorWatt) && (do_rapl & RAPL_PER_CORE_ENERGY))
1081                 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), c->core_energy * rapl_energy_units / interval_float);
1082         if (DO_BIC(BIC_Cor_J) && (do_rapl & RAPL_PER_CORE_ENERGY))
1083                 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), c->core_energy * rapl_energy_units);
1084
1085         /* print per-package data only for 1st core in package */
1086         if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
1087                 goto done;
1088
1089         /* PkgTmp */
1090         if (DO_BIC(BIC_PkgTmp))
1091                 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), p->pkg_temp_c);
1092
1093         /* GFXrc6 */
1094         if (DO_BIC(BIC_GFX_rc6)) {
1095                 if (p->gfx_rc6_ms == -1) {      /* detect GFX counter reset */
1096                         outp += sprintf(outp, "%s**.**", (printed++ ? delim : ""));
1097                 } else {
1098                         outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""),
1099                                 p->gfx_rc6_ms / 10.0 / interval_float);
1100                 }
1101         }
1102
1103         /* GFXMHz */
1104         if (DO_BIC(BIC_GFXMHz))
1105                 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), p->gfx_mhz);
1106
1107         /* Totl%C0, Any%C0 GFX%C0 CPUGFX% */
1108         if (DO_BIC(BIC_Totl_c0))
1109                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pkg_wtd_core_c0/tsc);
1110         if (DO_BIC(BIC_Any_c0))
1111                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pkg_any_core_c0/tsc);
1112         if (DO_BIC(BIC_GFX_c0))
1113                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pkg_any_gfxe_c0/tsc);
1114         if (DO_BIC(BIC_CPUGFX))
1115                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pkg_both_core_gfxe_c0/tsc);
1116
1117         if (DO_BIC(BIC_Pkgpc2))
1118                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc2/tsc);
1119         if (DO_BIC(BIC_Pkgpc3))
1120                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc3/tsc);
1121         if (DO_BIC(BIC_Pkgpc6))
1122                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc6/tsc);
1123         if (DO_BIC(BIC_Pkgpc7))
1124                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc7/tsc);
1125         if (DO_BIC(BIC_Pkgpc8))
1126                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc8/tsc);
1127         if (DO_BIC(BIC_Pkgpc9))
1128                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc9/tsc);
1129         if (DO_BIC(BIC_Pkgpc10))
1130                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc10/tsc);
1131
1132         if (DO_BIC(BIC_CPU_LPI))
1133                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->cpu_lpi / 1000000.0 / interval_float);
1134         if (DO_BIC(BIC_SYS_LPI))
1135                 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->sys_lpi / 1000000.0 / interval_float);
1136
1137         if (DO_BIC(BIC_PkgWatt))
1138                 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_pkg * rapl_energy_units / interval_float);
1139         if (DO_BIC(BIC_CorWatt) && !(do_rapl & RAPL_PER_CORE_ENERGY))
1140                 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_cores * rapl_energy_units / interval_float);
1141         if (DO_BIC(BIC_GFXWatt))
1142                 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_gfx * rapl_energy_units / interval_float);
1143         if (DO_BIC(BIC_RAMWatt))
1144                 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_dram * rapl_dram_energy_units / interval_float);
1145         if (DO_BIC(BIC_Pkg_J))
1146                 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_pkg * rapl_energy_units);
1147         if (DO_BIC(BIC_Cor_J) && !(do_rapl & RAPL_PER_CORE_ENERGY))
1148                 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_cores * rapl_energy_units);
1149         if (DO_BIC(BIC_GFX_J))
1150                 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_gfx * rapl_energy_units);
1151         if (DO_BIC(BIC_RAM_J))
1152                 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_dram * rapl_dram_energy_units);
1153         if (DO_BIC(BIC_PKG__))
1154                 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), 100.0 * p->rapl_pkg_perf_status * rapl_time_units / interval_float);
1155         if (DO_BIC(BIC_RAM__))
1156                 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), 100.0 * p->rapl_dram_perf_status * rapl_time_units / interval_float);
1157
1158         for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) {
1159                 if (mp->format == FORMAT_RAW) {
1160                         if (mp->width == 32)
1161                                 outp += sprintf(outp, "%s0x%08x", (printed++ ? delim : ""), (unsigned int) p->counter[i]);
1162                         else
1163                                 outp += sprintf(outp, "%s0x%016llx", (printed++ ? delim : ""), p->counter[i]);
1164                 } else if (mp->format == FORMAT_DELTA) {
1165                         if ((mp->type == COUNTER_ITEMS) && sums_need_wide_columns)
1166                                 outp += sprintf(outp, "%s%8lld", (printed++ ? delim : ""), p->counter[i]);
1167                         else
1168                                 outp += sprintf(outp, "%s%lld", (printed++ ? delim : ""), p->counter[i]);
1169                 } else if (mp->format == FORMAT_PERCENT) {
1170                         outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->counter[i]/tsc);
1171                 }
1172         }
1173
1174 done:
1175         if (*(outp - 1) != '\n')
1176                 outp += sprintf(outp, "\n");
1177
1178         return 0;
1179 }
1180
1181 void flush_output_stdout(void)
1182 {
1183         FILE *filep;
1184
1185         if (outf == stderr)
1186                 filep = stdout;
1187         else
1188                 filep = outf;
1189
1190         fputs(output_buffer, filep);
1191         fflush(filep);
1192
1193         outp = output_buffer;
1194 }
1195 void flush_output_stderr(void)
1196 {
1197         fputs(output_buffer, outf);
1198         fflush(outf);
1199         outp = output_buffer;
1200 }
1201 void format_all_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
1202 {
1203         static int printed;
1204
1205         if (!printed || !summary_only)
1206                 print_header("\t");
1207
1208         format_counters(&average.threads, &average.cores, &average.packages);
1209
1210         printed = 1;
1211
1212         if (summary_only)
1213                 return;
1214
1215         for_all_cpus(format_counters, t, c, p);
1216 }
1217
1218 #define DELTA_WRAP32(new, old)                  \
1219         if (new > old) {                        \
1220                 old = new - old;                \
1221         } else {                                \
1222                 old = 0x100000000 + new - old;  \
1223         }
1224
1225 int
1226 delta_package(struct pkg_data *new, struct pkg_data *old)
1227 {
1228         int i;
1229         struct msr_counter *mp;
1230
1231
1232         if (DO_BIC(BIC_Totl_c0))
1233                 old->pkg_wtd_core_c0 = new->pkg_wtd_core_c0 - old->pkg_wtd_core_c0;
1234         if (DO_BIC(BIC_Any_c0))
1235                 old->pkg_any_core_c0 = new->pkg_any_core_c0 - old->pkg_any_core_c0;
1236         if (DO_BIC(BIC_GFX_c0))
1237                 old->pkg_any_gfxe_c0 = new->pkg_any_gfxe_c0 - old->pkg_any_gfxe_c0;
1238         if (DO_BIC(BIC_CPUGFX))
1239                 old->pkg_both_core_gfxe_c0 = new->pkg_both_core_gfxe_c0 - old->pkg_both_core_gfxe_c0;
1240
1241         old->pc2 = new->pc2 - old->pc2;
1242         if (DO_BIC(BIC_Pkgpc3))
1243                 old->pc3 = new->pc3 - old->pc3;
1244         if (DO_BIC(BIC_Pkgpc6))
1245                 old->pc6 = new->pc6 - old->pc6;
1246         if (DO_BIC(BIC_Pkgpc7))
1247                 old->pc7 = new->pc7 - old->pc7;
1248         old->pc8 = new->pc8 - old->pc8;
1249         old->pc9 = new->pc9 - old->pc9;
1250         old->pc10 = new->pc10 - old->pc10;
1251         old->cpu_lpi = new->cpu_lpi - old->cpu_lpi;
1252         old->sys_lpi = new->sys_lpi - old->sys_lpi;
1253         old->pkg_temp_c = new->pkg_temp_c;
1254
1255         /* flag an error when rc6 counter resets/wraps */
1256         if (old->gfx_rc6_ms >  new->gfx_rc6_ms)
1257                 old->gfx_rc6_ms = -1;
1258         else
1259                 old->gfx_rc6_ms = new->gfx_rc6_ms - old->gfx_rc6_ms;
1260
1261         old->gfx_mhz = new->gfx_mhz;
1262
1263         DELTA_WRAP32(new->energy_pkg, old->energy_pkg);
1264         DELTA_WRAP32(new->energy_cores, old->energy_cores);
1265         DELTA_WRAP32(new->energy_gfx, old->energy_gfx);
1266         DELTA_WRAP32(new->energy_dram, old->energy_dram);
1267         DELTA_WRAP32(new->rapl_pkg_perf_status, old->rapl_pkg_perf_status);
1268         DELTA_WRAP32(new->rapl_dram_perf_status, old->rapl_dram_perf_status);
1269
1270         for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) {
1271                 if (mp->format == FORMAT_RAW)
1272                         old->counter[i] = new->counter[i];
1273                 else
1274                         old->counter[i] = new->counter[i] - old->counter[i];
1275         }
1276
1277         return 0;
1278 }
1279
1280 void
1281 delta_core(struct core_data *new, struct core_data *old)
1282 {
1283         int i;
1284         struct msr_counter *mp;
1285
1286         old->c3 = new->c3 - old->c3;
1287         old->c6 = new->c6 - old->c6;
1288         old->c7 = new->c7 - old->c7;
1289         old->core_temp_c = new->core_temp_c;
1290         old->mc6_us = new->mc6_us - old->mc6_us;
1291
1292         DELTA_WRAP32(new->core_energy, old->core_energy);
1293
1294         for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) {
1295                 if (mp->format == FORMAT_RAW)
1296                         old->counter[i] = new->counter[i];
1297                 else
1298                         old->counter[i] = new->counter[i] - old->counter[i];
1299         }
1300 }
1301
1302 /*
1303  * old = new - old
1304  */
1305 int
1306 delta_thread(struct thread_data *new, struct thread_data *old,
1307         struct core_data *core_delta)
1308 {
1309         int i;
1310         struct msr_counter *mp;
1311
1312         /* we run cpuid just the 1st time, copy the results */
1313         if (DO_BIC(BIC_APIC))
1314                 new->apic_id = old->apic_id;
1315         if (DO_BIC(BIC_X2APIC))
1316                 new->x2apic_id = old->x2apic_id;
1317
1318         /*
1319          * the timestamps from start of measurement interval are in "old"
1320          * the timestamp from end of measurement interval are in "new"
1321          * over-write old w/ new so we can print end of interval values
1322          */
1323
1324         old->tv_begin = new->tv_begin;
1325         old->tv_end = new->tv_end;
1326
1327         old->tsc = new->tsc - old->tsc;
1328
1329         /* check for TSC < 1 Mcycles over interval */
1330         if (old->tsc < (1000 * 1000))
1331                 errx(-3, "Insanely slow TSC rate, TSC stops in idle?\n"
1332                      "You can disable all c-states by booting with \"idle=poll\"\n"
1333                      "or just the deep ones with \"processor.max_cstate=1\"");
1334
1335         old->c1 = new->c1 - old->c1;
1336
1337         if (DO_BIC(BIC_Avg_MHz) || DO_BIC(BIC_Busy) || DO_BIC(BIC_Bzy_MHz)) {
1338                 if ((new->aperf > old->aperf) && (new->mperf > old->mperf)) {
1339                         old->aperf = new->aperf - old->aperf;
1340                         old->mperf = new->mperf - old->mperf;
1341                 } else {
1342                         return -1;
1343                 }
1344         }
1345
1346
1347         if (use_c1_residency_msr) {
1348                 /*
1349                  * Some models have a dedicated C1 residency MSR,
1350                  * which should be more accurate than the derivation below.
1351                  */
1352         } else {
1353                 /*
1354                  * As counter collection is not atomic,
1355                  * it is possible for mperf's non-halted cycles + idle states
1356                  * to exceed TSC's all cycles: show c1 = 0% in that case.
1357                  */
1358                 if ((old->mperf + core_delta->c3 + core_delta->c6 + core_delta->c7) > (old->tsc * tsc_tweak))
1359                         old->c1 = 0;
1360                 else {
1361                         /* normal case, derive c1 */
1362                         old->c1 = (old->tsc * tsc_tweak) - old->mperf - core_delta->c3
1363                                 - core_delta->c6 - core_delta->c7;
1364                 }
1365         }
1366
1367         if (old->mperf == 0) {
1368                 if (debug > 1)
1369                         fprintf(outf, "cpu%d MPERF 0!\n", old->cpu_id);
1370                 old->mperf = 1; /* divide by 0 protection */
1371         }
1372
1373         if (DO_BIC(BIC_IRQ))
1374                 old->irq_count = new->irq_count - old->irq_count;
1375
1376         if (DO_BIC(BIC_SMI))
1377                 old->smi_count = new->smi_count - old->smi_count;
1378
1379         for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) {
1380                 if (mp->format == FORMAT_RAW)
1381                         old->counter[i] = new->counter[i];
1382                 else
1383                         old->counter[i] = new->counter[i] - old->counter[i];
1384         }
1385         return 0;
1386 }
1387
1388 int delta_cpu(struct thread_data *t, struct core_data *c,
1389         struct pkg_data *p, struct thread_data *t2,
1390         struct core_data *c2, struct pkg_data *p2)
1391 {
1392         int retval = 0;
1393
1394         /* calculate core delta only for 1st thread in core */
1395         if (t->flags & CPU_IS_FIRST_THREAD_IN_CORE)
1396                 delta_core(c, c2);
1397
1398         /* always calculate thread delta */
1399         retval = delta_thread(t, t2, c2);       /* c2 is core delta */
1400         if (retval)
1401                 return retval;
1402
1403         /* calculate package delta only for 1st core in package */
1404         if (t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE)
1405                 retval = delta_package(p, p2);
1406
1407         return retval;
1408 }
1409
1410 void clear_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
1411 {
1412         int i;
1413         struct msr_counter  *mp;
1414
1415         t->tv_begin.tv_sec = 0;
1416         t->tv_begin.tv_usec = 0;
1417         t->tv_end.tv_sec = 0;
1418         t->tv_end.tv_usec = 0;
1419
1420         t->tsc = 0;
1421         t->aperf = 0;
1422         t->mperf = 0;
1423         t->c1 = 0;
1424
1425         t->irq_count = 0;
1426         t->smi_count = 0;
1427
1428         /* tells format_counters to dump all fields from this set */
1429         t->flags = CPU_IS_FIRST_THREAD_IN_CORE | CPU_IS_FIRST_CORE_IN_PACKAGE;
1430
1431         c->c3 = 0;
1432         c->c6 = 0;
1433         c->c7 = 0;
1434         c->mc6_us = 0;
1435         c->core_temp_c = 0;
1436         c->core_energy = 0;
1437
1438         p->pkg_wtd_core_c0 = 0;
1439         p->pkg_any_core_c0 = 0;
1440         p->pkg_any_gfxe_c0 = 0;
1441         p->pkg_both_core_gfxe_c0 = 0;
1442
1443         p->pc2 = 0;
1444         if (DO_BIC(BIC_Pkgpc3))
1445                 p->pc3 = 0;
1446         if (DO_BIC(BIC_Pkgpc6))
1447                 p->pc6 = 0;
1448         if (DO_BIC(BIC_Pkgpc7))
1449                 p->pc7 = 0;
1450         p->pc8 = 0;
1451         p->pc9 = 0;
1452         p->pc10 = 0;
1453         p->cpu_lpi = 0;
1454         p->sys_lpi = 0;
1455
1456         p->energy_pkg = 0;
1457         p->energy_dram = 0;
1458         p->energy_cores = 0;
1459         p->energy_gfx = 0;
1460         p->rapl_pkg_perf_status = 0;
1461         p->rapl_dram_perf_status = 0;
1462         p->pkg_temp_c = 0;
1463
1464         p->gfx_rc6_ms = 0;
1465         p->gfx_mhz = 0;
1466         for (i = 0, mp = sys.tp; mp; i++, mp = mp->next)
1467                 t->counter[i] = 0;
1468
1469         for (i = 0, mp = sys.cp; mp; i++, mp = mp->next)
1470                 c->counter[i] = 0;
1471
1472         for (i = 0, mp = sys.pp; mp; i++, mp = mp->next)
1473                 p->counter[i] = 0;
1474 }
1475 int sum_counters(struct thread_data *t, struct core_data *c,
1476         struct pkg_data *p)
1477 {
1478         int i;
1479         struct msr_counter *mp;
1480
1481         /* copy un-changing apic_id's */
1482         if (DO_BIC(BIC_APIC))
1483                 average.threads.apic_id = t->apic_id;
1484         if (DO_BIC(BIC_X2APIC))
1485                 average.threads.x2apic_id = t->x2apic_id;
1486
1487         /* remember first tv_begin */
1488         if (average.threads.tv_begin.tv_sec == 0)
1489                 average.threads.tv_begin = t->tv_begin;
1490
1491         /* remember last tv_end */
1492         average.threads.tv_end = t->tv_end;
1493
1494         average.threads.tsc += t->tsc;
1495         average.threads.aperf += t->aperf;
1496         average.threads.mperf += t->mperf;
1497         average.threads.c1 += t->c1;
1498
1499         average.threads.irq_count += t->irq_count;
1500         average.threads.smi_count += t->smi_count;
1501
1502         for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) {
1503                 if (mp->format == FORMAT_RAW)
1504                         continue;
1505                 average.threads.counter[i] += t->counter[i];
1506         }
1507
1508         /* sum per-core values only for 1st thread in core */
1509         if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
1510                 return 0;
1511
1512         average.cores.c3 += c->c3;
1513         average.cores.c6 += c->c6;
1514         average.cores.c7 += c->c7;
1515         average.cores.mc6_us += c->mc6_us;
1516
1517         average.cores.core_temp_c = MAX(average.cores.core_temp_c, c->core_temp_c);
1518
1519         average.cores.core_energy += c->core_energy;
1520
1521         for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) {
1522                 if (mp->format == FORMAT_RAW)
1523                         continue;
1524                 average.cores.counter[i] += c->counter[i];
1525         }
1526
1527         /* sum per-pkg values only for 1st core in pkg */
1528         if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
1529                 return 0;
1530
1531         if (DO_BIC(BIC_Totl_c0))
1532                 average.packages.pkg_wtd_core_c0 += p->pkg_wtd_core_c0;
1533         if (DO_BIC(BIC_Any_c0))
1534                 average.packages.pkg_any_core_c0 += p->pkg_any_core_c0;
1535         if (DO_BIC(BIC_GFX_c0))
1536                 average.packages.pkg_any_gfxe_c0 += p->pkg_any_gfxe_c0;
1537         if (DO_BIC(BIC_CPUGFX))
1538                 average.packages.pkg_both_core_gfxe_c0 += p->pkg_both_core_gfxe_c0;
1539
1540         average.packages.pc2 += p->pc2;
1541         if (DO_BIC(BIC_Pkgpc3))
1542                 average.packages.pc3 += p->pc3;
1543         if (DO_BIC(BIC_Pkgpc6))
1544                 average.packages.pc6 += p->pc6;
1545         if (DO_BIC(BIC_Pkgpc7))
1546                 average.packages.pc7 += p->pc7;
1547         average.packages.pc8 += p->pc8;
1548         average.packages.pc9 += p->pc9;
1549         average.packages.pc10 += p->pc10;
1550
1551         average.packages.cpu_lpi = p->cpu_lpi;
1552         average.packages.sys_lpi = p->sys_lpi;
1553
1554         average.packages.energy_pkg += p->energy_pkg;
1555         average.packages.energy_dram += p->energy_dram;
1556         average.packages.energy_cores += p->energy_cores;
1557         average.packages.energy_gfx += p->energy_gfx;
1558
1559         average.packages.gfx_rc6_ms = p->gfx_rc6_ms;
1560         average.packages.gfx_mhz = p->gfx_mhz;
1561
1562         average.packages.pkg_temp_c = MAX(average.packages.pkg_temp_c, p->pkg_temp_c);
1563
1564         average.packages.rapl_pkg_perf_status += p->rapl_pkg_perf_status;
1565         average.packages.rapl_dram_perf_status += p->rapl_dram_perf_status;
1566
1567         for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) {
1568                 if (mp->format == FORMAT_RAW)
1569                         continue;
1570                 average.packages.counter[i] += p->counter[i];
1571         }
1572         return 0;
1573 }
1574 /*
1575  * sum the counters for all cpus in the system
1576  * compute the weighted average
1577  */
1578 void compute_average(struct thread_data *t, struct core_data *c,
1579         struct pkg_data *p)
1580 {
1581         int i;
1582         struct msr_counter *mp;
1583
1584         clear_counters(&average.threads, &average.cores, &average.packages);
1585
1586         for_all_cpus(sum_counters, t, c, p);
1587
1588         average.threads.tsc /= topo.num_cpus;
1589         average.threads.aperf /= topo.num_cpus;
1590         average.threads.mperf /= topo.num_cpus;
1591         average.threads.c1 /= topo.num_cpus;
1592
1593         if (average.threads.irq_count > 9999999)
1594                 sums_need_wide_columns = 1;
1595
1596         average.cores.c3 /= topo.num_cores;
1597         average.cores.c6 /= topo.num_cores;
1598         average.cores.c7 /= topo.num_cores;
1599         average.cores.mc6_us /= topo.num_cores;
1600
1601         if (DO_BIC(BIC_Totl_c0))
1602                 average.packages.pkg_wtd_core_c0 /= topo.num_packages;
1603         if (DO_BIC(BIC_Any_c0))
1604                 average.packages.pkg_any_core_c0 /= topo.num_packages;
1605         if (DO_BIC(BIC_GFX_c0))
1606                 average.packages.pkg_any_gfxe_c0 /= topo.num_packages;
1607         if (DO_BIC(BIC_CPUGFX))
1608                 average.packages.pkg_both_core_gfxe_c0 /= topo.num_packages;
1609
1610         average.packages.pc2 /= topo.num_packages;
1611         if (DO_BIC(BIC_Pkgpc3))
1612                 average.packages.pc3 /= topo.num_packages;
1613         if (DO_BIC(BIC_Pkgpc6))
1614                 average.packages.pc6 /= topo.num_packages;
1615         if (DO_BIC(BIC_Pkgpc7))
1616                 average.packages.pc7 /= topo.num_packages;
1617
1618         average.packages.pc8 /= topo.num_packages;
1619         average.packages.pc9 /= topo.num_packages;
1620         average.packages.pc10 /= topo.num_packages;
1621
1622         for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) {
1623                 if (mp->format == FORMAT_RAW)
1624                         continue;
1625                 if (mp->type == COUNTER_ITEMS) {
1626                         if (average.threads.counter[i] > 9999999)
1627                                 sums_need_wide_columns = 1;
1628                         continue;
1629                 }
1630                 average.threads.counter[i] /= topo.num_cpus;
1631         }
1632         for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) {
1633                 if (mp->format == FORMAT_RAW)
1634                         continue;
1635                 if (mp->type == COUNTER_ITEMS) {
1636                         if (average.cores.counter[i] > 9999999)
1637                                 sums_need_wide_columns = 1;
1638                 }
1639                 average.cores.counter[i] /= topo.num_cores;
1640         }
1641         for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) {
1642                 if (mp->format == FORMAT_RAW)
1643                         continue;
1644                 if (mp->type == COUNTER_ITEMS) {
1645                         if (average.packages.counter[i] > 9999999)
1646                                 sums_need_wide_columns = 1;
1647                 }
1648                 average.packages.counter[i] /= topo.num_packages;
1649         }
1650 }
1651
1652 static unsigned long long rdtsc(void)
1653 {
1654         unsigned int low, high;
1655
1656         asm volatile("rdtsc" : "=a" (low), "=d" (high));
1657
1658         return low | ((unsigned long long)high) << 32;
1659 }
1660
1661 /*
1662  * Open a file, and exit on failure
1663  */
1664 FILE *fopen_or_die(const char *path, const char *mode)
1665 {
1666         FILE *filep = fopen(path, mode);
1667
1668         if (!filep)
1669                 err(1, "%s: open failed", path);
1670         return filep;
1671 }
1672 /*
1673  * snapshot_sysfs_counter()
1674  *
1675  * return snapshot of given counter
1676  */
1677 unsigned long long snapshot_sysfs_counter(char *path)
1678 {
1679         FILE *fp;
1680         int retval;
1681         unsigned long long counter;
1682
1683         fp = fopen_or_die(path, "r");
1684
1685         retval = fscanf(fp, "%lld", &counter);
1686         if (retval != 1)
1687                 err(1, "snapshot_sysfs_counter(%s)", path);
1688
1689         fclose(fp);
1690
1691         return counter;
1692 }
1693
1694 int get_mp(int cpu, struct msr_counter *mp, unsigned long long *counterp)
1695 {
1696         if (mp->msr_num != 0) {
1697                 if (get_msr(cpu, mp->msr_num, counterp))
1698                         return -1;
1699         } else {
1700                 char path[128 + PATH_BYTES];
1701
1702                 if (mp->flags & SYSFS_PERCPU) {
1703                         sprintf(path, "/sys/devices/system/cpu/cpu%d/%s",
1704                                  cpu, mp->path);
1705
1706                         *counterp = snapshot_sysfs_counter(path);
1707                 } else {
1708                         *counterp = snapshot_sysfs_counter(mp->path);
1709                 }
1710         }
1711
1712         return 0;
1713 }
1714
1715 void get_apic_id(struct thread_data *t)
1716 {
1717         unsigned int eax, ebx, ecx, edx;
1718
1719         if (DO_BIC(BIC_APIC)) {
1720                 eax = ebx = ecx = edx = 0;
1721                 __cpuid(1, eax, ebx, ecx, edx);
1722
1723                 t->apic_id = (ebx >> 24) & 0xff;
1724         }
1725
1726         if (!DO_BIC(BIC_X2APIC))
1727                 return;
1728
1729         if (authentic_amd) {
1730                 unsigned int topology_extensions;
1731
1732                 if (max_extended_level < 0x8000001e)
1733                         return;
1734
1735                 eax = ebx = ecx = edx = 0;
1736                 __cpuid(0x80000001, eax, ebx, ecx, edx);
1737                         topology_extensions = ecx & (1 << 22);
1738
1739                 if (topology_extensions == 0)
1740                         return;
1741
1742                 eax = ebx = ecx = edx = 0;
1743                 __cpuid(0x8000001e, eax, ebx, ecx, edx);
1744
1745                 t->x2apic_id = eax;
1746                 return;
1747         }
1748
1749         if (!genuine_intel)
1750                 return;
1751
1752         if (max_level < 0xb)
1753                 return;
1754
1755         ecx = 0;
1756         __cpuid(0xb, eax, ebx, ecx, edx);
1757         t->x2apic_id = edx;
1758
1759         if (debug && (t->apic_id != (t->x2apic_id & 0xff)))
1760                 fprintf(outf, "cpu%d: BIOS BUG: apic 0x%x x2apic 0x%x\n",
1761                                 t->cpu_id, t->apic_id, t->x2apic_id);
1762 }
1763
1764 /*
1765  * get_counters(...)
1766  * migrate to cpu
1767  * acquire and record local counters for that cpu
1768  */
1769 int get_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
1770 {
1771         int cpu = t->cpu_id;
1772         unsigned long long msr;
1773         int aperf_mperf_retry_count = 0;
1774         struct msr_counter *mp;
1775         int i;
1776
1777         gettimeofday(&t->tv_begin, (struct timezone *)NULL);
1778
1779         if (cpu_migrate(cpu)) {
1780                 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
1781                 return -1;
1782         }
1783
1784         if (first_counter_read)
1785                 get_apic_id(t);
1786 retry:
1787         t->tsc = rdtsc();       /* we are running on local CPU of interest */
1788
1789         if (DO_BIC(BIC_Avg_MHz) || DO_BIC(BIC_Busy) || DO_BIC(BIC_Bzy_MHz)) {
1790                 unsigned long long tsc_before, tsc_between, tsc_after, aperf_time, mperf_time;
1791
1792                 /*
1793                  * The TSC, APERF and MPERF must be read together for
1794                  * APERF/MPERF and MPERF/TSC to give accurate results.
1795                  *
1796                  * Unfortunately, APERF and MPERF are read by
1797                  * individual system call, so delays may occur
1798                  * between them.  If the time to read them
1799                  * varies by a large amount, we re-read them.
1800                  */
1801
1802                 /*
1803                  * This initial dummy APERF read has been seen to
1804                  * reduce jitter in the subsequent reads.
1805                  */
1806
1807                 if (get_msr(cpu, MSR_IA32_APERF, &t->aperf))
1808                         return -3;
1809
1810                 t->tsc = rdtsc();       /* re-read close to APERF */
1811
1812                 tsc_before = t->tsc;
1813
1814                 if (get_msr(cpu, MSR_IA32_APERF, &t->aperf))
1815                         return -3;
1816
1817                 tsc_between = rdtsc();
1818
1819                 if (get_msr(cpu, MSR_IA32_MPERF, &t->mperf))
1820                         return -4;
1821
1822                 tsc_after = rdtsc();
1823
1824                 aperf_time = tsc_between - tsc_before;
1825                 mperf_time = tsc_after - tsc_between;
1826
1827                 /*
1828                  * If the system call latency to read APERF and MPERF
1829                  * differ by more than 2x, then try again.
1830                  */
1831                 if ((aperf_time > (2 * mperf_time)) || (mperf_time > (2 * aperf_time))) {
1832                         aperf_mperf_retry_count++;
1833                         if (aperf_mperf_retry_count < 5)
1834                                 goto retry;
1835                         else
1836                                 warnx("cpu%d jitter %lld %lld",
1837                                         cpu, aperf_time, mperf_time);
1838                 }
1839                 aperf_mperf_retry_count = 0;
1840
1841                 t->aperf = t->aperf * aperf_mperf_multiplier;
1842                 t->mperf = t->mperf * aperf_mperf_multiplier;
1843         }
1844
1845         if (DO_BIC(BIC_IRQ))
1846                 t->irq_count = irqs_per_cpu[cpu];
1847         if (DO_BIC(BIC_SMI)) {
1848                 if (get_msr(cpu, MSR_SMI_COUNT, &msr))
1849                         return -5;
1850                 t->smi_count = msr & 0xFFFFFFFF;
1851         }
1852         if (DO_BIC(BIC_CPU_c1) && use_c1_residency_msr) {
1853                 if (get_msr(cpu, MSR_CORE_C1_RES, &t->c1))
1854                         return -6;
1855         }
1856
1857         for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) {
1858                 if (get_mp(cpu, mp, &t->counter[i]))
1859                         return -10;
1860         }
1861
1862         /* collect core counters only for 1st thread in core */
1863         if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
1864                 goto done;
1865
1866         if (DO_BIC(BIC_CPU_c3)) {
1867                 if (get_msr(cpu, MSR_CORE_C3_RESIDENCY, &c->c3))
1868                         return -6;
1869         }
1870
1871         if (DO_BIC(BIC_CPU_c6) && !do_knl_cstates) {
1872                 if (get_msr(cpu, MSR_CORE_C6_RESIDENCY, &c->c6))
1873                         return -7;
1874         } else if (do_knl_cstates) {
1875                 if (get_msr(cpu, MSR_KNL_CORE_C6_RESIDENCY, &c->c6))
1876                         return -7;
1877         }
1878
1879         if (DO_BIC(BIC_CPU_c7))
1880                 if (get_msr(cpu, MSR_CORE_C7_RESIDENCY, &c->c7))
1881                         return -8;
1882
1883         if (DO_BIC(BIC_Mod_c6))
1884                 if (get_msr(cpu, MSR_MODULE_C6_RES_MS, &c->mc6_us))
1885                         return -8;
1886
1887         if (DO_BIC(BIC_CoreTmp)) {
1888                 if (get_msr(cpu, MSR_IA32_THERM_STATUS, &msr))
1889                         return -9;
1890                 c->core_temp_c = tcc_activation_temp - ((msr >> 16) & 0x7F);
1891         }
1892
1893         if (do_rapl & RAPL_AMD_F17H) {
1894                 if (get_msr(cpu, MSR_CORE_ENERGY_STAT, &msr))
1895                         return -14;
1896                 c->core_energy = msr & 0xFFFFFFFF;
1897         }
1898
1899         for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) {
1900                 if (get_mp(cpu, mp, &c->counter[i]))
1901                         return -10;
1902         }
1903
1904         /* collect package counters only for 1st core in package */
1905         if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
1906                 goto done;
1907
1908         if (DO_BIC(BIC_Totl_c0)) {
1909                 if (get_msr(cpu, MSR_PKG_WEIGHTED_CORE_C0_RES, &p->pkg_wtd_core_c0))
1910                         return -10;
1911         }
1912         if (DO_BIC(BIC_Any_c0)) {
1913                 if (get_msr(cpu, MSR_PKG_ANY_CORE_C0_RES, &p->pkg_any_core_c0))
1914                         return -11;
1915         }
1916         if (DO_BIC(BIC_GFX_c0)) {
1917                 if (get_msr(cpu, MSR_PKG_ANY_GFXE_C0_RES, &p->pkg_any_gfxe_c0))
1918                         return -12;
1919         }
1920         if (DO_BIC(BIC_CPUGFX)) {
1921                 if (get_msr(cpu, MSR_PKG_BOTH_CORE_GFXE_C0_RES, &p->pkg_both_core_gfxe_c0))
1922                         return -13;
1923         }
1924         if (DO_BIC(BIC_Pkgpc3))
1925                 if (get_msr(cpu, MSR_PKG_C3_RESIDENCY, &p->pc3))
1926                         return -9;
1927         if (DO_BIC(BIC_Pkgpc6)) {
1928                 if (do_slm_cstates) {
1929                         if (get_msr(cpu, MSR_ATOM_PKG_C6_RESIDENCY, &p->pc6))
1930                                 return -10;
1931                 } else {
1932                         if (get_msr(cpu, MSR_PKG_C6_RESIDENCY, &p->pc6))
1933                                 return -10;
1934                 }
1935         }
1936
1937         if (DO_BIC(BIC_Pkgpc2))
1938                 if (get_msr(cpu, MSR_PKG_C2_RESIDENCY, &p->pc2))
1939                         return -11;
1940         if (DO_BIC(BIC_Pkgpc7))
1941                 if (get_msr(cpu, MSR_PKG_C7_RESIDENCY, &p->pc7))
1942                         return -12;
1943         if (DO_BIC(BIC_Pkgpc8))
1944                 if (get_msr(cpu, MSR_PKG_C8_RESIDENCY, &p->pc8))
1945                         return -13;
1946         if (DO_BIC(BIC_Pkgpc9))
1947                 if (get_msr(cpu, MSR_PKG_C9_RESIDENCY, &p->pc9))
1948                         return -13;
1949         if (DO_BIC(BIC_Pkgpc10))
1950                 if (get_msr(cpu, MSR_PKG_C10_RESIDENCY, &p->pc10))
1951                         return -13;
1952
1953         if (DO_BIC(BIC_CPU_LPI))
1954                 p->cpu_lpi = cpuidle_cur_cpu_lpi_us;
1955         if (DO_BIC(BIC_SYS_LPI))
1956                 p->sys_lpi = cpuidle_cur_sys_lpi_us;
1957
1958         if (do_rapl & RAPL_PKG) {
1959                 if (get_msr(cpu, MSR_PKG_ENERGY_STATUS, &msr))
1960                         return -13;
1961                 p->energy_pkg = msr & 0xFFFFFFFF;
1962         }
1963         if (do_rapl & RAPL_CORES_ENERGY_STATUS) {
1964                 if (get_msr(cpu, MSR_PP0_ENERGY_STATUS, &msr))
1965                         return -14;
1966                 p->energy_cores = msr & 0xFFFFFFFF;
1967         }
1968         if (do_rapl & RAPL_DRAM) {
1969                 if (get_msr(cpu, MSR_DRAM_ENERGY_STATUS, &msr))
1970                         return -15;
1971                 p->energy_dram = msr & 0xFFFFFFFF;
1972         }
1973         if (do_rapl & RAPL_GFX) {
1974                 if (get_msr(cpu, MSR_PP1_ENERGY_STATUS, &msr))
1975                         return -16;
1976                 p->energy_gfx = msr & 0xFFFFFFFF;
1977         }
1978         if (do_rapl & RAPL_PKG_PERF_STATUS) {
1979                 if (get_msr(cpu, MSR_PKG_PERF_STATUS, &msr))
1980                         return -16;
1981                 p->rapl_pkg_perf_status = msr & 0xFFFFFFFF;
1982         }
1983         if (do_rapl & RAPL_DRAM_PERF_STATUS) {
1984                 if (get_msr(cpu, MSR_DRAM_PERF_STATUS, &msr))
1985                         return -16;
1986                 p->rapl_dram_perf_status = msr & 0xFFFFFFFF;
1987         }
1988         if (DO_BIC(BIC_PkgTmp)) {
1989                 if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_STATUS, &msr))
1990                         return -17;
1991                 p->pkg_temp_c = tcc_activation_temp - ((msr >> 16) & 0x7F);
1992         }
1993
1994         if (DO_BIC(BIC_GFX_rc6))
1995                 p->gfx_rc6_ms = gfx_cur_rc6_ms;
1996
1997         if (DO_BIC(BIC_GFXMHz))
1998                 p->gfx_mhz = gfx_cur_mhz;
1999
2000         for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) {
2001                 if (get_mp(cpu, mp, &p->counter[i]))
2002                         return -10;
2003         }
2004 done:
2005         gettimeofday(&t->tv_end, (struct timezone *)NULL);
2006
2007         return 0;
2008 }
2009
2010 /*
2011  * MSR_PKG_CST_CONFIG_CONTROL decoding for pkg_cstate_limit:
2012  * If you change the values, note they are used both in comparisons
2013  * (>= PCL__7) and to index pkg_cstate_limit_strings[].
2014  */
2015
2016 #define PCLUKN 0 /* Unknown */
2017 #define PCLRSV 1 /* Reserved */
2018 #define PCL__0 2 /* PC0 */
2019 #define PCL__1 3 /* PC1 */
2020 #define PCL__2 4 /* PC2 */
2021 #define PCL__3 5 /* PC3 */
2022 #define PCL__4 6 /* PC4 */
2023 #define PCL__6 7 /* PC6 */
2024 #define PCL_6N 8 /* PC6 No Retention */
2025 #define PCL_6R 9 /* PC6 Retention */
2026 #define PCL__7 10 /* PC7 */
2027 #define PCL_7S 11 /* PC7 Shrink */
2028 #define PCL__8 12 /* PC8 */
2029 #define PCL__9 13 /* PC9 */
2030 #define PCL_10 14 /* PC10 */
2031 #define PCLUNL 15 /* Unlimited */
2032
2033 int pkg_cstate_limit = PCLUKN;
2034 char *pkg_cstate_limit_strings[] = { "reserved", "unknown", "pc0", "pc1", "pc2",
2035         "pc3", "pc4", "pc6", "pc6n", "pc6r", "pc7", "pc7s", "pc8", "pc9", "pc10", "unlimited"};
2036
2037 int nhm_pkg_cstate_limits[16] = {PCL__0, PCL__1, PCL__3, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
2038 int snb_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCL__7, PCL_7S, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
2039 int hsw_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL__3, PCL__6, PCL__7, PCL_7S, PCL__8, PCL__9, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
2040 int slv_pkg_cstate_limits[16] = {PCL__0, PCL__1, PCLRSV, PCLRSV, PCL__4, PCLRSV, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCL__6, PCL__7};
2041 int amt_pkg_cstate_limits[16] = {PCLUNL, PCL__1, PCL__2, PCLRSV, PCLRSV, PCLRSV, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
2042 int phi_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCLRSV, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
2043 int glm_pkg_cstate_limits[16] = {PCLUNL, PCL__1, PCL__3, PCL__6, PCL__7, PCL_7S, PCL__8, PCL__9, PCL_10, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
2044 int skx_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCLRSV, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
2045
2046
2047 static void
2048 calculate_tsc_tweak()
2049 {
2050         tsc_tweak = base_hz / tsc_hz;
2051 }
2052
2053 static void
2054 dump_nhm_platform_info(void)
2055 {
2056         unsigned long long msr;
2057         unsigned int ratio;
2058
2059         get_msr(base_cpu, MSR_PLATFORM_INFO, &msr);
2060
2061         fprintf(outf, "cpu%d: MSR_PLATFORM_INFO: 0x%08llx\n", base_cpu, msr);
2062
2063         ratio = (msr >> 40) & 0xFF;
2064         fprintf(outf, "%d * %.1f = %.1f MHz max efficiency frequency\n",
2065                 ratio, bclk, ratio * bclk);
2066
2067         ratio = (msr >> 8) & 0xFF;
2068         fprintf(outf, "%d * %.1f = %.1f MHz base frequency\n",
2069                 ratio, bclk, ratio * bclk);
2070
2071         get_msr(base_cpu, MSR_IA32_POWER_CTL, &msr);
2072         fprintf(outf, "cpu%d: MSR_IA32_POWER_CTL: 0x%08llx (C1E auto-promotion: %sabled)\n",
2073                 base_cpu, msr, msr & 0x2 ? "EN" : "DIS");
2074
2075         return;
2076 }
2077
2078 static void
2079 dump_hsw_turbo_ratio_limits(void)
2080 {
2081         unsigned long long msr;
2082         unsigned int ratio;
2083
2084         get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT2, &msr);
2085
2086         fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT2: 0x%08llx\n", base_cpu, msr);
2087
2088         ratio = (msr >> 8) & 0xFF;
2089         if (ratio)
2090                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 18 active cores\n",
2091                         ratio, bclk, ratio * bclk);
2092
2093         ratio = (msr >> 0) & 0xFF;
2094         if (ratio)
2095                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 17 active cores\n",
2096                         ratio, bclk, ratio * bclk);
2097         return;
2098 }
2099
2100 static void
2101 dump_ivt_turbo_ratio_limits(void)
2102 {
2103         unsigned long long msr;
2104         unsigned int ratio;
2105
2106         get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT1, &msr);
2107
2108         fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT1: 0x%08llx\n", base_cpu, msr);
2109
2110         ratio = (msr >> 56) & 0xFF;
2111         if (ratio)
2112                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 16 active cores\n",
2113                         ratio, bclk, ratio * bclk);
2114
2115         ratio = (msr >> 48) & 0xFF;
2116         if (ratio)
2117                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 15 active cores\n",
2118                         ratio, bclk, ratio * bclk);
2119
2120         ratio = (msr >> 40) & 0xFF;
2121         if (ratio)
2122                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 14 active cores\n",
2123                         ratio, bclk, ratio * bclk);
2124
2125         ratio = (msr >> 32) & 0xFF;
2126         if (ratio)
2127                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 13 active cores\n",
2128                         ratio, bclk, ratio * bclk);
2129
2130         ratio = (msr >> 24) & 0xFF;
2131         if (ratio)
2132                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 12 active cores\n",
2133                         ratio, bclk, ratio * bclk);
2134
2135         ratio = (msr >> 16) & 0xFF;
2136         if (ratio)
2137                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 11 active cores\n",
2138                         ratio, bclk, ratio * bclk);
2139
2140         ratio = (msr >> 8) & 0xFF;
2141         if (ratio)
2142                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 10 active cores\n",
2143                         ratio, bclk, ratio * bclk);
2144
2145         ratio = (msr >> 0) & 0xFF;
2146         if (ratio)
2147                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 9 active cores\n",
2148                         ratio, bclk, ratio * bclk);
2149         return;
2150 }
2151 int has_turbo_ratio_group_limits(int family, int model)
2152 {
2153
2154         if (!genuine_intel)
2155                 return 0;
2156
2157         switch (model) {
2158         case INTEL_FAM6_ATOM_GOLDMONT:
2159         case INTEL_FAM6_SKYLAKE_X:
2160         case INTEL_FAM6_ATOM_GOLDMONT_X:
2161                 return 1;
2162         }
2163         return 0;
2164 }
2165
2166 static void
2167 dump_turbo_ratio_limits(int family, int model)
2168 {
2169         unsigned long long msr, core_counts;
2170         unsigned int ratio, group_size;
2171
2172         get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT, &msr);
2173         fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT: 0x%08llx\n", base_cpu, msr);
2174
2175         if (has_turbo_ratio_group_limits(family, model)) {
2176                 get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT1, &core_counts);
2177                 fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT1: 0x%08llx\n", base_cpu, core_counts);
2178         } else {
2179                 core_counts = 0x0807060504030201;
2180         }
2181
2182         ratio = (msr >> 56) & 0xFF;
2183         group_size = (core_counts >> 56) & 0xFF;
2184         if (ratio)
2185                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2186                         ratio, bclk, ratio * bclk, group_size);
2187
2188         ratio = (msr >> 48) & 0xFF;
2189         group_size = (core_counts >> 48) & 0xFF;
2190         if (ratio)
2191                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2192                         ratio, bclk, ratio * bclk, group_size);
2193
2194         ratio = (msr >> 40) & 0xFF;
2195         group_size = (core_counts >> 40) & 0xFF;
2196         if (ratio)
2197                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2198                         ratio, bclk, ratio * bclk, group_size);
2199
2200         ratio = (msr >> 32) & 0xFF;
2201         group_size = (core_counts >> 32) & 0xFF;
2202         if (ratio)
2203                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2204                         ratio, bclk, ratio * bclk, group_size);
2205
2206         ratio = (msr >> 24) & 0xFF;
2207         group_size = (core_counts >> 24) & 0xFF;
2208         if (ratio)
2209                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2210                         ratio, bclk, ratio * bclk, group_size);
2211
2212         ratio = (msr >> 16) & 0xFF;
2213         group_size = (core_counts >> 16) & 0xFF;
2214         if (ratio)
2215                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2216                         ratio, bclk, ratio * bclk, group_size);
2217
2218         ratio = (msr >> 8) & 0xFF;
2219         group_size = (core_counts >> 8) & 0xFF;
2220         if (ratio)
2221                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2222                         ratio, bclk, ratio * bclk, group_size);
2223
2224         ratio = (msr >> 0) & 0xFF;
2225         group_size = (core_counts >> 0) & 0xFF;
2226         if (ratio)
2227                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2228                         ratio, bclk, ratio * bclk, group_size);
2229         return;
2230 }
2231
2232 static void
2233 dump_atom_turbo_ratio_limits(void)
2234 {
2235         unsigned long long msr;
2236         unsigned int ratio;
2237
2238         get_msr(base_cpu, MSR_ATOM_CORE_RATIOS, &msr);
2239         fprintf(outf, "cpu%d: MSR_ATOM_CORE_RATIOS: 0x%08llx\n", base_cpu, msr & 0xFFFFFFFF);
2240
2241         ratio = (msr >> 0) & 0x3F;
2242         if (ratio)
2243                 fprintf(outf, "%d * %.1f = %.1f MHz minimum operating frequency\n",
2244                         ratio, bclk, ratio * bclk);
2245
2246         ratio = (msr >> 8) & 0x3F;
2247         if (ratio)
2248                 fprintf(outf, "%d * %.1f = %.1f MHz low frequency mode (LFM)\n",
2249                         ratio, bclk, ratio * bclk);
2250
2251         ratio = (msr >> 16) & 0x3F;
2252         if (ratio)
2253                 fprintf(outf, "%d * %.1f = %.1f MHz base frequency\n",
2254                         ratio, bclk, ratio * bclk);
2255
2256         get_msr(base_cpu, MSR_ATOM_CORE_TURBO_RATIOS, &msr);
2257         fprintf(outf, "cpu%d: MSR_ATOM_CORE_TURBO_RATIOS: 0x%08llx\n", base_cpu, msr & 0xFFFFFFFF);
2258
2259         ratio = (msr >> 24) & 0x3F;
2260         if (ratio)
2261                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 4 active cores\n",
2262                         ratio, bclk, ratio * bclk);
2263
2264         ratio = (msr >> 16) & 0x3F;
2265         if (ratio)
2266                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 3 active cores\n",
2267                         ratio, bclk, ratio * bclk);
2268
2269         ratio = (msr >> 8) & 0x3F;
2270         if (ratio)
2271                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 2 active cores\n",
2272                         ratio, bclk, ratio * bclk);
2273
2274         ratio = (msr >> 0) & 0x3F;
2275         if (ratio)
2276                 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 1 active core\n",
2277                         ratio, bclk, ratio * bclk);
2278 }
2279
2280 static void
2281 dump_knl_turbo_ratio_limits(void)
2282 {
2283         const unsigned int buckets_no = 7;
2284
2285         unsigned long long msr;
2286         int delta_cores, delta_ratio;
2287         int i, b_nr;
2288         unsigned int cores[buckets_no];
2289         unsigned int ratio[buckets_no];
2290
2291         get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT, &msr);
2292
2293         fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT: 0x%08llx\n",
2294                 base_cpu, msr);
2295
2296         /**
2297          * Turbo encoding in KNL is as follows:
2298          * [0] -- Reserved
2299          * [7:1] -- Base value of number of active cores of bucket 1.
2300          * [15:8] -- Base value of freq ratio of bucket 1.
2301          * [20:16] -- +ve delta of number of active cores of bucket 2.
2302          * i.e. active cores of bucket 2 =
2303          * active cores of bucket 1 + delta
2304          * [23:21] -- Negative delta of freq ratio of bucket 2.
2305          * i.e. freq ratio of bucket 2 =
2306          * freq ratio of bucket 1 - delta
2307          * [28:24]-- +ve delta of number of active cores of bucket 3.
2308          * [31:29]-- -ve delta of freq ratio of bucket 3.
2309          * [36:32]-- +ve delta of number of active cores of bucket 4.
2310          * [39:37]-- -ve delta of freq ratio of bucket 4.
2311          * [44:40]-- +ve delta of number of active cores of bucket 5.
2312          * [47:45]-- -ve delta of freq ratio of bucket 5.
2313          * [52:48]-- +ve delta of number of active cores of bucket 6.
2314          * [55:53]-- -ve delta of freq ratio of bucket 6.
2315          * [60:56]-- +ve delta of number of active cores of bucket 7.
2316          * [63:61]-- -ve delta of freq ratio of bucket 7.
2317          */
2318
2319         b_nr = 0;
2320         cores[b_nr] = (msr & 0xFF) >> 1;
2321         ratio[b_nr] = (msr >> 8) & 0xFF;
2322
2323         for (i = 16; i < 64; i += 8) {
2324                 delta_cores = (msr >> i) & 0x1F;
2325                 delta_ratio = (msr >> (i + 5)) & 0x7;
2326
2327                 cores[b_nr + 1] = cores[b_nr] + delta_cores;
2328                 ratio[b_nr + 1] = ratio[b_nr] - delta_ratio;
2329                 b_nr++;
2330         }
2331
2332         for (i = buckets_no - 1; i >= 0; i--)
2333                 if (i > 0 ? ratio[i] != ratio[i - 1] : 1)
2334                         fprintf(outf,
2335                                 "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2336                                 ratio[i], bclk, ratio[i] * bclk, cores[i]);
2337 }
2338
2339 static void
2340 dump_nhm_cst_cfg(void)
2341 {
2342         unsigned long long msr;
2343
2344         get_msr(base_cpu, MSR_PKG_CST_CONFIG_CONTROL, &msr);
2345
2346         fprintf(outf, "cpu%d: MSR_PKG_CST_CONFIG_CONTROL: 0x%08llx", base_cpu, msr);
2347
2348         fprintf(outf, " (%s%s%s%s%slocked, pkg-cstate-limit=%d (%s)",
2349                 (msr & SNB_C3_AUTO_UNDEMOTE) ? "UNdemote-C3, " : "",
2350                 (msr & SNB_C1_AUTO_UNDEMOTE) ? "UNdemote-C1, " : "",
2351                 (msr & NHM_C3_AUTO_DEMOTE) ? "demote-C3, " : "",
2352                 (msr & NHM_C1_AUTO_DEMOTE) ? "demote-C1, " : "",
2353                 (msr & (1 << 15)) ? "" : "UN",
2354                 (unsigned int)msr & 0xF,
2355                 pkg_cstate_limit_strings[pkg_cstate_limit]);
2356
2357 #define AUTOMATIC_CSTATE_CONVERSION             (1UL << 16)
2358         if (has_automatic_cstate_conversion) {
2359                 fprintf(outf, ", automatic c-state conversion=%s",
2360                         (msr & AUTOMATIC_CSTATE_CONVERSION) ? "on" : "off");
2361         }
2362
2363         fprintf(outf, ")\n");
2364
2365         return;
2366 }
2367
2368 static void
2369 dump_config_tdp(void)
2370 {
2371         unsigned long long msr;
2372
2373         get_msr(base_cpu, MSR_CONFIG_TDP_NOMINAL, &msr);
2374         fprintf(outf, "cpu%d: MSR_CONFIG_TDP_NOMINAL: 0x%08llx", base_cpu, msr);
2375         fprintf(outf, " (base_ratio=%d)\n", (unsigned int)msr & 0xFF);
2376
2377         get_msr(base_cpu, MSR_CONFIG_TDP_LEVEL_1, &msr);
2378         fprintf(outf, "cpu%d: MSR_CONFIG_TDP_LEVEL_1: 0x%08llx (", base_cpu, msr);
2379         if (msr) {
2380                 fprintf(outf, "PKG_MIN_PWR_LVL1=%d ", (unsigned int)(msr >> 48) & 0x7FFF);
2381                 fprintf(outf, "PKG_MAX_PWR_LVL1=%d ", (unsigned int)(msr >> 32) & 0x7FFF);
2382                 fprintf(outf, "LVL1_RATIO=%d ", (unsigned int)(msr >> 16) & 0xFF);
2383                 fprintf(outf, "PKG_TDP_LVL1=%d", (unsigned int)(msr) & 0x7FFF);
2384         }
2385         fprintf(outf, ")\n");
2386
2387         get_msr(base_cpu, MSR_CONFIG_TDP_LEVEL_2, &msr);
2388         fprintf(outf, "cpu%d: MSR_CONFIG_TDP_LEVEL_2: 0x%08llx (", base_cpu, msr);
2389         if (msr) {
2390                 fprintf(outf, "PKG_MIN_PWR_LVL2=%d ", (unsigned int)(msr >> 48) & 0x7FFF);
2391                 fprintf(outf, "PKG_MAX_PWR_LVL2=%d ", (unsigned int)(msr >> 32) & 0x7FFF);
2392                 fprintf(outf, "LVL2_RATIO=%d ", (unsigned int)(msr >> 16) & 0xFF);
2393                 fprintf(outf, "PKG_TDP_LVL2=%d", (unsigned int)(msr) & 0x7FFF);
2394         }
2395         fprintf(outf, ")\n");
2396
2397         get_msr(base_cpu, MSR_CONFIG_TDP_CONTROL, &msr);
2398         fprintf(outf, "cpu%d: MSR_CONFIG_TDP_CONTROL: 0x%08llx (", base_cpu, msr);
2399         if ((msr) & 0x3)
2400                 fprintf(outf, "TDP_LEVEL=%d ", (unsigned int)(msr) & 0x3);
2401         fprintf(outf, " lock=%d", (unsigned int)(msr >> 31) & 1);
2402         fprintf(outf, ")\n");
2403
2404         get_msr(base_cpu, MSR_TURBO_ACTIVATION_RATIO, &msr);
2405         fprintf(outf, "cpu%d: MSR_TURBO_ACTIVATION_RATIO: 0x%08llx (", base_cpu, msr);
2406         fprintf(outf, "MAX_NON_TURBO_RATIO=%d", (unsigned int)(msr) & 0xFF);
2407         fprintf(outf, " lock=%d", (unsigned int)(msr >> 31) & 1);
2408         fprintf(outf, ")\n");
2409 }
2410
2411 unsigned int irtl_time_units[] = {1, 32, 1024, 32768, 1048576, 33554432, 0, 0 };
2412
2413 void print_irtl(void)
2414 {
2415         unsigned long long msr;
2416
2417         get_msr(base_cpu, MSR_PKGC3_IRTL, &msr);
2418         fprintf(outf, "cpu%d: MSR_PKGC3_IRTL: 0x%08llx (", base_cpu, msr);
2419         fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
2420                 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
2421
2422         get_msr(base_cpu, MSR_PKGC6_IRTL, &msr);
2423         fprintf(outf, "cpu%d: MSR_PKGC6_IRTL: 0x%08llx (", base_cpu, msr);
2424         fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
2425                 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
2426
2427         get_msr(base_cpu, MSR_PKGC7_IRTL, &msr);
2428         fprintf(outf, "cpu%d: MSR_PKGC7_IRTL: 0x%08llx (", base_cpu, msr);
2429         fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
2430                 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
2431
2432         if (!do_irtl_hsw)
2433                 return;
2434
2435         get_msr(base_cpu, MSR_PKGC8_IRTL, &msr);
2436         fprintf(outf, "cpu%d: MSR_PKGC8_IRTL: 0x%08llx (", base_cpu, msr);
2437         fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
2438                 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
2439
2440         get_msr(base_cpu, MSR_PKGC9_IRTL, &msr);
2441         fprintf(outf, "cpu%d: MSR_PKGC9_IRTL: 0x%08llx (", base_cpu, msr);
2442         fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
2443                 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
2444
2445         get_msr(base_cpu, MSR_PKGC10_IRTL, &msr);
2446         fprintf(outf, "cpu%d: MSR_PKGC10_IRTL: 0x%08llx (", base_cpu, msr);
2447         fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
2448                 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
2449
2450 }
2451 void free_fd_percpu(void)
2452 {
2453         int i;
2454
2455         for (i = 0; i < topo.max_cpu_num + 1; ++i) {
2456                 if (fd_percpu[i] != 0)
2457                         close(fd_percpu[i]);
2458         }
2459
2460         free(fd_percpu);
2461 }
2462
2463 void free_all_buffers(void)
2464 {
2465         int i;
2466
2467         CPU_FREE(cpu_present_set);
2468         cpu_present_set = NULL;
2469         cpu_present_setsize = 0;
2470
2471         CPU_FREE(cpu_affinity_set);
2472         cpu_affinity_set = NULL;
2473         cpu_affinity_setsize = 0;
2474
2475         free(thread_even);
2476         free(core_even);
2477         free(package_even);
2478
2479         thread_even = NULL;
2480         core_even = NULL;
2481         package_even = NULL;
2482
2483         free(thread_odd);
2484         free(core_odd);
2485         free(package_odd);
2486
2487         thread_odd = NULL;
2488         core_odd = NULL;
2489         package_odd = NULL;
2490
2491         free(output_buffer);
2492         output_buffer = NULL;
2493         outp = NULL;
2494
2495         free_fd_percpu();
2496
2497         free(irq_column_2_cpu);
2498         free(irqs_per_cpu);
2499
2500         for (i = 0; i <= topo.max_cpu_num; ++i) {
2501                 if (cpus[i].put_ids)
2502                         CPU_FREE(cpus[i].put_ids);
2503         }
2504         free(cpus);
2505 }
2506
2507
2508 /*
2509  * Parse a file containing a single int.
2510  * Return 0 if file can not be opened
2511  * Exit if file can be opened, but can not be parsed
2512  */
2513 int parse_int_file(const char *fmt, ...)
2514 {
2515         va_list args;
2516         char path[PATH_MAX];
2517         FILE *filep;
2518         int value;
2519
2520         va_start(args, fmt);
2521         vsnprintf(path, sizeof(path), fmt, args);
2522         va_end(args);
2523         filep = fopen(path, "r");
2524         if (!filep)
2525                 return 0;
2526         if (fscanf(filep, "%d", &value) != 1)
2527                 err(1, "%s: failed to parse number from file", path);
2528         fclose(filep);
2529         return value;
2530 }
2531
2532 /*
2533  * cpu_is_first_core_in_package(cpu)
2534  * return 1 if given CPU is 1st core in package
2535  */
2536 int cpu_is_first_core_in_package(int cpu)
2537 {
2538         return cpu == parse_int_file("/sys/devices/system/cpu/cpu%d/topology/core_siblings_list", cpu);
2539 }
2540
2541 int get_physical_package_id(int cpu)
2542 {
2543         return parse_int_file("/sys/devices/system/cpu/cpu%d/topology/physical_package_id", cpu);
2544 }
2545
2546 int get_die_id(int cpu)
2547 {
2548         return parse_int_file("/sys/devices/system/cpu/cpu%d/topology/die_id", cpu);
2549 }
2550
2551 int get_core_id(int cpu)
2552 {
2553         return parse_int_file("/sys/devices/system/cpu/cpu%d/topology/core_id", cpu);
2554 }
2555
2556 void set_node_data(void)
2557 {
2558         int pkg, node, lnode, cpu, cpux;
2559         int cpu_count;
2560
2561         /* initialize logical_node_id */
2562         for (cpu = 0; cpu <= topo.max_cpu_num; ++cpu)
2563                 cpus[cpu].logical_node_id = -1;
2564
2565         cpu_count = 0;
2566         for (pkg = 0; pkg < topo.num_packages; pkg++) {
2567                 lnode = 0;
2568                 for (cpu = 0; cpu <= topo.max_cpu_num; ++cpu) {
2569                         if (cpus[cpu].physical_package_id != pkg)
2570                                 continue;
2571                         /* find a cpu with an unset logical_node_id */
2572                         if (cpus[cpu].logical_node_id != -1)
2573                                 continue;
2574                         cpus[cpu].logical_node_id = lnode;
2575                         node = cpus[cpu].physical_node_id;
2576                         cpu_count++;
2577                         /*
2578                          * find all matching cpus on this pkg and set
2579                          * the logical_node_id
2580                          */
2581                         for (cpux = cpu; cpux <= topo.max_cpu_num; cpux++) {
2582                                 if ((cpus[cpux].physical_package_id == pkg) &&
2583                                    (cpus[cpux].physical_node_id == node)) {
2584                                         cpus[cpux].logical_node_id = lnode;
2585                                         cpu_count++;
2586                                 }
2587                         }
2588                         lnode++;
2589                         if (lnode > topo.nodes_per_pkg)
2590                                 topo.nodes_per_pkg = lnode;
2591                 }
2592                 if (cpu_count >= topo.max_cpu_num)
2593                         break;
2594         }
2595 }
2596
2597 int get_physical_node_id(struct cpu_topology *thiscpu)
2598 {
2599         char path[80];
2600         FILE *filep;
2601         int i;
2602         int cpu = thiscpu->logical_cpu_id;
2603
2604         for (i = 0; i <= topo.max_cpu_num; i++) {
2605                 sprintf(path, "/sys/devices/system/cpu/cpu%d/node%i/cpulist",
2606                         cpu, i);
2607                 filep = fopen(path, "r");
2608                 if (!filep)
2609                         continue;
2610                 fclose(filep);
2611                 return i;
2612         }
2613         return -1;
2614 }
2615
2616 int get_thread_siblings(struct cpu_topology *thiscpu)
2617 {
2618         char path[80], character;
2619         FILE *filep;
2620         unsigned long map;
2621         int so, shift, sib_core;
2622         int cpu = thiscpu->logical_cpu_id;
2623         int offset = topo.max_cpu_num + 1;
2624         size_t size;
2625         int thread_id = 0;
2626
2627         thiscpu->put_ids = CPU_ALLOC((topo.max_cpu_num + 1));
2628         if (thiscpu->thread_id < 0)
2629                 thiscpu->thread_id = thread_id++;
2630         if (!thiscpu->put_ids)
2631                 return -1;
2632
2633         size = CPU_ALLOC_SIZE((topo.max_cpu_num + 1));
2634         CPU_ZERO_S(size, thiscpu->put_ids);
2635
2636         sprintf(path,
2637                 "/sys/devices/system/cpu/cpu%d/topology/thread_siblings", cpu);
2638         filep = fopen_or_die(path, "r");
2639         do {
2640                 offset -= BITMASK_SIZE;
2641                 fscanf(filep, "%lx%c", &map, &character);
2642                 for (shift = 0; shift < BITMASK_SIZE; shift++) {
2643                         if ((map >> shift) & 0x1) {
2644                                 so = shift + offset;
2645                                 sib_core = get_core_id(so);
2646                                 if (sib_core == thiscpu->physical_core_id) {
2647                                         CPU_SET_S(so, size, thiscpu->put_ids);
2648                                         if ((so != cpu) &&
2649                                             (cpus[so].thread_id < 0))
2650                                                 cpus[so].thread_id =
2651                                                                     thread_id++;
2652                                 }
2653                         }
2654                 }
2655         } while (!strncmp(&character, ",", 1));
2656         fclose(filep);
2657
2658         return CPU_COUNT_S(size, thiscpu->put_ids);
2659 }
2660
2661 /*
2662  * run func(thread, core, package) in topology order
2663  * skip non-present cpus
2664  */
2665
2666 int for_all_cpus_2(int (func)(struct thread_data *, struct core_data *,
2667         struct pkg_data *, struct thread_data *, struct core_data *,
2668         struct pkg_data *), struct thread_data *thread_base,
2669         struct core_data *core_base, struct pkg_data *pkg_base,
2670         struct thread_data *thread_base2, struct core_data *core_base2,
2671         struct pkg_data *pkg_base2)
2672 {
2673         int retval, pkg_no, node_no, core_no, thread_no;
2674
2675         for (pkg_no = 0; pkg_no < topo.num_packages; ++pkg_no) {
2676                 for (node_no = 0; node_no < topo.nodes_per_pkg; ++node_no) {
2677                         for (core_no = 0; core_no < topo.cores_per_node;
2678                              ++core_no) {
2679                                 for (thread_no = 0; thread_no <
2680                                         topo.threads_per_core; ++thread_no) {
2681                                         struct thread_data *t, *t2;
2682                                         struct core_data *c, *c2;
2683                                         struct pkg_data *p, *p2;
2684
2685                                         t = GET_THREAD(thread_base, thread_no,
2686                                                        core_no, node_no,
2687                                                        pkg_no);
2688
2689                                         if (cpu_is_not_present(t->cpu_id))
2690                                                 continue;
2691
2692                                         t2 = GET_THREAD(thread_base2, thread_no,
2693                                                         core_no, node_no,
2694                                                         pkg_no);
2695
2696                                         c = GET_CORE(core_base, core_no,
2697                                                      node_no, pkg_no);
2698                                         c2 = GET_CORE(core_base2, core_no,
2699                                                       node_no,
2700                                                       pkg_no);
2701
2702                                         p = GET_PKG(pkg_base, pkg_no);
2703                                         p2 = GET_PKG(pkg_base2, pkg_no);
2704
2705                                         retval = func(t, c, p, t2, c2, p2);
2706                                         if (retval)
2707                                                 return retval;
2708                                 }
2709                         }
2710                 }
2711         }
2712         return 0;
2713 }
2714
2715 /*
2716  * run func(cpu) on every cpu in /proc/stat
2717  * return max_cpu number
2718  */
2719 int for_all_proc_cpus(int (func)(int))
2720 {
2721         FILE *fp;
2722         int cpu_num;
2723         int retval;
2724
2725         fp = fopen_or_die(proc_stat, "r");
2726
2727         retval = fscanf(fp, "cpu %*d %*d %*d %*d %*d %*d %*d %*d %*d %*d\n");
2728         if (retval != 0)
2729                 err(1, "%s: failed to parse format", proc_stat);
2730
2731         while (1) {
2732                 retval = fscanf(fp, "cpu%u %*d %*d %*d %*d %*d %*d %*d %*d %*d %*d\n", &cpu_num);
2733                 if (retval != 1)
2734                         break;
2735
2736                 retval = func(cpu_num);
2737                 if (retval) {
2738                         fclose(fp);
2739                         return(retval);
2740                 }
2741         }
2742         fclose(fp);
2743         return 0;
2744 }
2745
2746 void re_initialize(void)
2747 {
2748         free_all_buffers();
2749         setup_all_buffers();
2750         printf("turbostat: re-initialized with num_cpus %d\n", topo.num_cpus);
2751 }
2752
2753 void set_max_cpu_num(void)
2754 {
2755         FILE *filep;
2756         unsigned long dummy;
2757
2758         topo.max_cpu_num = 0;
2759         filep = fopen_or_die(
2760                         "/sys/devices/system/cpu/cpu0/topology/thread_siblings",
2761                         "r");
2762         while (fscanf(filep, "%lx,", &dummy) == 1)
2763                 topo.max_cpu_num += BITMASK_SIZE;
2764         fclose(filep);
2765         topo.max_cpu_num--; /* 0 based */
2766 }
2767
2768 /*
2769  * count_cpus()
2770  * remember the last one seen, it will be the max
2771  */
2772 int count_cpus(int cpu)
2773 {
2774         topo.num_cpus++;
2775         return 0;
2776 }
2777 int mark_cpu_present(int cpu)
2778 {
2779         CPU_SET_S(cpu, cpu_present_setsize, cpu_present_set);
2780         return 0;
2781 }
2782
2783 int init_thread_id(int cpu)
2784 {
2785         cpus[cpu].thread_id = -1;
2786         return 0;
2787 }
2788
2789 /*
2790  * snapshot_proc_interrupts()
2791  *
2792  * read and record summary of /proc/interrupts
2793  *
2794  * return 1 if config change requires a restart, else return 0
2795  */
2796 int snapshot_proc_interrupts(void)
2797 {
2798         static FILE *fp;
2799         int column, retval;
2800
2801         if (fp == NULL)
2802                 fp = fopen_or_die("/proc/interrupts", "r");
2803         else
2804                 rewind(fp);
2805
2806         /* read 1st line of /proc/interrupts to get cpu* name for each column */
2807         for (column = 0; column < topo.num_cpus; ++column) {
2808                 int cpu_number;
2809
2810                 retval = fscanf(fp, " CPU%d", &cpu_number);
2811                 if (retval != 1)
2812                         break;
2813
2814                 if (cpu_number > topo.max_cpu_num) {
2815                         warn("/proc/interrupts: cpu%d: > %d", cpu_number, topo.max_cpu_num);
2816                         return 1;
2817                 }
2818
2819                 irq_column_2_cpu[column] = cpu_number;
2820                 irqs_per_cpu[cpu_number] = 0;
2821         }
2822
2823         /* read /proc/interrupt count lines and sum up irqs per cpu */
2824         while (1) {
2825                 int column;
2826                 char buf[64];
2827
2828                 retval = fscanf(fp, " %s:", buf);       /* flush irq# "N:" */
2829                 if (retval != 1)
2830                         break;
2831
2832                 /* read the count per cpu */
2833                 for (column = 0; column < topo.num_cpus; ++column) {
2834
2835                         int cpu_number, irq_count;
2836
2837                         retval = fscanf(fp, " %d", &irq_count);
2838                         if (retval != 1)
2839                                 break;
2840
2841                         cpu_number = irq_column_2_cpu[column];
2842                         irqs_per_cpu[cpu_number] += irq_count;
2843
2844                 }
2845
2846                 while (getc(fp) != '\n')
2847                         ;       /* flush interrupt description */
2848
2849         }
2850         return 0;
2851 }
2852 /*
2853  * snapshot_gfx_rc6_ms()
2854  *
2855  * record snapshot of
2856  * /sys/class/drm/card0/power/rc6_residency_ms
2857  *
2858  * return 1 if config change requires a restart, else return 0
2859  */
2860 int snapshot_gfx_rc6_ms(void)
2861 {
2862         FILE *fp;
2863         int retval;
2864
2865         fp = fopen_or_die("/sys/class/drm/card0/power/rc6_residency_ms", "r");
2866
2867         retval = fscanf(fp, "%lld", &gfx_cur_rc6_ms);
2868         if (retval != 1)
2869                 err(1, "GFX rc6");
2870
2871         fclose(fp);
2872
2873         return 0;
2874 }
2875 /*
2876  * snapshot_gfx_mhz()
2877  *
2878  * record snapshot of
2879  * /sys/class/graphics/fb0/device/drm/card0/gt_cur_freq_mhz
2880  *
2881  * return 1 if config change requires a restart, else return 0
2882  */
2883 int snapshot_gfx_mhz(void)
2884 {
2885         static FILE *fp;
2886         int retval;
2887
2888         if (fp == NULL)
2889                 fp = fopen_or_die("/sys/class/graphics/fb0/device/drm/card0/gt_cur_freq_mhz", "r");
2890         else {
2891                 rewind(fp);
2892                 fflush(fp);
2893         }
2894
2895         retval = fscanf(fp, "%d", &gfx_cur_mhz);
2896         if (retval != 1)
2897                 err(1, "GFX MHz");
2898
2899         return 0;
2900 }
2901
2902 /*
2903  * snapshot_cpu_lpi()
2904  *
2905  * record snapshot of
2906  * /sys/devices/system/cpu/cpuidle/low_power_idle_cpu_residency_us
2907  *
2908  * return 1 if config change requires a restart, else return 0
2909  */
2910 int snapshot_cpu_lpi_us(void)
2911 {
2912         FILE *fp;
2913         int retval;
2914
2915         fp = fopen_or_die("/sys/devices/system/cpu/cpuidle/low_power_idle_cpu_residency_us", "r");
2916
2917         retval = fscanf(fp, "%lld", &cpuidle_cur_cpu_lpi_us);
2918         if (retval != 1)
2919                 err(1, "CPU LPI");
2920
2921         fclose(fp);
2922
2923         return 0;
2924 }
2925 /*
2926  * snapshot_sys_lpi()
2927  *
2928  * record snapshot of
2929  * /sys/devices/system/cpu/cpuidle/low_power_idle_system_residency_us
2930  *
2931  * return 1 if config change requires a restart, else return 0
2932  */
2933 int snapshot_sys_lpi_us(void)
2934 {
2935         FILE *fp;
2936         int retval;
2937
2938         fp = fopen_or_die("/sys/devices/system/cpu/cpuidle/low_power_idle_system_residency_us", "r");
2939
2940         retval = fscanf(fp, "%lld", &cpuidle_cur_sys_lpi_us);
2941         if (retval != 1)
2942                 err(1, "SYS LPI");
2943
2944         fclose(fp);
2945
2946         return 0;
2947 }
2948 /*
2949  * snapshot /proc and /sys files
2950  *
2951  * return 1 if configuration restart needed, else return 0
2952  */
2953 int snapshot_proc_sysfs_files(void)
2954 {
2955         if (DO_BIC(BIC_IRQ))
2956                 if (snapshot_proc_interrupts())
2957                         return 1;
2958
2959         if (DO_BIC(BIC_GFX_rc6))
2960                 snapshot_gfx_rc6_ms();
2961
2962         if (DO_BIC(BIC_GFXMHz))
2963                 snapshot_gfx_mhz();
2964
2965         if (DO_BIC(BIC_CPU_LPI))
2966                 snapshot_cpu_lpi_us();
2967
2968         if (DO_BIC(BIC_SYS_LPI))
2969                 snapshot_sys_lpi_us();
2970
2971         return 0;
2972 }
2973
2974 int exit_requested;
2975
2976 static void signal_handler (int signal)
2977 {
2978         switch (signal) {
2979         case SIGINT:
2980                 exit_requested = 1;
2981                 if (debug)
2982                         fprintf(stderr, " SIGINT\n");
2983                 break;
2984         case SIGUSR1:
2985                 if (debug > 1)
2986                         fprintf(stderr, "SIGUSR1\n");
2987                 break;
2988         }
2989         /* make sure this manually-invoked interval is at least 1ms long */
2990         nanosleep(&one_msec, NULL);
2991 }
2992
2993 void setup_signal_handler(void)
2994 {
2995         struct sigaction sa;
2996
2997         memset(&sa, 0, sizeof(sa));
2998
2999         sa.sa_handler = &signal_handler;
3000
3001         if (sigaction(SIGINT, &sa, NULL) < 0)
3002                 err(1, "sigaction SIGINT");
3003         if (sigaction(SIGUSR1, &sa, NULL) < 0)
3004                 err(1, "sigaction SIGUSR1");
3005 }
3006
3007 void do_sleep(void)
3008 {
3009         struct timeval select_timeout;
3010         fd_set readfds;
3011         int retval;
3012
3013         FD_ZERO(&readfds);
3014         FD_SET(0, &readfds);
3015
3016         if (!isatty(fileno(stdin))) {
3017                 nanosleep(&interval_ts, NULL);
3018                 return;
3019         }
3020
3021         select_timeout = interval_tv;
3022         retval = select(1, &readfds, NULL, NULL, &select_timeout);
3023
3024         if (retval == 1) {
3025                 switch (getc(stdin)) {
3026                 case 'q':
3027                         exit_requested = 1;
3028                         break;
3029                 }
3030                 /* make sure this manually-invoked interval is at least 1ms long */
3031                 nanosleep(&one_msec, NULL);
3032         }
3033 }
3034
3035
3036 void turbostat_loop()
3037 {
3038         int retval;
3039         int restarted = 0;
3040         int done_iters = 0;
3041
3042         setup_signal_handler();
3043
3044 restart:
3045         restarted++;
3046
3047         snapshot_proc_sysfs_files();
3048         retval = for_all_cpus(get_counters, EVEN_COUNTERS);
3049         first_counter_read = 0;
3050         if (retval < -1) {
3051                 exit(retval);
3052         } else if (retval == -1) {
3053                 if (restarted > 1) {
3054                         exit(retval);
3055                 }
3056                 re_initialize();
3057                 goto restart;
3058         }
3059         restarted = 0;
3060         done_iters = 0;
3061         gettimeofday(&tv_even, (struct timezone *)NULL);
3062
3063         while (1) {
3064                 if (for_all_proc_cpus(cpu_is_not_present)) {
3065                         re_initialize();
3066                         goto restart;
3067                 }
3068                 do_sleep();
3069                 if (snapshot_proc_sysfs_files())
3070                         goto restart;
3071                 retval = for_all_cpus(get_counters, ODD_COUNTERS);
3072                 if (retval < -1) {
3073                         exit(retval);
3074                 } else if (retval == -1) {
3075                         re_initialize();
3076                         goto restart;
3077                 }
3078                 gettimeofday(&tv_odd, (struct timezone *)NULL);
3079                 timersub(&tv_odd, &tv_even, &tv_delta);
3080                 if (for_all_cpus_2(delta_cpu, ODD_COUNTERS, EVEN_COUNTERS)) {
3081                         re_initialize();
3082                         goto restart;
3083                 }
3084                 compute_average(EVEN_COUNTERS);
3085                 format_all_counters(EVEN_COUNTERS);
3086                 flush_output_stdout();
3087                 if (exit_requested)
3088                         break;
3089                 if (num_iterations && ++done_iters >= num_iterations)
3090                         break;
3091                 do_sleep();
3092                 if (snapshot_proc_sysfs_files())
3093                         goto restart;
3094                 retval = for_all_cpus(get_counters, EVEN_COUNTERS);
3095                 if (retval < -1) {
3096                         exit(retval);
3097                 } else if (retval == -1) {
3098                         re_initialize();
3099                         goto restart;
3100                 }
3101                 gettimeofday(&tv_even, (struct timezone *)NULL);
3102                 timersub(&tv_even, &tv_odd, &tv_delta);
3103                 if (for_all_cpus_2(delta_cpu, EVEN_COUNTERS, ODD_COUNTERS)) {
3104                         re_initialize();
3105                         goto restart;
3106                 }
3107                 compute_average(ODD_COUNTERS);
3108                 format_all_counters(ODD_COUNTERS);
3109                 flush_output_stdout();
3110                 if (exit_requested)
3111                         break;
3112                 if (num_iterations && ++done_iters >= num_iterations)
3113                         break;
3114         }
3115 }
3116
3117 void check_dev_msr()
3118 {
3119         struct stat sb;
3120         char pathname[32];
3121
3122         sprintf(pathname, "/dev/cpu/%d/msr", base_cpu);
3123         if (stat(pathname, &sb))
3124                 if (system("/sbin/modprobe msr > /dev/null 2>&1"))
3125                         err(-5, "no /dev/cpu/0/msr, Try \"# modprobe msr\" ");
3126 }
3127
3128 void check_permissions()
3129 {
3130         struct __user_cap_header_struct cap_header_data;
3131         cap_user_header_t cap_header = &cap_header_data;
3132         struct __user_cap_data_struct cap_data_data;
3133         cap_user_data_t cap_data = &cap_data_data;
3134         extern int capget(cap_user_header_t hdrp, cap_user_data_t datap);
3135         int do_exit = 0;
3136         char pathname[32];
3137
3138         /* check for CAP_SYS_RAWIO */
3139         cap_header->pid = getpid();
3140         cap_header->version = _LINUX_CAPABILITY_VERSION;
3141         if (capget(cap_header, cap_data) < 0)
3142                 err(-6, "capget(2) failed");
3143
3144         if ((cap_data->effective & (1 << CAP_SYS_RAWIO)) == 0) {
3145                 do_exit++;
3146                 warnx("capget(CAP_SYS_RAWIO) failed,"
3147                         " try \"# setcap cap_sys_rawio=ep %s\"", progname);
3148         }
3149
3150         /* test file permissions */
3151         sprintf(pathname, "/dev/cpu/%d/msr", base_cpu);
3152         if (euidaccess(pathname, R_OK)) {
3153                 do_exit++;
3154                 warn("/dev/cpu/0/msr open failed, try chown or chmod +r /dev/cpu/*/msr");
3155         }
3156
3157         /* if all else fails, thell them to be root */
3158         if (do_exit)
3159                 if (getuid() != 0)
3160                         warnx("... or simply run as root");
3161
3162         if (do_exit)
3163                 exit(-6);
3164 }
3165
3166 /*
3167  * NHM adds support for additional MSRs:
3168  *
3169  * MSR_SMI_COUNT                   0x00000034
3170  *
3171  * MSR_PLATFORM_INFO               0x000000ce
3172  * MSR_PKG_CST_CONFIG_CONTROL     0x000000e2
3173  *
3174  * MSR_MISC_PWR_MGMT               0x000001aa
3175  *
3176  * MSR_PKG_C3_RESIDENCY            0x000003f8
3177  * MSR_PKG_C6_RESIDENCY            0x000003f9
3178  * MSR_CORE_C3_RESIDENCY           0x000003fc
3179  * MSR_CORE_C6_RESIDENCY           0x000003fd
3180  *
3181  * Side effect:
3182  * sets global pkg_cstate_limit to decode MSR_PKG_CST_CONFIG_CONTROL
3183  * sets has_misc_feature_control
3184  */
3185 int probe_nhm_msrs(unsigned int family, unsigned int model)
3186 {
3187         unsigned long long msr;
3188         unsigned int base_ratio;
3189         int *pkg_cstate_limits;
3190
3191         if (!genuine_intel)
3192                 return 0;
3193
3194         if (family != 6)
3195                 return 0;
3196
3197         bclk = discover_bclk(family, model);
3198
3199         switch (model) {
3200         case INTEL_FAM6_NEHALEM:        /* Core i7 and i5 Processor - Clarksfield, Lynnfield, Jasper Forest */
3201         case INTEL_FAM6_NEHALEM_EX:     /* Nehalem-EX Xeon - Beckton */
3202                 pkg_cstate_limits = nhm_pkg_cstate_limits;
3203                 break;
3204         case INTEL_FAM6_SANDYBRIDGE:    /* SNB */
3205         case INTEL_FAM6_SANDYBRIDGE_X:  /* SNB Xeon */
3206         case INTEL_FAM6_IVYBRIDGE:      /* IVB */
3207         case INTEL_FAM6_IVYBRIDGE_X:    /* IVB Xeon */
3208                 pkg_cstate_limits = snb_pkg_cstate_limits;
3209                 has_misc_feature_control = 1;
3210                 break;
3211         case INTEL_FAM6_HASWELL_CORE:   /* HSW */
3212         case INTEL_FAM6_HASWELL_X:      /* HSX */
3213         case INTEL_FAM6_HASWELL_GT3E:   /* HSW */
3214         case INTEL_FAM6_BROADWELL_CORE: /* BDW */
3215         case INTEL_FAM6_BROADWELL_GT3E: /* BDW */
3216         case INTEL_FAM6_BROADWELL_X:    /* BDX */
3217         case INTEL_FAM6_SKYLAKE_MOBILE: /* SKL */
3218         case INTEL_FAM6_CANNONLAKE_MOBILE:      /* CNL */
3219                 pkg_cstate_limits = hsw_pkg_cstate_limits;
3220                 has_misc_feature_control = 1;
3221                 break;
3222         case INTEL_FAM6_SKYLAKE_X:      /* SKX */
3223                 pkg_cstate_limits = skx_pkg_cstate_limits;
3224                 has_misc_feature_control = 1;
3225                 break;
3226         case INTEL_FAM6_ATOM_SILVERMONT:        /* BYT */
3227                 no_MSR_MISC_PWR_MGMT = 1;
3228         case INTEL_FAM6_ATOM_SILVERMONT_X:      /* AVN */
3229                 pkg_cstate_limits = slv_pkg_cstate_limits;
3230                 break;
3231         case INTEL_FAM6_ATOM_AIRMONT:   /* AMT */
3232                 pkg_cstate_limits = amt_pkg_cstate_limits;
3233                 no_MSR_MISC_PWR_MGMT = 1;
3234                 break;
3235         case INTEL_FAM6_XEON_PHI_KNL:   /* PHI */
3236                 pkg_cstate_limits = phi_pkg_cstate_limits;
3237                 break;
3238         case INTEL_FAM6_ATOM_GOLDMONT:  /* BXT */
3239         case INTEL_FAM6_ATOM_GOLDMONT_PLUS:
3240         case INTEL_FAM6_ATOM_GOLDMONT_X:        /* DNV */
3241                 pkg_cstate_limits = glm_pkg_cstate_limits;
3242                 break;
3243         default:
3244                 return 0;
3245         }
3246         get_msr(base_cpu, MSR_PKG_CST_CONFIG_CONTROL, &msr);
3247         pkg_cstate_limit = pkg_cstate_limits[msr & 0xF];
3248
3249         get_msr(base_cpu, MSR_PLATFORM_INFO, &msr);
3250         base_ratio = (msr >> 8) & 0xFF;
3251
3252         base_hz = base_ratio * bclk * 1000000;
3253         has_base_hz = 1;
3254         return 1;
3255 }
3256 /*
3257  * SLV client has support for unique MSRs:
3258  *
3259  * MSR_CC6_DEMOTION_POLICY_CONFIG
3260  * MSR_MC6_DEMOTION_POLICY_CONFIG
3261  */
3262
3263 int has_slv_msrs(unsigned int family, unsigned int model)
3264 {
3265         if (!genuine_intel)
3266                 return 0;
3267
3268         switch (model) {
3269         case INTEL_FAM6_ATOM_SILVERMONT:
3270         case INTEL_FAM6_ATOM_SILVERMONT_MID:
3271         case INTEL_FAM6_ATOM_AIRMONT_MID:
3272                 return 1;
3273         }
3274         return 0;
3275 }
3276 int is_dnv(unsigned int family, unsigned int model)
3277 {
3278
3279         if (!genuine_intel)
3280                 return 0;
3281
3282         switch (model) {
3283         case INTEL_FAM6_ATOM_GOLDMONT_X:
3284                 return 1;
3285         }
3286         return 0;
3287 }
3288 int is_bdx(unsigned int family, unsigned int model)
3289 {
3290
3291         if (!genuine_intel)
3292                 return 0;
3293
3294         switch (model) {
3295         case INTEL_FAM6_BROADWELL_X:
3296                 return 1;
3297         }
3298         return 0;
3299 }
3300 int is_skx(unsigned int family, unsigned int model)
3301 {
3302
3303         if (!genuine_intel)
3304                 return 0;
3305
3306         switch (model) {
3307         case INTEL_FAM6_SKYLAKE_X:
3308                 return 1;
3309         }
3310         return 0;
3311 }
3312
3313 int has_turbo_ratio_limit(unsigned int family, unsigned int model)
3314 {
3315         if (has_slv_msrs(family, model))
3316                 return 0;
3317
3318         switch (model) {
3319         /* Nehalem compatible, but do not include turbo-ratio limit support */
3320         case INTEL_FAM6_NEHALEM_EX:     /* Nehalem-EX Xeon - Beckton */
3321         case INTEL_FAM6_XEON_PHI_KNL:   /* PHI - Knights Landing (different MSR definition) */
3322                 return 0;
3323         default:
3324                 return 1;
3325         }
3326 }
3327 int has_atom_turbo_ratio_limit(unsigned int family, unsigned int model)
3328 {
3329         if (has_slv_msrs(family, model))
3330                 return 1;
3331
3332         return 0;
3333 }
3334 int has_ivt_turbo_ratio_limit(unsigned int family, unsigned int model)
3335 {
3336         if (!genuine_intel)
3337                 return 0;
3338
3339         if (family != 6)
3340                 return 0;
3341
3342         switch (model) {
3343         case INTEL_FAM6_IVYBRIDGE_X:    /* IVB Xeon */
3344         case INTEL_FAM6_HASWELL_X:      /* HSW Xeon */
3345                 return 1;
3346         default:
3347                 return 0;
3348         }
3349 }
3350 int has_hsw_turbo_ratio_limit(unsigned int family, unsigned int model)
3351 {
3352         if (!genuine_intel)
3353                 return 0;
3354
3355         if (family != 6)
3356                 return 0;
3357
3358         switch (model) {
3359         case INTEL_FAM6_HASWELL_X:      /* HSW Xeon */
3360                 return 1;
3361         default:
3362                 return 0;
3363         }
3364 }
3365
3366 int has_knl_turbo_ratio_limit(unsigned int family, unsigned int model)
3367 {
3368         if (!genuine_intel)
3369                 return 0;
3370
3371         if (family != 6)
3372                 return 0;
3373
3374         switch (model) {
3375         case INTEL_FAM6_XEON_PHI_KNL:   /* Knights Landing */
3376                 return 1;
3377         default:
3378                 return 0;
3379         }
3380 }
3381 int has_glm_turbo_ratio_limit(unsigned int family, unsigned int model)
3382 {
3383         if (!genuine_intel)
3384                 return 0;
3385
3386         if (family != 6)
3387                 return 0;
3388
3389         switch (model) {
3390         case INTEL_FAM6_ATOM_GOLDMONT:
3391         case INTEL_FAM6_SKYLAKE_X:
3392                 return 1;
3393         default:
3394                 return 0;
3395         }
3396 }
3397 int has_config_tdp(unsigned int family, unsigned int model)
3398 {
3399         if (!genuine_intel)
3400                 return 0;
3401
3402         if (family != 6)
3403                 return 0;
3404
3405         switch (model) {
3406         case INTEL_FAM6_IVYBRIDGE:      /* IVB */
3407         case INTEL_FAM6_HASWELL_CORE:   /* HSW */
3408         case INTEL_FAM6_HASWELL_X:      /* HSX */
3409         case INTEL_FAM6_HASWELL_GT3E:   /* HSW */
3410         case INTEL_FAM6_BROADWELL_CORE: /* BDW */
3411         case INTEL_FAM6_BROADWELL_GT3E: /* BDW */
3412         case INTEL_FAM6_BROADWELL_X:    /* BDX */
3413         case INTEL_FAM6_SKYLAKE_MOBILE: /* SKL */
3414         case INTEL_FAM6_CANNONLAKE_MOBILE:      /* CNL */
3415         case INTEL_FAM6_SKYLAKE_X:      /* SKX */
3416
3417         case INTEL_FAM6_XEON_PHI_KNL:   /* Knights Landing */
3418                 return 1;
3419         default:
3420                 return 0;
3421         }
3422 }
3423
3424 static void
3425 dump_cstate_pstate_config_info(unsigned int family, unsigned int model)
3426 {
3427         if (!do_nhm_platform_info)
3428                 return;
3429
3430         dump_nhm_platform_info();
3431
3432         if (has_hsw_turbo_ratio_limit(family, model))
3433                 dump_hsw_turbo_ratio_limits();
3434
3435         if (has_ivt_turbo_ratio_limit(family, model))
3436                 dump_ivt_turbo_ratio_limits();
3437
3438         if (has_turbo_ratio_limit(family, model))
3439                 dump_turbo_ratio_limits(family, model);
3440
3441         if (has_atom_turbo_ratio_limit(family, model))
3442                 dump_atom_turbo_ratio_limits();
3443
3444         if (has_knl_turbo_ratio_limit(family, model))
3445                 dump_knl_turbo_ratio_limits();
3446
3447         if (has_config_tdp(family, model))
3448                 dump_config_tdp();
3449
3450         dump_nhm_cst_cfg();
3451 }
3452
3453 static void
3454 dump_sysfs_cstate_config(void)
3455 {
3456         char path[64];
3457         char name_buf[16];
3458         char desc[64];
3459         FILE *input;
3460         int state;
3461         char *sp;
3462
3463         if (!DO_BIC(BIC_sysfs))
3464                 return;
3465
3466         for (state = 0; state < 10; ++state) {
3467
3468                 sprintf(path, "/sys/devices/system/cpu/cpu%d/cpuidle/state%d/name",
3469                         base_cpu, state);
3470                 input = fopen(path, "r");
3471                 if (input == NULL)
3472                         continue;
3473                 fgets(name_buf, sizeof(name_buf), input);
3474
3475                  /* truncate "C1-HSW\n" to "C1", or truncate "C1\n" to "C1" */
3476                 sp = strchr(name_buf, '-');
3477                 if (!sp)
3478                         sp = strchrnul(name_buf, '\n');
3479                 *sp = '\0';
3480
3481                 fclose(input);
3482
3483                 sprintf(path, "/sys/devices/system/cpu/cpu%d/cpuidle/state%d/desc",
3484                         base_cpu, state);
3485                 input = fopen(path, "r");
3486                 if (input == NULL)
3487                         continue;
3488                 fgets(desc, sizeof(desc), input);
3489
3490                 fprintf(outf, "cpu%d: %s: %s", base_cpu, name_buf, desc);
3491                 fclose(input);
3492         }
3493 }
3494 static void
3495 dump_sysfs_pstate_config(void)
3496 {
3497         char path[64];
3498         char driver_buf[64];
3499         char governor_buf[64];
3500         FILE *input;
3501         int turbo;
3502
3503         sprintf(path, "/sys/devices/system/cpu/cpu%d/cpufreq/scaling_driver",
3504                         base_cpu);
3505         input = fopen(path, "r");
3506         if (input == NULL) {
3507                 fprintf(outf, "NSFOD %s\n", path);
3508                 return;
3509         }
3510         fgets(driver_buf, sizeof(driver_buf), input);
3511         fclose(input);
3512
3513         sprintf(path, "/sys/devices/system/cpu/cpu%d/cpufreq/scaling_governor",
3514                         base_cpu);
3515         input = fopen(path, "r");
3516         if (input == NULL) {
3517                 fprintf(outf, "NSFOD %s\n", path);
3518                 return;
3519         }
3520         fgets(governor_buf, sizeof(governor_buf), input);
3521         fclose(input);
3522
3523         fprintf(outf, "cpu%d: cpufreq driver: %s", base_cpu, driver_buf);
3524         fprintf(outf, "cpu%d: cpufreq governor: %s", base_cpu, governor_buf);
3525
3526         sprintf(path, "/sys/devices/system/cpu/cpufreq/boost");
3527         input = fopen(path, "r");
3528         if (input != NULL) {
3529                 fscanf(input, "%d", &turbo);
3530                 fprintf(outf, "cpufreq boost: %d\n", turbo);
3531                 fclose(input);
3532         }
3533
3534         sprintf(path, "/sys/devices/system/cpu/intel_pstate/no_turbo");
3535         input = fopen(path, "r");
3536         if (input != NULL) {
3537                 fscanf(input, "%d", &turbo);
3538                 fprintf(outf, "cpufreq intel_pstate no_turbo: %d\n", turbo);
3539                 fclose(input);
3540         }
3541 }
3542
3543
3544 /*
3545  * print_epb()
3546  * Decode the ENERGY_PERF_BIAS MSR
3547  */
3548 int print_epb(struct thread_data *t, struct core_data *c, struct pkg_data *p)
3549 {
3550         unsigned long long msr;
3551         char *epb_string;
3552         int cpu;
3553
3554         if (!has_epb)
3555                 return 0;
3556
3557         cpu = t->cpu_id;
3558
3559         /* EPB is per-package */
3560         if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
3561                 return 0;
3562
3563         if (cpu_migrate(cpu)) {
3564                 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
3565                 return -1;
3566         }
3567
3568         if (get_msr(cpu, MSR_IA32_ENERGY_PERF_BIAS, &msr))
3569                 return 0;
3570
3571         switch (msr & 0xF) {
3572         case ENERGY_PERF_BIAS_PERFORMANCE:
3573                 epb_string = "performance";
3574                 break;
3575         case ENERGY_PERF_BIAS_NORMAL:
3576                 epb_string = "balanced";
3577                 break;
3578         case ENERGY_PERF_BIAS_POWERSAVE:
3579                 epb_string = "powersave";
3580                 break;
3581         default:
3582                 epb_string = "custom";
3583                 break;
3584         }
3585         fprintf(outf, "cpu%d: MSR_IA32_ENERGY_PERF_BIAS: 0x%08llx (%s)\n", cpu, msr, epb_string);
3586
3587         return 0;
3588 }
3589 /*
3590  * print_hwp()
3591  * Decode the MSR_HWP_CAPABILITIES
3592  */
3593 int print_hwp(struct thread_data *t, struct core_data *c, struct pkg_data *p)
3594 {
3595         unsigned long long msr;
3596         int cpu;
3597
3598         if (!has_hwp)
3599                 return 0;
3600
3601         cpu = t->cpu_id;
3602
3603         /* MSR_HWP_CAPABILITIES is per-package */
3604         if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
3605                 return 0;
3606
3607         if (cpu_migrate(cpu)) {
3608                 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
3609                 return -1;
3610         }
3611
3612         if (get_msr(cpu, MSR_PM_ENABLE, &msr))
3613                 return 0;
3614
3615         fprintf(outf, "cpu%d: MSR_PM_ENABLE: 0x%08llx (%sHWP)\n",
3616                 cpu, msr, (msr & (1 << 0)) ? "" : "No-");
3617
3618         /* MSR_PM_ENABLE[1] == 1 if HWP is enabled and MSRs visible */
3619         if ((msr & (1 << 0)) == 0)
3620                 return 0;
3621
3622         if (get_msr(cpu, MSR_HWP_CAPABILITIES, &msr))
3623                 return 0;
3624
3625         fprintf(outf, "cpu%d: MSR_HWP_CAPABILITIES: 0x%08llx "
3626                         "(high %d guar %d eff %d low %d)\n",
3627                         cpu, msr,
3628                         (unsigned int)HWP_HIGHEST_PERF(msr),
3629                         (unsigned int)HWP_GUARANTEED_PERF(msr),
3630                         (unsigned int)HWP_MOSTEFFICIENT_PERF(msr),
3631                         (unsigned int)HWP_LOWEST_PERF(msr));
3632
3633         if (get_msr(cpu, MSR_HWP_REQUEST, &msr))
3634                 return 0;
3635
3636         fprintf(outf, "cpu%d: MSR_HWP_REQUEST: 0x%08llx "
3637                         "(min %d max %d des %d epp 0x%x window 0x%x pkg 0x%x)\n",
3638                         cpu, msr,
3639                         (unsigned int)(((msr) >> 0) & 0xff),
3640                         (unsigned int)(((msr) >> 8) & 0xff),
3641                         (unsigned int)(((msr) >> 16) & 0xff),
3642                         (unsigned int)(((msr) >> 24) & 0xff),
3643                         (unsigned int)(((msr) >> 32) & 0xff3),
3644                         (unsigned int)(((msr) >> 42) & 0x1));
3645
3646         if (has_hwp_pkg) {
3647                 if (get_msr(cpu, MSR_HWP_REQUEST_PKG, &msr))
3648                         return 0;
3649
3650                 fprintf(outf, "cpu%d: MSR_HWP_REQUEST_PKG: 0x%08llx "
3651                         "(min %d max %d des %d epp 0x%x window 0x%x)\n",
3652                         cpu, msr,
3653                         (unsigned int)(((msr) >> 0) & 0xff),
3654                         (unsigned int)(((msr) >> 8) & 0xff),
3655                         (unsigned int)(((msr) >> 16) & 0xff),
3656                         (unsigned int)(((msr) >> 24) & 0xff),
3657                         (unsigned int)(((msr) >> 32) & 0xff3));
3658         }
3659         if (has_hwp_notify) {
3660                 if (get_msr(cpu, MSR_HWP_INTERRUPT, &msr))
3661                         return 0;
3662
3663                 fprintf(outf, "cpu%d: MSR_HWP_INTERRUPT: 0x%08llx "
3664                         "(%s_Guaranteed_Perf_Change, %s_Excursion_Min)\n",
3665                         cpu, msr,
3666                         ((msr) & 0x1) ? "EN" : "Dis",
3667                         ((msr) & 0x2) ? "EN" : "Dis");
3668         }
3669         if (get_msr(cpu, MSR_HWP_STATUS, &msr))
3670                 return 0;
3671
3672         fprintf(outf, "cpu%d: MSR_HWP_STATUS: 0x%08llx "
3673                         "(%sGuaranteed_Perf_Change, %sExcursion_Min)\n",
3674                         cpu, msr,
3675                         ((msr) & 0x1) ? "" : "No-",
3676                         ((msr) & 0x2) ? "" : "No-");
3677
3678         return 0;
3679 }
3680
3681 /*
3682  * print_perf_limit()
3683  */
3684 int print_perf_limit(struct thread_data *t, struct core_data *c, struct pkg_data *p)
3685 {
3686         unsigned long long msr;
3687         int cpu;
3688
3689         cpu = t->cpu_id;
3690
3691         /* per-package */
3692         if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
3693                 return 0;
3694
3695         if (cpu_migrate(cpu)) {
3696                 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
3697                 return -1;
3698         }
3699
3700         if (do_core_perf_limit_reasons) {
3701                 get_msr(cpu, MSR_CORE_PERF_LIMIT_REASONS, &msr);
3702                 fprintf(outf, "cpu%d: MSR_CORE_PERF_LIMIT_REASONS, 0x%08llx", cpu, msr);
3703                 fprintf(outf, " (Active: %s%s%s%s%s%s%s%s%s%s%s%s%s%s)",
3704                         (msr & 1 << 15) ? "bit15, " : "",
3705                         (msr & 1 << 14) ? "bit14, " : "",
3706                         (msr & 1 << 13) ? "Transitions, " : "",
3707                         (msr & 1 << 12) ? "MultiCoreTurbo, " : "",
3708                         (msr & 1 << 11) ? "PkgPwrL2, " : "",
3709                         (msr & 1 << 10) ? "PkgPwrL1, " : "",
3710                         (msr & 1 << 9) ? "CorePwr, " : "",
3711                         (msr & 1 << 8) ? "Amps, " : "",
3712                         (msr & 1 << 6) ? "VR-Therm, " : "",
3713                         (msr & 1 << 5) ? "Auto-HWP, " : "",
3714                         (msr & 1 << 4) ? "Graphics, " : "",
3715                         (msr & 1 << 2) ? "bit2, " : "",
3716                         (msr & 1 << 1) ? "ThermStatus, " : "",
3717                         (msr & 1 << 0) ? "PROCHOT, " : "");
3718                 fprintf(outf, " (Logged: %s%s%s%s%s%s%s%s%s%s%s%s%s%s)\n",
3719                         (msr & 1 << 31) ? "bit31, " : "",
3720                         (msr & 1 << 30) ? "bit30, " : "",
3721                         (msr & 1 << 29) ? "Transitions, " : "",
3722                         (msr & 1 << 28) ? "MultiCoreTurbo, " : "",
3723                         (msr & 1 << 27) ? "PkgPwrL2, " : "",
3724                         (msr & 1 << 26) ? "PkgPwrL1, " : "",
3725                         (msr & 1 << 25) ? "CorePwr, " : "",
3726                         (msr & 1 << 24) ? "Amps, " : "",
3727                         (msr & 1 << 22) ? "VR-Therm, " : "",
3728                         (msr & 1 << 21) ? "Auto-HWP, " : "",
3729                         (msr & 1 << 20) ? "Graphics, " : "",
3730                         (msr & 1 << 18) ? "bit18, " : "",
3731                         (msr & 1 << 17) ? "ThermStatus, " : "",
3732                         (msr & 1 << 16) ? "PROCHOT, " : "");
3733
3734         }
3735         if (do_gfx_perf_limit_reasons) {
3736                 get_msr(cpu, MSR_GFX_PERF_LIMIT_REASONS, &msr);
3737                 fprintf(outf, "cpu%d: MSR_GFX_PERF_LIMIT_REASONS, 0x%08llx", cpu, msr);
3738                 fprintf(outf, " (Active: %s%s%s%s%s%s%s%s)",
3739                         (msr & 1 << 0) ? "PROCHOT, " : "",
3740                         (msr & 1 << 1) ? "ThermStatus, " : "",
3741                         (msr & 1 << 4) ? "Graphics, " : "",
3742                         (msr & 1 << 6) ? "VR-Therm, " : "",
3743                         (msr & 1 << 8) ? "Amps, " : "",
3744                         (msr & 1 << 9) ? "GFXPwr, " : "",
3745                         (msr & 1 << 10) ? "PkgPwrL1, " : "",
3746                         (msr & 1 << 11) ? "PkgPwrL2, " : "");
3747                 fprintf(outf, " (Logged: %s%s%s%s%s%s%s%s)\n",
3748                         (msr & 1 << 16) ? "PROCHOT, " : "",
3749                         (msr & 1 << 17) ? "ThermStatus, " : "",
3750                         (msr & 1 << 20) ? "Graphics, " : "",
3751                         (msr & 1 << 22) ? "VR-Therm, " : "",
3752                         (msr & 1 << 24) ? "Amps, " : "",
3753                         (msr & 1 << 25) ? "GFXPwr, " : "",
3754                         (msr & 1 << 26) ? "PkgPwrL1, " : "",
3755                         (msr & 1 << 27) ? "PkgPwrL2, " : "");
3756         }
3757         if (do_ring_perf_limit_reasons) {
3758                 get_msr(cpu, MSR_RING_PERF_LIMIT_REASONS, &msr);
3759                 fprintf(outf, "cpu%d: MSR_RING_PERF_LIMIT_REASONS, 0x%08llx", cpu, msr);
3760                 fprintf(outf, " (Active: %s%s%s%s%s%s)",
3761                         (msr & 1 << 0) ? "PROCHOT, " : "",
3762                         (msr & 1 << 1) ? "ThermStatus, " : "",
3763                         (msr & 1 << 6) ? "VR-Therm, " : "",
3764                         (msr & 1 << 8) ? "Amps, " : "",
3765                         (msr & 1 << 10) ? "PkgPwrL1, " : "",
3766                         (msr & 1 << 11) ? "PkgPwrL2, " : "");
3767                 fprintf(outf, " (Logged: %s%s%s%s%s%s)\n",
3768                         (msr & 1 << 16) ? "PROCHOT, " : "",
3769                         (msr & 1 << 17) ? "ThermStatus, " : "",
3770                         (msr & 1 << 22) ? "VR-Therm, " : "",
3771                         (msr & 1 << 24) ? "Amps, " : "",
3772                         (msr & 1 << 26) ? "PkgPwrL1, " : "",
3773                         (msr & 1 << 27) ? "PkgPwrL2, " : "");
3774         }
3775         return 0;
3776 }
3777
3778 #define RAPL_POWER_GRANULARITY  0x7FFF  /* 15 bit power granularity */
3779 #define RAPL_TIME_GRANULARITY   0x3F /* 6 bit time granularity */
3780
3781 double get_tdp_intel(unsigned int model)
3782 {
3783         unsigned long long msr;
3784
3785         if (do_rapl & RAPL_PKG_POWER_INFO)
3786                 if (!get_msr(base_cpu, MSR_PKG_POWER_INFO, &msr))
3787                         return ((msr >> 0) & RAPL_POWER_GRANULARITY) * rapl_power_units;
3788
3789         switch (model) {
3790         case INTEL_FAM6_ATOM_SILVERMONT:
3791         case INTEL_FAM6_ATOM_SILVERMONT_X:
3792                 return 30.0;
3793         default:
3794                 return 135.0;
3795         }
3796 }
3797
3798 double get_tdp_amd(unsigned int family)
3799 {
3800         switch (family) {
3801         case 0x17:
3802         default:
3803                 /* This is the max stock TDP of HEDT/Server Fam17h chips */
3804                 return 250.0;
3805         }
3806 }
3807
3808 /*
3809  * rapl_dram_energy_units_probe()
3810  * Energy units are either hard-coded, or come from RAPL Energy Unit MSR.
3811  */
3812 static double
3813 rapl_dram_energy_units_probe(int  model, double rapl_energy_units)
3814 {
3815         /* only called for genuine_intel, family 6 */
3816
3817         switch (model) {
3818         case INTEL_FAM6_HASWELL_X:      /* HSX */
3819         case INTEL_FAM6_BROADWELL_X:    /* BDX */
3820         case INTEL_FAM6_XEON_PHI_KNL:   /* KNL */
3821                 return (rapl_dram_energy_units = 15.3 / 1000000);
3822         default:
3823                 return (rapl_energy_units);
3824         }
3825 }
3826
3827 void rapl_probe_intel(unsigned int family, unsigned int model)
3828 {
3829         unsigned long long msr;
3830         unsigned int time_unit;
3831         double tdp;
3832
3833         if (family != 6)
3834                 return;
3835
3836         switch (model) {
3837         case INTEL_FAM6_SANDYBRIDGE:
3838         case INTEL_FAM6_IVYBRIDGE:
3839         case INTEL_FAM6_HASWELL_CORE:   /* HSW */
3840         case INTEL_FAM6_HASWELL_GT3E:   /* HSW */
3841         case INTEL_FAM6_BROADWELL_CORE: /* BDW */
3842         case INTEL_FAM6_BROADWELL_GT3E: /* BDW */
3843                 do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_GFX | RAPL_PKG_POWER_INFO;
3844                 if (rapl_joules) {
3845                         BIC_PRESENT(BIC_Pkg_J);
3846                         BIC_PRESENT(BIC_Cor_J);
3847                         BIC_PRESENT(BIC_GFX_J);
3848                 } else {
3849                         BIC_PRESENT(BIC_PkgWatt);
3850                         BIC_PRESENT(BIC_CorWatt);
3851                         BIC_PRESENT(BIC_GFXWatt);
3852                 }
3853                 break;
3854         case INTEL_FAM6_ATOM_GOLDMONT:  /* BXT */
3855         case INTEL_FAM6_ATOM_GOLDMONT_PLUS:
3856                 do_rapl = RAPL_PKG | RAPL_PKG_POWER_INFO;
3857                 if (rapl_joules)
3858                         BIC_PRESENT(BIC_Pkg_J);
3859                 else
3860                         BIC_PRESENT(BIC_PkgWatt);
3861                 break;
3862         case INTEL_FAM6_SKYLAKE_MOBILE: /* SKL */
3863         case INTEL_FAM6_CANNONLAKE_MOBILE:      /* CNL */
3864                 do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_DRAM | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_GFX | RAPL_PKG_POWER_INFO;
3865                 BIC_PRESENT(BIC_PKG__);
3866                 BIC_PRESENT(BIC_RAM__);
3867                 if (rapl_joules) {
3868                         BIC_PRESENT(BIC_Pkg_J);
3869                         BIC_PRESENT(BIC_Cor_J);
3870                         BIC_PRESENT(BIC_RAM_J);
3871                         BIC_PRESENT(BIC_GFX_J);
3872                 } else {
3873                         BIC_PRESENT(BIC_PkgWatt);
3874                         BIC_PRESENT(BIC_CorWatt);
3875                         BIC_PRESENT(BIC_RAMWatt);
3876                         BIC_PRESENT(BIC_GFXWatt);
3877                 }
3878                 break;
3879         case INTEL_FAM6_HASWELL_X:      /* HSX */
3880         case INTEL_FAM6_BROADWELL_X:    /* BDX */
3881         case INTEL_FAM6_SKYLAKE_X:      /* SKX */
3882         case INTEL_FAM6_XEON_PHI_KNL:   /* KNL */
3883                 do_rapl = RAPL_PKG | RAPL_DRAM | RAPL_DRAM_POWER_INFO | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO;
3884                 BIC_PRESENT(BIC_PKG__);
3885                 BIC_PRESENT(BIC_RAM__);
3886                 if (rapl_joules) {
3887                         BIC_PRESENT(BIC_Pkg_J);
3888                         BIC_PRESENT(BIC_RAM_J);
3889                 } else {
3890                         BIC_PRESENT(BIC_PkgWatt);
3891                         BIC_PRESENT(BIC_RAMWatt);
3892                 }
3893                 break;
3894         case INTEL_FAM6_SANDYBRIDGE_X:
3895         case INTEL_FAM6_IVYBRIDGE_X:
3896                 do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_DRAM | RAPL_DRAM_POWER_INFO | RAPL_PKG_PERF_STATUS | RAPL_DRAM_PERF_STATUS | RAPL_PKG_POWER_INFO;
3897                 BIC_PRESENT(BIC_PKG__);
3898                 BIC_PRESENT(BIC_RAM__);
3899                 if (rapl_joules) {
3900                         BIC_PRESENT(BIC_Pkg_J);
3901                         BIC_PRESENT(BIC_Cor_J);
3902                         BIC_PRESENT(BIC_RAM_J);
3903                 } else {
3904                         BIC_PRESENT(BIC_PkgWatt);
3905                         BIC_PRESENT(BIC_CorWatt);
3906                         BIC_PRESENT(BIC_RAMWatt);
3907                 }
3908                 break;
3909         case INTEL_FAM6_ATOM_SILVERMONT:        /* BYT */
3910         case INTEL_FAM6_ATOM_SILVERMONT_X:      /* AVN */
3911                 do_rapl = RAPL_PKG | RAPL_CORES;
3912                 if (rapl_joules) {
3913                         BIC_PRESENT(BIC_Pkg_J);
3914                         BIC_PRESENT(BIC_Cor_J);
3915                 } else {
3916                         BIC_PRESENT(BIC_PkgWatt);
3917                         BIC_PRESENT(BIC_CorWatt);
3918                 }
3919                 break;
3920         case INTEL_FAM6_ATOM_GOLDMONT_X:        /* DNV */
3921                 do_rapl = RAPL_PKG | RAPL_DRAM | RAPL_DRAM_POWER_INFO | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO | RAPL_CORES_ENERGY_STATUS;
3922                 BIC_PRESENT(BIC_PKG__);
3923                 BIC_PRESENT(BIC_RAM__);
3924                 if (rapl_joules) {
3925                         BIC_PRESENT(BIC_Pkg_J);
3926                         BIC_PRESENT(BIC_Cor_J);
3927                         BIC_PRESENT(BIC_RAM_J);
3928                 } else {
3929                         BIC_PRESENT(BIC_PkgWatt);
3930                         BIC_PRESENT(BIC_CorWatt);
3931                         BIC_PRESENT(BIC_RAMWatt);
3932                 }
3933                 break;
3934         default:
3935                 return;
3936         }
3937
3938         /* units on package 0, verify later other packages match */
3939         if (get_msr(base_cpu, MSR_RAPL_POWER_UNIT, &msr))
3940                 return;
3941
3942         rapl_power_units = 1.0 / (1 << (msr & 0xF));
3943         if (model == INTEL_FAM6_ATOM_SILVERMONT)
3944                 rapl_energy_units = 1.0 * (1 << (msr >> 8 & 0x1F)) / 1000000;
3945         else
3946                 rapl_energy_units = 1.0 / (1 << (msr >> 8 & 0x1F));
3947
3948         rapl_dram_energy_units = rapl_dram_energy_units_probe(model, rapl_energy_units);
3949
3950         time_unit = msr >> 16 & 0xF;
3951         if (time_unit == 0)
3952                 time_unit = 0xA;
3953
3954         rapl_time_units = 1.0 / (1 << (time_unit));
3955
3956         tdp = get_tdp_intel(model);
3957
3958         rapl_joule_counter_range = 0xFFFFFFFF * rapl_energy_units / tdp;
3959         if (!quiet)
3960                 fprintf(outf, "RAPL: %.0f sec. Joule Counter Range, at %.0f Watts\n", rapl_joule_counter_range, tdp);
3961 }
3962
3963 void rapl_probe_amd(unsigned int family, unsigned int model)
3964 {
3965         unsigned long long msr;
3966         unsigned int eax, ebx, ecx, edx;
3967         unsigned int has_rapl = 0;
3968         double tdp;
3969
3970         if (max_extended_level >= 0x80000007) {
3971                 __cpuid(0x80000007, eax, ebx, ecx, edx);
3972                 /* RAPL (Fam 17h) */
3973                 has_rapl = edx & (1 << 14);
3974         }
3975
3976         if (!has_rapl)
3977                 return;
3978
3979         switch (family) {
3980         case 0x17: /* Zen, Zen+ */
3981                 do_rapl = RAPL_AMD_F17H | RAPL_PER_CORE_ENERGY;
3982                 if (rapl_joules)
3983                         BIC_PRESENT(BIC_Cor_J);
3984                 else
3985                         BIC_PRESENT(BIC_CorWatt);
3986                 break;
3987         default:
3988                 return;
3989         }
3990
3991         if (get_msr(base_cpu, MSR_RAPL_PWR_UNIT, &msr))
3992                 return;
3993
3994         rapl_time_units = ldexp(1.0, -(msr >> 16 & 0xf));
3995         rapl_energy_units = ldexp(1.0, -(msr >> 8 & 0x1f));
3996         rapl_power_units = ldexp(1.0, -(msr & 0xf));
3997
3998         tdp = get_tdp_amd(model);
3999
4000         rapl_joule_counter_range = 0xFFFFFFFF * rapl_energy_units / tdp;
4001         if (!quiet)
4002                 fprintf(outf, "RAPL: %.0f sec. Joule Counter Range, at %.0f Watts\n", rapl_joule_counter_range, tdp);
4003 }
4004
4005 /*
4006  * rapl_probe()
4007  *
4008  * sets do_rapl, rapl_power_units, rapl_energy_units, rapl_time_units
4009  */
4010 void rapl_probe(unsigned int family, unsigned int model)
4011 {
4012         if (genuine_intel)
4013                 rapl_probe_intel(family, model);
4014         if (authentic_amd)
4015                 rapl_probe_amd(family, model);
4016 }
4017
4018 void perf_limit_reasons_probe(unsigned int family, unsigned int model)
4019 {
4020         if (!genuine_intel)
4021                 return;
4022
4023         if (family != 6)
4024                 return;
4025
4026         switch (model) {
4027         case INTEL_FAM6_HASWELL_CORE:   /* HSW */
4028         case INTEL_FAM6_HASWELL_GT3E:   /* HSW */
4029                 do_gfx_perf_limit_reasons = 1;
4030         case INTEL_FAM6_HASWELL_X:      /* HSX */
4031                 do_core_perf_limit_reasons = 1;
4032                 do_ring_perf_limit_reasons = 1;
4033         default:
4034                 return;
4035         }
4036 }
4037
4038 void automatic_cstate_conversion_probe(unsigned int family, unsigned int model)
4039 {
4040         if (is_skx(family, model) || is_bdx(family, model))
4041                 has_automatic_cstate_conversion = 1;
4042 }
4043
4044 int print_thermal(struct thread_data *t, struct core_data *c, struct pkg_data *p)
4045 {
4046         unsigned long long msr;
4047         unsigned int dts, dts2;
4048         int cpu;
4049
4050         if (!(do_dts || do_ptm))
4051                 return 0;
4052
4053         cpu = t->cpu_id;
4054
4055         /* DTS is per-core, no need to print for each thread */
4056         if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
4057                 return 0;
4058
4059         if (cpu_migrate(cpu)) {
4060                 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
4061                 return -1;
4062         }
4063
4064         if (do_ptm && (t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE)) {
4065                 if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_STATUS, &msr))
4066                         return 0;
4067
4068                 dts = (msr >> 16) & 0x7F;
4069                 fprintf(outf, "cpu%d: MSR_IA32_PACKAGE_THERM_STATUS: 0x%08llx (%d C)\n",
4070                         cpu, msr, tcc_activation_temp - dts);
4071
4072                 if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_INTERRUPT, &msr))
4073                         return 0;
4074
4075                 dts = (msr >> 16) & 0x7F;
4076                 dts2 = (msr >> 8) & 0x7F;
4077                 fprintf(outf, "cpu%d: MSR_IA32_PACKAGE_THERM_INTERRUPT: 0x%08llx (%d C, %d C)\n",
4078                         cpu, msr, tcc_activation_temp - dts, tcc_activation_temp - dts2);
4079         }
4080
4081
4082         if (do_dts && debug) {
4083                 unsigned int resolution;
4084
4085                 if (get_msr(cpu, MSR_IA32_THERM_STATUS, &msr))
4086                         return 0;
4087
4088                 dts = (msr >> 16) & 0x7F;
4089                 resolution = (msr >> 27) & 0xF;
4090                 fprintf(outf, "cpu%d: MSR_IA32_THERM_STATUS: 0x%08llx (%d C +/- %d)\n",
4091                         cpu, msr, tcc_activation_temp - dts, resolution);
4092
4093                 if (get_msr(cpu, MSR_IA32_THERM_INTERRUPT, &msr))
4094                         return 0;
4095
4096                 dts = (msr >> 16) & 0x7F;
4097                 dts2 = (msr >> 8) & 0x7F;
4098                 fprintf(outf, "cpu%d: MSR_IA32_THERM_INTERRUPT: 0x%08llx (%d C, %d C)\n",
4099                         cpu, msr, tcc_activation_temp - dts, tcc_activation_temp - dts2);
4100         }
4101
4102         return 0;
4103 }
4104
4105 void print_power_limit_msr(int cpu, unsigned long long msr, char *label)
4106 {
4107         fprintf(outf, "cpu%d: %s: %sabled (%f Watts, %f sec, clamp %sabled)\n",
4108                 cpu, label,
4109                 ((msr >> 15) & 1) ? "EN" : "DIS",
4110                 ((msr >> 0) & 0x7FFF) * rapl_power_units,
4111                 (1.0 + (((msr >> 22) & 0x3)/4.0)) * (1 << ((msr >> 17) & 0x1F)) * rapl_time_units,
4112                 (((msr >> 16) & 1) ? "EN" : "DIS"));
4113
4114         return;
4115 }
4116
4117 int print_rapl(struct thread_data *t, struct core_data *c, struct pkg_data *p)
4118 {
4119         unsigned long long msr;
4120         const char *msr_name;
4121         int cpu;
4122
4123         if (!do_rapl)
4124                 return 0;
4125
4126         /* RAPL counters are per package, so print only for 1st thread/package */
4127         if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
4128                 return 0;
4129
4130         cpu = t->cpu_id;
4131         if (cpu_migrate(cpu)) {
4132                 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
4133                 return -1;
4134         }
4135
4136         if (do_rapl & RAPL_AMD_F17H) {
4137                 msr_name = "MSR_RAPL_PWR_UNIT";
4138                 if (get_msr(cpu, MSR_RAPL_PWR_UNIT, &msr))
4139                         return -1;
4140         } else {
4141                 msr_name = "MSR_RAPL_POWER_UNIT";
4142                 if (get_msr(cpu, MSR_RAPL_POWER_UNIT, &msr))
4143                         return -1;
4144         }
4145
4146         fprintf(outf, "cpu%d: %s: 0x%08llx (%f Watts, %f Joules, %f sec.)\n", cpu, msr_name, msr,
4147                 rapl_power_units, rapl_energy_units, rapl_time_units);
4148
4149         if (do_rapl & RAPL_PKG_POWER_INFO) {
4150
4151                 if (get_msr(cpu, MSR_PKG_POWER_INFO, &msr))
4152                         return -5;
4153
4154
4155                 fprintf(outf, "cpu%d: MSR_PKG_POWER_INFO: 0x%08llx (%.0f W TDP, RAPL %.0f - %.0f W, %f sec.)\n",
4156                         cpu, msr,
4157                         ((msr >>  0) & RAPL_POWER_GRANULARITY) * rapl_power_units,
4158                         ((msr >> 16) & RAPL_POWER_GRANULARITY) * rapl_power_units,
4159                         ((msr >> 32) & RAPL_POWER_GRANULARITY) * rapl_power_units,
4160                         ((msr >> 48) & RAPL_TIME_GRANULARITY) * rapl_time_units);
4161
4162         }
4163         if (do_rapl & RAPL_PKG) {
4164
4165                 if (get_msr(cpu, MSR_PKG_POWER_LIMIT, &msr))
4166                         return -9;
4167
4168                 fprintf(outf, "cpu%d: MSR_PKG_POWER_LIMIT: 0x%08llx (%slocked)\n",
4169                         cpu, msr, (msr >> 63) & 1 ? "" : "UN");
4170
4171                 print_power_limit_msr(cpu, msr, "PKG Limit #1");
4172                 fprintf(outf, "cpu%d: PKG Limit #2: %sabled (%f Watts, %f* sec, clamp %sabled)\n",
4173                         cpu,
4174                         ((msr >> 47) & 1) ? "EN" : "DIS",
4175                         ((msr >> 32) & 0x7FFF) * rapl_power_units,
4176                         (1.0 + (((msr >> 54) & 0x3)/4.0)) * (1 << ((msr >> 49) & 0x1F)) * rapl_time_units,
4177                         ((msr >> 48) & 1) ? "EN" : "DIS");
4178         }
4179
4180         if (do_rapl & RAPL_DRAM_POWER_INFO) {
4181                 if (get_msr(cpu, MSR_DRAM_POWER_INFO, &msr))
4182                         return -6;
4183
4184                 fprintf(outf, "cpu%d: MSR_DRAM_POWER_INFO,: 0x%08llx (%.0f W TDP, RAPL %.0f - %.0f W, %f sec.)\n",
4185                         cpu, msr,
4186                         ((msr >>  0) & RAPL_POWER_GRANULARITY) * rapl_power_units,
4187                         ((msr >> 16) & RAPL_POWER_GRANULARITY) * rapl_power_units,
4188                         ((msr >> 32) & RAPL_POWER_GRANULARITY) * rapl_power_units,
4189                         ((msr >> 48) & RAPL_TIME_GRANULARITY) * rapl_time_units);
4190         }
4191         if (do_rapl & RAPL_DRAM) {
4192                 if (get_msr(cpu, MSR_DRAM_POWER_LIMIT, &msr))
4193                         return -9;
4194                 fprintf(outf, "cpu%d: MSR_DRAM_POWER_LIMIT: 0x%08llx (%slocked)\n",
4195                                 cpu, msr, (msr >> 31) & 1 ? "" : "UN");
4196
4197                 print_power_limit_msr(cpu, msr, "DRAM Limit");
4198         }
4199         if (do_rapl & RAPL_CORE_POLICY) {
4200                 if (get_msr(cpu, MSR_PP0_POLICY, &msr))
4201                         return -7;
4202
4203                 fprintf(outf, "cpu%d: MSR_PP0_POLICY: %lld\n", cpu, msr & 0xF);
4204         }
4205         if (do_rapl & RAPL_CORES_POWER_LIMIT) {
4206                 if (get_msr(cpu, MSR_PP0_POWER_LIMIT, &msr))
4207                         return -9;
4208                 fprintf(outf, "cpu%d: MSR_PP0_POWER_LIMIT: 0x%08llx (%slocked)\n",
4209                                 cpu, msr, (msr >> 31) & 1 ? "" : "UN");
4210                 print_power_limit_msr(cpu, msr, "Cores Limit");
4211         }
4212         if (do_rapl & RAPL_GFX) {
4213                 if (get_msr(cpu, MSR_PP1_POLICY, &msr))
4214                         return -8;
4215
4216                 fprintf(outf, "cpu%d: MSR_PP1_POLICY: %lld\n", cpu, msr & 0xF);
4217
4218                 if (get_msr(cpu, MSR_PP1_POWER_LIMIT, &msr))
4219                         return -9;
4220                 fprintf(outf, "cpu%d: MSR_PP1_POWER_LIMIT: 0x%08llx (%slocked)\n",
4221                                 cpu, msr, (msr >> 31) & 1 ? "" : "UN");
4222                 print_power_limit_msr(cpu, msr, "GFX Limit");
4223         }
4224         return 0;
4225 }
4226
4227 /*
4228  * SNB adds support for additional MSRs:
4229  *
4230  * MSR_PKG_C7_RESIDENCY            0x000003fa
4231  * MSR_CORE_C7_RESIDENCY           0x000003fe
4232  * MSR_PKG_C2_RESIDENCY            0x0000060d
4233  */
4234
4235 int has_snb_msrs(unsigned int family, unsigned int model)
4236 {
4237         if (!genuine_intel)
4238                 return 0;
4239
4240         switch (model) {
4241         case INTEL_FAM6_SANDYBRIDGE:
4242         case INTEL_FAM6_SANDYBRIDGE_X:
4243         case INTEL_FAM6_IVYBRIDGE:      /* IVB */
4244         case INTEL_FAM6_IVYBRIDGE_X:    /* IVB Xeon */
4245         case INTEL_FAM6_HASWELL_CORE:   /* HSW */
4246         case INTEL_FAM6_HASWELL_X:      /* HSW */
4247         case INTEL_FAM6_HASWELL_GT3E:   /* HSW */
4248         case INTEL_FAM6_BROADWELL_CORE: /* BDW */
4249         case INTEL_FAM6_BROADWELL_GT3E: /* BDW */
4250         case INTEL_FAM6_BROADWELL_X:    /* BDX */
4251         case INTEL_FAM6_SKYLAKE_MOBILE: /* SKL */
4252         case INTEL_FAM6_CANNONLAKE_MOBILE:      /* CNL */
4253         case INTEL_FAM6_SKYLAKE_X:      /* SKX */
4254         case INTEL_FAM6_ATOM_GOLDMONT:  /* BXT */
4255         case INTEL_FAM6_ATOM_GOLDMONT_PLUS:
4256         case INTEL_FAM6_ATOM_GOLDMONT_X:        /* DNV */
4257                 return 1;
4258         }
4259         return 0;
4260 }
4261
4262 /*
4263  * HSW adds support for additional MSRs:
4264  *
4265  * MSR_PKG_C8_RESIDENCY         0x00000630
4266  * MSR_PKG_C9_RESIDENCY         0x00000631
4267  * MSR_PKG_C10_RESIDENCY        0x00000632
4268  *
4269  * MSR_PKGC8_IRTL               0x00000633
4270  * MSR_PKGC9_IRTL               0x00000634
4271  * MSR_PKGC10_IRTL              0x00000635
4272  *
4273  */
4274 int has_hsw_msrs(unsigned int family, unsigned int model)
4275 {
4276         if (!genuine_intel)
4277                 return 0;
4278
4279         switch (model) {
4280         case INTEL_FAM6_HASWELL_CORE:
4281         case INTEL_FAM6_BROADWELL_CORE: /* BDW */
4282         case INTEL_FAM6_SKYLAKE_MOBILE: /* SKL */
4283         case INTEL_FAM6_CANNONLAKE_MOBILE:      /* CNL */
4284         case INTEL_FAM6_ATOM_GOLDMONT:  /* BXT */
4285         case INTEL_FAM6_ATOM_GOLDMONT_PLUS:
4286                 return 1;
4287         }
4288         return 0;
4289 }
4290
4291 /*
4292  * SKL adds support for additional MSRS:
4293  *
4294  * MSR_PKG_WEIGHTED_CORE_C0_RES    0x00000658
4295  * MSR_PKG_ANY_CORE_C0_RES         0x00000659
4296  * MSR_PKG_ANY_GFXE_C0_RES         0x0000065A
4297  * MSR_PKG_BOTH_CORE_GFXE_C0_RES   0x0000065B
4298  */
4299 int has_skl_msrs(unsigned int family, unsigned int model)
4300 {
4301         if (!genuine_intel)
4302                 return 0;
4303
4304         switch (model) {
4305         case INTEL_FAM6_SKYLAKE_MOBILE: /* SKL */
4306         case INTEL_FAM6_CANNONLAKE_MOBILE:      /* CNL */
4307                 return 1;
4308         }
4309         return 0;
4310 }
4311
4312 int is_slm(unsigned int family, unsigned int model)
4313 {
4314         if (!genuine_intel)
4315                 return 0;
4316         switch (model) {
4317         case INTEL_FAM6_ATOM_SILVERMONT:        /* BYT */
4318         case INTEL_FAM6_ATOM_SILVERMONT_X:      /* AVN */
4319                 return 1;
4320         }
4321         return 0;
4322 }
4323
4324 int is_knl(unsigned int family, unsigned int model)
4325 {
4326         if (!genuine_intel)
4327                 return 0;
4328         switch (model) {
4329         case INTEL_FAM6_XEON_PHI_KNL:   /* KNL */
4330                 return 1;
4331         }
4332         return 0;
4333 }
4334
4335 int is_cnl(unsigned int family, unsigned int model)
4336 {
4337         if (!genuine_intel)
4338                 return 0;
4339
4340         switch (model) {
4341         case INTEL_FAM6_CANNONLAKE_MOBILE: /* CNL */
4342                 return 1;
4343         }
4344
4345         return 0;
4346 }
4347
4348 unsigned int get_aperf_mperf_multiplier(unsigned int family, unsigned int model)
4349 {
4350         if (is_knl(family, model))
4351                 return 1024;
4352         return 1;
4353 }
4354
4355 #define SLM_BCLK_FREQS 5
4356 double slm_freq_table[SLM_BCLK_FREQS] = { 83.3, 100.0, 133.3, 116.7, 80.0};
4357
4358 double slm_bclk(void)
4359 {
4360         unsigned long long msr = 3;
4361         unsigned int i;
4362         double freq;
4363
4364         if (get_msr(base_cpu, MSR_FSB_FREQ, &msr))
4365                 fprintf(outf, "SLM BCLK: unknown\n");
4366
4367         i = msr & 0xf;
4368         if (i >= SLM_BCLK_FREQS) {
4369                 fprintf(outf, "SLM BCLK[%d] invalid\n", i);
4370                 i = 3;
4371         }
4372         freq = slm_freq_table[i];
4373
4374         if (!quiet)
4375                 fprintf(outf, "SLM BCLK: %.1f Mhz\n", freq);
4376
4377         return freq;
4378 }
4379
4380 double discover_bclk(unsigned int family, unsigned int model)
4381 {
4382         if (has_snb_msrs(family, model) || is_knl(family, model))
4383                 return 100.00;
4384         else if (is_slm(family, model))
4385                 return slm_bclk();
4386         else
4387                 return 133.33;
4388 }
4389
4390 /*
4391  * MSR_IA32_TEMPERATURE_TARGET indicates the temperature where
4392  * the Thermal Control Circuit (TCC) activates.
4393  * This is usually equal to tjMax.
4394  *
4395  * Older processors do not have this MSR, so there we guess,
4396  * but also allow cmdline over-ride with -T.
4397  *
4398  * Several MSR temperature values are in units of degrees-C
4399  * below this value, including the Digital Thermal Sensor (DTS),
4400  * Package Thermal Management Sensor (PTM), and thermal event thresholds.
4401  */
4402 int set_temperature_target(struct thread_data *t, struct core_data *c, struct pkg_data *p)
4403 {
4404         unsigned long long msr;
4405         unsigned int target_c_local;
4406         int cpu;
4407
4408         /* tcc_activation_temp is used only for dts or ptm */
4409         if (!(do_dts || do_ptm))
4410                 return 0;
4411
4412         /* this is a per-package concept */
4413         if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
4414                 return 0;
4415
4416         cpu = t->cpu_id;
4417         if (cpu_migrate(cpu)) {
4418                 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
4419                 return -1;
4420         }
4421
4422         if (tcc_activation_temp_override != 0) {
4423                 tcc_activation_temp = tcc_activation_temp_override;
4424                 fprintf(outf, "cpu%d: Using cmdline TCC Target (%d C)\n",
4425                         cpu, tcc_activation_temp);
4426                 return 0;
4427         }
4428
4429         /* Temperature Target MSR is Nehalem and newer only */
4430         if (!do_nhm_platform_info)
4431                 goto guess;
4432
4433         if (get_msr(base_cpu, MSR_IA32_TEMPERATURE_TARGET, &msr))
4434                 goto guess;
4435
4436         target_c_local = (msr >> 16) & 0xFF;
4437
4438         if (!quiet)
4439                 fprintf(outf, "cpu%d: MSR_IA32_TEMPERATURE_TARGET: 0x%08llx (%d C)\n",
4440                         cpu, msr, target_c_local);
4441
4442         if (!target_c_local)
4443                 goto guess;
4444
4445         tcc_activation_temp = target_c_local;
4446
4447         return 0;
4448
4449 guess:
4450         tcc_activation_temp = TJMAX_DEFAULT;
4451         fprintf(outf, "cpu%d: Guessing tjMax %d C, Please use -T to specify\n",
4452                 cpu, tcc_activation_temp);
4453
4454         return 0;
4455 }
4456
4457 void decode_feature_control_msr(void)
4458 {
4459         unsigned long long msr;
4460
4461         if (!get_msr(base_cpu, MSR_IA32_FEATURE_CONTROL, &msr))
4462                 fprintf(outf, "cpu%d: MSR_IA32_FEATURE_CONTROL: 0x%08llx (%sLocked %s)\n",
4463                         base_cpu, msr,
4464                         msr & FEATURE_CONTROL_LOCKED ? "" : "UN-",
4465                         msr & (1 << 18) ? "SGX" : "");
4466 }
4467
4468 void decode_misc_enable_msr(void)
4469 {
4470         unsigned long long msr;
4471
4472         if (!genuine_intel)
4473                 return;
4474
4475         if (!get_msr(base_cpu, MSR_IA32_MISC_ENABLE, &msr))
4476                 fprintf(outf, "cpu%d: MSR_IA32_MISC_ENABLE: 0x%08llx (%sTCC %sEIST %sMWAIT %sPREFETCH %sTURBO)\n",
4477                         base_cpu, msr,
4478                         msr & MSR_IA32_MISC_ENABLE_TM1 ? "" : "No-",
4479                         msr & MSR_IA32_MISC_ENABLE_ENHANCED_SPEEDSTEP ? "" : "No-",
4480                         msr & MSR_IA32_MISC_ENABLE_MWAIT ? "" : "No-",
4481                         msr & MSR_IA32_MISC_ENABLE_PREFETCH_DISABLE ? "No-" : "",
4482                         msr & MSR_IA32_MISC_ENABLE_TURBO_DISABLE ? "No-" : "");
4483 }
4484
4485 void decode_misc_feature_control(void)
4486 {
4487         unsigned long long msr;
4488
4489         if (!has_misc_feature_control)
4490                 return;
4491
4492         if (!get_msr(base_cpu, MSR_MISC_FEATURE_CONTROL, &msr))
4493                 fprintf(outf, "cpu%d: MSR_MISC_FEATURE_CONTROL: 0x%08llx (%sL2-Prefetch %sL2-Prefetch-pair %sL1-Prefetch %sL1-IP-Prefetch)\n",
4494                         base_cpu, msr,
4495                         msr & (0 << 0) ? "No-" : "",
4496                         msr & (1 << 0) ? "No-" : "",
4497                         msr & (2 << 0) ? "No-" : "",
4498                         msr & (3 << 0) ? "No-" : "");
4499 }
4500 /*
4501  * Decode MSR_MISC_PWR_MGMT
4502  *
4503  * Decode the bits according to the Nehalem documentation
4504  * bit[0] seems to continue to have same meaning going forward
4505  * bit[1] less so...
4506  */
4507 void decode_misc_pwr_mgmt_msr(void)
4508 {
4509         unsigned long long msr;
4510
4511         if (!do_nhm_platform_info)
4512                 return;
4513
4514         if (no_MSR_MISC_PWR_MGMT)
4515                 return;
4516
4517         if (!get_msr(base_cpu, MSR_MISC_PWR_MGMT, &msr))
4518                 fprintf(outf, "cpu%d: MSR_MISC_PWR_MGMT: 0x%08llx (%sable-EIST_Coordination %sable-EPB %sable-OOB)\n",
4519                         base_cpu, msr,
4520                         msr & (1 << 0) ? "DIS" : "EN",
4521                         msr & (1 << 1) ? "EN" : "DIS",
4522                         msr & (1 << 8) ? "EN" : "DIS");
4523 }
4524 /*
4525  * Decode MSR_CC6_DEMOTION_POLICY_CONFIG, MSR_MC6_DEMOTION_POLICY_CONFIG
4526  *
4527  * This MSRs are present on Silvermont processors,
4528  * Intel Atom processor E3000 series (Baytrail), and friends.
4529  */
4530 void decode_c6_demotion_policy_msr(void)
4531 {
4532         unsigned long long msr;
4533
4534         if (!get_msr(base_cpu, MSR_CC6_DEMOTION_POLICY_CONFIG, &msr))
4535                 fprintf(outf, "cpu%d: MSR_CC6_DEMOTION_POLICY_CONFIG: 0x%08llx (%sable-CC6-Demotion)\n",
4536                         base_cpu, msr, msr & (1 << 0) ? "EN" : "DIS");
4537
4538         if (!get_msr(base_cpu, MSR_MC6_DEMOTION_POLICY_CONFIG, &msr))
4539                 fprintf(outf, "cpu%d: MSR_MC6_DEMOTION_POLICY_CONFIG: 0x%08llx (%sable-MC6-Demotion)\n",
4540                         base_cpu, msr, msr & (1 << 0) ? "EN" : "DIS");
4541 }
4542
4543 /*
4544  * When models are the same, for the purpose of turbostat, reuse
4545  */
4546 unsigned int intel_model_duplicates(unsigned int model)
4547 {
4548
4549         switch(model) {
4550         case INTEL_FAM6_NEHALEM_EP:     /* Core i7, Xeon 5500 series - Bloomfield, Gainstown NHM-EP */
4551         case INTEL_FAM6_NEHALEM:        /* Core i7 and i5 Processor - Clarksfield, Lynnfield, Jasper Forest */
4552         case 0x1F:      /* Core i7 and i5 Processor - Nehalem */
4553         case INTEL_FAM6_WESTMERE:       /* Westmere Client - Clarkdale, Arrandale */
4554         case INTEL_FAM6_WESTMERE_EP:    /* Westmere EP - Gulftown */
4555                 return INTEL_FAM6_NEHALEM;
4556
4557         case INTEL_FAM6_NEHALEM_EX:     /* Nehalem-EX Xeon - Beckton */
4558         case INTEL_FAM6_WESTMERE_EX:    /* Westmere-EX Xeon - Eagleton */
4559                 return INTEL_FAM6_NEHALEM_EX;
4560
4561         case INTEL_FAM6_XEON_PHI_KNM:
4562                 return INTEL_FAM6_XEON_PHI_KNL;
4563
4564         case INTEL_FAM6_HASWELL_ULT:
4565                 return INTEL_FAM6_HASWELL_CORE;
4566
4567         case INTEL_FAM6_BROADWELL_X:
4568         case INTEL_FAM6_BROADWELL_XEON_D:       /* BDX-DE */
4569                 return INTEL_FAM6_BROADWELL_X;
4570
4571         case INTEL_FAM6_SKYLAKE_MOBILE:
4572         case INTEL_FAM6_SKYLAKE_DESKTOP:
4573         case INTEL_FAM6_KABYLAKE_MOBILE:
4574         case INTEL_FAM6_KABYLAKE_DESKTOP:
4575                 return INTEL_FAM6_SKYLAKE_MOBILE;
4576
4577         case INTEL_FAM6_ICELAKE_MOBILE:
4578                 return INTEL_FAM6_CANNONLAKE_MOBILE;
4579         }
4580         return model;
4581 }
4582 void process_cpuid()
4583 {
4584         unsigned int eax, ebx, ecx, edx;
4585         unsigned int fms, family, model, stepping, ecx_flags, edx_flags;
4586         unsigned int has_turbo;
4587
4588         eax = ebx = ecx = edx = 0;
4589
4590         __cpuid(0, max_level, ebx, ecx, edx);
4591
4592         if (ebx == 0x756e6547 && ecx == 0x6c65746e && edx == 0x49656e69)
4593                 genuine_intel = 1;
4594         else if (ebx == 0x68747541 && ecx == 0x444d4163 && edx == 0x69746e65)
4595                 authentic_amd = 1;
4596
4597         if (!quiet)
4598                 fprintf(outf, "CPUID(0): %.4s%.4s%.4s ",
4599                         (char *)&ebx, (char *)&edx, (char *)&ecx);
4600
4601         __cpuid(1, fms, ebx, ecx, edx);
4602         family = (fms >> 8) & 0xf;
4603         model = (fms >> 4) & 0xf;
4604         stepping = fms & 0xf;
4605         if (family == 0xf)
4606                 family += (fms >> 20) & 0xff;
4607         if (family >= 6)
4608                 model += ((fms >> 16) & 0xf) << 4;
4609         ecx_flags = ecx;
4610         edx_flags = edx;
4611
4612         /*
4613          * check max extended function levels of CPUID.
4614          * This is needed to check for invariant TSC.
4615          * This check is valid for both Intel and AMD.
4616          */
4617         ebx = ecx = edx = 0;
4618         __cpuid(0x80000000, max_extended_level, ebx, ecx, edx);
4619
4620         if (!quiet) {
4621                 fprintf(outf, "0x%x CPUID levels; 0x%x xlevels; family:model:stepping 0x%x:%x:%x (%d:%d:%d)\n",
4622                         max_level, max_extended_level, family, model, stepping, family, model, stepping);
4623                 fprintf(outf, "CPUID(1): %s %s %s %s %s %s %s %s %s %s\n",
4624                         ecx_flags & (1 << 0) ? "SSE3" : "-",
4625                         ecx_flags & (1 << 3) ? "MONITOR" : "-",
4626                         ecx_flags & (1 << 6) ? "SMX" : "-",
4627                         ecx_flags & (1 << 7) ? "EIST" : "-",
4628                         ecx_flags & (1 << 8) ? "TM2" : "-",
4629                         edx_flags & (1 << 4) ? "TSC" : "-",
4630                         edx_flags & (1 << 5) ? "MSR" : "-",
4631                         edx_flags & (1 << 22) ? "ACPI-TM" : "-",
4632                         edx_flags & (1 << 28) ? "HT" : "-",
4633                         edx_flags & (1 << 29) ? "TM" : "-");
4634         }
4635         if (genuine_intel)
4636                 model = intel_model_duplicates(model);
4637
4638         if (!(edx_flags & (1 << 5)))
4639                 errx(1, "CPUID: no MSR");
4640
4641         if (max_extended_level >= 0x80000007) {
4642
4643                 /*
4644                  * Non-Stop TSC is advertised by CPUID.EAX=0x80000007: EDX.bit8
4645                  * this check is valid for both Intel and AMD
4646                  */
4647                 __cpuid(0x80000007, eax, ebx, ecx, edx);
4648                 has_invariant_tsc = edx & (1 << 8);
4649         }
4650
4651         /*
4652          * APERF/MPERF is advertised by CPUID.EAX=0x6: ECX.bit0
4653          * this check is valid for both Intel and AMD
4654          */
4655
4656         __cpuid(0x6, eax, ebx, ecx, edx);
4657         has_aperf = ecx & (1 << 0);
4658         if (has_aperf) {
4659                 BIC_PRESENT(BIC_Avg_MHz);
4660                 BIC_PRESENT(BIC_Busy);
4661                 BIC_PRESENT(BIC_Bzy_MHz);
4662         }
4663         do_dts = eax & (1 << 0);
4664         if (do_dts)
4665                 BIC_PRESENT(BIC_CoreTmp);
4666         has_turbo = eax & (1 << 1);
4667         do_ptm = eax & (1 << 6);
4668         if (do_ptm)
4669                 BIC_PRESENT(BIC_PkgTmp);
4670         has_hwp = eax & (1 << 7);
4671         has_hwp_notify = eax & (1 << 8);
4672         has_hwp_activity_window = eax & (1 << 9);
4673         has_hwp_epp = eax & (1 << 10);
4674         has_hwp_pkg = eax & (1 << 11);
4675         has_epb = ecx & (1 << 3);
4676
4677         if (!quiet)
4678                 fprintf(outf, "CPUID(6): %sAPERF, %sTURBO, %sDTS, %sPTM, %sHWP, "
4679                         "%sHWPnotify, %sHWPwindow, %sHWPepp, %sHWPpkg, %sEPB\n",
4680                         has_aperf ? "" : "No-",
4681                         has_turbo ? "" : "No-",
4682                         do_dts ? "" : "No-",
4683                         do_ptm ? "" : "No-",
4684                         has_hwp ? "" : "No-",
4685                         has_hwp_notify ? "" : "No-",
4686                         has_hwp_activity_window ? "" : "No-",
4687                         has_hwp_epp ? "" : "No-",
4688                         has_hwp_pkg ? "" : "No-",
4689                         has_epb ? "" : "No-");
4690
4691         if (!quiet)
4692                 decode_misc_enable_msr();
4693
4694
4695         if (max_level >= 0x7 && !quiet) {
4696                 int has_sgx;
4697
4698                 ecx = 0;
4699
4700                 __cpuid_count(0x7, 0, eax, ebx, ecx, edx);
4701
4702                 has_sgx = ebx & (1 << 2);
4703                 fprintf(outf, "CPUID(7): %sSGX\n", has_sgx ? "" : "No-");
4704
4705                 if (has_sgx)
4706                         decode_feature_control_msr();
4707         }
4708
4709         if (max_level >= 0x15) {
4710                 unsigned int eax_crystal;
4711                 unsigned int ebx_tsc;
4712
4713                 /*
4714                  * CPUID 15H TSC/Crystal ratio, possibly Crystal Hz
4715                  */
4716                 eax_crystal = ebx_tsc = crystal_hz = edx = 0;
4717                 __cpuid(0x15, eax_crystal, ebx_tsc, crystal_hz, edx);
4718
4719                 if (ebx_tsc != 0) {
4720
4721                         if (!quiet && (ebx != 0))
4722                                 fprintf(outf, "CPUID(0x15): eax_crystal: %d ebx_tsc: %d ecx_crystal_hz: %d\n",
4723                                         eax_crystal, ebx_tsc, crystal_hz);
4724
4725                         if (crystal_hz == 0)
4726                                 switch(model) {
4727                                 case INTEL_FAM6_SKYLAKE_MOBILE: /* SKL */
4728                                         crystal_hz = 24000000;  /* 24.0 MHz */
4729                                         break;
4730                                 case INTEL_FAM6_ATOM_GOLDMONT_X:        /* DNV */
4731                                         crystal_hz = 25000000;  /* 25.0 MHz */
4732                                         break;
4733                                 case INTEL_FAM6_ATOM_GOLDMONT:  /* BXT */
4734                                 case INTEL_FAM6_ATOM_GOLDMONT_PLUS:
4735                                         crystal_hz = 19200000;  /* 19.2 MHz */
4736                                         break;
4737                                 default:
4738                                         crystal_hz = 0;
4739                         }
4740
4741                         if (crystal_hz) {
4742                                 tsc_hz =  (unsigned long long) crystal_hz * ebx_tsc / eax_crystal;
4743                                 if (!quiet)
4744                                         fprintf(outf, "TSC: %lld MHz (%d Hz * %d / %d / 1000000)\n",
4745                                                 tsc_hz / 1000000, crystal_hz, ebx_tsc,  eax_crystal);
4746                         }
4747                 }
4748         }
4749         if (max_level >= 0x16) {
4750                 unsigned int base_mhz, max_mhz, bus_mhz, edx;
4751
4752                 /*
4753                  * CPUID 16H Base MHz, Max MHz, Bus MHz
4754                  */
4755                 base_mhz = max_mhz = bus_mhz = edx = 0;
4756
4757                 __cpuid(0x16, base_mhz, max_mhz, bus_mhz, edx);
4758                 if (!quiet)
4759                         fprintf(outf, "CPUID(0x16): base_mhz: %d max_mhz: %d bus_mhz: %d\n",
4760                                 base_mhz, max_mhz, bus_mhz);
4761         }
4762
4763         if (has_aperf)
4764                 aperf_mperf_multiplier = get_aperf_mperf_multiplier(family, model);
4765
4766         BIC_PRESENT(BIC_IRQ);
4767         BIC_PRESENT(BIC_TSC_MHz);
4768
4769         if (probe_nhm_msrs(family, model)) {
4770                 do_nhm_platform_info = 1;
4771                 BIC_PRESENT(BIC_CPU_c1);
4772                 BIC_PRESENT(BIC_CPU_c3);
4773                 BIC_PRESENT(BIC_CPU_c6);
4774                 BIC_PRESENT(BIC_SMI);
4775         }
4776         do_snb_cstates = has_snb_msrs(family, model);
4777
4778         if (do_snb_cstates)
4779                 BIC_PRESENT(BIC_CPU_c7);
4780
4781         do_irtl_snb = has_snb_msrs(family, model);
4782         if (do_snb_cstates && (pkg_cstate_limit >= PCL__2))
4783                 BIC_PRESENT(BIC_Pkgpc2);
4784         if (pkg_cstate_limit >= PCL__3)
4785                 BIC_PRESENT(BIC_Pkgpc3);
4786         if (pkg_cstate_limit >= PCL__6)
4787                 BIC_PRESENT(BIC_Pkgpc6);
4788         if (do_snb_cstates && (pkg_cstate_limit >= PCL__7))
4789                 BIC_PRESENT(BIC_Pkgpc7);
4790         if (has_slv_msrs(family, model)) {
4791                 BIC_NOT_PRESENT(BIC_Pkgpc2);
4792                 BIC_NOT_PRESENT(BIC_Pkgpc3);
4793                 BIC_PRESENT(BIC_Pkgpc6);
4794                 BIC_NOT_PRESENT(BIC_Pkgpc7);
4795                 BIC_PRESENT(BIC_Mod_c6);
4796                 use_c1_residency_msr = 1;
4797         }
4798         if (is_dnv(family, model)) {
4799                 BIC_PRESENT(BIC_CPU_c1);
4800                 BIC_NOT_PRESENT(BIC_CPU_c3);
4801                 BIC_NOT_PRESENT(BIC_Pkgpc3);
4802                 BIC_NOT_PRESENT(BIC_CPU_c7);
4803                 BIC_NOT_PRESENT(BIC_Pkgpc7);
4804                 use_c1_residency_msr = 1;
4805         }
4806         if (is_skx(family, model)) {
4807                 BIC_NOT_PRESENT(BIC_CPU_c3);
4808                 BIC_NOT_PRESENT(BIC_Pkgpc3);
4809                 BIC_NOT_PRESENT(BIC_CPU_c7);
4810                 BIC_NOT_PRESENT(BIC_Pkgpc7);
4811         }
4812         if (is_bdx(family, model)) {
4813                 BIC_NOT_PRESENT(BIC_CPU_c7);
4814                 BIC_NOT_PRESENT(BIC_Pkgpc7);
4815         }
4816         if (has_hsw_msrs(family, model)) {
4817                 BIC_PRESENT(BIC_Pkgpc8);
4818                 BIC_PRESENT(BIC_Pkgpc9);
4819                 BIC_PRESENT(BIC_Pkgpc10);
4820         }
4821         do_irtl_hsw = has_hsw_msrs(family, model);
4822         if (has_skl_msrs(family, model)) {
4823                 BIC_PRESENT(BIC_Totl_c0);
4824                 BIC_PRESENT(BIC_Any_c0);
4825                 BIC_PRESENT(BIC_GFX_c0);
4826                 BIC_PRESENT(BIC_CPUGFX);
4827         }
4828         do_slm_cstates = is_slm(family, model);
4829         do_knl_cstates  = is_knl(family, model);
4830
4831         if (do_slm_cstates || do_knl_cstates || is_cnl(family, model))
4832                 BIC_NOT_PRESENT(BIC_CPU_c3);
4833
4834         if (!quiet)
4835                 decode_misc_pwr_mgmt_msr();
4836
4837         if (!quiet && has_slv_msrs(family, model))
4838                 decode_c6_demotion_policy_msr();
4839
4840         rapl_probe(family, model);
4841         perf_limit_reasons_probe(family, model);
4842         automatic_cstate_conversion_probe(family, model);
4843
4844         if (!quiet)
4845                 dump_cstate_pstate_config_info(family, model);
4846
4847         if (!quiet)
4848                 dump_sysfs_cstate_config();
4849         if (!quiet)
4850                 dump_sysfs_pstate_config();
4851
4852         if (has_skl_msrs(family, model))
4853                 calculate_tsc_tweak();
4854
4855         if (!access("/sys/class/drm/card0/power/rc6_residency_ms", R_OK))
4856                 BIC_PRESENT(BIC_GFX_rc6);
4857
4858         if (!access("/sys/class/graphics/fb0/device/drm/card0/gt_cur_freq_mhz", R_OK))
4859                 BIC_PRESENT(BIC_GFXMHz);
4860
4861         if (!access("/sys/devices/system/cpu/cpuidle/low_power_idle_cpu_residency_us", R_OK))
4862                 BIC_PRESENT(BIC_CPU_LPI);
4863         else
4864                 BIC_NOT_PRESENT(BIC_CPU_LPI);
4865
4866         if (!access("/sys/devices/system/cpu/cpuidle/low_power_idle_system_residency_us", R_OK))
4867                 BIC_PRESENT(BIC_SYS_LPI);
4868         else
4869                 BIC_NOT_PRESENT(BIC_SYS_LPI);
4870
4871         if (!quiet)
4872                 decode_misc_feature_control();
4873
4874         return;
4875 }
4876
4877 /*
4878  * in /dev/cpu/ return success for names that are numbers
4879  * ie. filter out ".", "..", "microcode".
4880  */
4881 int dir_filter(const struct dirent *dirp)
4882 {
4883         if (isdigit(dirp->d_name[0]))
4884                 return 1;
4885         else
4886                 return 0;
4887 }
4888
4889 int open_dev_cpu_msr(int dummy1)
4890 {
4891         return 0;
4892 }
4893
4894 void topology_probe()
4895 {
4896         int i;
4897         int max_core_id = 0;
4898         int max_package_id = 0;
4899         int max_die_id = 0;
4900         int max_siblings = 0;
4901
4902         /* Initialize num_cpus, max_cpu_num */
4903         set_max_cpu_num();
4904         topo.num_cpus = 0;
4905         for_all_proc_cpus(count_cpus);
4906         if (!summary_only && topo.num_cpus > 1)
4907                 BIC_PRESENT(BIC_CPU);
4908
4909         if (debug > 1)
4910                 fprintf(outf, "num_cpus %d max_cpu_num %d\n", topo.num_cpus, topo.max_cpu_num);
4911
4912         cpus = calloc(1, (topo.max_cpu_num  + 1) * sizeof(struct cpu_topology));
4913         if (cpus == NULL)
4914                 err(1, "calloc cpus");
4915
4916         /*
4917          * Allocate and initialize cpu_present_set
4918          */
4919         cpu_present_set = CPU_ALLOC((topo.max_cpu_num + 1));
4920         if (cpu_present_set == NULL)
4921                 err(3, "CPU_ALLOC");
4922         cpu_present_setsize = CPU_ALLOC_SIZE((topo.max_cpu_num + 1));
4923         CPU_ZERO_S(cpu_present_setsize, cpu_present_set);
4924         for_all_proc_cpus(mark_cpu_present);
4925
4926         /*
4927          * Validate that all cpus in cpu_subset are also in cpu_present_set
4928          */
4929         for (i = 0; i < CPU_SUBSET_MAXCPUS; ++i) {
4930                 if (CPU_ISSET_S(i, cpu_subset_size, cpu_subset))
4931                         if (!CPU_ISSET_S(i, cpu_present_setsize, cpu_present_set))
4932                                 err(1, "cpu%d not present", i);
4933         }
4934
4935         /*
4936          * Allocate and initialize cpu_affinity_set
4937          */
4938         cpu_affinity_set = CPU_ALLOC((topo.max_cpu_num + 1));
4939         if (cpu_affinity_set == NULL)
4940                 err(3, "CPU_ALLOC");
4941         cpu_affinity_setsize = CPU_ALLOC_SIZE((topo.max_cpu_num + 1));
4942         CPU_ZERO_S(cpu_affinity_setsize, cpu_affinity_set);
4943
4944         for_all_proc_cpus(init_thread_id);
4945
4946         /*
4947          * For online cpus
4948          * find max_core_id, max_package_id
4949          */
4950         for (i = 0; i <= topo.max_cpu_num; ++i) {
4951                 int siblings;
4952
4953                 if (cpu_is_not_present(i)) {
4954                         if (debug > 1)
4955                                 fprintf(outf, "cpu%d NOT PRESENT\n", i);
4956                         continue;
4957                 }
4958
4959                 cpus[i].logical_cpu_id = i;
4960
4961                 /* get package information */
4962                 cpus[i].physical_package_id = get_physical_package_id(i);
4963                 if (cpus[i].physical_package_id > max_package_id)
4964                         max_package_id = cpus[i].physical_package_id;
4965
4966                 /* get die information */
4967                 cpus[i].die_id = get_die_id(i);
4968                 if (cpus[i].die_id > max_die_id)
4969                         max_die_id = cpus[i].die_id;
4970
4971                 /* get numa node information */
4972                 cpus[i].physical_node_id = get_physical_node_id(&cpus[i]);
4973                 if (cpus[i].physical_node_id > topo.max_node_num)
4974                         topo.max_node_num = cpus[i].physical_node_id;
4975
4976                 /* get core information */
4977                 cpus[i].physical_core_id = get_core_id(i);
4978                 if (cpus[i].physical_core_id > max_core_id)
4979                         max_core_id = cpus[i].physical_core_id;
4980
4981                 /* get thread information */
4982                 siblings = get_thread_siblings(&cpus[i]);
4983                 if (siblings > max_siblings)
4984                         max_siblings = siblings;
4985                 if (cpus[i].thread_id == 0)
4986                         topo.num_cores++;
4987         }
4988
4989         topo.cores_per_node = max_core_id + 1;
4990         if (debug > 1)
4991                 fprintf(outf, "max_core_id %d, sizing for %d cores per package\n",
4992                         max_core_id, topo.cores_per_node);
4993         if (!summary_only && topo.cores_per_node > 1)
4994                 BIC_PRESENT(BIC_Core);
4995
4996         topo.num_die = max_die_id + 1;
4997         if (debug > 1)
4998                 fprintf(outf, "max_die_id %d, sizing for %d die\n",
4999                                 max_die_id, topo.num_die);
5000         if (!summary_only && topo.num_die > 1)
5001                 BIC_PRESENT(BIC_Die);
5002
5003         topo.num_packages = max_package_id + 1;
5004         if (debug > 1)
5005                 fprintf(outf, "max_package_id %d, sizing for %d packages\n",
5006                         max_package_id, topo.num_packages);
5007         if (!summary_only && topo.num_packages > 1)
5008                 BIC_PRESENT(BIC_Package);
5009
5010         set_node_data();
5011         if (debug > 1)
5012                 fprintf(outf, "nodes_per_pkg %d\n", topo.nodes_per_pkg);
5013         if (!summary_only && topo.nodes_per_pkg > 1)
5014                 BIC_PRESENT(BIC_Node);
5015
5016         topo.threads_per_core = max_siblings;
5017         if (debug > 1)
5018                 fprintf(outf, "max_siblings %d\n", max_siblings);
5019
5020         if (debug < 1)
5021                 return;
5022
5023         for (i = 0; i <= topo.max_cpu_num; ++i) {
5024                 if (cpu_is_not_present(i))
5025                         continue;
5026                 fprintf(outf,
5027                         "cpu %d pkg %d die %d node %d lnode %d core %d thread %d\n",
5028                         i, cpus[i].physical_package_id, cpus[i].die_id,
5029                         cpus[i].physical_node_id,
5030                         cpus[i].logical_node_id,
5031                         cpus[i].physical_core_id,
5032                         cpus[i].thread_id);
5033         }
5034
5035 }
5036
5037 void
5038 allocate_counters(struct thread_data **t, struct core_data **c,
5039                   struct pkg_data **p)
5040 {
5041         int i;
5042         int num_cores = topo.cores_per_node * topo.nodes_per_pkg *
5043                         topo.num_packages;
5044         int num_threads = topo.threads_per_core * num_cores;
5045
5046         *t = calloc(num_threads, sizeof(struct thread_data));
5047         if (*t == NULL)
5048                 goto error;
5049
5050         for (i = 0; i < num_threads; i++)
5051                 (*t)[i].cpu_id = -1;
5052
5053         *c = calloc(num_cores, sizeof(struct core_data));
5054         if (*c == NULL)
5055                 goto error;
5056
5057         for (i = 0; i < num_cores; i++)
5058                 (*c)[i].core_id = -1;
5059
5060         *p = calloc(topo.num_packages, sizeof(struct pkg_data));
5061         if (*p == NULL)
5062                 goto error;
5063
5064         for (i = 0; i < topo.num_packages; i++)
5065                 (*p)[i].package_id = i;
5066
5067         return;
5068 error:
5069         err(1, "calloc counters");
5070 }
5071 /*
5072  * init_counter()
5073  *
5074  * set FIRST_THREAD_IN_CORE and FIRST_CORE_IN_PACKAGE
5075  */
5076 void init_counter(struct thread_data *thread_base, struct core_data *core_base,
5077         struct pkg_data *pkg_base, int cpu_id)
5078 {
5079         int pkg_id = cpus[cpu_id].physical_package_id;
5080         int node_id = cpus[cpu_id].logical_node_id;
5081         int core_id = cpus[cpu_id].physical_core_id;
5082         int thread_id = cpus[cpu_id].thread_id;
5083         struct thread_data *t;
5084         struct core_data *c;
5085         struct pkg_data *p;
5086
5087
5088         /* Workaround for systems where physical_node_id==-1
5089          * and logical_node_id==(-1 - topo.num_cpus)
5090          */
5091         if (node_id < 0)
5092                 node_id = 0;
5093
5094         t = GET_THREAD(thread_base, thread_id, core_id, node_id, pkg_id);
5095         c = GET_CORE(core_base, core_id, node_id, pkg_id);
5096         p = GET_PKG(pkg_base, pkg_id);
5097
5098         t->cpu_id = cpu_id;
5099         if (thread_id == 0) {
5100                 t->flags |= CPU_IS_FIRST_THREAD_IN_CORE;
5101                 if (cpu_is_first_core_in_package(cpu_id))
5102                         t->flags |= CPU_IS_FIRST_CORE_IN_PACKAGE;
5103         }
5104
5105         c->core_id = core_id;
5106         p->package_id = pkg_id;
5107 }
5108
5109
5110 int initialize_counters(int cpu_id)
5111 {
5112         init_counter(EVEN_COUNTERS, cpu_id);
5113         init_counter(ODD_COUNTERS, cpu_id);
5114         return 0;
5115 }
5116
5117 void allocate_output_buffer()
5118 {
5119         output_buffer = calloc(1, (1 + topo.num_cpus) * 1024);
5120         outp = output_buffer;
5121         if (outp == NULL)
5122                 err(-1, "calloc output buffer");
5123 }
5124 void allocate_fd_percpu(void)
5125 {
5126         fd_percpu = calloc(topo.max_cpu_num + 1, sizeof(int));
5127         if (fd_percpu == NULL)
5128                 err(-1, "calloc fd_percpu");
5129 }
5130 void allocate_irq_buffers(void)
5131 {
5132         irq_column_2_cpu = calloc(topo.num_cpus, sizeof(int));
5133         if (irq_column_2_cpu == NULL)
5134                 err(-1, "calloc %d", topo.num_cpus);
5135
5136         irqs_per_cpu = calloc(topo.max_cpu_num + 1, sizeof(int));
5137         if (irqs_per_cpu == NULL)
5138                 err(-1, "calloc %d", topo.max_cpu_num + 1);
5139 }
5140 void setup_all_buffers(void)
5141 {
5142         topology_probe();
5143         allocate_irq_buffers();
5144         allocate_fd_percpu();
5145         allocate_counters(&thread_even, &core_even, &package_even);
5146         allocate_counters(&thread_odd, &core_odd, &package_odd);
5147         allocate_output_buffer();
5148         for_all_proc_cpus(initialize_counters);
5149 }
5150
5151 void set_base_cpu(void)
5152 {
5153         base_cpu = sched_getcpu();
5154         if (base_cpu < 0)
5155                 err(-ENODEV, "No valid cpus found");
5156
5157         if (debug > 1)
5158                 fprintf(outf, "base_cpu = %d\n", base_cpu);
5159 }
5160
5161 void turbostat_init()
5162 {
5163         setup_all_buffers();
5164         set_base_cpu();
5165         check_dev_msr();
5166         check_permissions();
5167         process_cpuid();
5168
5169
5170         if (!quiet)
5171                 for_all_cpus(print_hwp, ODD_COUNTERS);
5172
5173         if (!quiet)
5174                 for_all_cpus(print_epb, ODD_COUNTERS);
5175
5176         if (!quiet)
5177                 for_all_cpus(print_perf_limit, ODD_COUNTERS);
5178
5179         if (!quiet)
5180                 for_all_cpus(print_rapl, ODD_COUNTERS);
5181
5182         for_all_cpus(set_temperature_target, ODD_COUNTERS);
5183
5184         if (!quiet)
5185                 for_all_cpus(print_thermal, ODD_COUNTERS);
5186
5187         if (!quiet && do_irtl_snb)
5188                 print_irtl();
5189 }
5190
5191 int fork_it(char **argv)
5192 {
5193         pid_t child_pid;
5194         int status;
5195
5196         snapshot_proc_sysfs_files();
5197         status = for_all_cpus(get_counters, EVEN_COUNTERS);
5198         first_counter_read = 0;
5199         if (status)
5200                 exit(status);
5201         /* clear affinity side-effect of get_counters() */
5202         sched_setaffinity(0, cpu_present_setsize, cpu_present_set);
5203         gettimeofday(&tv_even, (struct timezone *)NULL);
5204
5205         child_pid = fork();
5206         if (!child_pid) {
5207                 /* child */
5208                 execvp(argv[0], argv);
5209                 err(errno, "exec %s", argv[0]);
5210         } else {
5211
5212                 /* parent */
5213                 if (child_pid == -1)
5214                         err(1, "fork");
5215
5216                 signal(SIGINT, SIG_IGN);
5217                 signal(SIGQUIT, SIG_IGN);
5218                 if (waitpid(child_pid, &status, 0) == -1)
5219                         err(status, "waitpid");
5220         }
5221         /*
5222          * n.b. fork_it() does not check for errors from for_all_cpus()
5223          * because re-starting is problematic when forking
5224          */
5225         snapshot_proc_sysfs_files();
5226         for_all_cpus(get_counters, ODD_COUNTERS);
5227         gettimeofday(&tv_odd, (struct timezone *)NULL);
5228         timersub(&tv_odd, &tv_even, &tv_delta);
5229         if (for_all_cpus_2(delta_cpu, ODD_COUNTERS, EVEN_COUNTERS))
5230                 fprintf(outf, "%s: Counter reset detected\n", progname);
5231         else {
5232                 compute_average(EVEN_COUNTERS);
5233                 format_all_counters(EVEN_COUNTERS);
5234         }
5235
5236         fprintf(outf, "%.6f sec\n", tv_delta.tv_sec + tv_delta.tv_usec/1000000.0);
5237
5238         flush_output_stderr();
5239
5240         return status;
5241 }
5242
5243 int get_and_dump_counters(void)
5244 {
5245         int status;
5246
5247         snapshot_proc_sysfs_files();
5248         status = for_all_cpus(get_counters, ODD_COUNTERS);
5249         if (status)
5250                 return status;
5251
5252         status = for_all_cpus(dump_counters, ODD_COUNTERS);
5253         if (status)
5254                 return status;
5255
5256         flush_output_stdout();
5257
5258         return status;
5259 }
5260
5261 void print_version() {
5262         fprintf(outf, "turbostat version 18.07.27"
5263                 " - Len Brown <lenb@kernel.org>\n");
5264 }
5265
5266 int add_counter(unsigned int msr_num, char *path, char *name,
5267         unsigned int width, enum counter_scope scope,
5268         enum counter_type type, enum counter_format format, int flags)
5269 {
5270         struct msr_counter *msrp;
5271
5272         msrp = calloc(1, sizeof(struct msr_counter));
5273         if (msrp == NULL) {
5274                 perror("calloc");
5275                 exit(1);
5276         }
5277
5278         msrp->msr_num = msr_num;
5279         strncpy(msrp->name, name, NAME_BYTES);
5280         if (path)
5281                 strncpy(msrp->path, path, PATH_BYTES);
5282         msrp->width = width;
5283         msrp->type = type;
5284         msrp->format = format;
5285         msrp->flags = flags;
5286
5287         switch (scope) {
5288
5289         case SCOPE_CPU:
5290                 msrp->next = sys.tp;
5291                 sys.tp = msrp;
5292                 sys.added_thread_counters++;
5293                 if (sys.added_thread_counters > MAX_ADDED_THREAD_COUNTERS) {
5294                         fprintf(stderr, "exceeded max %d added thread counters\n",
5295                                 MAX_ADDED_COUNTERS);
5296                         exit(-1);
5297                 }
5298                 break;
5299
5300         case SCOPE_CORE:
5301                 msrp->next = sys.cp;
5302                 sys.cp = msrp;
5303                 sys.added_core_counters++;
5304                 if (sys.added_core_counters > MAX_ADDED_COUNTERS) {
5305                         fprintf(stderr, "exceeded max %d added core counters\n",
5306                                 MAX_ADDED_COUNTERS);
5307                         exit(-1);
5308                 }
5309                 break;
5310
5311         case SCOPE_PACKAGE:
5312                 msrp->next = sys.pp;
5313                 sys.pp = msrp;
5314                 sys.added_package_counters++;
5315                 if (sys.added_package_counters > MAX_ADDED_COUNTERS) {
5316                         fprintf(stderr, "exceeded max %d added package counters\n",
5317                                 MAX_ADDED_COUNTERS);
5318                         exit(-1);
5319                 }
5320                 break;
5321         }
5322
5323         return 0;
5324 }
5325
5326 void parse_add_command(char *add_command)
5327 {
5328         int msr_num = 0;
5329         char *path = NULL;
5330         char name_buffer[NAME_BYTES] = "";
5331         int width = 64;
5332         int fail = 0;
5333         enum counter_scope scope = SCOPE_CPU;
5334         enum counter_type type = COUNTER_CYCLES;
5335         enum counter_format format = FORMAT_DELTA;
5336
5337         while (add_command) {
5338
5339                 if (sscanf(add_command, "msr0x%x", &msr_num) == 1)
5340                         goto next;
5341
5342                 if (sscanf(add_command, "msr%d", &msr_num) == 1)
5343                         goto next;
5344
5345                 if (*add_command == '/') {
5346                         path = add_command;
5347                         goto next;
5348                 }
5349
5350                 if (sscanf(add_command, "u%d", &width) == 1) {
5351                         if ((width == 32) || (width == 64))
5352                                 goto next;
5353                         width = 64;
5354                 }
5355                 if (!strncmp(add_command, "cpu", strlen("cpu"))) {
5356                         scope = SCOPE_CPU;
5357                         goto next;
5358                 }
5359                 if (!strncmp(add_command, "core", strlen("core"))) {
5360                         scope = SCOPE_CORE;
5361                         goto next;
5362                 }
5363                 if (!strncmp(add_command, "package", strlen("package"))) {
5364                         scope = SCOPE_PACKAGE;
5365                         goto next;
5366                 }
5367                 if (!strncmp(add_command, "cycles", strlen("cycles"))) {
5368                         type = COUNTER_CYCLES;
5369                         goto next;
5370                 }
5371                 if (!strncmp(add_command, "seconds", strlen("seconds"))) {
5372                         type = COUNTER_SECONDS;
5373                         goto next;
5374                 }
5375                 if (!strncmp(add_command, "usec", strlen("usec"))) {
5376                         type = COUNTER_USEC;
5377                         goto next;
5378                 }
5379                 if (!strncmp(add_command, "raw", strlen("raw"))) {
5380                         format = FORMAT_RAW;
5381                         goto next;
5382                 }
5383                 if (!strncmp(add_command, "delta", strlen("delta"))) {
5384                         format = FORMAT_DELTA;
5385                         goto next;
5386                 }
5387                 if (!strncmp(add_command, "percent", strlen("percent"))) {
5388                         format = FORMAT_PERCENT;
5389                         goto next;
5390                 }
5391
5392                 if (sscanf(add_command, "%18s,%*s", name_buffer) == 1) {        /* 18 < NAME_BYTES */
5393                         char *eos;
5394
5395                         eos = strchr(name_buffer, ',');
5396                         if (eos)
5397                                 *eos = '\0';
5398                         goto next;
5399                 }
5400
5401 next:
5402                 add_command = strchr(add_command, ',');
5403                 if (add_command) {
5404                         *add_command = '\0';
5405                         add_command++;
5406                 }
5407
5408         }
5409         if ((msr_num == 0) && (path == NULL)) {
5410                 fprintf(stderr, "--add: (msrDDD | msr0xXXX | /path_to_counter ) required\n");
5411                 fail++;
5412         }
5413
5414         /* generate default column header */
5415         if (*name_buffer == '\0') {
5416                 if (width == 32)
5417                         sprintf(name_buffer, "M0x%x%s", msr_num, format == FORMAT_PERCENT ? "%" : "");
5418                 else
5419                         sprintf(name_buffer, "M0X%x%s", msr_num, format == FORMAT_PERCENT ? "%" : "");
5420         }
5421
5422         if (add_counter(msr_num, path, name_buffer, width, scope, type, format, 0))
5423                 fail++;
5424
5425         if (fail) {
5426                 help();
5427                 exit(1);
5428         }
5429 }
5430
5431 int is_deferred_skip(char *name)
5432 {
5433         int i;
5434
5435         for (i = 0; i < deferred_skip_index; ++i)
5436                 if (!strcmp(name, deferred_skip_names[i]))
5437                         return 1;
5438         return 0;
5439 }
5440
5441 void probe_sysfs(void)
5442 {
5443         char path[64];
5444         char name_buf[16];
5445         FILE *input;
5446         int state;
5447         char *sp;
5448
5449         if (!DO_BIC(BIC_sysfs))
5450                 return;
5451
5452         for (state = 10; state >= 0; --state) {
5453
5454                 sprintf(path, "/sys/devices/system/cpu/cpu%d/cpuidle/state%d/name",
5455                         base_cpu, state);
5456                 input = fopen(path, "r");
5457                 if (input == NULL)
5458                         continue;
5459                 fgets(name_buf, sizeof(name_buf), input);
5460
5461                  /* truncate "C1-HSW\n" to "C1", or truncate "C1\n" to "C1" */
5462                 sp = strchr(name_buf, '-');
5463                 if (!sp)
5464                         sp = strchrnul(name_buf, '\n');
5465                 *sp = '%';
5466                 *(sp + 1) = '\0';
5467
5468                 fclose(input);
5469
5470                 sprintf(path, "cpuidle/state%d/time", state);
5471
5472                 if (is_deferred_skip(name_buf))
5473                         continue;
5474
5475                 add_counter(0, path, name_buf, 64, SCOPE_CPU, COUNTER_USEC,
5476                                 FORMAT_PERCENT, SYSFS_PERCPU);
5477         }
5478
5479         for (state = 10; state >= 0; --state) {
5480
5481                 sprintf(path, "/sys/devices/system/cpu/cpu%d/cpuidle/state%d/name",
5482                         base_cpu, state);
5483                 input = fopen(path, "r");
5484                 if (input == NULL)
5485                         continue;
5486                 fgets(name_buf, sizeof(name_buf), input);
5487                  /* truncate "C1-HSW\n" to "C1", or truncate "C1\n" to "C1" */
5488                 sp = strchr(name_buf, '-');
5489                 if (!sp)
5490                         sp = strchrnul(name_buf, '\n');
5491                 *sp = '\0';
5492                 fclose(input);
5493
5494                 sprintf(path, "cpuidle/state%d/usage", state);
5495
5496                 if (is_deferred_skip(name_buf))
5497                         continue;
5498
5499                 add_counter(0, path, name_buf, 64, SCOPE_CPU, COUNTER_ITEMS,
5500                                 FORMAT_DELTA, SYSFS_PERCPU);
5501         }
5502
5503 }
5504
5505
5506 /*
5507  * parse cpuset with following syntax
5508  * 1,2,4..6,8-10 and set bits in cpu_subset
5509  */
5510 void parse_cpu_command(char *optarg)
5511 {
5512         unsigned int start, end;
5513         char *next;
5514
5515         if (!strcmp(optarg, "core")) {
5516                 if (cpu_subset)
5517                         goto error;
5518                 show_core_only++;
5519                 return;
5520         }
5521         if (!strcmp(optarg, "package")) {
5522                 if (cpu_subset)
5523                         goto error;
5524                 show_pkg_only++;
5525                 return;
5526         }
5527         if (show_core_only || show_pkg_only)
5528                 goto error;
5529
5530         cpu_subset = CPU_ALLOC(CPU_SUBSET_MAXCPUS);
5531         if (cpu_subset == NULL)
5532                 err(3, "CPU_ALLOC");
5533         cpu_subset_size = CPU_ALLOC_SIZE(CPU_SUBSET_MAXCPUS);
5534
5535         CPU_ZERO_S(cpu_subset_size, cpu_subset);
5536
5537         next = optarg;
5538
5539         while (next && *next) {
5540
5541                 if (*next == '-')       /* no negative cpu numbers */
5542                         goto error;
5543
5544                 start = strtoul(next, &next, 10);
5545
5546                 if (start >= CPU_SUBSET_MAXCPUS)
5547                         goto error;
5548                 CPU_SET_S(start, cpu_subset_size, cpu_subset);
5549
5550                 if (*next == '\0')
5551                         break;
5552
5553                 if (*next == ',') {
5554                         next += 1;
5555                         continue;
5556                 }
5557
5558                 if (*next == '-') {
5559                         next += 1;      /* start range */
5560                 } else if (*next == '.') {
5561                         next += 1;
5562                         if (*next == '.')
5563                                 next += 1;      /* start range */
5564                         else
5565                                 goto error;
5566                 }
5567
5568                 end = strtoul(next, &next, 10);
5569                 if (end <= start)
5570                         goto error;
5571
5572                 while (++start <= end) {
5573                         if (start >= CPU_SUBSET_MAXCPUS)
5574                                 goto error;
5575                         CPU_SET_S(start, cpu_subset_size, cpu_subset);
5576                 }
5577
5578                 if (*next == ',')
5579                         next += 1;
5580                 else if (*next != '\0')
5581                         goto error;
5582         }
5583
5584         return;
5585
5586 error:
5587         fprintf(stderr, "\"--cpu %s\" malformed\n", optarg);
5588         help();
5589         exit(-1);
5590 }
5591
5592
5593 void cmdline(int argc, char **argv)
5594 {
5595         int opt;
5596         int option_index = 0;
5597         static struct option long_options[] = {
5598                 {"add",         required_argument,      0, 'a'},
5599                 {"cpu",         required_argument,      0, 'c'},
5600                 {"Dump",        no_argument,            0, 'D'},
5601                 {"debug",       no_argument,            0, 'd'},        /* internal, not documented */
5602                 {"enable",      required_argument,      0, 'e'},
5603                 {"interval",    required_argument,      0, 'i'},
5604                 {"num_iterations",      required_argument,      0, 'n'},
5605                 {"help",        no_argument,            0, 'h'},
5606                 {"hide",        required_argument,      0, 'H'},        // meh, -h taken by --help
5607                 {"Joules",      no_argument,            0, 'J'},
5608                 {"list",        no_argument,            0, 'l'},
5609                 {"out",         required_argument,      0, 'o'},
5610                 {"quiet",       no_argument,            0, 'q'},
5611                 {"show",        required_argument,      0, 's'},
5612                 {"Summary",     no_argument,            0, 'S'},
5613                 {"TCC",         required_argument,      0, 'T'},
5614                 {"version",     no_argument,            0, 'v' },
5615                 {0,             0,                      0,  0 }
5616         };
5617
5618         progname = argv[0];
5619
5620         while ((opt = getopt_long_only(argc, argv, "+C:c:Dde:hi:Jn:o:qST:v",
5621                                 long_options, &option_index)) != -1) {
5622                 switch (opt) {
5623                 case 'a':
5624                         parse_add_command(optarg);
5625                         break;
5626                 case 'c':
5627                         parse_cpu_command(optarg);
5628                         break;
5629                 case 'D':
5630                         dump_only++;
5631                         break;
5632                 case 'e':
5633                         /* --enable specified counter */
5634                         bic_enabled = bic_enabled | bic_lookup(optarg, SHOW_LIST);
5635                         break;
5636                 case 'd':
5637                         debug++;
5638                         ENABLE_BIC(BIC_DISABLED_BY_DEFAULT);
5639                         break;
5640                 case 'H':
5641                         /*
5642                          * --hide: do not show those specified
5643                          *  multiple invocations simply clear more bits in enabled mask
5644                          */
5645                         bic_enabled &= ~bic_lookup(optarg, HIDE_LIST);
5646                         break;
5647                 case 'h':
5648                 default:
5649                         help();
5650                         exit(1);
5651                 case 'i':
5652                         {
5653                                 double interval = strtod(optarg, NULL);
5654
5655                                 if (interval < 0.001) {
5656                                         fprintf(outf, "interval %f seconds is too small\n",
5657                                                 interval);
5658                                         exit(2);
5659                                 }
5660
5661                                 interval_tv.tv_sec = interval_ts.tv_sec = interval;
5662                                 interval_tv.tv_usec = (interval - interval_tv.tv_sec) * 1000000;
5663                                 interval_ts.tv_nsec = (interval - interval_ts.tv_sec) * 1000000000;
5664                         }
5665                         break;
5666                 case 'J':
5667                         rapl_joules++;
5668                         break;
5669                 case 'l':
5670                         ENABLE_BIC(BIC_DISABLED_BY_DEFAULT);
5671                         list_header_only++;
5672                         quiet++;
5673                         break;
5674                 case 'o':
5675                         outf = fopen_or_die(optarg, "w");
5676                         break;
5677                 case 'q':
5678                         quiet = 1;
5679                         break;
5680                 case 'n':
5681                         num_iterations = strtod(optarg, NULL);
5682
5683                         if (num_iterations <= 0) {
5684                                 fprintf(outf, "iterations %d should be positive number\n",
5685                                         num_iterations);
5686                                 exit(2);
5687                         }
5688                         break;
5689                 case 's':
5690                         /*
5691                          * --show: show only those specified
5692                          *  The 1st invocation will clear and replace the enabled mask
5693                          *  subsequent invocations can add to it.
5694                          */
5695                         if (shown == 0)
5696                                 bic_enabled = bic_lookup(optarg, SHOW_LIST);
5697                         else
5698                                 bic_enabled |= bic_lookup(optarg, SHOW_LIST);
5699                         shown = 1;
5700                         break;
5701                 case 'S':
5702                         summary_only++;
5703                         break;
5704                 case 'T':
5705                         tcc_activation_temp_override = atoi(optarg);
5706                         break;
5707                 case 'v':
5708                         print_version();
5709                         exit(0);
5710                         break;
5711                 }
5712         }
5713 }
5714
5715 int main(int argc, char **argv)
5716 {
5717         outf = stderr;
5718         cmdline(argc, argv);
5719
5720         if (!quiet)
5721                 print_version();
5722
5723         probe_sysfs();
5724
5725         turbostat_init();
5726
5727         /* dump counters and exit */
5728         if (dump_only)
5729                 return get_and_dump_counters();
5730
5731         /* list header and exit */
5732         if (list_header_only) {
5733                 print_header(",");
5734                 flush_output_stdout();
5735                 return 0;
5736         }
5737
5738         /*
5739          * if any params left, it must be a command to fork
5740          */
5741         if (argc - optind)
5742                 return fork_it(argv + optind);
5743         else
5744                 turbostat_loop();
5745
5746         return 0;
5747 }