2 * turbostat -- show CPU frequency and C-state residency
3 * on modern Intel turbo-capable processors.
5 * Copyright (c) 2013 Intel Corporation.
6 * Len Brown <len.brown@intel.com>
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms and conditions of the GNU General Public License,
10 * version 2, as published by the Free Software Foundation.
12 * This program is distributed in the hope it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
28 #include <sys/types.h>
31 #include <sys/resource.h>
43 #include <linux/capability.h>
46 char *proc_stat = "/proc/stat";
49 struct timespec interval_ts = {5, 0};
51 unsigned int rapl_joules;
52 unsigned int summary_only;
53 unsigned int dump_only;
56 unsigned int do_nhm_cstates;
57 unsigned int do_snb_cstates;
58 unsigned int do_knl_cstates;
63 unsigned int do_c8_c9_c10;
64 unsigned int do_skl_residency;
65 unsigned int do_slm_cstates;
66 unsigned int use_c1_residency_msr;
67 unsigned int has_aperf;
69 unsigned int do_irtl_snb;
70 unsigned int do_irtl_hsw;
71 unsigned int units = 1000000; /* MHz etc */
72 unsigned int genuine_intel;
73 unsigned int has_invariant_tsc;
74 unsigned int do_nhm_platform_info;
75 unsigned int extra_msr_offset32;
76 unsigned int extra_msr_offset64;
77 unsigned int extra_delta_offset32;
78 unsigned int extra_delta_offset64;
79 unsigned int aperf_mperf_multiplier = 1;
84 unsigned int has_base_hz;
85 double tsc_tweak = 1.0;
86 unsigned int show_pkg;
87 unsigned int show_core;
88 unsigned int show_cpu;
89 unsigned int show_pkg_only;
90 unsigned int show_core_only;
91 char *output_buffer, *outp;
95 unsigned int do_gfx_rc6_ms;
96 unsigned long long gfx_cur_rc6_ms;
97 unsigned int do_gfx_mhz;
98 unsigned int gfx_cur_mhz;
99 unsigned int tcc_activation_temp;
100 unsigned int tcc_activation_temp_override;
101 double rapl_power_units, rapl_time_units;
102 double rapl_dram_energy_units, rapl_energy_units;
103 double rapl_joule_counter_range;
104 unsigned int do_core_perf_limit_reasons;
105 unsigned int do_gfx_perf_limit_reasons;
106 unsigned int do_ring_perf_limit_reasons;
107 unsigned int crystal_hz;
108 unsigned long long tsc_hz;
110 double discover_bclk(unsigned int family, unsigned int model);
111 unsigned int has_hwp; /* IA32_PM_ENABLE, IA32_HWP_CAPABILITIES */
112 /* IA32_HWP_REQUEST, IA32_HWP_STATUS */
113 unsigned int has_hwp_notify; /* IA32_HWP_INTERRUPT */
114 unsigned int has_hwp_activity_window; /* IA32_HWP_REQUEST[bits 41:32] */
115 unsigned int has_hwp_epp; /* IA32_HWP_REQUEST[bits 31:24] */
116 unsigned int has_hwp_pkg; /* IA32_HWP_REQUEST_PKG */
118 #define RAPL_PKG (1 << 0)
119 /* 0x610 MSR_PKG_POWER_LIMIT */
120 /* 0x611 MSR_PKG_ENERGY_STATUS */
121 #define RAPL_PKG_PERF_STATUS (1 << 1)
122 /* 0x613 MSR_PKG_PERF_STATUS */
123 #define RAPL_PKG_POWER_INFO (1 << 2)
124 /* 0x614 MSR_PKG_POWER_INFO */
126 #define RAPL_DRAM (1 << 3)
127 /* 0x618 MSR_DRAM_POWER_LIMIT */
128 /* 0x619 MSR_DRAM_ENERGY_STATUS */
129 #define RAPL_DRAM_PERF_STATUS (1 << 4)
130 /* 0x61b MSR_DRAM_PERF_STATUS */
131 #define RAPL_DRAM_POWER_INFO (1 << 5)
132 /* 0x61c MSR_DRAM_POWER_INFO */
134 #define RAPL_CORES (1 << 6)
135 /* 0x638 MSR_PP0_POWER_LIMIT */
136 /* 0x639 MSR_PP0_ENERGY_STATUS */
137 #define RAPL_CORE_POLICY (1 << 7)
138 /* 0x63a MSR_PP0_POLICY */
140 #define RAPL_GFX (1 << 8)
141 /* 0x640 MSR_PP1_POWER_LIMIT */
142 /* 0x641 MSR_PP1_ENERGY_STATUS */
143 /* 0x642 MSR_PP1_POLICY */
144 #define TJMAX_DEFAULT 100
146 #define MAX(a, b) ((a) > (b) ? (a) : (b))
148 int aperf_mperf_unstable;
152 cpu_set_t *cpu_present_set, *cpu_affinity_set;
153 size_t cpu_present_setsize, cpu_affinity_setsize;
156 unsigned long long tsc;
157 unsigned long long aperf;
158 unsigned long long mperf;
159 unsigned long long c1;
160 unsigned long long extra_msr64;
161 unsigned long long extra_delta64;
162 unsigned long long extra_msr32;
163 unsigned long long extra_delta32;
164 unsigned int irq_count;
165 unsigned int smi_count;
168 #define CPU_IS_FIRST_THREAD_IN_CORE 0x2
169 #define CPU_IS_FIRST_CORE_IN_PACKAGE 0x4
170 } *thread_even, *thread_odd;
173 unsigned long long c3;
174 unsigned long long c6;
175 unsigned long long c7;
176 unsigned int core_temp_c;
177 unsigned int core_id;
178 } *core_even, *core_odd;
181 unsigned long long pc2;
182 unsigned long long pc3;
183 unsigned long long pc6;
184 unsigned long long pc7;
185 unsigned long long pc8;
186 unsigned long long pc9;
187 unsigned long long pc10;
188 unsigned long long pkg_wtd_core_c0;
189 unsigned long long pkg_any_core_c0;
190 unsigned long long pkg_any_gfxe_c0;
191 unsigned long long pkg_both_core_gfxe_c0;
192 long long gfx_rc6_ms;
193 unsigned int gfx_mhz;
194 unsigned int package_id;
195 unsigned int energy_pkg; /* MSR_PKG_ENERGY_STATUS */
196 unsigned int energy_dram; /* MSR_DRAM_ENERGY_STATUS */
197 unsigned int energy_cores; /* MSR_PP0_ENERGY_STATUS */
198 unsigned int energy_gfx; /* MSR_PP1_ENERGY_STATUS */
199 unsigned int rapl_pkg_perf_status; /* MSR_PKG_PERF_STATUS */
200 unsigned int rapl_dram_perf_status; /* MSR_DRAM_PERF_STATUS */
201 unsigned int pkg_temp_c;
203 } *package_even, *package_odd;
205 #define ODD_COUNTERS thread_odd, core_odd, package_odd
206 #define EVEN_COUNTERS thread_even, core_even, package_even
208 #define GET_THREAD(thread_base, thread_no, core_no, pkg_no) \
209 (thread_base + (pkg_no) * topo.num_cores_per_pkg * \
210 topo.num_threads_per_core + \
211 (core_no) * topo.num_threads_per_core + (thread_no))
212 #define GET_CORE(core_base, core_no, pkg_no) \
213 (core_base + (pkg_no) * topo.num_cores_per_pkg + (core_no))
214 #define GET_PKG(pkg_base, pkg_no) (pkg_base + pkg_no)
216 struct system_summary {
217 struct thread_data threads;
218 struct core_data cores;
219 struct pkg_data packages;
228 int num_cores_per_pkg;
229 int num_threads_per_core;
232 struct timeval tv_even, tv_odd, tv_delta;
234 int *irq_column_2_cpu; /* /proc/interrupts column numbers */
235 int *irqs_per_cpu; /* indexed by cpu_num */
237 void setup_all_buffers(void);
239 int cpu_is_not_present(int cpu)
241 return !CPU_ISSET_S(cpu, cpu_present_setsize, cpu_present_set);
244 * run func(thread, core, package) in topology order
245 * skip non-present cpus
248 int for_all_cpus(int (func)(struct thread_data *, struct core_data *, struct pkg_data *),
249 struct thread_data *thread_base, struct core_data *core_base, struct pkg_data *pkg_base)
251 int retval, pkg_no, core_no, thread_no;
253 for (pkg_no = 0; pkg_no < topo.num_packages; ++pkg_no) {
254 for (core_no = 0; core_no < topo.num_cores_per_pkg; ++core_no) {
255 for (thread_no = 0; thread_no <
256 topo.num_threads_per_core; ++thread_no) {
257 struct thread_data *t;
261 t = GET_THREAD(thread_base, thread_no, core_no, pkg_no);
263 if (cpu_is_not_present(t->cpu_id))
266 c = GET_CORE(core_base, core_no, pkg_no);
267 p = GET_PKG(pkg_base, pkg_no);
269 retval = func(t, c, p);
278 int cpu_migrate(int cpu)
280 CPU_ZERO_S(cpu_affinity_setsize, cpu_affinity_set);
281 CPU_SET_S(cpu, cpu_affinity_setsize, cpu_affinity_set);
282 if (sched_setaffinity(0, cpu_affinity_setsize, cpu_affinity_set) == -1)
287 int get_msr_fd(int cpu)
297 sprintf(pathname, "/dev/cpu/%d/msr", cpu);
298 fd = open(pathname, O_RDONLY);
300 err(-1, "%s open failed, try chown or chmod +r /dev/cpu/*/msr, or run as root", pathname);
307 int get_msr(int cpu, off_t offset, unsigned long long *msr)
311 retval = pread(get_msr_fd(cpu), msr, sizeof(*msr), offset);
313 if (retval != sizeof *msr)
314 err(-1, "msr %d offset 0x%llx read failed", cpu, (unsigned long long)offset);
320 * Example Format w/ field column widths:
322 * Package Core CPU Avg_MHz Bzy_MHz TSC_MHz IRQ SMI Busy% CPU_%c1 CPU_%c3 CPU_%c6 CPU_%c7 CoreTmp PkgTmp GFXMHz Pkg%pc2 Pkg%pc3 Pkg%pc6 Pkg%pc7 PkgWatt CorWatt GFXWatt
323 * 12345678123456781234567812345678123456781234567812345678123456781234567812345678123456781234567812345678123456781234567812345678123456781234567812345678123456781234567812345678
326 void print_header(void)
329 outp += sprintf(outp, " Package");
331 outp += sprintf(outp, " Core");
333 outp += sprintf(outp, " CPU");
335 outp += sprintf(outp, " Avg_MHz");
337 outp += sprintf(outp, " Busy%%");
339 outp += sprintf(outp, " Bzy_MHz");
340 outp += sprintf(outp, " TSC_MHz");
342 if (extra_delta_offset32)
343 outp += sprintf(outp, " count 0x%03X", extra_delta_offset32);
344 if (extra_delta_offset64)
345 outp += sprintf(outp, " COUNT 0x%03X", extra_delta_offset64);
346 if (extra_msr_offset32)
347 outp += sprintf(outp, " MSR 0x%03X", extra_msr_offset32);
348 if (extra_msr_offset64)
349 outp += sprintf(outp, " MSR 0x%03X", extra_msr_offset64);
355 outp += sprintf(outp, " IRQ");
357 outp += sprintf(outp, " SMI");
360 outp += sprintf(outp, " CPU%%c1");
361 if (do_nhm_cstates && !do_slm_cstates && !do_knl_cstates)
362 outp += sprintf(outp, " CPU%%c3");
364 outp += sprintf(outp, " CPU%%c6");
366 outp += sprintf(outp, " CPU%%c7");
369 outp += sprintf(outp, " CoreTmp");
371 outp += sprintf(outp, " PkgTmp");
374 outp += sprintf(outp, " GFX%%rc6");
377 outp += sprintf(outp, " GFXMHz");
379 if (do_skl_residency) {
380 outp += sprintf(outp, " Totl%%C0");
381 outp += sprintf(outp, " Any%%C0");
382 outp += sprintf(outp, " GFX%%C0");
383 outp += sprintf(outp, " CPUGFX%%");
387 outp += sprintf(outp, " Pkg%%pc2");
389 outp += sprintf(outp, " Pkg%%pc3");
391 outp += sprintf(outp, " Pkg%%pc6");
393 outp += sprintf(outp, " Pkg%%pc7");
395 outp += sprintf(outp, " Pkg%%pc8");
396 outp += sprintf(outp, " Pkg%%pc9");
397 outp += sprintf(outp, " Pk%%pc10");
400 if (do_rapl && !rapl_joules) {
401 if (do_rapl & RAPL_PKG)
402 outp += sprintf(outp, " PkgWatt");
403 if (do_rapl & RAPL_CORES)
404 outp += sprintf(outp, " CorWatt");
405 if (do_rapl & RAPL_GFX)
406 outp += sprintf(outp, " GFXWatt");
407 if (do_rapl & RAPL_DRAM)
408 outp += sprintf(outp, " RAMWatt");
409 if (do_rapl & RAPL_PKG_PERF_STATUS)
410 outp += sprintf(outp, " PKG_%%");
411 if (do_rapl & RAPL_DRAM_PERF_STATUS)
412 outp += sprintf(outp, " RAM_%%");
413 } else if (do_rapl && rapl_joules) {
414 if (do_rapl & RAPL_PKG)
415 outp += sprintf(outp, " Pkg_J");
416 if (do_rapl & RAPL_CORES)
417 outp += sprintf(outp, " Cor_J");
418 if (do_rapl & RAPL_GFX)
419 outp += sprintf(outp, " GFX_J");
420 if (do_rapl & RAPL_DRAM)
421 outp += sprintf(outp, " RAM_J");
422 if (do_rapl & RAPL_PKG_PERF_STATUS)
423 outp += sprintf(outp, " PKG_%%");
424 if (do_rapl & RAPL_DRAM_PERF_STATUS)
425 outp += sprintf(outp, " RAM_%%");
428 outp += sprintf(outp, "\n");
431 int dump_counters(struct thread_data *t, struct core_data *c,
434 outp += sprintf(outp, "t %p, c %p, p %p\n", t, c, p);
437 outp += sprintf(outp, "CPU: %d flags 0x%x\n",
438 t->cpu_id, t->flags);
439 outp += sprintf(outp, "TSC: %016llX\n", t->tsc);
440 outp += sprintf(outp, "aperf: %016llX\n", t->aperf);
441 outp += sprintf(outp, "mperf: %016llX\n", t->mperf);
442 outp += sprintf(outp, "c1: %016llX\n", t->c1);
443 outp += sprintf(outp, "msr0x%x: %08llX\n",
444 extra_delta_offset32, t->extra_delta32);
445 outp += sprintf(outp, "msr0x%x: %016llX\n",
446 extra_delta_offset64, t->extra_delta64);
447 outp += sprintf(outp, "msr0x%x: %08llX\n",
448 extra_msr_offset32, t->extra_msr32);
449 outp += sprintf(outp, "msr0x%x: %016llX\n",
450 extra_msr_offset64, t->extra_msr64);
452 outp += sprintf(outp, "IRQ: %08X\n", t->irq_count);
454 outp += sprintf(outp, "SMI: %08X\n", t->smi_count);
458 outp += sprintf(outp, "core: %d\n", c->core_id);
459 outp += sprintf(outp, "c3: %016llX\n", c->c3);
460 outp += sprintf(outp, "c6: %016llX\n", c->c6);
461 outp += sprintf(outp, "c7: %016llX\n", c->c7);
462 outp += sprintf(outp, "DTS: %dC\n", c->core_temp_c);
466 outp += sprintf(outp, "package: %d\n", p->package_id);
468 outp += sprintf(outp, "Weighted cores: %016llX\n", p->pkg_wtd_core_c0);
469 outp += sprintf(outp, "Any cores: %016llX\n", p->pkg_any_core_c0);
470 outp += sprintf(outp, "Any GFX: %016llX\n", p->pkg_any_gfxe_c0);
471 outp += sprintf(outp, "CPU + GFX: %016llX\n", p->pkg_both_core_gfxe_c0);
473 outp += sprintf(outp, "pc2: %016llX\n", p->pc2);
475 outp += sprintf(outp, "pc3: %016llX\n", p->pc3);
477 outp += sprintf(outp, "pc6: %016llX\n", p->pc6);
479 outp += sprintf(outp, "pc7: %016llX\n", p->pc7);
480 outp += sprintf(outp, "pc8: %016llX\n", p->pc8);
481 outp += sprintf(outp, "pc9: %016llX\n", p->pc9);
482 outp += sprintf(outp, "pc10: %016llX\n", p->pc10);
483 outp += sprintf(outp, "Joules PKG: %0X\n", p->energy_pkg);
484 outp += sprintf(outp, "Joules COR: %0X\n", p->energy_cores);
485 outp += sprintf(outp, "Joules GFX: %0X\n", p->energy_gfx);
486 outp += sprintf(outp, "Joules RAM: %0X\n", p->energy_dram);
487 outp += sprintf(outp, "Throttle PKG: %0X\n",
488 p->rapl_pkg_perf_status);
489 outp += sprintf(outp, "Throttle RAM: %0X\n",
490 p->rapl_dram_perf_status);
491 outp += sprintf(outp, "PTM: %dC\n", p->pkg_temp_c);
494 outp += sprintf(outp, "\n");
500 * column formatting convention & formats
502 int format_counters(struct thread_data *t, struct core_data *c,
505 double interval_float;
508 /* if showing only 1st thread in core and this isn't one, bail out */
509 if (show_core_only && !(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
512 /* if showing only 1st thread in pkg and this isn't one, bail out */
513 if (show_pkg_only && !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
516 interval_float = tv_delta.tv_sec + tv_delta.tv_usec/1000000.0;
518 /* topo columns, print blanks on 1st (average) line */
519 if (t == &average.threads) {
521 outp += sprintf(outp, " -");
523 outp += sprintf(outp, " -");
525 outp += sprintf(outp, " -");
529 outp += sprintf(outp, "%8d", p->package_id);
531 outp += sprintf(outp, " -");
535 outp += sprintf(outp, "%8d", c->core_id);
537 outp += sprintf(outp, " -");
540 outp += sprintf(outp, "%8d", t->cpu_id);
545 outp += sprintf(outp, "%8.0f",
546 1.0 / units * t->aperf / interval_float);
551 outp += sprintf(outp, "%8.2f", 100.0 * t->mperf/t->tsc/tsc_tweak);
553 outp += sprintf(outp, "********");
559 outp += sprintf(outp, "%8.0f", base_hz / units * t->aperf / t->mperf);
561 outp += sprintf(outp, "%8.0f",
562 1.0 * t->tsc / units * t->aperf / t->mperf / interval_float);
566 outp += sprintf(outp, "%8.0f", 1.0 * t->tsc/units/interval_float);
569 if (extra_delta_offset32)
570 outp += sprintf(outp, " %11llu", t->extra_delta32);
573 if (extra_delta_offset64)
574 outp += sprintf(outp, " %11llu", t->extra_delta64);
576 if (extra_msr_offset32)
577 outp += sprintf(outp, " 0x%08llx", t->extra_msr32);
580 if (extra_msr_offset64)
581 outp += sprintf(outp, " 0x%016llx", t->extra_msr64);
588 outp += sprintf(outp, "%8d", t->irq_count);
592 outp += sprintf(outp, "%8d", t->smi_count);
594 if (do_nhm_cstates) {
596 outp += sprintf(outp, "%8.2f", 100.0 * t->c1/t->tsc);
598 outp += sprintf(outp, "********");
601 /* print per-core data only for 1st thread in core */
602 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
605 if (do_nhm_cstates && !do_slm_cstates && !do_knl_cstates)
606 outp += sprintf(outp, "%8.2f", 100.0 * c->c3/t->tsc);
608 outp += sprintf(outp, "%8.2f", 100.0 * c->c6/t->tsc);
610 outp += sprintf(outp, "%8.2f", 100.0 * c->c7/t->tsc);
613 outp += sprintf(outp, "%8d", c->core_temp_c);
615 /* print per-package data only for 1st core in package */
616 if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
621 outp += sprintf(outp, "%8d", p->pkg_temp_c);
625 if (p->gfx_rc6_ms == -1) { /* detect counter reset */
626 outp += sprintf(outp, " ***.**");
628 outp += sprintf(outp, "%8.2f",
629 p->gfx_rc6_ms / 10.0 / interval_float);
635 outp += sprintf(outp, "%8d", p->gfx_mhz);
637 /* Totl%C0, Any%C0 GFX%C0 CPUGFX% */
638 if (do_skl_residency) {
639 outp += sprintf(outp, "%8.2f", 100.0 * p->pkg_wtd_core_c0/t->tsc);
640 outp += sprintf(outp, "%8.2f", 100.0 * p->pkg_any_core_c0/t->tsc);
641 outp += sprintf(outp, "%8.2f", 100.0 * p->pkg_any_gfxe_c0/t->tsc);
642 outp += sprintf(outp, "%8.2f", 100.0 * p->pkg_both_core_gfxe_c0/t->tsc);
646 outp += sprintf(outp, "%8.2f", 100.0 * p->pc2/t->tsc);
648 outp += sprintf(outp, "%8.2f", 100.0 * p->pc3/t->tsc);
650 outp += sprintf(outp, "%8.2f", 100.0 * p->pc6/t->tsc);
652 outp += sprintf(outp, "%8.2f", 100.0 * p->pc7/t->tsc);
654 outp += sprintf(outp, "%8.2f", 100.0 * p->pc8/t->tsc);
655 outp += sprintf(outp, "%8.2f", 100.0 * p->pc9/t->tsc);
656 outp += sprintf(outp, "%8.2f", 100.0 * p->pc10/t->tsc);
660 * If measurement interval exceeds minimum RAPL Joule Counter range,
661 * indicate that results are suspect by printing "**" in fraction place.
663 if (interval_float < rapl_joule_counter_range)
668 if (do_rapl && !rapl_joules) {
669 if (do_rapl & RAPL_PKG)
670 outp += sprintf(outp, fmt8, p->energy_pkg * rapl_energy_units / interval_float);
671 if (do_rapl & RAPL_CORES)
672 outp += sprintf(outp, fmt8, p->energy_cores * rapl_energy_units / interval_float);
673 if (do_rapl & RAPL_GFX)
674 outp += sprintf(outp, fmt8, p->energy_gfx * rapl_energy_units / interval_float);
675 if (do_rapl & RAPL_DRAM)
676 outp += sprintf(outp, fmt8, p->energy_dram * rapl_dram_energy_units / interval_float);
677 if (do_rapl & RAPL_PKG_PERF_STATUS)
678 outp += sprintf(outp, fmt8, 100.0 * p->rapl_pkg_perf_status * rapl_time_units / interval_float);
679 if (do_rapl & RAPL_DRAM_PERF_STATUS)
680 outp += sprintf(outp, fmt8, 100.0 * p->rapl_dram_perf_status * rapl_time_units / interval_float);
681 } else if (do_rapl && rapl_joules) {
682 if (do_rapl & RAPL_PKG)
683 outp += sprintf(outp, fmt8,
684 p->energy_pkg * rapl_energy_units);
685 if (do_rapl & RAPL_CORES)
686 outp += sprintf(outp, fmt8,
687 p->energy_cores * rapl_energy_units);
688 if (do_rapl & RAPL_GFX)
689 outp += sprintf(outp, fmt8,
690 p->energy_gfx * rapl_energy_units);
691 if (do_rapl & RAPL_DRAM)
692 outp += sprintf(outp, fmt8,
693 p->energy_dram * rapl_dram_energy_units);
694 if (do_rapl & RAPL_PKG_PERF_STATUS)
695 outp += sprintf(outp, fmt8, 100.0 * p->rapl_pkg_perf_status * rapl_time_units / interval_float);
696 if (do_rapl & RAPL_DRAM_PERF_STATUS)
697 outp += sprintf(outp, fmt8, 100.0 * p->rapl_dram_perf_status * rapl_time_units / interval_float);
700 outp += sprintf(outp, "\n");
705 void flush_output_stdout(void)
714 fputs(output_buffer, filep);
717 outp = output_buffer;
719 void flush_output_stderr(void)
721 fputs(output_buffer, outf);
723 outp = output_buffer;
725 void format_all_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
729 if (!printed || !summary_only)
732 if (topo.num_cpus > 1)
733 format_counters(&average.threads, &average.cores,
741 for_all_cpus(format_counters, t, c, p);
744 #define DELTA_WRAP32(new, old) \
748 old = 0x100000000 + new - old; \
752 delta_package(struct pkg_data *new, struct pkg_data *old)
755 if (do_skl_residency) {
756 old->pkg_wtd_core_c0 = new->pkg_wtd_core_c0 - old->pkg_wtd_core_c0;
757 old->pkg_any_core_c0 = new->pkg_any_core_c0 - old->pkg_any_core_c0;
758 old->pkg_any_gfxe_c0 = new->pkg_any_gfxe_c0 - old->pkg_any_gfxe_c0;
759 old->pkg_both_core_gfxe_c0 = new->pkg_both_core_gfxe_c0 - old->pkg_both_core_gfxe_c0;
761 old->pc2 = new->pc2 - old->pc2;
763 old->pc3 = new->pc3 - old->pc3;
765 old->pc6 = new->pc6 - old->pc6;
767 old->pc7 = new->pc7 - old->pc7;
768 old->pc8 = new->pc8 - old->pc8;
769 old->pc9 = new->pc9 - old->pc9;
770 old->pc10 = new->pc10 - old->pc10;
771 old->pkg_temp_c = new->pkg_temp_c;
773 /* flag an error when rc6 counter resets/wraps */
774 if (old->gfx_rc6_ms > new->gfx_rc6_ms)
775 old->gfx_rc6_ms = -1;
777 old->gfx_rc6_ms = new->gfx_rc6_ms - old->gfx_rc6_ms;
779 old->gfx_mhz = new->gfx_mhz;
781 DELTA_WRAP32(new->energy_pkg, old->energy_pkg);
782 DELTA_WRAP32(new->energy_cores, old->energy_cores);
783 DELTA_WRAP32(new->energy_gfx, old->energy_gfx);
784 DELTA_WRAP32(new->energy_dram, old->energy_dram);
785 DELTA_WRAP32(new->rapl_pkg_perf_status, old->rapl_pkg_perf_status);
786 DELTA_WRAP32(new->rapl_dram_perf_status, old->rapl_dram_perf_status);
790 delta_core(struct core_data *new, struct core_data *old)
792 old->c3 = new->c3 - old->c3;
793 old->c6 = new->c6 - old->c6;
794 old->c7 = new->c7 - old->c7;
795 old->core_temp_c = new->core_temp_c;
802 delta_thread(struct thread_data *new, struct thread_data *old,
803 struct core_data *core_delta)
805 old->tsc = new->tsc - old->tsc;
807 /* check for TSC < 1 Mcycles over interval */
808 if (old->tsc < (1000 * 1000))
809 errx(-3, "Insanely slow TSC rate, TSC stops in idle?\n"
810 "You can disable all c-states by booting with \"idle=poll\"\n"
811 "or just the deep ones with \"processor.max_cstate=1\"");
813 old->c1 = new->c1 - old->c1;
816 if ((new->aperf > old->aperf) && (new->mperf > old->mperf)) {
817 old->aperf = new->aperf - old->aperf;
818 old->mperf = new->mperf - old->mperf;
821 if (!aperf_mperf_unstable) {
822 fprintf(outf, "%s: APERF or MPERF went backwards *\n", progname);
823 fprintf(outf, "* Frequency results do not cover entire interval *\n");
824 fprintf(outf, "* fix this by running Linux-2.6.30 or later *\n");
826 aperf_mperf_unstable = 1;
829 * mperf delta is likely a huge "positive" number
830 * can not use it for calculating c0 time
838 if (use_c1_residency_msr) {
840 * Some models have a dedicated C1 residency MSR,
841 * which should be more accurate than the derivation below.
845 * As counter collection is not atomic,
846 * it is possible for mperf's non-halted cycles + idle states
847 * to exceed TSC's all cycles: show c1 = 0% in that case.
849 if ((old->mperf + core_delta->c3 + core_delta->c6 + core_delta->c7) > old->tsc)
852 /* normal case, derive c1 */
853 old->c1 = old->tsc - old->mperf - core_delta->c3
854 - core_delta->c6 - core_delta->c7;
858 if (old->mperf == 0) {
860 fprintf(outf, "cpu%d MPERF 0!\n", old->cpu_id);
861 old->mperf = 1; /* divide by 0 protection */
864 old->extra_delta32 = new->extra_delta32 - old->extra_delta32;
865 old->extra_delta32 &= 0xFFFFFFFF;
867 old->extra_delta64 = new->extra_delta64 - old->extra_delta64;
870 * Extra MSR is just a snapshot, simply copy latest w/o subtracting
872 old->extra_msr32 = new->extra_msr32;
873 old->extra_msr64 = new->extra_msr64;
876 old->irq_count = new->irq_count - old->irq_count;
879 old->smi_count = new->smi_count - old->smi_count;
882 int delta_cpu(struct thread_data *t, struct core_data *c,
883 struct pkg_data *p, struct thread_data *t2,
884 struct core_data *c2, struct pkg_data *p2)
886 /* calculate core delta only for 1st thread in core */
887 if (t->flags & CPU_IS_FIRST_THREAD_IN_CORE)
890 /* always calculate thread delta */
891 delta_thread(t, t2, c2); /* c2 is core delta */
893 /* calculate package delta only for 1st core in package */
894 if (t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE)
895 delta_package(p, p2);
900 void clear_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
907 t->extra_delta32 = 0;
908 t->extra_delta64 = 0;
913 /* tells format_counters to dump all fields from this set */
914 t->flags = CPU_IS_FIRST_THREAD_IN_CORE | CPU_IS_FIRST_CORE_IN_PACKAGE;
921 p->pkg_wtd_core_c0 = 0;
922 p->pkg_any_core_c0 = 0;
923 p->pkg_any_gfxe_c0 = 0;
924 p->pkg_both_core_gfxe_c0 = 0;
941 p->rapl_pkg_perf_status = 0;
942 p->rapl_dram_perf_status = 0;
948 int sum_counters(struct thread_data *t, struct core_data *c,
951 average.threads.tsc += t->tsc;
952 average.threads.aperf += t->aperf;
953 average.threads.mperf += t->mperf;
954 average.threads.c1 += t->c1;
956 average.threads.extra_delta32 += t->extra_delta32;
957 average.threads.extra_delta64 += t->extra_delta64;
959 average.threads.irq_count += t->irq_count;
960 average.threads.smi_count += t->smi_count;
962 /* sum per-core values only for 1st thread in core */
963 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
966 average.cores.c3 += c->c3;
967 average.cores.c6 += c->c6;
968 average.cores.c7 += c->c7;
970 average.cores.core_temp_c = MAX(average.cores.core_temp_c, c->core_temp_c);
972 /* sum per-pkg values only for 1st core in pkg */
973 if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
976 if (do_skl_residency) {
977 average.packages.pkg_wtd_core_c0 += p->pkg_wtd_core_c0;
978 average.packages.pkg_any_core_c0 += p->pkg_any_core_c0;
979 average.packages.pkg_any_gfxe_c0 += p->pkg_any_gfxe_c0;
980 average.packages.pkg_both_core_gfxe_c0 += p->pkg_both_core_gfxe_c0;
983 average.packages.pc2 += p->pc2;
985 average.packages.pc3 += p->pc3;
987 average.packages.pc6 += p->pc6;
989 average.packages.pc7 += p->pc7;
990 average.packages.pc8 += p->pc8;
991 average.packages.pc9 += p->pc9;
992 average.packages.pc10 += p->pc10;
994 average.packages.energy_pkg += p->energy_pkg;
995 average.packages.energy_dram += p->energy_dram;
996 average.packages.energy_cores += p->energy_cores;
997 average.packages.energy_gfx += p->energy_gfx;
999 average.packages.gfx_rc6_ms = p->gfx_rc6_ms;
1000 average.packages.gfx_mhz = p->gfx_mhz;
1002 average.packages.pkg_temp_c = MAX(average.packages.pkg_temp_c, p->pkg_temp_c);
1004 average.packages.rapl_pkg_perf_status += p->rapl_pkg_perf_status;
1005 average.packages.rapl_dram_perf_status += p->rapl_dram_perf_status;
1009 * sum the counters for all cpus in the system
1010 * compute the weighted average
1012 void compute_average(struct thread_data *t, struct core_data *c,
1015 clear_counters(&average.threads, &average.cores, &average.packages);
1017 for_all_cpus(sum_counters, t, c, p);
1019 average.threads.tsc /= topo.num_cpus;
1020 average.threads.aperf /= topo.num_cpus;
1021 average.threads.mperf /= topo.num_cpus;
1022 average.threads.c1 /= topo.num_cpus;
1024 average.threads.extra_delta32 /= topo.num_cpus;
1025 average.threads.extra_delta32 &= 0xFFFFFFFF;
1027 average.threads.extra_delta64 /= topo.num_cpus;
1029 average.cores.c3 /= topo.num_cores;
1030 average.cores.c6 /= topo.num_cores;
1031 average.cores.c7 /= topo.num_cores;
1033 if (do_skl_residency) {
1034 average.packages.pkg_wtd_core_c0 /= topo.num_packages;
1035 average.packages.pkg_any_core_c0 /= topo.num_packages;
1036 average.packages.pkg_any_gfxe_c0 /= topo.num_packages;
1037 average.packages.pkg_both_core_gfxe_c0 /= topo.num_packages;
1040 average.packages.pc2 /= topo.num_packages;
1042 average.packages.pc3 /= topo.num_packages;
1044 average.packages.pc6 /= topo.num_packages;
1046 average.packages.pc7 /= topo.num_packages;
1048 average.packages.pc8 /= topo.num_packages;
1049 average.packages.pc9 /= topo.num_packages;
1050 average.packages.pc10 /= topo.num_packages;
1053 static unsigned long long rdtsc(void)
1055 unsigned int low, high;
1057 asm volatile("rdtsc" : "=a" (low), "=d" (high));
1059 return low | ((unsigned long long)high) << 32;
1065 * acquire and record local counters for that cpu
1067 int get_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
1069 int cpu = t->cpu_id;
1070 unsigned long long msr;
1071 int aperf_mperf_retry_count = 0;
1073 if (cpu_migrate(cpu)) {
1074 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
1079 t->tsc = rdtsc(); /* we are running on local CPU of interest */
1082 unsigned long long tsc_before, tsc_between, tsc_after, aperf_time, mperf_time;
1085 * The TSC, APERF and MPERF must be read together for
1086 * APERF/MPERF and MPERF/TSC to give accurate results.
1088 * Unfortunately, APERF and MPERF are read by
1089 * individual system call, so delays may occur
1090 * between them. If the time to read them
1091 * varies by a large amount, we re-read them.
1095 * This initial dummy APERF read has been seen to
1096 * reduce jitter in the subsequent reads.
1099 if (get_msr(cpu, MSR_IA32_APERF, &t->aperf))
1102 t->tsc = rdtsc(); /* re-read close to APERF */
1104 tsc_before = t->tsc;
1106 if (get_msr(cpu, MSR_IA32_APERF, &t->aperf))
1109 tsc_between = rdtsc();
1111 if (get_msr(cpu, MSR_IA32_MPERF, &t->mperf))
1114 tsc_after = rdtsc();
1116 aperf_time = tsc_between - tsc_before;
1117 mperf_time = tsc_after - tsc_between;
1120 * If the system call latency to read APERF and MPERF
1121 * differ by more than 2x, then try again.
1123 if ((aperf_time > (2 * mperf_time)) || (mperf_time > (2 * aperf_time))) {
1124 aperf_mperf_retry_count++;
1125 if (aperf_mperf_retry_count < 5)
1128 warnx("cpu%d jitter %lld %lld",
1129 cpu, aperf_time, mperf_time);
1131 aperf_mperf_retry_count = 0;
1133 t->aperf = t->aperf * aperf_mperf_multiplier;
1134 t->mperf = t->mperf * aperf_mperf_multiplier;
1138 t->irq_count = irqs_per_cpu[cpu];
1140 if (get_msr(cpu, MSR_SMI_COUNT, &msr))
1142 t->smi_count = msr & 0xFFFFFFFF;
1144 if (extra_delta_offset32) {
1145 if (get_msr(cpu, extra_delta_offset32, &msr))
1147 t->extra_delta32 = msr & 0xFFFFFFFF;
1150 if (extra_delta_offset64)
1151 if (get_msr(cpu, extra_delta_offset64, &t->extra_delta64))
1154 if (extra_msr_offset32) {
1155 if (get_msr(cpu, extra_msr_offset32, &msr))
1157 t->extra_msr32 = msr & 0xFFFFFFFF;
1160 if (extra_msr_offset64)
1161 if (get_msr(cpu, extra_msr_offset64, &t->extra_msr64))
1164 if (use_c1_residency_msr) {
1165 if (get_msr(cpu, MSR_CORE_C1_RES, &t->c1))
1169 /* collect core counters only for 1st thread in core */
1170 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
1173 if (do_nhm_cstates && !do_slm_cstates && !do_knl_cstates) {
1174 if (get_msr(cpu, MSR_CORE_C3_RESIDENCY, &c->c3))
1178 if (do_nhm_cstates && !do_knl_cstates) {
1179 if (get_msr(cpu, MSR_CORE_C6_RESIDENCY, &c->c6))
1181 } else if (do_knl_cstates) {
1182 if (get_msr(cpu, MSR_KNL_CORE_C6_RESIDENCY, &c->c6))
1187 if (get_msr(cpu, MSR_CORE_C7_RESIDENCY, &c->c7))
1191 if (get_msr(cpu, MSR_IA32_THERM_STATUS, &msr))
1193 c->core_temp_c = tcc_activation_temp - ((msr >> 16) & 0x7F);
1197 /* collect package counters only for 1st core in package */
1198 if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
1201 if (do_skl_residency) {
1202 if (get_msr(cpu, MSR_PKG_WEIGHTED_CORE_C0_RES, &p->pkg_wtd_core_c0))
1204 if (get_msr(cpu, MSR_PKG_ANY_CORE_C0_RES, &p->pkg_any_core_c0))
1206 if (get_msr(cpu, MSR_PKG_ANY_GFXE_C0_RES, &p->pkg_any_gfxe_c0))
1208 if (get_msr(cpu, MSR_PKG_BOTH_CORE_GFXE_C0_RES, &p->pkg_both_core_gfxe_c0))
1212 if (get_msr(cpu, MSR_PKG_C3_RESIDENCY, &p->pc3))
1215 if (get_msr(cpu, MSR_PKG_C6_RESIDENCY, &p->pc6))
1218 if (get_msr(cpu, MSR_PKG_C2_RESIDENCY, &p->pc2))
1221 if (get_msr(cpu, MSR_PKG_C7_RESIDENCY, &p->pc7))
1224 if (get_msr(cpu, MSR_PKG_C8_RESIDENCY, &p->pc8))
1226 if (get_msr(cpu, MSR_PKG_C9_RESIDENCY, &p->pc9))
1228 if (get_msr(cpu, MSR_PKG_C10_RESIDENCY, &p->pc10))
1231 if (do_rapl & RAPL_PKG) {
1232 if (get_msr(cpu, MSR_PKG_ENERGY_STATUS, &msr))
1234 p->energy_pkg = msr & 0xFFFFFFFF;
1236 if (do_rapl & RAPL_CORES) {
1237 if (get_msr(cpu, MSR_PP0_ENERGY_STATUS, &msr))
1239 p->energy_cores = msr & 0xFFFFFFFF;
1241 if (do_rapl & RAPL_DRAM) {
1242 if (get_msr(cpu, MSR_DRAM_ENERGY_STATUS, &msr))
1244 p->energy_dram = msr & 0xFFFFFFFF;
1246 if (do_rapl & RAPL_GFX) {
1247 if (get_msr(cpu, MSR_PP1_ENERGY_STATUS, &msr))
1249 p->energy_gfx = msr & 0xFFFFFFFF;
1251 if (do_rapl & RAPL_PKG_PERF_STATUS) {
1252 if (get_msr(cpu, MSR_PKG_PERF_STATUS, &msr))
1254 p->rapl_pkg_perf_status = msr & 0xFFFFFFFF;
1256 if (do_rapl & RAPL_DRAM_PERF_STATUS) {
1257 if (get_msr(cpu, MSR_DRAM_PERF_STATUS, &msr))
1259 p->rapl_dram_perf_status = msr & 0xFFFFFFFF;
1262 if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_STATUS, &msr))
1264 p->pkg_temp_c = tcc_activation_temp - ((msr >> 16) & 0x7F);
1268 p->gfx_rc6_ms = gfx_cur_rc6_ms;
1271 p->gfx_mhz = gfx_cur_mhz;
1277 * MSR_PKG_CST_CONFIG_CONTROL decoding for pkg_cstate_limit:
1278 * If you change the values, note they are used both in comparisons
1279 * (>= PCL__7) and to index pkg_cstate_limit_strings[].
1282 #define PCLUKN 0 /* Unknown */
1283 #define PCLRSV 1 /* Reserved */
1284 #define PCL__0 2 /* PC0 */
1285 #define PCL__1 3 /* PC1 */
1286 #define PCL__2 4 /* PC2 */
1287 #define PCL__3 5 /* PC3 */
1288 #define PCL__4 6 /* PC4 */
1289 #define PCL__6 7 /* PC6 */
1290 #define PCL_6N 8 /* PC6 No Retention */
1291 #define PCL_6R 9 /* PC6 Retention */
1292 #define PCL__7 10 /* PC7 */
1293 #define PCL_7S 11 /* PC7 Shrink */
1294 #define PCL__8 12 /* PC8 */
1295 #define PCL__9 13 /* PC9 */
1296 #define PCLUNL 14 /* Unlimited */
1298 int pkg_cstate_limit = PCLUKN;
1299 char *pkg_cstate_limit_strings[] = { "reserved", "unknown", "pc0", "pc1", "pc2",
1300 "pc3", "pc4", "pc6", "pc6n", "pc6r", "pc7", "pc7s", "pc8", "pc9", "unlimited"};
1302 int nhm_pkg_cstate_limits[16] = {PCL__0, PCL__1, PCL__3, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
1303 int snb_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCL__7, PCL_7S, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
1304 int hsw_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL__3, PCL__6, PCL__7, PCL_7S, PCL__8, PCL__9, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
1305 int slv_pkg_cstate_limits[16] = {PCL__0, PCL__1, PCLRSV, PCLRSV, PCL__4, PCLRSV, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
1306 int amt_pkg_cstate_limits[16] = {PCL__0, PCL__1, PCL__2, PCLRSV, PCLRSV, PCLRSV, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
1307 int phi_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCLRSV, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
1308 int bxt_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
1312 calculate_tsc_tweak()
1314 tsc_tweak = base_hz / tsc_hz;
1318 dump_nhm_platform_info(void)
1320 unsigned long long msr;
1323 get_msr(base_cpu, MSR_PLATFORM_INFO, &msr);
1325 fprintf(outf, "cpu%d: MSR_PLATFORM_INFO: 0x%08llx\n", base_cpu, msr);
1327 ratio = (msr >> 40) & 0xFF;
1328 fprintf(outf, "%d * %.0f = %.0f MHz max efficiency frequency\n",
1329 ratio, bclk, ratio * bclk);
1331 ratio = (msr >> 8) & 0xFF;
1332 fprintf(outf, "%d * %.0f = %.0f MHz base frequency\n",
1333 ratio, bclk, ratio * bclk);
1335 get_msr(base_cpu, MSR_IA32_POWER_CTL, &msr);
1336 fprintf(outf, "cpu%d: MSR_IA32_POWER_CTL: 0x%08llx (C1E auto-promotion: %sabled)\n",
1337 base_cpu, msr, msr & 0x2 ? "EN" : "DIS");
1343 dump_hsw_turbo_ratio_limits(void)
1345 unsigned long long msr;
1348 get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT2, &msr);
1350 fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT2: 0x%08llx\n", base_cpu, msr);
1352 ratio = (msr >> 8) & 0xFF;
1354 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 18 active cores\n",
1355 ratio, bclk, ratio * bclk);
1357 ratio = (msr >> 0) & 0xFF;
1359 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 17 active cores\n",
1360 ratio, bclk, ratio * bclk);
1365 dump_ivt_turbo_ratio_limits(void)
1367 unsigned long long msr;
1370 get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT1, &msr);
1372 fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT1: 0x%08llx\n", base_cpu, msr);
1374 ratio = (msr >> 56) & 0xFF;
1376 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 16 active cores\n",
1377 ratio, bclk, ratio * bclk);
1379 ratio = (msr >> 48) & 0xFF;
1381 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 15 active cores\n",
1382 ratio, bclk, ratio * bclk);
1384 ratio = (msr >> 40) & 0xFF;
1386 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 14 active cores\n",
1387 ratio, bclk, ratio * bclk);
1389 ratio = (msr >> 32) & 0xFF;
1391 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 13 active cores\n",
1392 ratio, bclk, ratio * bclk);
1394 ratio = (msr >> 24) & 0xFF;
1396 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 12 active cores\n",
1397 ratio, bclk, ratio * bclk);
1399 ratio = (msr >> 16) & 0xFF;
1401 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 11 active cores\n",
1402 ratio, bclk, ratio * bclk);
1404 ratio = (msr >> 8) & 0xFF;
1406 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 10 active cores\n",
1407 ratio, bclk, ratio * bclk);
1409 ratio = (msr >> 0) & 0xFF;
1411 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 9 active cores\n",
1412 ratio, bclk, ratio * bclk);
1417 dump_nhm_turbo_ratio_limits(void)
1419 unsigned long long msr;
1422 get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT, &msr);
1424 fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT: 0x%08llx\n", base_cpu, msr);
1426 ratio = (msr >> 56) & 0xFF;
1428 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 8 active cores\n",
1429 ratio, bclk, ratio * bclk);
1431 ratio = (msr >> 48) & 0xFF;
1433 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 7 active cores\n",
1434 ratio, bclk, ratio * bclk);
1436 ratio = (msr >> 40) & 0xFF;
1438 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 6 active cores\n",
1439 ratio, bclk, ratio * bclk);
1441 ratio = (msr >> 32) & 0xFF;
1443 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 5 active cores\n",
1444 ratio, bclk, ratio * bclk);
1446 ratio = (msr >> 24) & 0xFF;
1448 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 4 active cores\n",
1449 ratio, bclk, ratio * bclk);
1451 ratio = (msr >> 16) & 0xFF;
1453 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 3 active cores\n",
1454 ratio, bclk, ratio * bclk);
1456 ratio = (msr >> 8) & 0xFF;
1458 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 2 active cores\n",
1459 ratio, bclk, ratio * bclk);
1461 ratio = (msr >> 0) & 0xFF;
1463 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 1 active cores\n",
1464 ratio, bclk, ratio * bclk);
1469 dump_knl_turbo_ratio_limits(void)
1471 const unsigned int buckets_no = 7;
1473 unsigned long long msr;
1474 int delta_cores, delta_ratio;
1476 unsigned int cores[buckets_no];
1477 unsigned int ratio[buckets_no];
1479 get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT, &msr);
1481 fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT: 0x%08llx\n",
1485 * Turbo encoding in KNL is as follows:
1487 * [7:1] -- Base value of number of active cores of bucket 1.
1488 * [15:8] -- Base value of freq ratio of bucket 1.
1489 * [20:16] -- +ve delta of number of active cores of bucket 2.
1490 * i.e. active cores of bucket 2 =
1491 * active cores of bucket 1 + delta
1492 * [23:21] -- Negative delta of freq ratio of bucket 2.
1493 * i.e. freq ratio of bucket 2 =
1494 * freq ratio of bucket 1 - delta
1495 * [28:24]-- +ve delta of number of active cores of bucket 3.
1496 * [31:29]-- -ve delta of freq ratio of bucket 3.
1497 * [36:32]-- +ve delta of number of active cores of bucket 4.
1498 * [39:37]-- -ve delta of freq ratio of bucket 4.
1499 * [44:40]-- +ve delta of number of active cores of bucket 5.
1500 * [47:45]-- -ve delta of freq ratio of bucket 5.
1501 * [52:48]-- +ve delta of number of active cores of bucket 6.
1502 * [55:53]-- -ve delta of freq ratio of bucket 6.
1503 * [60:56]-- +ve delta of number of active cores of bucket 7.
1504 * [63:61]-- -ve delta of freq ratio of bucket 7.
1508 cores[b_nr] = (msr & 0xFF) >> 1;
1509 ratio[b_nr] = (msr >> 8) & 0xFF;
1511 for (i = 16; i < 64; i += 8) {
1512 delta_cores = (msr >> i) & 0x1F;
1513 delta_ratio = (msr >> (i + 5)) & 0x7;
1515 cores[b_nr + 1] = cores[b_nr] + delta_cores;
1516 ratio[b_nr + 1] = ratio[b_nr] - delta_ratio;
1520 for (i = buckets_no - 1; i >= 0; i--)
1521 if (i > 0 ? ratio[i] != ratio[i - 1] : 1)
1523 "%d * %.0f = %.0f MHz max turbo %d active cores\n",
1524 ratio[i], bclk, ratio[i] * bclk, cores[i]);
1528 dump_nhm_cst_cfg(void)
1530 unsigned long long msr;
1532 get_msr(base_cpu, MSR_NHM_SNB_PKG_CST_CFG_CTL, &msr);
1534 #define SNB_C1_AUTO_UNDEMOTE (1UL << 27)
1535 #define SNB_C3_AUTO_UNDEMOTE (1UL << 28)
1537 fprintf(outf, "cpu%d: MSR_NHM_SNB_PKG_CST_CFG_CTL: 0x%08llx", base_cpu, msr);
1539 fprintf(outf, " (%s%s%s%s%slocked: pkg-cstate-limit=%d: %s)\n",
1540 (msr & SNB_C3_AUTO_UNDEMOTE) ? "UNdemote-C3, " : "",
1541 (msr & SNB_C1_AUTO_UNDEMOTE) ? "UNdemote-C1, " : "",
1542 (msr & NHM_C3_AUTO_DEMOTE) ? "demote-C3, " : "",
1543 (msr & NHM_C1_AUTO_DEMOTE) ? "demote-C1, " : "",
1544 (msr & (1 << 15)) ? "" : "UN",
1545 (unsigned int)msr & 0xF,
1546 pkg_cstate_limit_strings[pkg_cstate_limit]);
1551 dump_config_tdp(void)
1553 unsigned long long msr;
1555 get_msr(base_cpu, MSR_CONFIG_TDP_NOMINAL, &msr);
1556 fprintf(outf, "cpu%d: MSR_CONFIG_TDP_NOMINAL: 0x%08llx", base_cpu, msr);
1557 fprintf(outf, " (base_ratio=%d)\n", (unsigned int)msr & 0xFF);
1559 get_msr(base_cpu, MSR_CONFIG_TDP_LEVEL_1, &msr);
1560 fprintf(outf, "cpu%d: MSR_CONFIG_TDP_LEVEL_1: 0x%08llx (", base_cpu, msr);
1562 fprintf(outf, "PKG_MIN_PWR_LVL1=%d ", (unsigned int)(msr >> 48) & 0x7FFF);
1563 fprintf(outf, "PKG_MAX_PWR_LVL1=%d ", (unsigned int)(msr >> 32) & 0x7FFF);
1564 fprintf(outf, "LVL1_RATIO=%d ", (unsigned int)(msr >> 16) & 0xFF);
1565 fprintf(outf, "PKG_TDP_LVL1=%d", (unsigned int)(msr) & 0x7FFF);
1567 fprintf(outf, ")\n");
1569 get_msr(base_cpu, MSR_CONFIG_TDP_LEVEL_2, &msr);
1570 fprintf(outf, "cpu%d: MSR_CONFIG_TDP_LEVEL_2: 0x%08llx (", base_cpu, msr);
1572 fprintf(outf, "PKG_MIN_PWR_LVL2=%d ", (unsigned int)(msr >> 48) & 0x7FFF);
1573 fprintf(outf, "PKG_MAX_PWR_LVL2=%d ", (unsigned int)(msr >> 32) & 0x7FFF);
1574 fprintf(outf, "LVL2_RATIO=%d ", (unsigned int)(msr >> 16) & 0xFF);
1575 fprintf(outf, "PKG_TDP_LVL2=%d", (unsigned int)(msr) & 0x7FFF);
1577 fprintf(outf, ")\n");
1579 get_msr(base_cpu, MSR_CONFIG_TDP_CONTROL, &msr);
1580 fprintf(outf, "cpu%d: MSR_CONFIG_TDP_CONTROL: 0x%08llx (", base_cpu, msr);
1582 fprintf(outf, "TDP_LEVEL=%d ", (unsigned int)(msr) & 0x3);
1583 fprintf(outf, " lock=%d", (unsigned int)(msr >> 31) & 1);
1584 fprintf(outf, ")\n");
1586 get_msr(base_cpu, MSR_TURBO_ACTIVATION_RATIO, &msr);
1587 fprintf(outf, "cpu%d: MSR_TURBO_ACTIVATION_RATIO: 0x%08llx (", base_cpu, msr);
1588 fprintf(outf, "MAX_NON_TURBO_RATIO=%d", (unsigned int)(msr) & 0xFF);
1589 fprintf(outf, " lock=%d", (unsigned int)(msr >> 31) & 1);
1590 fprintf(outf, ")\n");
1593 unsigned int irtl_time_units[] = {1, 32, 1024, 32768, 1048576, 33554432, 0, 0 };
1595 void print_irtl(void)
1597 unsigned long long msr;
1599 get_msr(base_cpu, MSR_PKGC3_IRTL, &msr);
1600 fprintf(outf, "cpu%d: MSR_PKGC3_IRTL: 0x%08llx (", base_cpu, msr);
1601 fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
1602 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
1604 get_msr(base_cpu, MSR_PKGC6_IRTL, &msr);
1605 fprintf(outf, "cpu%d: MSR_PKGC6_IRTL: 0x%08llx (", base_cpu, msr);
1606 fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
1607 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
1609 get_msr(base_cpu, MSR_PKGC7_IRTL, &msr);
1610 fprintf(outf, "cpu%d: MSR_PKGC7_IRTL: 0x%08llx (", base_cpu, msr);
1611 fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
1612 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
1617 get_msr(base_cpu, MSR_PKGC8_IRTL, &msr);
1618 fprintf(outf, "cpu%d: MSR_PKGC8_IRTL: 0x%08llx (", base_cpu, msr);
1619 fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
1620 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
1622 get_msr(base_cpu, MSR_PKGC9_IRTL, &msr);
1623 fprintf(outf, "cpu%d: MSR_PKGC9_IRTL: 0x%08llx (", base_cpu, msr);
1624 fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
1625 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
1627 get_msr(base_cpu, MSR_PKGC10_IRTL, &msr);
1628 fprintf(outf, "cpu%d: MSR_PKGC10_IRTL: 0x%08llx (", base_cpu, msr);
1629 fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
1630 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
1633 void free_fd_percpu(void)
1637 for (i = 0; i < topo.max_cpu_num; ++i) {
1638 if (fd_percpu[i] != 0)
1639 close(fd_percpu[i]);
1645 void free_all_buffers(void)
1647 CPU_FREE(cpu_present_set);
1648 cpu_present_set = NULL;
1649 cpu_present_setsize = 0;
1651 CPU_FREE(cpu_affinity_set);
1652 cpu_affinity_set = NULL;
1653 cpu_affinity_setsize = 0;
1661 package_even = NULL;
1671 free(output_buffer);
1672 output_buffer = NULL;
1677 free(irq_column_2_cpu);
1682 * Open a file, and exit on failure
1684 FILE *fopen_or_die(const char *path, const char *mode)
1686 FILE *filep = fopen(path, mode);
1688 err(1, "%s: open failed", path);
1693 * Parse a file containing a single int.
1695 int parse_int_file(const char *fmt, ...)
1698 char path[PATH_MAX];
1702 va_start(args, fmt);
1703 vsnprintf(path, sizeof(path), fmt, args);
1705 filep = fopen_or_die(path, "r");
1706 if (fscanf(filep, "%d", &value) != 1)
1707 err(1, "%s: failed to parse number from file", path);
1713 * get_cpu_position_in_core(cpu)
1714 * return the position of the CPU among its HT siblings in the core
1715 * return -1 if the sibling is not in list
1717 int get_cpu_position_in_core(int cpu)
1726 "/sys/devices/system/cpu/cpu%d/topology/thread_siblings_list",
1728 filep = fopen(path, "r");
1729 if (filep == NULL) {
1734 for (i = 0; i < topo.num_threads_per_core; i++) {
1735 fscanf(filep, "%d", &this_cpu);
1736 if (this_cpu == cpu) {
1741 /* Account for no separator after last thread*/
1742 if (i != (topo.num_threads_per_core - 1))
1743 fscanf(filep, "%c", &character);
1751 * cpu_is_first_core_in_package(cpu)
1752 * return 1 if given CPU is 1st core in package
1754 int cpu_is_first_core_in_package(int cpu)
1756 return cpu == parse_int_file("/sys/devices/system/cpu/cpu%d/topology/core_siblings_list", cpu);
1759 int get_physical_package_id(int cpu)
1761 return parse_int_file("/sys/devices/system/cpu/cpu%d/topology/physical_package_id", cpu);
1764 int get_core_id(int cpu)
1766 return parse_int_file("/sys/devices/system/cpu/cpu%d/topology/core_id", cpu);
1769 int get_num_ht_siblings(int cpu)
1779 sprintf(path, "/sys/devices/system/cpu/cpu%d/topology/thread_siblings_list", cpu);
1780 filep = fopen_or_die(path, "r");
1784 * A ',' separated or '-' separated set of numbers
1785 * (eg 1-2 or 1,3,4,5)
1787 fscanf(filep, "%d%c\n", &sib1, &character);
1788 fseek(filep, 0, SEEK_SET);
1789 fgets(str, 100, filep);
1790 ch = strchr(str, character);
1791 while (ch != NULL) {
1793 ch = strchr(ch+1, character);
1801 * run func(thread, core, package) in topology order
1802 * skip non-present cpus
1805 int for_all_cpus_2(int (func)(struct thread_data *, struct core_data *,
1806 struct pkg_data *, struct thread_data *, struct core_data *,
1807 struct pkg_data *), struct thread_data *thread_base,
1808 struct core_data *core_base, struct pkg_data *pkg_base,
1809 struct thread_data *thread_base2, struct core_data *core_base2,
1810 struct pkg_data *pkg_base2)
1812 int retval, pkg_no, core_no, thread_no;
1814 for (pkg_no = 0; pkg_no < topo.num_packages; ++pkg_no) {
1815 for (core_no = 0; core_no < topo.num_cores_per_pkg; ++core_no) {
1816 for (thread_no = 0; thread_no <
1817 topo.num_threads_per_core; ++thread_no) {
1818 struct thread_data *t, *t2;
1819 struct core_data *c, *c2;
1820 struct pkg_data *p, *p2;
1822 t = GET_THREAD(thread_base, thread_no, core_no, pkg_no);
1824 if (cpu_is_not_present(t->cpu_id))
1827 t2 = GET_THREAD(thread_base2, thread_no, core_no, pkg_no);
1829 c = GET_CORE(core_base, core_no, pkg_no);
1830 c2 = GET_CORE(core_base2, core_no, pkg_no);
1832 p = GET_PKG(pkg_base, pkg_no);
1833 p2 = GET_PKG(pkg_base2, pkg_no);
1835 retval = func(t, c, p, t2, c2, p2);
1845 * run func(cpu) on every cpu in /proc/stat
1846 * return max_cpu number
1848 int for_all_proc_cpus(int (func)(int))
1854 fp = fopen_or_die(proc_stat, "r");
1856 retval = fscanf(fp, "cpu %*d %*d %*d %*d %*d %*d %*d %*d %*d %*d\n");
1858 err(1, "%s: failed to parse format", proc_stat);
1861 retval = fscanf(fp, "cpu%u %*d %*d %*d %*d %*d %*d %*d %*d %*d %*d\n", &cpu_num);
1865 retval = func(cpu_num);
1875 void re_initialize(void)
1878 setup_all_buffers();
1879 printf("turbostat: re-initialized with num_cpus %d\n", topo.num_cpus);
1885 * remember the last one seen, it will be the max
1887 int count_cpus(int cpu)
1889 if (topo.max_cpu_num < cpu)
1890 topo.max_cpu_num = cpu;
1895 int mark_cpu_present(int cpu)
1897 CPU_SET_S(cpu, cpu_present_setsize, cpu_present_set);
1902 * snapshot_proc_interrupts()
1904 * read and record summary of /proc/interrupts
1906 * return 1 if config change requires a restart, else return 0
1908 int snapshot_proc_interrupts(void)
1914 fp = fopen_or_die("/proc/interrupts", "r");
1918 /* read 1st line of /proc/interrupts to get cpu* name for each column */
1919 for (column = 0; column < topo.num_cpus; ++column) {
1922 retval = fscanf(fp, " CPU%d", &cpu_number);
1926 if (cpu_number > topo.max_cpu_num) {
1927 warn("/proc/interrupts: cpu%d: > %d", cpu_number, topo.max_cpu_num);
1931 irq_column_2_cpu[column] = cpu_number;
1932 irqs_per_cpu[cpu_number] = 0;
1935 /* read /proc/interrupt count lines and sum up irqs per cpu */
1940 retval = fscanf(fp, " %s:", buf); /* flush irq# "N:" */
1944 /* read the count per cpu */
1945 for (column = 0; column < topo.num_cpus; ++column) {
1947 int cpu_number, irq_count;
1949 retval = fscanf(fp, " %d", &irq_count);
1953 cpu_number = irq_column_2_cpu[column];
1954 irqs_per_cpu[cpu_number] += irq_count;
1958 while (getc(fp) != '\n')
1959 ; /* flush interrupt description */
1965 * snapshot_gfx_rc6_ms()
1967 * record snapshot of
1968 * /sys/class/drm/card0/power/rc6_residency_ms
1970 * return 1 if config change requires a restart, else return 0
1972 int snapshot_gfx_rc6_ms(void)
1977 fp = fopen_or_die("/sys/class/drm/card0/power/rc6_residency_ms", "r");
1979 retval = fscanf(fp, "%lld", &gfx_cur_rc6_ms);
1988 * snapshot_gfx_mhz()
1990 * record snapshot of
1991 * /sys/class/graphics/fb0/device/drm/card0/gt_cur_freq_mhz
1993 * return 1 if config change requires a restart, else return 0
1995 int snapshot_gfx_mhz(void)
2001 fp = fopen_or_die("/sys/class/graphics/fb0/device/drm/card0/gt_cur_freq_mhz", "r");
2005 retval = fscanf(fp, "%d", &gfx_cur_mhz);
2013 * snapshot /proc and /sys files
2015 * return 1 if configuration restart needed, else return 0
2017 int snapshot_proc_sysfs_files(void)
2019 if (snapshot_proc_interrupts())
2023 snapshot_gfx_rc6_ms();
2031 void turbostat_loop()
2039 snapshot_proc_sysfs_files();
2040 retval = for_all_cpus(get_counters, EVEN_COUNTERS);
2043 } else if (retval == -1) {
2044 if (restarted > 1) {
2051 gettimeofday(&tv_even, (struct timezone *)NULL);
2054 if (for_all_proc_cpus(cpu_is_not_present)) {
2058 nanosleep(&interval_ts, NULL);
2059 if (snapshot_proc_sysfs_files())
2061 retval = for_all_cpus(get_counters, ODD_COUNTERS);
2064 } else if (retval == -1) {
2068 gettimeofday(&tv_odd, (struct timezone *)NULL);
2069 timersub(&tv_odd, &tv_even, &tv_delta);
2070 for_all_cpus_2(delta_cpu, ODD_COUNTERS, EVEN_COUNTERS);
2071 compute_average(EVEN_COUNTERS);
2072 format_all_counters(EVEN_COUNTERS);
2073 flush_output_stdout();
2074 nanosleep(&interval_ts, NULL);
2075 if (snapshot_proc_sysfs_files())
2077 retval = for_all_cpus(get_counters, EVEN_COUNTERS);
2080 } else if (retval == -1) {
2084 gettimeofday(&tv_even, (struct timezone *)NULL);
2085 timersub(&tv_even, &tv_odd, &tv_delta);
2086 for_all_cpus_2(delta_cpu, EVEN_COUNTERS, ODD_COUNTERS);
2087 compute_average(ODD_COUNTERS);
2088 format_all_counters(ODD_COUNTERS);
2089 flush_output_stdout();
2093 void check_dev_msr()
2098 sprintf(pathname, "/dev/cpu/%d/msr", base_cpu);
2099 if (stat(pathname, &sb))
2100 if (system("/sbin/modprobe msr > /dev/null 2>&1"))
2101 err(-5, "no /dev/cpu/0/msr, Try \"# modprobe msr\" ");
2104 void check_permissions()
2106 struct __user_cap_header_struct cap_header_data;
2107 cap_user_header_t cap_header = &cap_header_data;
2108 struct __user_cap_data_struct cap_data_data;
2109 cap_user_data_t cap_data = &cap_data_data;
2110 extern int capget(cap_user_header_t hdrp, cap_user_data_t datap);
2114 /* check for CAP_SYS_RAWIO */
2115 cap_header->pid = getpid();
2116 cap_header->version = _LINUX_CAPABILITY_VERSION;
2117 if (capget(cap_header, cap_data) < 0)
2118 err(-6, "capget(2) failed");
2120 if ((cap_data->effective & (1 << CAP_SYS_RAWIO)) == 0) {
2122 warnx("capget(CAP_SYS_RAWIO) failed,"
2123 " try \"# setcap cap_sys_rawio=ep %s\"", progname);
2126 /* test file permissions */
2127 sprintf(pathname, "/dev/cpu/%d/msr", base_cpu);
2128 if (euidaccess(pathname, R_OK)) {
2130 warn("/dev/cpu/0/msr open failed, try chown or chmod +r /dev/cpu/*/msr");
2133 /* if all else fails, thell them to be root */
2136 warnx("... or simply run as root");
2143 * NHM adds support for additional MSRs:
2145 * MSR_SMI_COUNT 0x00000034
2147 * MSR_PLATFORM_INFO 0x000000ce
2148 * MSR_NHM_SNB_PKG_CST_CFG_CTL 0x000000e2
2150 * MSR_PKG_C3_RESIDENCY 0x000003f8
2151 * MSR_PKG_C6_RESIDENCY 0x000003f9
2152 * MSR_CORE_C3_RESIDENCY 0x000003fc
2153 * MSR_CORE_C6_RESIDENCY 0x000003fd
2156 * sets global pkg_cstate_limit to decode MSR_NHM_SNB_PKG_CST_CFG_CTL
2158 int probe_nhm_msrs(unsigned int family, unsigned int model)
2160 unsigned long long msr;
2161 unsigned int base_ratio;
2162 int *pkg_cstate_limits;
2170 bclk = discover_bclk(family, model);
2173 case 0x1A: /* Core i7, Xeon 5500 series - Bloomfield, Gainstown NHM-EP */
2174 case 0x1E: /* Core i7 and i5 Processor - Clarksfield, Lynnfield, Jasper Forest */
2175 case 0x1F: /* Core i7 and i5 Processor - Nehalem */
2176 case 0x25: /* Westmere Client - Clarkdale, Arrandale */
2177 case 0x2C: /* Westmere EP - Gulftown */
2178 case 0x2E: /* Nehalem-EX Xeon - Beckton */
2179 case 0x2F: /* Westmere-EX Xeon - Eagleton */
2180 pkg_cstate_limits = nhm_pkg_cstate_limits;
2182 case 0x2A: /* SNB */
2183 case 0x2D: /* SNB Xeon */
2184 case 0x3A: /* IVB */
2185 case 0x3E: /* IVB Xeon */
2186 pkg_cstate_limits = snb_pkg_cstate_limits;
2188 case 0x3C: /* HSW */
2189 case 0x3F: /* HSX */
2190 case 0x45: /* HSW */
2191 case 0x46: /* HSW */
2192 case 0x3D: /* BDW */
2193 case 0x47: /* BDW */
2194 case 0x4F: /* BDX */
2195 case 0x56: /* BDX-DE */
2196 case 0x4E: /* SKL */
2197 case 0x5E: /* SKL */
2198 case 0x8E: /* KBL */
2199 case 0x9E: /* KBL */
2200 case 0x55: /* SKX */
2201 pkg_cstate_limits = hsw_pkg_cstate_limits;
2203 case 0x37: /* BYT */
2204 case 0x4D: /* AVN */
2205 pkg_cstate_limits = slv_pkg_cstate_limits;
2207 case 0x4C: /* AMT */
2208 pkg_cstate_limits = amt_pkg_cstate_limits;
2210 case 0x57: /* PHI */
2211 pkg_cstate_limits = phi_pkg_cstate_limits;
2213 case 0x5C: /* BXT */
2214 pkg_cstate_limits = bxt_pkg_cstate_limits;
2219 get_msr(base_cpu, MSR_NHM_SNB_PKG_CST_CFG_CTL, &msr);
2220 pkg_cstate_limit = pkg_cstate_limits[msr & 0xF];
2222 get_msr(base_cpu, MSR_PLATFORM_INFO, &msr);
2223 base_ratio = (msr >> 8) & 0xFF;
2225 base_hz = base_ratio * bclk * 1000000;
2229 int has_nhm_turbo_ratio_limit(unsigned int family, unsigned int model)
2232 /* Nehalem compatible, but do not include turbo-ratio limit support */
2233 case 0x2E: /* Nehalem-EX Xeon - Beckton */
2234 case 0x2F: /* Westmere-EX Xeon - Eagleton */
2235 case 0x57: /* PHI - Knights Landing (different MSR definition) */
2241 int has_ivt_turbo_ratio_limit(unsigned int family, unsigned int model)
2250 case 0x3E: /* IVB Xeon */
2251 case 0x3F: /* HSW Xeon */
2257 int has_hsw_turbo_ratio_limit(unsigned int family, unsigned int model)
2266 case 0x3F: /* HSW Xeon */
2273 int has_knl_turbo_ratio_limit(unsigned int family, unsigned int model)
2282 case 0x57: /* Knights Landing */
2288 int has_config_tdp(unsigned int family, unsigned int model)
2297 case 0x3A: /* IVB */
2298 case 0x3C: /* HSW */
2299 case 0x3F: /* HSX */
2300 case 0x45: /* HSW */
2301 case 0x46: /* HSW */
2302 case 0x3D: /* BDW */
2303 case 0x47: /* BDW */
2304 case 0x4F: /* BDX */
2305 case 0x56: /* BDX-DE */
2306 case 0x4E: /* SKL */
2307 case 0x5E: /* SKL */
2308 case 0x8E: /* KBL */
2309 case 0x9E: /* KBL */
2310 case 0x55: /* SKX */
2312 case 0x57: /* Knights Landing */
2320 dump_cstate_pstate_config_info(unsigned int family, unsigned int model)
2322 if (!do_nhm_platform_info)
2325 dump_nhm_platform_info();
2327 if (has_hsw_turbo_ratio_limit(family, model))
2328 dump_hsw_turbo_ratio_limits();
2330 if (has_ivt_turbo_ratio_limit(family, model))
2331 dump_ivt_turbo_ratio_limits();
2333 if (has_nhm_turbo_ratio_limit(family, model))
2334 dump_nhm_turbo_ratio_limits();
2336 if (has_knl_turbo_ratio_limit(family, model))
2337 dump_knl_turbo_ratio_limits();
2339 if (has_config_tdp(family, model))
2348 * Decode the ENERGY_PERF_BIAS MSR
2350 int print_epb(struct thread_data *t, struct core_data *c, struct pkg_data *p)
2352 unsigned long long msr;
2361 /* EPB is per-package */
2362 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
2365 if (cpu_migrate(cpu)) {
2366 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
2370 if (get_msr(cpu, MSR_IA32_ENERGY_PERF_BIAS, &msr))
2373 switch (msr & 0xF) {
2374 case ENERGY_PERF_BIAS_PERFORMANCE:
2375 epb_string = "performance";
2377 case ENERGY_PERF_BIAS_NORMAL:
2378 epb_string = "balanced";
2380 case ENERGY_PERF_BIAS_POWERSAVE:
2381 epb_string = "powersave";
2384 epb_string = "custom";
2387 fprintf(outf, "cpu%d: MSR_IA32_ENERGY_PERF_BIAS: 0x%08llx (%s)\n", cpu, msr, epb_string);
2393 * Decode the MSR_HWP_CAPABILITIES
2395 int print_hwp(struct thread_data *t, struct core_data *c, struct pkg_data *p)
2397 unsigned long long msr;
2405 /* MSR_HWP_CAPABILITIES is per-package */
2406 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
2409 if (cpu_migrate(cpu)) {
2410 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
2414 if (get_msr(cpu, MSR_PM_ENABLE, &msr))
2417 fprintf(outf, "cpu%d: MSR_PM_ENABLE: 0x%08llx (%sHWP)\n",
2418 cpu, msr, (msr & (1 << 0)) ? "" : "No-");
2420 /* MSR_PM_ENABLE[1] == 1 if HWP is enabled and MSRs visible */
2421 if ((msr & (1 << 0)) == 0)
2424 if (get_msr(cpu, MSR_HWP_CAPABILITIES, &msr))
2427 fprintf(outf, "cpu%d: MSR_HWP_CAPABILITIES: 0x%08llx "
2428 "(high 0x%x guar 0x%x eff 0x%x low 0x%x)\n",
2430 (unsigned int)HWP_HIGHEST_PERF(msr),
2431 (unsigned int)HWP_GUARANTEED_PERF(msr),
2432 (unsigned int)HWP_MOSTEFFICIENT_PERF(msr),
2433 (unsigned int)HWP_LOWEST_PERF(msr));
2435 if (get_msr(cpu, MSR_HWP_REQUEST, &msr))
2438 fprintf(outf, "cpu%d: MSR_HWP_REQUEST: 0x%08llx "
2439 "(min 0x%x max 0x%x des 0x%x epp 0x%x window 0x%x pkg 0x%x)\n",
2441 (unsigned int)(((msr) >> 0) & 0xff),
2442 (unsigned int)(((msr) >> 8) & 0xff),
2443 (unsigned int)(((msr) >> 16) & 0xff),
2444 (unsigned int)(((msr) >> 24) & 0xff),
2445 (unsigned int)(((msr) >> 32) & 0xff3),
2446 (unsigned int)(((msr) >> 42) & 0x1));
2449 if (get_msr(cpu, MSR_HWP_REQUEST_PKG, &msr))
2452 fprintf(outf, "cpu%d: MSR_HWP_REQUEST_PKG: 0x%08llx "
2453 "(min 0x%x max 0x%x des 0x%x epp 0x%x window 0x%x)\n",
2455 (unsigned int)(((msr) >> 0) & 0xff),
2456 (unsigned int)(((msr) >> 8) & 0xff),
2457 (unsigned int)(((msr) >> 16) & 0xff),
2458 (unsigned int)(((msr) >> 24) & 0xff),
2459 (unsigned int)(((msr) >> 32) & 0xff3));
2461 if (has_hwp_notify) {
2462 if (get_msr(cpu, MSR_HWP_INTERRUPT, &msr))
2465 fprintf(outf, "cpu%d: MSR_HWP_INTERRUPT: 0x%08llx "
2466 "(%s_Guaranteed_Perf_Change, %s_Excursion_Min)\n",
2468 ((msr) & 0x1) ? "EN" : "Dis",
2469 ((msr) & 0x2) ? "EN" : "Dis");
2471 if (get_msr(cpu, MSR_HWP_STATUS, &msr))
2474 fprintf(outf, "cpu%d: MSR_HWP_STATUS: 0x%08llx "
2475 "(%sGuaranteed_Perf_Change, %sExcursion_Min)\n",
2477 ((msr) & 0x1) ? "" : "No-",
2478 ((msr) & 0x2) ? "" : "No-");
2484 * print_perf_limit()
2486 int print_perf_limit(struct thread_data *t, struct core_data *c, struct pkg_data *p)
2488 unsigned long long msr;
2494 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
2497 if (cpu_migrate(cpu)) {
2498 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
2502 if (do_core_perf_limit_reasons) {
2503 get_msr(cpu, MSR_CORE_PERF_LIMIT_REASONS, &msr);
2504 fprintf(outf, "cpu%d: MSR_CORE_PERF_LIMIT_REASONS, 0x%08llx", cpu, msr);
2505 fprintf(outf, " (Active: %s%s%s%s%s%s%s%s%s%s%s%s%s%s)",
2506 (msr & 1 << 15) ? "bit15, " : "",
2507 (msr & 1 << 14) ? "bit14, " : "",
2508 (msr & 1 << 13) ? "Transitions, " : "",
2509 (msr & 1 << 12) ? "MultiCoreTurbo, " : "",
2510 (msr & 1 << 11) ? "PkgPwrL2, " : "",
2511 (msr & 1 << 10) ? "PkgPwrL1, " : "",
2512 (msr & 1 << 9) ? "CorePwr, " : "",
2513 (msr & 1 << 8) ? "Amps, " : "",
2514 (msr & 1 << 6) ? "VR-Therm, " : "",
2515 (msr & 1 << 5) ? "Auto-HWP, " : "",
2516 (msr & 1 << 4) ? "Graphics, " : "",
2517 (msr & 1 << 2) ? "bit2, " : "",
2518 (msr & 1 << 1) ? "ThermStatus, " : "",
2519 (msr & 1 << 0) ? "PROCHOT, " : "");
2520 fprintf(outf, " (Logged: %s%s%s%s%s%s%s%s%s%s%s%s%s%s)\n",
2521 (msr & 1 << 31) ? "bit31, " : "",
2522 (msr & 1 << 30) ? "bit30, " : "",
2523 (msr & 1 << 29) ? "Transitions, " : "",
2524 (msr & 1 << 28) ? "MultiCoreTurbo, " : "",
2525 (msr & 1 << 27) ? "PkgPwrL2, " : "",
2526 (msr & 1 << 26) ? "PkgPwrL1, " : "",
2527 (msr & 1 << 25) ? "CorePwr, " : "",
2528 (msr & 1 << 24) ? "Amps, " : "",
2529 (msr & 1 << 22) ? "VR-Therm, " : "",
2530 (msr & 1 << 21) ? "Auto-HWP, " : "",
2531 (msr & 1 << 20) ? "Graphics, " : "",
2532 (msr & 1 << 18) ? "bit18, " : "",
2533 (msr & 1 << 17) ? "ThermStatus, " : "",
2534 (msr & 1 << 16) ? "PROCHOT, " : "");
2537 if (do_gfx_perf_limit_reasons) {
2538 get_msr(cpu, MSR_GFX_PERF_LIMIT_REASONS, &msr);
2539 fprintf(outf, "cpu%d: MSR_GFX_PERF_LIMIT_REASONS, 0x%08llx", cpu, msr);
2540 fprintf(outf, " (Active: %s%s%s%s%s%s%s%s)",
2541 (msr & 1 << 0) ? "PROCHOT, " : "",
2542 (msr & 1 << 1) ? "ThermStatus, " : "",
2543 (msr & 1 << 4) ? "Graphics, " : "",
2544 (msr & 1 << 6) ? "VR-Therm, " : "",
2545 (msr & 1 << 8) ? "Amps, " : "",
2546 (msr & 1 << 9) ? "GFXPwr, " : "",
2547 (msr & 1 << 10) ? "PkgPwrL1, " : "",
2548 (msr & 1 << 11) ? "PkgPwrL2, " : "");
2549 fprintf(outf, " (Logged: %s%s%s%s%s%s%s%s)\n",
2550 (msr & 1 << 16) ? "PROCHOT, " : "",
2551 (msr & 1 << 17) ? "ThermStatus, " : "",
2552 (msr & 1 << 20) ? "Graphics, " : "",
2553 (msr & 1 << 22) ? "VR-Therm, " : "",
2554 (msr & 1 << 24) ? "Amps, " : "",
2555 (msr & 1 << 25) ? "GFXPwr, " : "",
2556 (msr & 1 << 26) ? "PkgPwrL1, " : "",
2557 (msr & 1 << 27) ? "PkgPwrL2, " : "");
2559 if (do_ring_perf_limit_reasons) {
2560 get_msr(cpu, MSR_RING_PERF_LIMIT_REASONS, &msr);
2561 fprintf(outf, "cpu%d: MSR_RING_PERF_LIMIT_REASONS, 0x%08llx", cpu, msr);
2562 fprintf(outf, " (Active: %s%s%s%s%s%s)",
2563 (msr & 1 << 0) ? "PROCHOT, " : "",
2564 (msr & 1 << 1) ? "ThermStatus, " : "",
2565 (msr & 1 << 6) ? "VR-Therm, " : "",
2566 (msr & 1 << 8) ? "Amps, " : "",
2567 (msr & 1 << 10) ? "PkgPwrL1, " : "",
2568 (msr & 1 << 11) ? "PkgPwrL2, " : "");
2569 fprintf(outf, " (Logged: %s%s%s%s%s%s)\n",
2570 (msr & 1 << 16) ? "PROCHOT, " : "",
2571 (msr & 1 << 17) ? "ThermStatus, " : "",
2572 (msr & 1 << 22) ? "VR-Therm, " : "",
2573 (msr & 1 << 24) ? "Amps, " : "",
2574 (msr & 1 << 26) ? "PkgPwrL1, " : "",
2575 (msr & 1 << 27) ? "PkgPwrL2, " : "");
2580 #define RAPL_POWER_GRANULARITY 0x7FFF /* 15 bit power granularity */
2581 #define RAPL_TIME_GRANULARITY 0x3F /* 6 bit time granularity */
2583 double get_tdp(unsigned int model)
2585 unsigned long long msr;
2587 if (do_rapl & RAPL_PKG_POWER_INFO)
2588 if (!get_msr(base_cpu, MSR_PKG_POWER_INFO, &msr))
2589 return ((msr >> 0) & RAPL_POWER_GRANULARITY) * rapl_power_units;
2601 * rapl_dram_energy_units_probe()
2602 * Energy units are either hard-coded, or come from RAPL Energy Unit MSR.
2605 rapl_dram_energy_units_probe(int model, double rapl_energy_units)
2607 /* only called for genuine_intel, family 6 */
2610 case 0x3F: /* HSX */
2611 case 0x4F: /* BDX */
2612 case 0x56: /* BDX-DE */
2613 case 0x57: /* KNL */
2614 return (rapl_dram_energy_units = 15.3 / 1000000);
2616 return (rapl_energy_units);
2624 * sets do_rapl, rapl_power_units, rapl_energy_units, rapl_time_units
2626 void rapl_probe(unsigned int family, unsigned int model)
2628 unsigned long long msr;
2629 unsigned int time_unit;
2641 case 0x3C: /* HSW */
2642 case 0x45: /* HSW */
2643 case 0x46: /* HSW */
2644 case 0x3D: /* BDW */
2645 case 0x47: /* BDW */
2646 do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_GFX | RAPL_PKG_POWER_INFO;
2648 case 0x5C: /* BXT */
2649 do_rapl = RAPL_PKG | RAPL_PKG_POWER_INFO;
2651 case 0x4E: /* SKL */
2652 case 0x5E: /* SKL */
2653 case 0x8E: /* KBL */
2654 case 0x9E: /* KBL */
2655 do_rapl = RAPL_PKG | RAPL_DRAM | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO;
2657 case 0x3F: /* HSX */
2658 case 0x4F: /* BDX */
2659 case 0x56: /* BDX-DE */
2660 case 0x55: /* SKX */
2661 case 0x57: /* KNL */
2662 do_rapl = RAPL_PKG | RAPL_DRAM | RAPL_DRAM_POWER_INFO | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO;
2666 do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_DRAM | RAPL_DRAM_POWER_INFO | RAPL_PKG_PERF_STATUS | RAPL_DRAM_PERF_STATUS | RAPL_PKG_POWER_INFO;
2668 case 0x37: /* BYT */
2669 case 0x4D: /* AVN */
2670 do_rapl = RAPL_PKG | RAPL_CORES ;
2676 /* units on package 0, verify later other packages match */
2677 if (get_msr(base_cpu, MSR_RAPL_POWER_UNIT, &msr))
2680 rapl_power_units = 1.0 / (1 << (msr & 0xF));
2682 rapl_energy_units = 1.0 * (1 << (msr >> 8 & 0x1F)) / 1000000;
2684 rapl_energy_units = 1.0 / (1 << (msr >> 8 & 0x1F));
2686 rapl_dram_energy_units = rapl_dram_energy_units_probe(model, rapl_energy_units);
2688 time_unit = msr >> 16 & 0xF;
2692 rapl_time_units = 1.0 / (1 << (time_unit));
2694 tdp = get_tdp(model);
2696 rapl_joule_counter_range = 0xFFFFFFFF * rapl_energy_units / tdp;
2698 fprintf(outf, "RAPL: %.0f sec. Joule Counter Range, at %.0f Watts\n", rapl_joule_counter_range, tdp);
2703 void perf_limit_reasons_probe(unsigned int family, unsigned int model)
2712 case 0x3C: /* HSW */
2713 case 0x45: /* HSW */
2714 case 0x46: /* HSW */
2715 do_gfx_perf_limit_reasons = 1;
2716 case 0x3F: /* HSX */
2717 do_core_perf_limit_reasons = 1;
2718 do_ring_perf_limit_reasons = 1;
2724 int print_thermal(struct thread_data *t, struct core_data *c, struct pkg_data *p)
2726 unsigned long long msr;
2730 if (!(do_dts || do_ptm))
2735 /* DTS is per-core, no need to print for each thread */
2736 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
2739 if (cpu_migrate(cpu)) {
2740 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
2744 if (do_ptm && (t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE)) {
2745 if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_STATUS, &msr))
2748 dts = (msr >> 16) & 0x7F;
2749 fprintf(outf, "cpu%d: MSR_IA32_PACKAGE_THERM_STATUS: 0x%08llx (%d C)\n",
2750 cpu, msr, tcc_activation_temp - dts);
2753 if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_INTERRUPT, &msr))
2756 dts = (msr >> 16) & 0x7F;
2757 dts2 = (msr >> 8) & 0x7F;
2758 fprintf(outf, "cpu%d: MSR_IA32_PACKAGE_THERM_INTERRUPT: 0x%08llx (%d C, %d C)\n",
2759 cpu, msr, tcc_activation_temp - dts, tcc_activation_temp - dts2);
2765 unsigned int resolution;
2767 if (get_msr(cpu, MSR_IA32_THERM_STATUS, &msr))
2770 dts = (msr >> 16) & 0x7F;
2771 resolution = (msr >> 27) & 0xF;
2772 fprintf(outf, "cpu%d: MSR_IA32_THERM_STATUS: 0x%08llx (%d C +/- %d)\n",
2773 cpu, msr, tcc_activation_temp - dts, resolution);
2776 if (get_msr(cpu, MSR_IA32_THERM_INTERRUPT, &msr))
2779 dts = (msr >> 16) & 0x7F;
2780 dts2 = (msr >> 8) & 0x7F;
2781 fprintf(outf, "cpu%d: MSR_IA32_THERM_INTERRUPT: 0x%08llx (%d C, %d C)\n",
2782 cpu, msr, tcc_activation_temp - dts, tcc_activation_temp - dts2);
2789 void print_power_limit_msr(int cpu, unsigned long long msr, char *label)
2791 fprintf(outf, "cpu%d: %s: %sabled (%f Watts, %f sec, clamp %sabled)\n",
2793 ((msr >> 15) & 1) ? "EN" : "DIS",
2794 ((msr >> 0) & 0x7FFF) * rapl_power_units,
2795 (1.0 + (((msr >> 22) & 0x3)/4.0)) * (1 << ((msr >> 17) & 0x1F)) * rapl_time_units,
2796 (((msr >> 16) & 1) ? "EN" : "DIS"));
2801 int print_rapl(struct thread_data *t, struct core_data *c, struct pkg_data *p)
2803 unsigned long long msr;
2809 /* RAPL counters are per package, so print only for 1st thread/package */
2810 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
2814 if (cpu_migrate(cpu)) {
2815 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
2819 if (get_msr(cpu, MSR_RAPL_POWER_UNIT, &msr))
2823 fprintf(outf, "cpu%d: MSR_RAPL_POWER_UNIT: 0x%08llx "
2824 "(%f Watts, %f Joules, %f sec.)\n", cpu, msr,
2825 rapl_power_units, rapl_energy_units, rapl_time_units);
2827 if (do_rapl & RAPL_PKG_POWER_INFO) {
2829 if (get_msr(cpu, MSR_PKG_POWER_INFO, &msr))
2833 fprintf(outf, "cpu%d: MSR_PKG_POWER_INFO: 0x%08llx (%.0f W TDP, RAPL %.0f - %.0f W, %f sec.)\n",
2835 ((msr >> 0) & RAPL_POWER_GRANULARITY) * rapl_power_units,
2836 ((msr >> 16) & RAPL_POWER_GRANULARITY) * rapl_power_units,
2837 ((msr >> 32) & RAPL_POWER_GRANULARITY) * rapl_power_units,
2838 ((msr >> 48) & RAPL_TIME_GRANULARITY) * rapl_time_units);
2841 if (do_rapl & RAPL_PKG) {
2843 if (get_msr(cpu, MSR_PKG_POWER_LIMIT, &msr))
2846 fprintf(outf, "cpu%d: MSR_PKG_POWER_LIMIT: 0x%08llx (%slocked)\n",
2847 cpu, msr, (msr >> 63) & 1 ? "": "UN");
2849 print_power_limit_msr(cpu, msr, "PKG Limit #1");
2850 fprintf(outf, "cpu%d: PKG Limit #2: %sabled (%f Watts, %f* sec, clamp %sabled)\n",
2852 ((msr >> 47) & 1) ? "EN" : "DIS",
2853 ((msr >> 32) & 0x7FFF) * rapl_power_units,
2854 (1.0 + (((msr >> 54) & 0x3)/4.0)) * (1 << ((msr >> 49) & 0x1F)) * rapl_time_units,
2855 ((msr >> 48) & 1) ? "EN" : "DIS");
2858 if (do_rapl & RAPL_DRAM_POWER_INFO) {
2859 if (get_msr(cpu, MSR_DRAM_POWER_INFO, &msr))
2862 fprintf(outf, "cpu%d: MSR_DRAM_POWER_INFO,: 0x%08llx (%.0f W TDP, RAPL %.0f - %.0f W, %f sec.)\n",
2864 ((msr >> 0) & RAPL_POWER_GRANULARITY) * rapl_power_units,
2865 ((msr >> 16) & RAPL_POWER_GRANULARITY) * rapl_power_units,
2866 ((msr >> 32) & RAPL_POWER_GRANULARITY) * rapl_power_units,
2867 ((msr >> 48) & RAPL_TIME_GRANULARITY) * rapl_time_units);
2869 if (do_rapl & RAPL_DRAM) {
2870 if (get_msr(cpu, MSR_DRAM_POWER_LIMIT, &msr))
2872 fprintf(outf, "cpu%d: MSR_DRAM_POWER_LIMIT: 0x%08llx (%slocked)\n",
2873 cpu, msr, (msr >> 31) & 1 ? "": "UN");
2875 print_power_limit_msr(cpu, msr, "DRAM Limit");
2877 if (do_rapl & RAPL_CORE_POLICY) {
2879 if (get_msr(cpu, MSR_PP0_POLICY, &msr))
2882 fprintf(outf, "cpu%d: MSR_PP0_POLICY: %lld\n", cpu, msr & 0xF);
2885 if (do_rapl & RAPL_CORES) {
2888 if (get_msr(cpu, MSR_PP0_POWER_LIMIT, &msr))
2890 fprintf(outf, "cpu%d: MSR_PP0_POWER_LIMIT: 0x%08llx (%slocked)\n",
2891 cpu, msr, (msr >> 31) & 1 ? "": "UN");
2892 print_power_limit_msr(cpu, msr, "Cores Limit");
2895 if (do_rapl & RAPL_GFX) {
2897 if (get_msr(cpu, MSR_PP1_POLICY, &msr))
2900 fprintf(outf, "cpu%d: MSR_PP1_POLICY: %lld\n", cpu, msr & 0xF);
2902 if (get_msr(cpu, MSR_PP1_POWER_LIMIT, &msr))
2904 fprintf(outf, "cpu%d: MSR_PP1_POWER_LIMIT: 0x%08llx (%slocked)\n",
2905 cpu, msr, (msr >> 31) & 1 ? "": "UN");
2906 print_power_limit_msr(cpu, msr, "GFX Limit");
2913 * SNB adds support for additional MSRs:
2915 * MSR_PKG_C7_RESIDENCY 0x000003fa
2916 * MSR_CORE_C7_RESIDENCY 0x000003fe
2917 * MSR_PKG_C2_RESIDENCY 0x0000060d
2920 int has_snb_msrs(unsigned int family, unsigned int model)
2928 case 0x3A: /* IVB */
2929 case 0x3E: /* IVB Xeon */
2930 case 0x3C: /* HSW */
2931 case 0x3F: /* HSW */
2932 case 0x45: /* HSW */
2933 case 0x46: /* HSW */
2934 case 0x3D: /* BDW */
2935 case 0x47: /* BDW */
2936 case 0x4F: /* BDX */
2937 case 0x56: /* BDX-DE */
2938 case 0x4E: /* SKL */
2939 case 0x5E: /* SKL */
2940 case 0x8E: /* KBL */
2941 case 0x9E: /* KBL */
2942 case 0x55: /* SKX */
2943 case 0x5C: /* BXT */
2950 * HSW adds support for additional MSRs:
2952 * MSR_PKG_C8_RESIDENCY 0x00000630
2953 * MSR_PKG_C9_RESIDENCY 0x00000631
2954 * MSR_PKG_C10_RESIDENCY 0x00000632
2956 * MSR_PKGC8_IRTL 0x00000633
2957 * MSR_PKGC9_IRTL 0x00000634
2958 * MSR_PKGC10_IRTL 0x00000635
2961 int has_hsw_msrs(unsigned int family, unsigned int model)
2967 case 0x45: /* HSW */
2968 case 0x3D: /* BDW */
2969 case 0x4E: /* SKL */
2970 case 0x5E: /* SKL */
2971 case 0x8E: /* KBL */
2972 case 0x9E: /* KBL */
2973 case 0x5C: /* BXT */
2980 * SKL adds support for additional MSRS:
2982 * MSR_PKG_WEIGHTED_CORE_C0_RES 0x00000658
2983 * MSR_PKG_ANY_CORE_C0_RES 0x00000659
2984 * MSR_PKG_ANY_GFXE_C0_RES 0x0000065A
2985 * MSR_PKG_BOTH_CORE_GFXE_C0_RES 0x0000065B
2987 int has_skl_msrs(unsigned int family, unsigned int model)
2993 case 0x4E: /* SKL */
2994 case 0x5E: /* SKL */
2995 case 0x8E: /* KBL */
2996 case 0x9E: /* KBL */
3004 int is_slm(unsigned int family, unsigned int model)
3009 case 0x37: /* BYT */
3010 case 0x4D: /* AVN */
3016 int is_knl(unsigned int family, unsigned int model)
3021 case 0x57: /* KNL */
3027 unsigned int get_aperf_mperf_multiplier(unsigned int family, unsigned int model)
3029 if (is_knl(family, model))
3034 #define SLM_BCLK_FREQS 5
3035 double slm_freq_table[SLM_BCLK_FREQS] = { 83.3, 100.0, 133.3, 116.7, 80.0};
3037 double slm_bclk(void)
3039 unsigned long long msr = 3;
3043 if (get_msr(base_cpu, MSR_FSB_FREQ, &msr))
3044 fprintf(outf, "SLM BCLK: unknown\n");
3047 if (i >= SLM_BCLK_FREQS) {
3048 fprintf(outf, "SLM BCLK[%d] invalid\n", i);
3051 freq = slm_freq_table[i];
3053 fprintf(outf, "SLM BCLK: %.1f Mhz\n", freq);
3058 double discover_bclk(unsigned int family, unsigned int model)
3060 if (has_snb_msrs(family, model) || is_knl(family, model))
3062 else if (is_slm(family, model))
3069 * MSR_IA32_TEMPERATURE_TARGET indicates the temperature where
3070 * the Thermal Control Circuit (TCC) activates.
3071 * This is usually equal to tjMax.
3073 * Older processors do not have this MSR, so there we guess,
3074 * but also allow cmdline over-ride with -T.
3076 * Several MSR temperature values are in units of degrees-C
3077 * below this value, including the Digital Thermal Sensor (DTS),
3078 * Package Thermal Management Sensor (PTM), and thermal event thresholds.
3080 int set_temperature_target(struct thread_data *t, struct core_data *c, struct pkg_data *p)
3082 unsigned long long msr;
3083 unsigned int target_c_local;
3086 /* tcc_activation_temp is used only for dts or ptm */
3087 if (!(do_dts || do_ptm))
3090 /* this is a per-package concept */
3091 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
3095 if (cpu_migrate(cpu)) {
3096 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
3100 if (tcc_activation_temp_override != 0) {
3101 tcc_activation_temp = tcc_activation_temp_override;
3102 fprintf(outf, "cpu%d: Using cmdline TCC Target (%d C)\n",
3103 cpu, tcc_activation_temp);
3107 /* Temperature Target MSR is Nehalem and newer only */
3108 if (!do_nhm_platform_info)
3111 if (get_msr(base_cpu, MSR_IA32_TEMPERATURE_TARGET, &msr))
3114 target_c_local = (msr >> 16) & 0xFF;
3117 fprintf(outf, "cpu%d: MSR_IA32_TEMPERATURE_TARGET: 0x%08llx (%d C)\n",
3118 cpu, msr, target_c_local);
3120 if (!target_c_local)
3123 tcc_activation_temp = target_c_local;
3128 tcc_activation_temp = TJMAX_DEFAULT;
3129 fprintf(outf, "cpu%d: Guessing tjMax %d C, Please use -T to specify\n",
3130 cpu, tcc_activation_temp);
3135 void decode_feature_control_msr(void)
3137 unsigned long long msr;
3139 if (!get_msr(base_cpu, MSR_IA32_FEATURE_CONTROL, &msr))
3140 fprintf(outf, "cpu%d: MSR_IA32_FEATURE_CONTROL: 0x%08llx (%sLocked %s)\n",
3142 msr & FEATURE_CONTROL_LOCKED ? "" : "UN-",
3143 msr & (1 << 18) ? "SGX" : "");
3146 void decode_misc_enable_msr(void)
3148 unsigned long long msr;
3150 if (!get_msr(base_cpu, MSR_IA32_MISC_ENABLE, &msr))
3151 fprintf(outf, "cpu%d: MSR_IA32_MISC_ENABLE: 0x%08llx (%s %s %s)\n",
3153 msr & (1 << 3) ? "TCC" : "",
3154 msr & (1 << 16) ? "EIST" : "",
3155 msr & (1 << 18) ? "MONITOR" : "");
3159 * Decode MSR_MISC_PWR_MGMT
3161 * Decode the bits according to the Nehalem documentation
3162 * bit[0] seems to continue to have same meaning going forward
3165 void decode_misc_pwr_mgmt_msr(void)
3167 unsigned long long msr;
3169 if (!do_nhm_platform_info)
3172 if (!get_msr(base_cpu, MSR_MISC_PWR_MGMT, &msr))
3173 fprintf(outf, "cpu%d: MSR_MISC_PWR_MGMT: 0x%08llx (%sable-EIST_Coordination %sable-EPB)\n",
3175 msr & (1 << 0) ? "DIS" : "EN",
3176 msr & (1 << 1) ? "EN" : "DIS");
3179 void process_cpuid()
3181 unsigned int eax, ebx, ecx, edx, max_level, max_extended_level;
3182 unsigned int fms, family, model, stepping;
3184 eax = ebx = ecx = edx = 0;
3186 __cpuid(0, max_level, ebx, ecx, edx);
3188 if (ebx == 0x756e6547 && edx == 0x49656e69 && ecx == 0x6c65746e)
3192 fprintf(outf, "CPUID(0): %.4s%.4s%.4s ",
3193 (char *)&ebx, (char *)&edx, (char *)&ecx);
3195 __cpuid(1, fms, ebx, ecx, edx);
3196 family = (fms >> 8) & 0xf;
3197 model = (fms >> 4) & 0xf;
3198 stepping = fms & 0xf;
3199 if (family == 6 || family == 0xf)
3200 model += ((fms >> 16) & 0xf) << 4;
3203 fprintf(outf, "%d CPUID levels; family:model:stepping 0x%x:%x:%x (%d:%d:%d)\n",
3204 max_level, family, model, stepping, family, model, stepping);
3205 fprintf(outf, "CPUID(1): %s %s %s %s %s %s %s %s %s\n",
3206 ecx & (1 << 0) ? "SSE3" : "-",
3207 ecx & (1 << 3) ? "MONITOR" : "-",
3208 ecx & (1 << 6) ? "SMX" : "-",
3209 ecx & (1 << 7) ? "EIST" : "-",
3210 ecx & (1 << 8) ? "TM2" : "-",
3211 edx & (1 << 4) ? "TSC" : "-",
3212 edx & (1 << 5) ? "MSR" : "-",
3213 edx & (1 << 22) ? "ACPI-TM" : "-",
3214 edx & (1 << 29) ? "TM" : "-");
3217 if (!(edx & (1 << 5)))
3218 errx(1, "CPUID: no MSR");
3221 * check max extended function levels of CPUID.
3222 * This is needed to check for invariant TSC.
3223 * This check is valid for both Intel and AMD.
3225 ebx = ecx = edx = 0;
3226 __cpuid(0x80000000, max_extended_level, ebx, ecx, edx);
3228 if (max_extended_level >= 0x80000007) {
3231 * Non-Stop TSC is advertised by CPUID.EAX=0x80000007: EDX.bit8
3232 * this check is valid for both Intel and AMD
3234 __cpuid(0x80000007, eax, ebx, ecx, edx);
3235 has_invariant_tsc = edx & (1 << 8);
3239 * APERF/MPERF is advertised by CPUID.EAX=0x6: ECX.bit0
3240 * this check is valid for both Intel and AMD
3243 __cpuid(0x6, eax, ebx, ecx, edx);
3244 has_aperf = ecx & (1 << 0);
3245 do_dts = eax & (1 << 0);
3246 do_ptm = eax & (1 << 6);
3247 has_hwp = eax & (1 << 7);
3248 has_hwp_notify = eax & (1 << 8);
3249 has_hwp_activity_window = eax & (1 << 9);
3250 has_hwp_epp = eax & (1 << 10);
3251 has_hwp_pkg = eax & (1 << 11);
3252 has_epb = ecx & (1 << 3);
3255 fprintf(outf, "CPUID(6): %sAPERF, %sDTS, %sPTM, %sHWP, "
3256 "%sHWPnotify, %sHWPwindow, %sHWPepp, %sHWPpkg, %sEPB\n",
3257 has_aperf ? "" : "No-",
3258 do_dts ? "" : "No-",
3259 do_ptm ? "" : "No-",
3260 has_hwp ? "" : "No-",
3261 has_hwp_notify ? "" : "No-",
3262 has_hwp_activity_window ? "" : "No-",
3263 has_hwp_epp ? "" : "No-",
3264 has_hwp_pkg ? "" : "No-",
3265 has_epb ? "" : "No-");
3268 decode_misc_enable_msr();
3270 if (max_level >= 0x7 && debug) {
3275 __cpuid_count(0x7, 0, eax, ebx, ecx, edx);
3277 has_sgx = ebx & (1 << 2);
3278 fprintf(outf, "CPUID(7): %sSGX\n", has_sgx ? "" : "No-");
3281 decode_feature_control_msr();
3284 if (max_level >= 0x15) {
3285 unsigned int eax_crystal;
3286 unsigned int ebx_tsc;
3289 * CPUID 15H TSC/Crystal ratio, possibly Crystal Hz
3291 eax_crystal = ebx_tsc = crystal_hz = edx = 0;
3292 __cpuid(0x15, eax_crystal, ebx_tsc, crystal_hz, edx);
3296 if (debug && (ebx != 0))
3297 fprintf(outf, "CPUID(0x15): eax_crystal: %d ebx_tsc: %d ecx_crystal_hz: %d\n",
3298 eax_crystal, ebx_tsc, crystal_hz);
3300 if (crystal_hz == 0)
3302 case 0x4E: /* SKL */
3303 case 0x5E: /* SKL */
3304 case 0x8E: /* KBL */
3305 case 0x9E: /* KBL */
3306 crystal_hz = 24000000; /* 24.0 MHz */
3308 case 0x55: /* SKX */
3309 crystal_hz = 25000000; /* 25.0 MHz */
3311 case 0x5C: /* BXT */
3312 crystal_hz = 19200000; /* 19.2 MHz */
3319 tsc_hz = (unsigned long long) crystal_hz * ebx_tsc / eax_crystal;
3321 fprintf(outf, "TSC: %lld MHz (%d Hz * %d / %d / 1000000)\n",
3322 tsc_hz / 1000000, crystal_hz, ebx_tsc, eax_crystal);
3326 if (max_level >= 0x16) {
3327 unsigned int base_mhz, max_mhz, bus_mhz, edx;
3330 * CPUID 16H Base MHz, Max MHz, Bus MHz
3332 base_mhz = max_mhz = bus_mhz = edx = 0;
3334 __cpuid(0x16, base_mhz, max_mhz, bus_mhz, edx);
3336 fprintf(outf, "CPUID(0x16): base_mhz: %d max_mhz: %d bus_mhz: %d\n",
3337 base_mhz, max_mhz, bus_mhz);
3341 aperf_mperf_multiplier = get_aperf_mperf_multiplier(family, model);
3343 do_nhm_platform_info = do_nhm_cstates = do_smi = probe_nhm_msrs(family, model);
3344 do_snb_cstates = has_snb_msrs(family, model);
3345 do_irtl_snb = has_snb_msrs(family, model);
3346 do_pc2 = do_snb_cstates && (pkg_cstate_limit >= PCL__2);
3347 do_pc3 = (pkg_cstate_limit >= PCL__3);
3348 do_pc6 = (pkg_cstate_limit >= PCL__6);
3349 do_pc7 = do_snb_cstates && (pkg_cstate_limit >= PCL__7);
3350 do_c8_c9_c10 = has_hsw_msrs(family, model);
3351 do_irtl_hsw = has_hsw_msrs(family, model);
3352 do_skl_residency = has_skl_msrs(family, model);
3353 do_slm_cstates = is_slm(family, model);
3354 do_knl_cstates = is_knl(family, model);
3357 decode_misc_pwr_mgmt_msr();
3359 rapl_probe(family, model);
3360 perf_limit_reasons_probe(family, model);
3363 dump_cstate_pstate_config_info(family, model);
3365 if (has_skl_msrs(family, model))
3366 calculate_tsc_tweak();
3368 do_gfx_rc6_ms = !access("/sys/class/drm/card0/power/rc6_residency_ms", R_OK);
3370 do_gfx_mhz = !access("/sys/class/graphics/fb0/device/drm/card0/gt_cur_freq_mhz", R_OK);
3378 "Usage: turbostat [OPTIONS][(--interval seconds) | COMMAND ...]\n"
3380 "Turbostat forks the specified COMMAND and prints statistics\n"
3381 "when COMMAND completes.\n"
3382 "If no COMMAND is specified, turbostat wakes every 5-seconds\n"
3383 "to print statistics, until interrupted.\n"
3384 "--debug run in \"debug\" mode\n"
3385 "--interval sec Override default 5-second measurement interval\n"
3386 "--help print this help message\n"
3387 "--counter msr print 32-bit counter at address \"msr\"\n"
3388 "--Counter msr print 64-bit Counter at address \"msr\"\n"
3389 "--out file create or truncate \"file\" for all output\n"
3390 "--msr msr print 32-bit value at address \"msr\"\n"
3391 "--MSR msr print 64-bit Value at address \"msr\"\n"
3392 "--version print version information\n"
3394 "For more help, run \"man turbostat\"\n");
3399 * in /dev/cpu/ return success for names that are numbers
3400 * ie. filter out ".", "..", "microcode".
3402 int dir_filter(const struct dirent *dirp)
3404 if (isdigit(dirp->d_name[0]))
3410 int open_dev_cpu_msr(int dummy1)
3415 void topology_probe()
3418 int max_core_id = 0;
3419 int max_package_id = 0;
3420 int max_siblings = 0;
3421 struct cpu_topology {
3423 int physical_package_id;
3426 /* Initialize num_cpus, max_cpu_num */
3428 topo.max_cpu_num = 0;
3429 for_all_proc_cpus(count_cpus);
3430 if (!summary_only && topo.num_cpus > 1)
3434 fprintf(outf, "num_cpus %d max_cpu_num %d\n", topo.num_cpus, topo.max_cpu_num);
3436 cpus = calloc(1, (topo.max_cpu_num + 1) * sizeof(struct cpu_topology));
3438 err(1, "calloc cpus");
3441 * Allocate and initialize cpu_present_set
3443 cpu_present_set = CPU_ALLOC((topo.max_cpu_num + 1));
3444 if (cpu_present_set == NULL)
3445 err(3, "CPU_ALLOC");
3446 cpu_present_setsize = CPU_ALLOC_SIZE((topo.max_cpu_num + 1));
3447 CPU_ZERO_S(cpu_present_setsize, cpu_present_set);
3448 for_all_proc_cpus(mark_cpu_present);
3451 * Allocate and initialize cpu_affinity_set
3453 cpu_affinity_set = CPU_ALLOC((topo.max_cpu_num + 1));
3454 if (cpu_affinity_set == NULL)
3455 err(3, "CPU_ALLOC");
3456 cpu_affinity_setsize = CPU_ALLOC_SIZE((topo.max_cpu_num + 1));
3457 CPU_ZERO_S(cpu_affinity_setsize, cpu_affinity_set);
3462 * find max_core_id, max_package_id
3464 for (i = 0; i <= topo.max_cpu_num; ++i) {
3467 if (cpu_is_not_present(i)) {
3469 fprintf(outf, "cpu%d NOT PRESENT\n", i);
3472 cpus[i].core_id = get_core_id(i);
3473 if (cpus[i].core_id > max_core_id)
3474 max_core_id = cpus[i].core_id;
3476 cpus[i].physical_package_id = get_physical_package_id(i);
3477 if (cpus[i].physical_package_id > max_package_id)
3478 max_package_id = cpus[i].physical_package_id;
3480 siblings = get_num_ht_siblings(i);
3481 if (siblings > max_siblings)
3482 max_siblings = siblings;
3484 fprintf(outf, "cpu %d pkg %d core %d\n",
3485 i, cpus[i].physical_package_id, cpus[i].core_id);
3487 topo.num_cores_per_pkg = max_core_id + 1;
3489 fprintf(outf, "max_core_id %d, sizing for %d cores per package\n",
3490 max_core_id, topo.num_cores_per_pkg);
3491 if (debug && !summary_only && topo.num_cores_per_pkg > 1)
3494 topo.num_packages = max_package_id + 1;
3496 fprintf(outf, "max_package_id %d, sizing for %d packages\n",
3497 max_package_id, topo.num_packages);
3498 if (debug && !summary_only && topo.num_packages > 1)
3501 topo.num_threads_per_core = max_siblings;
3503 fprintf(outf, "max_siblings %d\n", max_siblings);
3509 allocate_counters(struct thread_data **t, struct core_data **c, struct pkg_data **p)
3513 *t = calloc(topo.num_threads_per_core * topo.num_cores_per_pkg *
3514 topo.num_packages, sizeof(struct thread_data));
3518 for (i = 0; i < topo.num_threads_per_core *
3519 topo.num_cores_per_pkg * topo.num_packages; i++)
3520 (*t)[i].cpu_id = -1;
3522 *c = calloc(topo.num_cores_per_pkg * topo.num_packages,
3523 sizeof(struct core_data));
3527 for (i = 0; i < topo.num_cores_per_pkg * topo.num_packages; i++)
3528 (*c)[i].core_id = -1;
3530 *p = calloc(topo.num_packages, sizeof(struct pkg_data));
3534 for (i = 0; i < topo.num_packages; i++)
3535 (*p)[i].package_id = i;
3539 err(1, "calloc counters");
3544 * set cpu_id, core_num, pkg_num
3545 * set FIRST_THREAD_IN_CORE and FIRST_CORE_IN_PACKAGE
3547 * increment topo.num_cores when 1st core in pkg seen
3549 void init_counter(struct thread_data *thread_base, struct core_data *core_base,
3550 struct pkg_data *pkg_base, int thread_num, int core_num,
3551 int pkg_num, int cpu_id)
3553 struct thread_data *t;
3554 struct core_data *c;
3557 t = GET_THREAD(thread_base, thread_num, core_num, pkg_num);
3558 c = GET_CORE(core_base, core_num, pkg_num);
3559 p = GET_PKG(pkg_base, pkg_num);
3562 if (thread_num == 0) {
3563 t->flags |= CPU_IS_FIRST_THREAD_IN_CORE;
3564 if (cpu_is_first_core_in_package(cpu_id))
3565 t->flags |= CPU_IS_FIRST_CORE_IN_PACKAGE;
3568 c->core_id = core_num;
3569 p->package_id = pkg_num;
3573 int initialize_counters(int cpu_id)
3575 int my_thread_id, my_core_id, my_package_id;
3577 my_package_id = get_physical_package_id(cpu_id);
3578 my_core_id = get_core_id(cpu_id);
3579 my_thread_id = get_cpu_position_in_core(cpu_id);
3583 init_counter(EVEN_COUNTERS, my_thread_id, my_core_id, my_package_id, cpu_id);
3584 init_counter(ODD_COUNTERS, my_thread_id, my_core_id, my_package_id, cpu_id);
3588 void allocate_output_buffer()
3590 output_buffer = calloc(1, (1 + topo.num_cpus) * 1024);
3591 outp = output_buffer;
3593 err(-1, "calloc output buffer");
3595 void allocate_fd_percpu(void)
3597 fd_percpu = calloc(topo.max_cpu_num, sizeof(int));
3598 if (fd_percpu == NULL)
3599 err(-1, "calloc fd_percpu");
3601 void allocate_irq_buffers(void)
3603 irq_column_2_cpu = calloc(topo.num_cpus, sizeof(int));
3604 if (irq_column_2_cpu == NULL)
3605 err(-1, "calloc %d", topo.num_cpus);
3607 irqs_per_cpu = calloc(topo.max_cpu_num, sizeof(int));
3608 if (irqs_per_cpu == NULL)
3609 err(-1, "calloc %d", topo.max_cpu_num);
3611 void setup_all_buffers(void)
3614 allocate_irq_buffers();
3615 allocate_fd_percpu();
3616 allocate_counters(&thread_even, &core_even, &package_even);
3617 allocate_counters(&thread_odd, &core_odd, &package_odd);
3618 allocate_output_buffer();
3619 for_all_proc_cpus(initialize_counters);
3622 void set_base_cpu(void)
3624 base_cpu = sched_getcpu();
3626 err(-ENODEV, "No valid cpus found");
3629 fprintf(outf, "base_cpu = %d\n", base_cpu);
3632 void turbostat_init()
3634 setup_all_buffers();
3637 check_permissions();
3642 for_all_cpus(print_hwp, ODD_COUNTERS);
3645 for_all_cpus(print_epb, ODD_COUNTERS);
3648 for_all_cpus(print_perf_limit, ODD_COUNTERS);
3651 for_all_cpus(print_rapl, ODD_COUNTERS);
3653 for_all_cpus(set_temperature_target, ODD_COUNTERS);
3656 for_all_cpus(print_thermal, ODD_COUNTERS);
3658 if (debug && do_irtl_snb)
3662 int fork_it(char **argv)
3667 status = for_all_cpus(get_counters, EVEN_COUNTERS);
3670 /* clear affinity side-effect of get_counters() */
3671 sched_setaffinity(0, cpu_present_setsize, cpu_present_set);
3672 gettimeofday(&tv_even, (struct timezone *)NULL);
3677 execvp(argv[0], argv);
3681 if (child_pid == -1)
3684 signal(SIGINT, SIG_IGN);
3685 signal(SIGQUIT, SIG_IGN);
3686 if (waitpid(child_pid, &status, 0) == -1)
3687 err(status, "waitpid");
3690 * n.b. fork_it() does not check for errors from for_all_cpus()
3691 * because re-starting is problematic when forking
3693 for_all_cpus(get_counters, ODD_COUNTERS);
3694 gettimeofday(&tv_odd, (struct timezone *)NULL);
3695 timersub(&tv_odd, &tv_even, &tv_delta);
3696 for_all_cpus_2(delta_cpu, ODD_COUNTERS, EVEN_COUNTERS);
3697 compute_average(EVEN_COUNTERS);
3698 format_all_counters(EVEN_COUNTERS);
3700 fprintf(outf, "%.6f sec\n", tv_delta.tv_sec + tv_delta.tv_usec/1000000.0);
3702 flush_output_stderr();
3707 int get_and_dump_counters(void)
3711 status = for_all_cpus(get_counters, ODD_COUNTERS);
3715 status = for_all_cpus(dump_counters, ODD_COUNTERS);
3719 flush_output_stdout();
3724 void print_version() {
3725 fprintf(outf, "turbostat version 4.12 5 Apr 2016"
3726 " - Len Brown <lenb@kernel.org>\n");
3729 void cmdline(int argc, char **argv)
3732 int option_index = 0;
3733 static struct option long_options[] = {
3734 {"Counter", required_argument, 0, 'C'},
3735 {"counter", required_argument, 0, 'c'},
3736 {"Dump", no_argument, 0, 'D'},
3737 {"debug", no_argument, 0, 'd'},
3738 {"interval", required_argument, 0, 'i'},
3739 {"help", no_argument, 0, 'h'},
3740 {"Joules", no_argument, 0, 'J'},
3741 {"MSR", required_argument, 0, 'M'},
3742 {"msr", required_argument, 0, 'm'},
3743 {"out", required_argument, 0, 'o'},
3744 {"Package", no_argument, 0, 'p'},
3745 {"processor", no_argument, 0, 'p'},
3746 {"Summary", no_argument, 0, 'S'},
3747 {"TCC", required_argument, 0, 'T'},
3748 {"version", no_argument, 0, 'v' },
3754 while ((opt = getopt_long_only(argc, argv, "+C:c:Ddhi:JM:m:o:PpST:v",
3755 long_options, &option_index)) != -1) {
3758 sscanf(optarg, "%x", &extra_delta_offset64);
3761 sscanf(optarg, "%x", &extra_delta_offset32);
3775 double interval = strtod(optarg, NULL);
3777 if (interval < 0.001) {
3778 fprintf(outf, "interval %f seconds is too small\n",
3783 interval_ts.tv_sec = interval;
3784 interval_ts.tv_nsec = (interval - interval_ts.tv_sec) * 1000000000;
3791 sscanf(optarg, "%x", &extra_msr_offset64);
3794 sscanf(optarg, "%x", &extra_msr_offset32);
3797 outf = fopen_or_die(optarg, "w");
3809 tcc_activation_temp_override = atoi(optarg);
3819 int main(int argc, char **argv)
3823 cmdline(argc, argv);
3830 /* dump counters and exit */
3832 return get_and_dump_counters();
3835 * if any params left, it must be a command to fork
3838 return fork_it(argv + optind);