6 #include <sys/syscall.h>
7 #include <linux/types.h>
8 #include <linux/perf_event.h>
9 #include <asm/barrier.h>
12 #define cpu_relax() asm volatile("rep; nop" ::: "memory");
13 #define CPUINFO_PROC {"model name"}
14 #ifndef __NR_perf_event_open
15 # define __NR_perf_event_open 336
18 # define __NR_futex 240
21 # define __NR_gettid 224
25 #if defined(__x86_64__)
26 #define cpu_relax() asm volatile("rep; nop" ::: "memory");
27 #define CPUINFO_PROC {"model name"}
28 #ifndef __NR_perf_event_open
29 # define __NR_perf_event_open 298
32 # define __NR_futex 202
35 # define __NR_gettid 186
40 #include "../../arch/powerpc/include/uapi/asm/unistd.h"
41 #define CPUINFO_PROC {"cpu"}
45 #define CPUINFO_PROC {"vendor_id"}
49 #define CPUINFO_PROC {"cpu type"}
53 #define mb() asm volatile("" ::: "memory")
54 #define wmb() asm volatile("" ::: "memory")
55 #define rmb() asm volatile("" ::: "memory")
56 #define CPUINFO_PROC {"cpu"}
60 #define CPUINFO_PROC {"cpu"}
64 #define CPUINFO_PROC {"cpu model"}
68 #define mb() asm volatile ("mf" ::: "memory")
69 #define wmb() asm volatile ("mf" ::: "memory")
70 #define rmb() asm volatile ("mf" ::: "memory")
71 #define cpu_relax() asm volatile ("hint @pause" ::: "memory")
72 #define CPUINFO_PROC {"model name"}
77 * Use the __kuser_memory_barrier helper in the CPU helper page. See
78 * arch/arm/kernel/entry-armv.S in the kernel source for details.
80 #define mb() ((void(*)(void))0xffff0fa0)()
81 #define wmb() ((void(*)(void))0xffff0fa0)()
82 #define rmb() ((void(*)(void))0xffff0fa0)()
83 #define CPUINFO_PROC {"model name", "Processor"}
87 #define mb() asm volatile("dmb ish" ::: "memory")
88 #define wmb() asm volatile("dmb ishst" ::: "memory")
89 #define rmb() asm volatile("dmb ishld" ::: "memory")
90 #define cpu_relax() asm volatile("yield" ::: "memory")
94 #define mb() asm volatile( \
103 #define CPUINFO_PROC {"cpu model"}
107 #define mb() asm volatile("" ::: "memory")
108 #define wmb() asm volatile("" ::: "memory")
109 #define rmb() asm volatile("" ::: "memory")
110 #define CPUINFO_PROC {"Processor"}
114 #define mb() asm volatile("" ::: "memory")
115 #define wmb() asm volatile("" ::: "memory")
116 #define rmb() asm volatile("" ::: "memory")
117 #define CPUINFO_PROC {"CPU"}
121 #define mb() asm volatile("memw" ::: "memory")
122 #define wmb() asm volatile("memw" ::: "memory")
123 #define rmb() asm volatile("" ::: "memory")
124 #define CPUINFO_PROC {"core ID"}
128 #define mb() asm volatile ("mf" ::: "memory")
129 #define wmb() asm volatile ("mf" ::: "memory")
130 #define rmb() asm volatile ("mf" ::: "memory")
131 #define cpu_relax() asm volatile ("mfspr zero, PASS" ::: "memory")
132 #define CPUINFO_PROC {"model name"}
136 #define cpu_relax() barrier()
140 sys_perf_event_open(struct perf_event_attr *attr,
141 pid_t pid, int cpu, int group_fd,
146 fd = syscall(__NR_perf_event_open, attr, pid, cpu,
149 #ifdef HAVE_ATTR_TEST
150 if (unlikely(test_attr__enabled))
151 test_attr__open(attr, pid, cpu, fd, group_fd, flags);
156 #endif /* _PERF_SYS_H */