1 // SPDX-License-Identifier: GPL-2.0-only
3 * STM32 ALSA SoC Digital Audio Interface (SAI) driver.
5 * Copyright (C) 2016, STMicroelectronics - All Rights Reserved
6 * Author(s): Olivier Moysan <olivier.moysan@st.com> for STMicroelectronics.
9 #include <linux/bitfield.h>
10 #include <linux/clk.h>
11 #include <linux/delay.h>
12 #include <linux/module.h>
13 #include <linux/of_platform.h>
14 #include <linux/pinctrl/consumer.h>
15 #include <linux/reset.h>
17 #include <sound/dmaengine_pcm.h>
18 #include <sound/core.h>
20 #include "stm32_sai.h"
22 static const struct stm32_sai_conf stm32_sai_conf_f4 = {
23 .version = SAI_STM32F4,
27 static const struct stm32_sai_conf stm32_sai_conf_h7 = {
28 .version = SAI_STM32H7,
32 static const struct of_device_id stm32_sai_ids[] = {
33 { .compatible = "st,stm32f4-sai", .data = (void *)&stm32_sai_conf_f4 },
34 { .compatible = "st,stm32h7-sai", .data = (void *)&stm32_sai_conf_h7 },
38 static int stm32_sai_pclk_disable(struct device *dev)
40 struct stm32_sai_data *sai = dev_get_drvdata(dev);
42 clk_disable_unprepare(sai->pclk);
47 static int stm32_sai_pclk_enable(struct device *dev)
49 struct stm32_sai_data *sai = dev_get_drvdata(dev);
52 ret = clk_prepare_enable(sai->pclk);
54 dev_err(&sai->pdev->dev, "failed to enable clock: %d\n", ret);
61 static int stm32_sai_sync_conf_client(struct stm32_sai_data *sai, int synci)
65 /* Enable peripheral clock to allow GCR register access */
66 ret = stm32_sai_pclk_enable(&sai->pdev->dev);
70 writel_relaxed(FIELD_PREP(SAI_GCR_SYNCIN_MASK, (synci - 1)), sai->base);
72 stm32_sai_pclk_disable(&sai->pdev->dev);
77 static int stm32_sai_sync_conf_provider(struct stm32_sai_data *sai, int synco)
82 /* Enable peripheral clock to allow GCR register access */
83 ret = stm32_sai_pclk_enable(&sai->pdev->dev);
87 dev_dbg(&sai->pdev->dev, "Set %pOFn%s as synchro provider\n",
88 sai->pdev->dev.of_node,
89 synco == STM_SAI_SYNC_OUT_A ? "A" : "B");
91 prev_synco = FIELD_GET(SAI_GCR_SYNCOUT_MASK, readl_relaxed(sai->base));
92 if (prev_synco != STM_SAI_SYNC_OUT_NONE && synco != prev_synco) {
93 dev_err(&sai->pdev->dev, "%pOFn%s already set as sync provider\n",
94 sai->pdev->dev.of_node,
95 prev_synco == STM_SAI_SYNC_OUT_A ? "A" : "B");
96 stm32_sai_pclk_disable(&sai->pdev->dev);
100 writel_relaxed(FIELD_PREP(SAI_GCR_SYNCOUT_MASK, synco), sai->base);
102 stm32_sai_pclk_disable(&sai->pdev->dev);
107 static int stm32_sai_set_sync(struct stm32_sai_data *sai_client,
108 struct device_node *np_provider,
109 int synco, int synci)
111 struct platform_device *pdev = of_find_device_by_node(np_provider);
112 struct stm32_sai_data *sai_provider;
116 dev_err(&sai_client->pdev->dev,
117 "Device not found for node %pOFn\n", np_provider);
118 of_node_put(np_provider);
122 sai_provider = platform_get_drvdata(pdev);
124 dev_err(&sai_client->pdev->dev,
125 "SAI sync provider data not found\n");
130 /* Configure sync client */
131 ret = stm32_sai_sync_conf_client(sai_client, synci);
135 /* Configure sync provider */
136 ret = stm32_sai_sync_conf_provider(sai_provider, synco);
139 put_device(&pdev->dev);
140 of_node_put(np_provider);
144 static int stm32_sai_probe(struct platform_device *pdev)
146 struct stm32_sai_data *sai;
147 struct reset_control *rst;
148 struct resource *res;
149 const struct of_device_id *of_id;
151 sai = devm_kzalloc(&pdev->dev, sizeof(*sai), GFP_KERNEL);
155 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
156 sai->base = devm_ioremap_resource(&pdev->dev, res);
157 if (IS_ERR(sai->base))
158 return PTR_ERR(sai->base);
160 of_id = of_match_device(stm32_sai_ids, &pdev->dev);
162 sai->conf = (struct stm32_sai_conf *)of_id->data;
166 if (!STM_SAI_IS_F4(sai)) {
167 sai->pclk = devm_clk_get(&pdev->dev, "pclk");
168 if (IS_ERR(sai->pclk)) {
169 dev_err(&pdev->dev, "missing bus clock pclk\n");
170 return PTR_ERR(sai->pclk);
174 sai->clk_x8k = devm_clk_get(&pdev->dev, "x8k");
175 if (IS_ERR(sai->clk_x8k)) {
176 dev_err(&pdev->dev, "missing x8k parent clock\n");
177 return PTR_ERR(sai->clk_x8k);
180 sai->clk_x11k = devm_clk_get(&pdev->dev, "x11k");
181 if (IS_ERR(sai->clk_x11k)) {
182 dev_err(&pdev->dev, "missing x11k parent clock\n");
183 return PTR_ERR(sai->clk_x11k);
187 sai->irq = platform_get_irq(pdev, 0);
189 dev_err(&pdev->dev, "no irq for node %s\n", pdev->name);
194 rst = devm_reset_control_get_exclusive(&pdev->dev, NULL);
196 reset_control_assert(rst);
198 reset_control_deassert(rst);
202 sai->set_sync = &stm32_sai_set_sync;
203 platform_set_drvdata(pdev, sai);
205 return devm_of_platform_populate(&pdev->dev);
208 #ifdef CONFIG_PM_SLEEP
210 * When pins are shared by two sai sub instances, pins have to be defined
211 * in sai parent node. In this case, pins state is not managed by alsa fw.
212 * These pins are managed in suspend/resume callbacks.
214 static int stm32_sai_suspend(struct device *dev)
216 struct stm32_sai_data *sai = dev_get_drvdata(dev);
219 ret = stm32_sai_pclk_enable(dev);
223 sai->gcr = readl_relaxed(sai->base);
224 stm32_sai_pclk_disable(dev);
226 return pinctrl_pm_select_sleep_state(dev);
229 static int stm32_sai_resume(struct device *dev)
231 struct stm32_sai_data *sai = dev_get_drvdata(dev);
234 ret = stm32_sai_pclk_enable(dev);
238 writel_relaxed(sai->gcr, sai->base);
239 stm32_sai_pclk_disable(dev);
241 return pinctrl_pm_select_default_state(dev);
243 #endif /* CONFIG_PM_SLEEP */
245 static const struct dev_pm_ops stm32_sai_pm_ops = {
246 SET_SYSTEM_SLEEP_PM_OPS(stm32_sai_suspend, stm32_sai_resume)
249 MODULE_DEVICE_TABLE(of, stm32_sai_ids);
251 static struct platform_driver stm32_sai_driver = {
253 .name = "st,stm32-sai",
254 .of_match_table = stm32_sai_ids,
255 .pm = &stm32_sai_pm_ops,
257 .probe = stm32_sai_probe,
260 module_platform_driver(stm32_sai_driver);
262 MODULE_DESCRIPTION("STM32 Soc SAI Interface");
263 MODULE_AUTHOR("Olivier Moysan <olivier.moysan@st.com>");
264 MODULE_ALIAS("platform:st,stm32-sai");
265 MODULE_LICENSE("GPL v2");