1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
3 // This file is provided under a dual BSD/GPLv2 license. When using or
4 // redistributing this file, you may do so under either license.
6 // Copyright(c) 2018 Intel Corporation. All rights reserved.
8 // Authors: Liam Girdwood <liam.r.girdwood@linux.intel.com>
9 // Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
10 // Rander Wang <rander.wang@intel.com>
11 // Keyon Jie <yang.jie@linux.intel.com>
15 * Hardware interface for generic Intel audio DSP HDA IP
18 #include <linux/module.h>
19 #include <sound/hdaudio_ext.h>
20 #include <sound/sof.h>
21 #include <sound/sof/xtensa.h>
24 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA_AUDIO_CODEC)
25 #include "../../codecs/hdac_hda.h"
28 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
29 #include <sound/soc-acpi-intel-match.h>
32 /* platform specific devices */
35 #define IS_CFL(pci) ((pci)->vendor == 0x8086 && (pci)->device == 0xa348)
36 #define IS_CNL(pci) ((pci)->vendor == 0x8086 && (pci)->device == 0x9dc8)
42 struct hda_dsp_msg_code {
47 static const struct hda_dsp_msg_code hda_dsp_rom_msg[] = {
48 {HDA_DSP_ROM_FW_MANIFEST_LOADED, "status: manifest loaded"},
49 {HDA_DSP_ROM_FW_FW_LOADED, "status: fw loaded"},
50 {HDA_DSP_ROM_FW_ENTERED, "status: fw entered"},
51 {HDA_DSP_ROM_CSE_ERROR, "error: cse error"},
52 {HDA_DSP_ROM_CSE_WRONG_RESPONSE, "error: cse wrong response"},
53 {HDA_DSP_ROM_IMR_TO_SMALL, "error: IMR too small"},
54 {HDA_DSP_ROM_BASE_FW_NOT_FOUND, "error: base fw not found"},
55 {HDA_DSP_ROM_CSE_VALIDATION_FAILED, "error: signature verification failed"},
56 {HDA_DSP_ROM_IPC_FATAL_ERROR, "error: ipc fatal error"},
57 {HDA_DSP_ROM_L2_CACHE_ERROR, "error: L2 cache error"},
58 {HDA_DSP_ROM_LOAD_OFFSET_TO_SMALL, "error: load offset too small"},
59 {HDA_DSP_ROM_API_PTR_INVALID, "error: API ptr invalid"},
60 {HDA_DSP_ROM_BASEFW_INCOMPAT, "error: base fw incompatible"},
61 {HDA_DSP_ROM_UNHANDLED_INTERRUPT, "error: unhandled interrupt"},
62 {HDA_DSP_ROM_MEMORY_HOLE_ECC, "error: ECC memory hole"},
63 {HDA_DSP_ROM_KERNEL_EXCEPTION, "error: kernel exception"},
64 {HDA_DSP_ROM_USER_EXCEPTION, "error: user exception"},
65 {HDA_DSP_ROM_UNEXPECTED_RESET, "error: unexpected reset"},
66 {HDA_DSP_ROM_NULL_FW_ENTRY, "error: null FW entry point"},
69 static void hda_dsp_get_status_skl(struct snd_sof_dev *sdev)
74 status = snd_sof_dsp_read(sdev, HDA_DSP_BAR,
75 HDA_ADSP_FW_STATUS_SKL);
77 for (i = 0; i < ARRAY_SIZE(hda_dsp_rom_msg); i++) {
78 if (status == hda_dsp_rom_msg[i].code) {
79 dev_err(sdev->dev, "%s - code %8.8x\n",
80 hda_dsp_rom_msg[i].msg, status);
85 /* not for us, must be generic sof message */
86 dev_dbg(sdev->dev, "unknown ROM status value %8.8x\n", status);
89 static void hda_dsp_get_status(struct snd_sof_dev *sdev)
94 status = snd_sof_dsp_read(sdev, HDA_DSP_BAR,
95 HDA_DSP_SRAM_REG_ROM_STATUS);
97 for (i = 0; i < ARRAY_SIZE(hda_dsp_rom_msg); i++) {
98 if (status == hda_dsp_rom_msg[i].code) {
99 dev_err(sdev->dev, "%s - code %8.8x\n",
100 hda_dsp_rom_msg[i].msg, status);
105 /* not for us, must be generic sof message */
106 dev_dbg(sdev->dev, "unknown ROM status value %8.8x\n", status);
109 static void hda_dsp_get_registers(struct snd_sof_dev *sdev,
110 struct sof_ipc_dsp_oops_xtensa *xoops,
111 struct sof_ipc_panic_info *panic_info,
112 u32 *stack, size_t stack_words)
114 u32 offset = sdev->dsp_oops_offset;
116 /* first read registers */
117 sof_mailbox_read(sdev, offset, xoops, sizeof(*xoops));
119 /* note: variable AR register array is not read */
121 /* then get panic info */
122 offset += xoops->arch_hdr.totalsize;
123 sof_block_read(sdev, sdev->mmio_bar, offset,
124 panic_info, sizeof(*panic_info));
126 /* then get the stack */
127 offset += sizeof(*panic_info);
128 sof_block_read(sdev, sdev->mmio_bar, offset, stack,
129 stack_words * sizeof(u32));
132 void hda_dsp_dump_skl(struct snd_sof_dev *sdev, u32 flags)
134 struct sof_ipc_dsp_oops_xtensa xoops;
135 struct sof_ipc_panic_info panic_info;
136 u32 stack[HDA_DSP_STACK_DUMP_SIZE];
139 /* try APL specific status message types first */
140 hda_dsp_get_status_skl(sdev);
142 /* now try generic SOF status messages */
143 status = snd_sof_dsp_read(sdev, HDA_DSP_BAR,
144 HDA_ADSP_ERROR_CODE_SKL);
146 /*TODO: Check: there is no define in spec, but it is used in the code*/
147 panic = snd_sof_dsp_read(sdev, HDA_DSP_BAR,
148 HDA_ADSP_ERROR_CODE_SKL + 0x4);
150 if (sdev->boot_complete) {
151 hda_dsp_get_registers(sdev, &xoops, &panic_info, stack,
152 HDA_DSP_STACK_DUMP_SIZE);
153 snd_sof_get_status(sdev, status, panic, &xoops, &panic_info,
154 stack, HDA_DSP_STACK_DUMP_SIZE);
156 dev_err(sdev->dev, "error: status = 0x%8.8x panic = 0x%8.8x\n",
158 hda_dsp_get_status_skl(sdev);
162 void hda_dsp_dump(struct snd_sof_dev *sdev, u32 flags)
164 struct sof_ipc_dsp_oops_xtensa xoops;
165 struct sof_ipc_panic_info panic_info;
166 u32 stack[HDA_DSP_STACK_DUMP_SIZE];
169 /* try APL specific status message types first */
170 hda_dsp_get_status(sdev);
172 /* now try generic SOF status messages */
173 status = snd_sof_dsp_read(sdev, HDA_DSP_BAR,
174 HDA_DSP_SRAM_REG_FW_STATUS);
175 panic = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_SRAM_REG_FW_TRACEP);
177 if (sdev->boot_complete) {
178 hda_dsp_get_registers(sdev, &xoops, &panic_info, stack,
179 HDA_DSP_STACK_DUMP_SIZE);
180 snd_sof_get_status(sdev, status, panic, &xoops, &panic_info,
181 stack, HDA_DSP_STACK_DUMP_SIZE);
183 dev_err(sdev->dev, "error: status = 0x%8.8x panic = 0x%8.8x\n",
185 hda_dsp_get_status(sdev);
189 void hda_ipc_dump(struct snd_sof_dev *sdev)
195 /* read IPC status */
196 hipcie = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_HIPCIE);
197 hipct = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_HIPCT);
198 hipcctl = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_HIPCCTL);
200 /* dump the IPC regs */
201 /* TODO: parse the raw msg */
203 "error: host status 0x%8.8x dsp status 0x%8.8x mask 0x%8.8x\n",
204 hipcie, hipct, hipcctl);
207 static int hda_init(struct snd_sof_dev *sdev)
209 struct hda_bus *hbus;
210 struct hdac_bus *bus;
211 struct hdac_ext_bus_ops *ext_ops = NULL;
212 struct pci_dev *pci = to_pci_dev(sdev->dev);
215 hbus = sof_to_hbus(sdev);
216 bus = sof_to_bus(sdev);
219 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA_AUDIO_CODEC)
220 ext_ops = snd_soc_hdac_hda_get_ops();
222 sof_hda_bus_init(bus, &pci->dev, ext_ops);
224 /* Workaround for a communication error on CFL (bko#199007) and CNL */
225 if (IS_CFL(pci) || IS_CNL(pci))
226 bus->polling_mode = 1;
229 bus->bdl_pos_adj = 0;
231 mutex_init(&hbus->prepare_mutex);
233 hbus->mixer_assigned = -1;
234 hbus->modelname = "sofbus";
236 /* initialise hdac bus */
237 bus->addr = pci_resource_start(pci, 0);
238 #if IS_ENABLED(CONFIG_PCI)
239 bus->remap_addr = pci_ioremap_bar(pci, 0);
241 if (!bus->remap_addr) {
242 dev_err(bus->dev, "error: ioremap error\n");
247 sdev->bar[HDA_DSP_HDA_BAR] = bus->remap_addr;
249 /* get controller capabilities */
250 ret = hda_dsp_ctrl_get_caps(sdev);
252 dev_err(sdev->dev, "error: get caps error\n");
257 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
259 static const char *fixup_tplg_name(struct snd_sof_dev *sdev,
260 const char *sof_tplg_filename)
262 const char *tplg_filename = NULL;
266 filename = devm_kstrdup(sdev->dev, sof_tplg_filename, GFP_KERNEL);
270 /* this assumes a .tplg extension */
271 split_ext = strsep(&filename, ".");
273 tplg_filename = devm_kasprintf(sdev->dev, GFP_KERNEL,
274 "%s-idisp.tplg", split_ext);
278 return tplg_filename;
283 static int hda_init_caps(struct snd_sof_dev *sdev)
285 struct hdac_bus *bus = sof_to_bus(sdev);
286 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
287 struct hdac_ext_link *hlink;
288 struct snd_soc_acpi_mach_params *mach_params;
289 struct snd_soc_acpi_mach *hda_mach;
290 struct snd_sof_pdata *pdata = sdev->pdata;
291 struct snd_soc_acpi_mach *mach;
292 const char *tplg_filename;
298 device_disable_async_suspend(bus->dev);
300 /* check if dsp is there */
302 dev_dbg(sdev->dev, "PP capability, will probe DSP later.\n");
304 ret = hda_dsp_ctrl_init_chip(sdev, true);
306 dev_err(bus->dev, "error: init chip failed with ret: %d\n",
311 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
313 snd_hdac_ext_bus_get_ml_capabilities(bus);
315 /* init i915 and HDMI codecs */
316 ret = hda_codec_i915_init(sdev);
318 dev_err(sdev->dev, "error: no HDMI audio devices found\n");
322 /* codec detection */
323 if (!bus->codec_mask) {
324 dev_info(bus->dev, "no hda codecs found!\n");
326 dev_info(bus->dev, "hda codecs found, mask %lx\n",
329 for (i = 0; i < HDA_MAX_CODECS; i++) {
330 if (bus->codec_mask & (1 << i))
335 * If no machine driver is found, then:
337 * hda machine driver is used if :
338 * 1. there is one HDMI codec and one external HDAudio codec
341 if (!pdata->machine && codec_num <= 2 &&
342 HDA_IDISP_CODEC(bus->codec_mask)) {
343 hda_mach = snd_soc_acpi_intel_hda_machines;
344 pdata->machine = hda_mach;
346 /* topology: use the info from hda_machines */
347 pdata->tplg_filename =
348 hda_mach->sof_tplg_filename;
350 /* firmware: pick the first in machine list */
351 mach = pdata->desc->machines;
352 pdata->fw_filename = mach->sof_fw_filename;
354 dev_info(bus->dev, "using HDA machine driver %s now\n",
357 /* fixup topology file for HDMI only platforms */
358 if (codec_num == 1) {
359 /* use local variable for readability */
360 tplg_filename = pdata->tplg_filename;
361 tplg_filename = fixup_tplg_name(sdev, tplg_filename);
362 if (!tplg_filename) {
363 hda_codec_i915_exit(sdev);
366 pdata->tplg_filename = tplg_filename;
371 /* used by hda machine driver to create dai links */
372 if (pdata->machine) {
373 mach_params = (struct snd_soc_acpi_mach_params *)
374 &pdata->machine->mach_params;
375 mach_params->codec_mask = bus->codec_mask;
376 mach_params->platform = dev_name(sdev->dev);
379 /* create codec instances */
380 hda_codec_probe_bus(sdev);
382 hda_codec_i915_put(sdev);
385 * we are done probing so decrement link counts
387 list_for_each_entry(hlink, &bus->hlink_list, list)
388 snd_hdac_ext_bus_link_put(bus, hlink);
393 static const struct sof_intel_dsp_desc
394 *get_chip_info(struct snd_sof_pdata *pdata)
396 const struct sof_dev_desc *desc = pdata->desc;
397 const struct sof_intel_dsp_desc *chip_info;
399 chip_info = desc->chip_info;
404 int hda_dsp_probe(struct snd_sof_dev *sdev)
406 struct pci_dev *pci = to_pci_dev(sdev->dev);
407 struct sof_intel_hda_dev *hdev;
408 struct hdac_bus *bus;
409 const struct sof_intel_dsp_desc *chip;
413 * detect DSP by checking class/subclass/prog-id information
414 * class=04 subclass 03 prog-if 00: no DSP, legacy driver is required
415 * class=04 subclass 01 prog-if 00: DSP is present
416 * (and may be required e.g. for DMIC or SSP support)
417 * class=04 subclass 03 prog-if 80: either of DSP or legacy mode works
419 if (pci->class == 0x040300) {
420 dev_err(sdev->dev, "error: the DSP is not enabled on this platform, aborting probe\n");
422 } else if (pci->class != 0x040100 && pci->class != 0x040380) {
423 dev_err(sdev->dev, "error: unknown PCI class/subclass/prog-if 0x%06x found, aborting probe\n", pci->class);
426 dev_info(sdev->dev, "DSP detected with PCI class/subclass/prog-if 0x%06x\n", pci->class);
428 chip = get_chip_info(sdev->pdata);
430 dev_err(sdev->dev, "error: no such device supported, chip id:%x\n",
436 hdev = devm_kzalloc(sdev->dev, sizeof(*hdev), GFP_KERNEL);
439 sdev->pdata->hw_pdata = hdev;
442 hdev->dmic_dev = platform_device_register_data(sdev->dev, "dmic-codec",
445 if (IS_ERR(hdev->dmic_dev)) {
446 dev_err(sdev->dev, "error: failed to create DMIC device\n");
447 return PTR_ERR(hdev->dmic_dev);
451 * use position update IPC if either it is forced
452 * or we don't have other choice
454 #if IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG_FORCE_IPC_POSITION)
455 hdev->no_ipc_position = 0;
457 hdev->no_ipc_position = sof_ops(sdev)->pcm_pointer ? 1 : 0;
460 /* set up HDA base */
461 bus = sof_to_bus(sdev);
462 ret = hda_init(sdev);
467 #if IS_ENABLED(CONFIG_PCI)
468 sdev->bar[HDA_DSP_BAR] = pci_ioremap_bar(pci, HDA_DSP_BAR);
470 if (!sdev->bar[HDA_DSP_BAR]) {
471 dev_err(sdev->dev, "error: ioremap error\n");
476 sdev->mmio_bar = HDA_DSP_BAR;
477 sdev->mailbox_bar = HDA_DSP_BAR;
479 /* allow 64bit DMA address if supported by H/W */
480 if (!dma_set_mask(&pci->dev, DMA_BIT_MASK(64))) {
481 dev_dbg(sdev->dev, "DMA mask is 64 bit\n");
482 dma_set_coherent_mask(&pci->dev, DMA_BIT_MASK(64));
484 dev_dbg(sdev->dev, "DMA mask is 32 bit\n");
485 dma_set_mask(&pci->dev, DMA_BIT_MASK(32));
486 dma_set_coherent_mask(&pci->dev, DMA_BIT_MASK(32));
490 ret = hda_dsp_stream_init(sdev);
492 dev_err(sdev->dev, "error: failed to init streams\n");
494 * not all errors are due to memory issues, but trying
495 * to free everything does not harm
502 * let's try to enable msi firstly
503 * if it fails, use legacy interrupt mode
504 * TODO: support interrupt mode selection with kernel parameter
505 * support msi multiple vectors
507 ret = pci_alloc_irq_vectors(pci, 1, 1, PCI_IRQ_MSI);
509 dev_info(sdev->dev, "use legacy interrupt mode\n");
511 * in IO-APIC mode, hda->irq and ipc_irq are using the same
512 * irq number of pci->irq
514 hdev->irq = pci->irq;
515 sdev->ipc_irq = pci->irq;
516 sdev->msi_enabled = 0;
518 dev_info(sdev->dev, "use msi interrupt mode\n");
519 hdev->irq = pci_irq_vector(pci, 0);
520 /* ipc irq number is the same of hda irq */
521 sdev->ipc_irq = hdev->irq;
522 sdev->msi_enabled = 1;
525 dev_dbg(sdev->dev, "using HDA IRQ %d\n", hdev->irq);
526 ret = request_threaded_irq(hdev->irq, hda_dsp_stream_interrupt,
527 hda_dsp_stream_threaded_handler,
528 IRQF_SHARED, "AudioHDA", bus);
530 dev_err(sdev->dev, "error: failed to register HDA IRQ %d\n",
532 goto free_irq_vector;
535 dev_dbg(sdev->dev, "using IPC IRQ %d\n", sdev->ipc_irq);
536 ret = request_threaded_irq(sdev->ipc_irq, hda_dsp_ipc_irq_handler,
537 sof_ops(sdev)->irq_thread, IRQF_SHARED,
540 dev_err(sdev->dev, "error: failed to register IPC IRQ %d\n",
546 synchronize_irq(pci->irq);
549 * clear TCSEL to clear playback on some HD Audio
550 * codecs. PCI TCSEL is defined in the Intel manuals.
552 snd_sof_pci_update_bits(sdev, PCI_TCSEL, 0x07, 0);
554 /* init HDA capabilities */
555 ret = hda_init_caps(sdev);
559 /* enable ppcap interrupt */
560 hda_dsp_ctrl_ppcap_enable(sdev, true);
561 hda_dsp_ctrl_ppcap_int_enable(sdev, true);
563 /* initialize waitq for code loading */
564 init_waitqueue_head(&sdev->waitq);
566 /* set default mailbox offset for FW ready message */
567 sdev->dsp_box.offset = HDA_DSP_MBOX_UPLINK_OFFSET;
572 free_irq(sdev->ipc_irq, sdev);
574 free_irq(hdev->irq, bus);
576 if (sdev->msi_enabled)
577 pci_free_irq_vectors(pci);
579 hda_dsp_stream_free(sdev);
580 /* dsp_unmap: not currently used */
581 iounmap(sdev->bar[HDA_DSP_BAR]);
583 iounmap(bus->remap_addr);
588 int hda_dsp_remove(struct snd_sof_dev *sdev)
590 struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata;
591 struct hdac_bus *bus = sof_to_bus(sdev);
592 struct pci_dev *pci = to_pci_dev(sdev->dev);
593 const struct sof_intel_dsp_desc *chip = hda->desc;
595 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
596 /* codec removal, invoke bus_device_remove */
597 snd_hdac_ext_bus_device_remove(bus);
600 if (!IS_ERR_OR_NULL(hda->dmic_dev))
601 platform_device_unregister(hda->dmic_dev);
603 /* disable DSP IRQ */
604 snd_sof_dsp_update_bits(sdev, HDA_DSP_PP_BAR, SOF_HDA_REG_PP_PPCTL,
605 SOF_HDA_PPCTL_PIE, 0);
607 /* disable CIE and GIE interrupts */
608 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTCTL,
609 SOF_HDA_INT_CTRL_EN | SOF_HDA_INT_GLOBAL_EN, 0);
613 hda_dsp_core_reset_power_down(sdev, chip->cores_mask);
616 snd_sof_dsp_update_bits(sdev, HDA_DSP_PP_BAR, SOF_HDA_REG_PP_PPCTL,
617 SOF_HDA_PPCTL_GPROCEN, 0);
619 free_irq(sdev->ipc_irq, sdev);
620 free_irq(hda->irq, bus);
621 if (sdev->msi_enabled)
622 pci_free_irq_vectors(pci);
624 hda_dsp_stream_free(sdev);
625 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
626 snd_hdac_link_free_all(bus);
629 iounmap(sdev->bar[HDA_DSP_BAR]);
630 iounmap(bus->remap_addr);
632 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
633 snd_hdac_ext_bus_exit(bus);
635 hda_codec_i915_exit(sdev);
640 MODULE_LICENSE("Dual BSD/GPL");