1 /* sound/soc/samsung/i2s.c
3 * ALSA SoC Audio Layer - Samsung I2S Controller driver
5 * Copyright (c) 2010 Samsung Electronics Co. Ltd.
6 * Jaswinder Singh <jassisinghbrar@gmail.com>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 #include <dt-bindings/sound/samsung-i2s.h>
14 #include <linux/delay.h>
15 #include <linux/slab.h>
16 #include <linux/clk.h>
17 #include <linux/clk-provider.h>
19 #include <linux/module.h>
21 #include <linux/of_device.h>
22 #include <linux/of_gpio.h>
23 #include <linux/pm_runtime.h>
25 #include <sound/soc.h>
26 #include <sound/pcm_params.h>
28 #include <linux/platform_data/asoc-s3c.h>
35 #define msecs_to_loops(t) (loops_per_jiffy / 1000 * HZ * t)
37 struct samsung_i2s_variant_regs {
42 unsigned int rclksrc_off;
44 unsigned int cdclkcon_off;
46 unsigned int bfs_mask;
47 unsigned int rfs_mask;
48 unsigned int ftx0cnt_off;
51 struct samsung_i2s_dai_data {
53 unsigned int pcm_rates;
54 const struct samsung_i2s_variant_regs *i2s_variant_regs;
58 /* Platform device for this DAI */
59 struct platform_device *pdev;
60 /* Memory mapped SFR region */
62 /* Rate of RCLK source clock */
63 unsigned long rclk_srcrate;
67 * Specifically requested RCLK,BCLK by MACHINE Driver.
68 * 0 indicates CPU driver is free to choose any value.
71 /* I2S Controller's core clock */
73 /* Clock for generating I2S signals */
75 /* Pointer to the Primary_Fifo if this is Sec_Fifo, NULL otherwise */
76 struct i2s_dai *pri_dai;
77 /* Pointer to the Secondary_Fifo if it has one, NULL otherwise */
78 struct i2s_dai *sec_dai;
79 #define DAI_OPENED (1 << 0) /* Dai is opened */
80 #define DAI_MANAGER (1 << 1) /* Dai is the manager */
82 /* Driver for this DAI */
83 struct snd_soc_dai_driver i2s_dai_drv;
85 struct snd_dmaengine_dai_dma_data dma_playback;
86 struct snd_dmaengine_dai_dma_data dma_capture;
87 struct snd_dmaengine_dai_dma_data idma_playback;
93 const struct samsung_i2s_variant_regs *variant_regs;
95 /* Spinlock protecting access to the device's registers */
99 /* Below fields are only valid if this is the primary FIFO */
100 struct clk *clk_table[3];
101 struct clk_onecell_data clk_data;
104 /* Lock for cross i/f checks */
105 static DEFINE_SPINLOCK(lock);
107 /* If this is the 'overlay' stereo DAI */
108 static inline bool is_secondary(struct i2s_dai *i2s)
110 return i2s->pri_dai ? true : false;
113 /* If operating in SoC-Slave mode */
114 static inline bool is_slave(struct i2s_dai *i2s)
116 u32 mod = readl(i2s->addr + I2SMOD);
117 return (mod & (1 << i2s->variant_regs->mss_off)) ? true : false;
120 /* If this interface of the controller is transmitting data */
121 static inline bool tx_active(struct i2s_dai *i2s)
128 active = readl(i2s->addr + I2SCON);
130 if (is_secondary(i2s))
131 active &= CON_TXSDMA_ACTIVE;
133 active &= CON_TXDMA_ACTIVE;
135 return active ? true : false;
138 /* Return pointer to the other DAI */
139 static inline struct i2s_dai *get_other_dai(struct i2s_dai *i2s)
141 return i2s->pri_dai ? : i2s->sec_dai;
144 /* If the other interface of the controller is transmitting data */
145 static inline bool other_tx_active(struct i2s_dai *i2s)
147 struct i2s_dai *other = get_other_dai(i2s);
149 return tx_active(other);
152 /* If any interface of the controller is transmitting data */
153 static inline bool any_tx_active(struct i2s_dai *i2s)
155 return tx_active(i2s) || other_tx_active(i2s);
158 /* If this interface of the controller is receiving data */
159 static inline bool rx_active(struct i2s_dai *i2s)
166 active = readl(i2s->addr + I2SCON) & CON_RXDMA_ACTIVE;
168 return active ? true : false;
171 /* If the other interface of the controller is receiving data */
172 static inline bool other_rx_active(struct i2s_dai *i2s)
174 struct i2s_dai *other = get_other_dai(i2s);
176 return rx_active(other);
179 /* If any interface of the controller is receiving data */
180 static inline bool any_rx_active(struct i2s_dai *i2s)
182 return rx_active(i2s) || other_rx_active(i2s);
185 /* If the other DAI is transmitting or receiving data */
186 static inline bool other_active(struct i2s_dai *i2s)
188 return other_rx_active(i2s) || other_tx_active(i2s);
191 /* If this DAI is transmitting or receiving data */
192 static inline bool this_active(struct i2s_dai *i2s)
194 return tx_active(i2s) || rx_active(i2s);
197 /* If the controller is active anyway */
198 static inline bool any_active(struct i2s_dai *i2s)
200 return this_active(i2s) || other_active(i2s);
203 static inline struct i2s_dai *to_info(struct snd_soc_dai *dai)
205 return snd_soc_dai_get_drvdata(dai);
208 static inline bool is_opened(struct i2s_dai *i2s)
210 if (i2s && (i2s->mode & DAI_OPENED))
216 static inline bool is_manager(struct i2s_dai *i2s)
218 if (is_opened(i2s) && (i2s->mode & DAI_MANAGER))
224 /* Read RCLK of I2S (in multiples of LRCLK) */
225 static inline unsigned get_rfs(struct i2s_dai *i2s)
228 rfs = readl(i2s->addr + I2SMOD) >> i2s->variant_regs->rfs_off;
229 rfs &= i2s->variant_regs->rfs_mask;
243 /* Write RCLK of I2S (in multiples of LRCLK) */
244 static inline void set_rfs(struct i2s_dai *i2s, unsigned rfs)
246 u32 mod = readl(i2s->addr + I2SMOD);
247 int rfs_shift = i2s->variant_regs->rfs_off;
249 mod &= ~(i2s->variant_regs->rfs_mask << rfs_shift);
253 mod |= (EXYNOS7_MOD_RCLK_192FS << rfs_shift);
256 mod |= (EXYNOS7_MOD_RCLK_96FS << rfs_shift);
259 mod |= (EXYNOS7_MOD_RCLK_128FS << rfs_shift);
262 mod |= (EXYNOS7_MOD_RCLK_64FS << rfs_shift);
265 mod |= (MOD_RCLK_768FS << rfs_shift);
268 mod |= (MOD_RCLK_512FS << rfs_shift);
271 mod |= (MOD_RCLK_384FS << rfs_shift);
274 mod |= (MOD_RCLK_256FS << rfs_shift);
278 writel(mod, i2s->addr + I2SMOD);
281 /* Read Bit-Clock of I2S (in multiples of LRCLK) */
282 static inline unsigned get_bfs(struct i2s_dai *i2s)
285 bfs = readl(i2s->addr + I2SMOD) >> i2s->variant_regs->bfs_off;
286 bfs &= i2s->variant_regs->bfs_mask;
301 /* Write Bit-Clock of I2S (in multiples of LRCLK) */
302 static inline void set_bfs(struct i2s_dai *i2s, unsigned bfs)
304 u32 mod = readl(i2s->addr + I2SMOD);
305 int tdm = i2s->quirks & QUIRK_SUPPORTS_TDM;
306 int bfs_shift = i2s->variant_regs->bfs_off;
308 /* Non-TDM I2S controllers do not support BCLK > 48 * FS */
309 if (!tdm && bfs > 48) {
310 dev_err(&i2s->pdev->dev, "Unsupported BCLK divider\n");
314 mod &= ~(i2s->variant_regs->bfs_mask << bfs_shift);
318 mod |= (MOD_BCLK_48FS << bfs_shift);
321 mod |= (MOD_BCLK_32FS << bfs_shift);
324 mod |= (MOD_BCLK_24FS << bfs_shift);
327 mod |= (MOD_BCLK_16FS << bfs_shift);
330 mod |= (EXYNOS5420_MOD_BCLK_64FS << bfs_shift);
333 mod |= (EXYNOS5420_MOD_BCLK_96FS << bfs_shift);
336 mod |= (EXYNOS5420_MOD_BCLK_128FS << bfs_shift);
339 mod |= (EXYNOS5420_MOD_BCLK_192FS << bfs_shift);
342 mod |= (EXYNOS5420_MOD_BCLK_256FS << bfs_shift);
345 dev_err(&i2s->pdev->dev, "Wrong BCLK Divider!\n");
349 writel(mod, i2s->addr + I2SMOD);
353 static inline int get_blc(struct i2s_dai *i2s)
355 int blc = readl(i2s->addr + I2SMOD);
357 blc = (blc >> 13) & 0x3;
366 /* TX Channel Control */
367 static void i2s_txctrl(struct i2s_dai *i2s, int on)
369 void __iomem *addr = i2s->addr;
370 int txr_off = i2s->variant_regs->txr_off;
371 u32 con = readl(addr + I2SCON);
372 u32 mod = readl(addr + I2SMOD) & ~(3 << txr_off);
376 con &= ~CON_TXCH_PAUSE;
378 if (is_secondary(i2s)) {
379 con |= CON_TXSDMA_ACTIVE;
380 con &= ~CON_TXSDMA_PAUSE;
382 con |= CON_TXDMA_ACTIVE;
383 con &= ~CON_TXDMA_PAUSE;
386 if (any_rx_active(i2s))
391 if (is_secondary(i2s)) {
392 con |= CON_TXSDMA_PAUSE;
393 con &= ~CON_TXSDMA_ACTIVE;
395 con |= CON_TXDMA_PAUSE;
396 con &= ~CON_TXDMA_ACTIVE;
399 if (other_tx_active(i2s)) {
400 writel(con, addr + I2SCON);
404 con |= CON_TXCH_PAUSE;
406 if (any_rx_active(i2s))
412 writel(mod, addr + I2SMOD);
413 writel(con, addr + I2SCON);
416 /* RX Channel Control */
417 static void i2s_rxctrl(struct i2s_dai *i2s, int on)
419 void __iomem *addr = i2s->addr;
420 int txr_off = i2s->variant_regs->txr_off;
421 u32 con = readl(addr + I2SCON);
422 u32 mod = readl(addr + I2SMOD) & ~(3 << txr_off);
425 con |= CON_RXDMA_ACTIVE | CON_ACTIVE;
426 con &= ~(CON_RXDMA_PAUSE | CON_RXCH_PAUSE);
428 if (any_tx_active(i2s))
433 con |= CON_RXDMA_PAUSE | CON_RXCH_PAUSE;
434 con &= ~CON_RXDMA_ACTIVE;
436 if (any_tx_active(i2s))
442 writel(mod, addr + I2SMOD);
443 writel(con, addr + I2SCON);
446 /* Flush FIFO of an interface */
447 static inline void i2s_fifo(struct i2s_dai *i2s, u32 flush)
455 if (is_secondary(i2s))
456 fic = i2s->addr + I2SFICS;
458 fic = i2s->addr + I2SFIC;
461 writel(readl(fic) | flush, fic);
464 val = msecs_to_loops(1) / 1000; /* 1 usec */
468 writel(readl(fic) & ~flush, fic);
471 static int i2s_set_sysclk(struct snd_soc_dai *dai,
472 int clk_id, unsigned int rfs, int dir)
474 struct i2s_dai *i2s = to_info(dai);
475 struct i2s_dai *other = get_other_dai(i2s);
476 const struct samsung_i2s_variant_regs *i2s_regs = i2s->variant_regs;
477 unsigned int cdcon_mask = 1 << i2s_regs->cdclkcon_off;
478 unsigned int rsrc_mask = 1 << i2s_regs->rclksrc_off;
479 u32 mod, mask, val = 0;
483 pm_runtime_get_sync(dai->dev);
485 spin_lock_irqsave(i2s->lock, flags);
486 mod = readl(i2s->addr + I2SMOD);
487 spin_unlock_irqrestore(i2s->lock, flags);
490 case SAMSUNG_I2S_OPCLK:
491 mask = MOD_OPCLK_MASK;
492 val = (dir << MOD_OPCLK_SHIFT) & MOD_OPCLK_MASK;
494 case SAMSUNG_I2S_CDCLK:
495 mask = 1 << i2s_regs->cdclkcon_off;
496 /* Shouldn't matter in GATING(CLOCK_IN) mode */
497 if (dir == SND_SOC_CLOCK_IN)
500 if ((rfs && other && other->rfs && (other->rfs != rfs)) ||
502 (((dir == SND_SOC_CLOCK_IN)
503 && !(mod & cdcon_mask)) ||
504 ((dir == SND_SOC_CLOCK_OUT)
505 && (mod & cdcon_mask))))) {
506 dev_err(&i2s->pdev->dev,
507 "%s:%d Other DAI busy\n", __func__, __LINE__);
512 if (dir == SND_SOC_CLOCK_IN)
513 val = 1 << i2s_regs->cdclkcon_off;
518 case SAMSUNG_I2S_RCLKSRC_0: /* clock corrsponding to IISMOD[10] := 0 */
519 case SAMSUNG_I2S_RCLKSRC_1: /* clock corrsponding to IISMOD[10] := 1 */
520 mask = 1 << i2s_regs->rclksrc_off;
522 if ((i2s->quirks & QUIRK_NO_MUXPSR)
523 || (clk_id == SAMSUNG_I2S_RCLKSRC_0))
528 if (!any_active(i2s)) {
529 if (i2s->op_clk && !IS_ERR(i2s->op_clk)) {
530 if ((clk_id && !(mod & rsrc_mask)) ||
531 (!clk_id && (mod & rsrc_mask))) {
532 clk_disable_unprepare(i2s->op_clk);
533 clk_put(i2s->op_clk);
536 clk_get_rate(i2s->op_clk);
542 i2s->op_clk = clk_get(&i2s->pdev->dev,
545 i2s->op_clk = clk_get(&i2s->pdev->dev,
548 if (WARN_ON(IS_ERR(i2s->op_clk))) {
549 ret = PTR_ERR(i2s->op_clk);
554 ret = clk_prepare_enable(i2s->op_clk);
556 clk_put(i2s->op_clk);
560 i2s->rclk_srcrate = clk_get_rate(i2s->op_clk);
562 /* Over-ride the other's */
564 other->op_clk = i2s->op_clk;
565 other->rclk_srcrate = i2s->rclk_srcrate;
567 } else if ((!clk_id && (mod & rsrc_mask))
568 || (clk_id && !(mod & rsrc_mask))) {
569 dev_err(&i2s->pdev->dev,
570 "%s:%d Other DAI busy\n", __func__, __LINE__);
574 /* Call can't be on the active DAI */
575 i2s->op_clk = other->op_clk;
576 i2s->rclk_srcrate = other->rclk_srcrate;
581 val = 1 << i2s_regs->rclksrc_off;
584 dev_err(&i2s->pdev->dev, "We don't serve that!\n");
589 spin_lock_irqsave(i2s->lock, flags);
590 mod = readl(i2s->addr + I2SMOD);
591 mod = (mod & ~mask) | val;
592 writel(mod, i2s->addr + I2SMOD);
593 spin_unlock_irqrestore(i2s->lock, flags);
595 pm_runtime_put(dai->dev);
599 pm_runtime_put(dai->dev);
603 static int i2s_set_fmt(struct snd_soc_dai *dai,
606 struct i2s_dai *i2s = to_info(dai);
607 struct i2s_dai *other = get_other_dai(i2s);
608 int lrp_shift, sdf_shift, sdf_mask, lrp_rlow, mod_slave;
612 lrp_shift = i2s->variant_regs->lrp_off;
613 sdf_shift = i2s->variant_regs->sdf_off;
614 mod_slave = 1 << i2s->variant_regs->mss_off;
616 sdf_mask = MOD_SDF_MASK << sdf_shift;
617 lrp_rlow = MOD_LR_RLOW << lrp_shift;
619 /* Format is priority */
620 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
621 case SND_SOC_DAIFMT_RIGHT_J:
623 tmp |= (MOD_SDF_MSB << sdf_shift);
625 case SND_SOC_DAIFMT_LEFT_J:
627 tmp |= (MOD_SDF_LSB << sdf_shift);
629 case SND_SOC_DAIFMT_I2S:
630 tmp |= (MOD_SDF_IIS << sdf_shift);
633 dev_err(&i2s->pdev->dev, "Format not supported\n");
638 * INV flag is relative to the FORMAT flag - if set it simply
639 * flips the polarity specified by the Standard
641 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
642 case SND_SOC_DAIFMT_NB_NF:
644 case SND_SOC_DAIFMT_NB_IF:
651 dev_err(&i2s->pdev->dev, "Polarity not supported\n");
655 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
656 case SND_SOC_DAIFMT_CBM_CFM:
659 case SND_SOC_DAIFMT_CBS_CFS:
661 * Set default source clock in Master mode, only when the
662 * CLK_I2S_RCLK_SRC clock is not exposed so we ensure any
663 * clock configuration assigned in DT is not overwritten.
665 if (i2s->rclk_srcrate == 0 && i2s->clk_data.clks == NULL &&
666 other->clk_data.clks == NULL)
667 i2s_set_sysclk(dai, SAMSUNG_I2S_RCLKSRC_0,
668 0, SND_SOC_CLOCK_IN);
671 dev_err(&i2s->pdev->dev, "master/slave format not supported\n");
675 pm_runtime_get_sync(dai->dev);
676 spin_lock_irqsave(i2s->lock, flags);
677 mod = readl(i2s->addr + I2SMOD);
679 * Don't change the I2S mode if any controller is active on this
682 if (any_active(i2s) &&
683 ((mod & (sdf_mask | lrp_rlow | mod_slave)) != tmp)) {
684 spin_unlock_irqrestore(i2s->lock, flags);
685 pm_runtime_put(dai->dev);
686 dev_err(&i2s->pdev->dev,
687 "%s:%d Other DAI busy\n", __func__, __LINE__);
691 mod &= ~(sdf_mask | lrp_rlow | mod_slave);
693 writel(mod, i2s->addr + I2SMOD);
694 spin_unlock_irqrestore(i2s->lock, flags);
695 pm_runtime_put(dai->dev);
700 static int i2s_hw_params(struct snd_pcm_substream *substream,
701 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
703 struct i2s_dai *i2s = to_info(dai);
704 struct i2s_dai *other = get_other_dai(i2s);
705 u32 mod, mask = 0, val = 0;
709 WARN_ON(!pm_runtime_active(dai->dev));
711 if (!is_secondary(i2s))
712 mask |= (MOD_DC2_EN | MOD_DC1_EN);
714 switch (params_channels(params)) {
722 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
723 i2s->dma_playback.addr_width = 4;
725 i2s->dma_capture.addr_width = 4;
728 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
729 i2s->dma_playback.addr_width = 2;
731 i2s->dma_capture.addr_width = 2;
735 dev_err(&i2s->pdev->dev, "%d channels not supported\n",
736 params_channels(params));
740 if (is_secondary(i2s))
741 mask |= MOD_BLCS_MASK;
743 mask |= MOD_BLCP_MASK;
746 mask |= MOD_BLC_MASK;
748 switch (params_width(params)) {
750 if (is_secondary(i2s))
751 val |= MOD_BLCS_8BIT;
753 val |= MOD_BLCP_8BIT;
758 if (is_secondary(i2s))
759 val |= MOD_BLCS_16BIT;
761 val |= MOD_BLCP_16BIT;
763 val |= MOD_BLC_16BIT;
766 if (is_secondary(i2s))
767 val |= MOD_BLCS_24BIT;
769 val |= MOD_BLCP_24BIT;
771 val |= MOD_BLC_24BIT;
774 dev_err(&i2s->pdev->dev, "Format(%d) not supported\n",
775 params_format(params));
779 spin_lock_irqsave(i2s->lock, flags);
780 mod = readl(i2s->addr + I2SMOD);
781 mod = (mod & ~mask) | val;
782 writel(mod, i2s->addr + I2SMOD);
783 spin_unlock_irqrestore(i2s->lock, flags);
785 snd_soc_dai_init_dma_data(dai, &i2s->dma_playback, &i2s->dma_capture);
787 i2s->frmclk = params_rate(params);
789 rclksrc = i2s->clk_table[CLK_I2S_RCLK_SRC];
790 if (!rclksrc || IS_ERR(rclksrc))
791 rclksrc = other->clk_table[CLK_I2S_RCLK_SRC];
793 if (rclksrc && !IS_ERR(rclksrc))
794 i2s->rclk_srcrate = clk_get_rate(rclksrc);
799 /* We set constraints on the substream acc to the version of I2S */
800 static int i2s_startup(struct snd_pcm_substream *substream,
801 struct snd_soc_dai *dai)
803 struct i2s_dai *i2s = to_info(dai);
804 struct i2s_dai *other = get_other_dai(i2s);
807 pm_runtime_get_sync(dai->dev);
809 spin_lock_irqsave(&lock, flags);
811 i2s->mode |= DAI_OPENED;
813 if (is_manager(other))
814 i2s->mode &= ~DAI_MANAGER;
816 i2s->mode |= DAI_MANAGER;
818 if (!any_active(i2s) && (i2s->quirks & QUIRK_NEED_RSTCLR))
819 writel(CON_RSTCLR, i2s->addr + I2SCON);
821 spin_unlock_irqrestore(&lock, flags);
826 static void i2s_shutdown(struct snd_pcm_substream *substream,
827 struct snd_soc_dai *dai)
829 struct i2s_dai *i2s = to_info(dai);
830 struct i2s_dai *other = get_other_dai(i2s);
833 spin_lock_irqsave(&lock, flags);
835 i2s->mode &= ~DAI_OPENED;
836 i2s->mode &= ~DAI_MANAGER;
838 if (is_opened(other))
839 other->mode |= DAI_MANAGER;
841 /* Reset any constraint on RFS and BFS */
845 spin_unlock_irqrestore(&lock, flags);
847 pm_runtime_put(dai->dev);
850 static int config_setup(struct i2s_dai *i2s)
852 struct i2s_dai *other = get_other_dai(i2s);
853 unsigned rfs, bfs, blc;
863 /* Select least possible multiple(2) if no constraint set */
872 if ((rfs == 256 || rfs == 512) && (blc == 24)) {
873 dev_err(&i2s->pdev->dev,
874 "%d-RFS not supported for 24-blc\n", rfs);
879 if (bfs == 16 || bfs == 32)
885 /* If already setup and running */
886 if (any_active(i2s) && (get_rfs(i2s) != rfs || get_bfs(i2s) != bfs)) {
887 dev_err(&i2s->pdev->dev,
888 "%s:%d Other DAI busy\n", __func__, __LINE__);
895 /* Don't bother with PSR in Slave mode */
899 if (!(i2s->quirks & QUIRK_NO_MUXPSR)) {
900 psr = i2s->rclk_srcrate / i2s->frmclk / rfs;
901 writel(((psr - 1) << 8) | PSR_PSREN, i2s->addr + I2SPSR);
902 dev_dbg(&i2s->pdev->dev,
903 "RCLK_SRC=%luHz PSR=%u, RCLK=%dfs, BCLK=%dfs\n",
904 i2s->rclk_srcrate, psr, rfs, bfs);
910 static int i2s_trigger(struct snd_pcm_substream *substream,
911 int cmd, struct snd_soc_dai *dai)
913 int capture = (substream->stream == SNDRV_PCM_STREAM_CAPTURE);
914 struct snd_soc_pcm_runtime *rtd = substream->private_data;
915 struct i2s_dai *i2s = to_info(rtd->cpu_dai);
919 case SNDRV_PCM_TRIGGER_START:
920 case SNDRV_PCM_TRIGGER_RESUME:
921 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
922 pm_runtime_get_sync(dai->dev);
923 spin_lock_irqsave(i2s->lock, flags);
925 if (config_setup(i2s)) {
926 spin_unlock_irqrestore(i2s->lock, flags);
935 spin_unlock_irqrestore(i2s->lock, flags);
937 case SNDRV_PCM_TRIGGER_STOP:
938 case SNDRV_PCM_TRIGGER_SUSPEND:
939 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
940 spin_lock_irqsave(i2s->lock, flags);
944 i2s_fifo(i2s, FIC_RXFLUSH);
947 i2s_fifo(i2s, FIC_TXFLUSH);
950 spin_unlock_irqrestore(i2s->lock, flags);
951 pm_runtime_put(dai->dev);
958 static int i2s_set_clkdiv(struct snd_soc_dai *dai,
961 struct i2s_dai *i2s = to_info(dai);
962 struct i2s_dai *other = get_other_dai(i2s);
965 case SAMSUNG_I2S_DIV_BCLK:
966 pm_runtime_get_sync(dai->dev);
967 if ((any_active(i2s) && div && (get_bfs(i2s) != div))
968 || (other && other->bfs && (other->bfs != div))) {
969 pm_runtime_put(dai->dev);
970 dev_err(&i2s->pdev->dev,
971 "%s:%d Other DAI busy\n", __func__, __LINE__);
975 pm_runtime_put(dai->dev);
978 dev_err(&i2s->pdev->dev,
979 "Invalid clock divider(%d)\n", div_id);
986 static snd_pcm_sframes_t
987 i2s_delay(struct snd_pcm_substream *substream, struct snd_soc_dai *dai)
989 struct i2s_dai *i2s = to_info(dai);
990 u32 reg = readl(i2s->addr + I2SFIC);
991 snd_pcm_sframes_t delay;
992 const struct samsung_i2s_variant_regs *i2s_regs = i2s->variant_regs;
994 WARN_ON(!pm_runtime_active(dai->dev));
996 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
997 delay = FIC_RXCOUNT(reg);
998 else if (is_secondary(i2s))
999 delay = FICS_TXCOUNT(readl(i2s->addr + I2SFICS));
1001 delay = (reg >> i2s_regs->ftx0cnt_off) & 0x7f;
1007 static int i2s_suspend(struct snd_soc_dai *dai)
1009 return pm_runtime_force_suspend(dai->dev);
1012 static int i2s_resume(struct snd_soc_dai *dai)
1014 return pm_runtime_force_resume(dai->dev);
1017 #define i2s_suspend NULL
1018 #define i2s_resume NULL
1021 static int samsung_i2s_dai_probe(struct snd_soc_dai *dai)
1023 struct i2s_dai *i2s = to_info(dai);
1024 struct i2s_dai *other = get_other_dai(i2s);
1025 unsigned long flags;
1027 pm_runtime_get_sync(dai->dev);
1029 if (is_secondary(i2s)) { /* If this is probe on the secondary DAI */
1030 snd_soc_dai_init_dma_data(dai, &other->sec_dai->dma_playback,
1033 snd_soc_dai_init_dma_data(dai, &i2s->dma_playback,
1036 if (i2s->quirks & QUIRK_NEED_RSTCLR)
1037 writel(CON_RSTCLR, i2s->addr + I2SCON);
1039 if (i2s->quirks & QUIRK_SUPPORTS_IDMA)
1040 idma_reg_addr_init(i2s->addr,
1041 i2s->sec_dai->idma_playback.addr);
1044 /* Reset any constraint on RFS and BFS */
1047 i2s->rclk_srcrate = 0;
1049 spin_lock_irqsave(i2s->lock, flags);
1052 i2s_fifo(i2s, FIC_TXFLUSH);
1053 i2s_fifo(other, FIC_TXFLUSH);
1054 i2s_fifo(i2s, FIC_RXFLUSH);
1055 spin_unlock_irqrestore(i2s->lock, flags);
1057 /* Gate CDCLK by default */
1058 if (!is_opened(other))
1059 i2s_set_sysclk(dai, SAMSUNG_I2S_CDCLK,
1060 0, SND_SOC_CLOCK_IN);
1061 pm_runtime_put(dai->dev);
1066 static int samsung_i2s_dai_remove(struct snd_soc_dai *dai)
1068 struct i2s_dai *i2s = snd_soc_dai_get_drvdata(dai);
1069 unsigned long flags;
1071 pm_runtime_get_sync(dai->dev);
1073 if (!is_secondary(i2s)) {
1074 if (i2s->quirks & QUIRK_NEED_RSTCLR) {
1075 spin_lock_irqsave(i2s->lock, flags);
1076 writel(0, i2s->addr + I2SCON);
1077 spin_unlock_irqrestore(i2s->lock, flags);
1081 pm_runtime_put(dai->dev);
1086 static const struct snd_soc_dai_ops samsung_i2s_dai_ops = {
1087 .trigger = i2s_trigger,
1088 .hw_params = i2s_hw_params,
1089 .set_fmt = i2s_set_fmt,
1090 .set_clkdiv = i2s_set_clkdiv,
1091 .set_sysclk = i2s_set_sysclk,
1092 .startup = i2s_startup,
1093 .shutdown = i2s_shutdown,
1097 static const struct snd_soc_component_driver samsung_i2s_component = {
1098 .name = "samsung-i2s",
1101 #define SAMSUNG_I2S_FMTS (SNDRV_PCM_FMTBIT_S8 | \
1102 SNDRV_PCM_FMTBIT_S16_LE | \
1103 SNDRV_PCM_FMTBIT_S24_LE)
1105 static struct i2s_dai *i2s_alloc_dai(struct platform_device *pdev,
1106 const struct samsung_i2s_dai_data *i2s_dai_data,
1109 struct i2s_dai *i2s;
1111 i2s = devm_kzalloc(&pdev->dev, sizeof(struct i2s_dai), GFP_KERNEL);
1116 i2s->pri_dai = NULL;
1117 i2s->sec_dai = NULL;
1118 i2s->i2s_dai_drv.id = 1;
1119 i2s->i2s_dai_drv.symmetric_rates = 1;
1120 i2s->i2s_dai_drv.probe = samsung_i2s_dai_probe;
1121 i2s->i2s_dai_drv.remove = samsung_i2s_dai_remove;
1122 i2s->i2s_dai_drv.ops = &samsung_i2s_dai_ops;
1123 i2s->i2s_dai_drv.suspend = i2s_suspend;
1124 i2s->i2s_dai_drv.resume = i2s_resume;
1125 i2s->i2s_dai_drv.playback.channels_min = 1;
1126 i2s->i2s_dai_drv.playback.channels_max = 2;
1127 i2s->i2s_dai_drv.playback.rates = i2s_dai_data->pcm_rates;
1128 i2s->i2s_dai_drv.playback.formats = SAMSUNG_I2S_FMTS;
1131 i2s->i2s_dai_drv.name = SAMSUNG_I2S_DAI;
1132 i2s->i2s_dai_drv.capture.channels_min = 1;
1133 i2s->i2s_dai_drv.capture.channels_max = 2;
1134 i2s->i2s_dai_drv.capture.rates = i2s_dai_data->pcm_rates;
1135 i2s->i2s_dai_drv.capture.formats = SAMSUNG_I2S_FMTS;
1137 i2s->i2s_dai_drv.name = SAMSUNG_I2S_DAI_SEC;
1143 static int i2s_runtime_suspend(struct device *dev)
1145 struct i2s_dai *i2s = dev_get_drvdata(dev);
1147 i2s->suspend_i2smod = readl(i2s->addr + I2SMOD);
1148 i2s->suspend_i2scon = readl(i2s->addr + I2SCON);
1149 i2s->suspend_i2spsr = readl(i2s->addr + I2SPSR);
1152 clk_disable_unprepare(i2s->op_clk);
1153 clk_disable_unprepare(i2s->clk);
1158 static int i2s_runtime_resume(struct device *dev)
1160 struct i2s_dai *i2s = dev_get_drvdata(dev);
1163 ret = clk_prepare_enable(i2s->clk);
1168 ret = clk_prepare_enable(i2s->op_clk);
1170 clk_disable_unprepare(i2s->clk);
1175 writel(i2s->suspend_i2scon, i2s->addr + I2SCON);
1176 writel(i2s->suspend_i2smod, i2s->addr + I2SMOD);
1177 writel(i2s->suspend_i2spsr, i2s->addr + I2SPSR);
1181 #endif /* CONFIG_PM */
1183 static void i2s_unregister_clocks(struct i2s_dai *i2s)
1187 for (i = 0; i < i2s->clk_data.clk_num; i++) {
1188 if (!IS_ERR(i2s->clk_table[i]))
1189 clk_unregister(i2s->clk_table[i]);
1193 static void i2s_unregister_clock_provider(struct platform_device *pdev)
1195 struct i2s_dai *i2s = dev_get_drvdata(&pdev->dev);
1197 of_clk_del_provider(pdev->dev.of_node);
1198 i2s_unregister_clocks(i2s);
1201 static int i2s_register_clock_provider(struct platform_device *pdev)
1203 const char * const i2s_clk_desc[] = { "cdclk", "rclk_src", "prescaler" };
1204 const char *clk_name[2] = { "i2s_opclk0", "i2s_opclk1" };
1205 const char *p_names[2] = { NULL };
1206 struct device *dev = &pdev->dev;
1207 struct i2s_dai *i2s = dev_get_drvdata(dev);
1208 const struct samsung_i2s_variant_regs *reg_info = i2s->variant_regs;
1209 const char *i2s_clk_name[ARRAY_SIZE(i2s_clk_desc)];
1210 struct clk *rclksrc;
1213 /* Register the clock provider only if it's expected in the DTB */
1214 if (!of_find_property(dev->of_node, "#clock-cells", NULL))
1217 /* Get the RCLKSRC mux clock parent clock names */
1218 for (i = 0; i < ARRAY_SIZE(p_names); i++) {
1219 rclksrc = clk_get(dev, clk_name[i]);
1220 if (IS_ERR(rclksrc))
1222 p_names[i] = __clk_get_name(rclksrc);
1226 for (i = 0; i < ARRAY_SIZE(i2s_clk_desc); i++) {
1227 i2s_clk_name[i] = devm_kasprintf(dev, GFP_KERNEL, "%s_%s",
1228 dev_name(dev), i2s_clk_desc[i]);
1229 if (!i2s_clk_name[i])
1233 if (!(i2s->quirks & QUIRK_NO_MUXPSR)) {
1234 /* Activate the prescaler */
1235 u32 val = readl(i2s->addr + I2SPSR);
1236 writel(val | PSR_PSREN, i2s->addr + I2SPSR);
1238 i2s->clk_table[CLK_I2S_RCLK_SRC] = clk_register_mux(dev,
1239 i2s_clk_name[CLK_I2S_RCLK_SRC], p_names,
1240 ARRAY_SIZE(p_names),
1241 CLK_SET_RATE_NO_REPARENT | CLK_SET_RATE_PARENT,
1242 i2s->addr + I2SMOD, reg_info->rclksrc_off,
1245 i2s->clk_table[CLK_I2S_RCLK_PSR] = clk_register_divider(dev,
1246 i2s_clk_name[CLK_I2S_RCLK_PSR],
1247 i2s_clk_name[CLK_I2S_RCLK_SRC],
1248 CLK_SET_RATE_PARENT,
1249 i2s->addr + I2SPSR, 8, 6, 0, i2s->lock);
1251 p_names[0] = i2s_clk_name[CLK_I2S_RCLK_PSR];
1252 i2s->clk_data.clk_num = 2;
1255 i2s->clk_table[CLK_I2S_CDCLK] = clk_register_gate(dev,
1256 i2s_clk_name[CLK_I2S_CDCLK], p_names[0],
1257 CLK_SET_RATE_PARENT,
1258 i2s->addr + I2SMOD, reg_info->cdclkcon_off,
1259 CLK_GATE_SET_TO_DISABLE, i2s->lock);
1261 i2s->clk_data.clk_num += 1;
1262 i2s->clk_data.clks = i2s->clk_table;
1264 ret = of_clk_add_provider(dev->of_node, of_clk_src_onecell_get,
1267 dev_err(dev, "failed to add clock provider: %d\n", ret);
1268 i2s_unregister_clocks(i2s);
1274 static int samsung_i2s_probe(struct platform_device *pdev)
1276 struct i2s_dai *pri_dai, *sec_dai = NULL;
1277 struct s3c_audio_pdata *i2s_pdata = pdev->dev.platform_data;
1278 struct resource *res;
1279 u32 regs_base, quirks = 0, idma_addr = 0;
1280 struct device_node *np = pdev->dev.of_node;
1281 const struct samsung_i2s_dai_data *i2s_dai_data;
1284 if (IS_ENABLED(CONFIG_OF) && pdev->dev.of_node)
1285 i2s_dai_data = of_device_get_match_data(&pdev->dev);
1287 i2s_dai_data = (struct samsung_i2s_dai_data *)
1288 platform_get_device_id(pdev)->driver_data;
1290 pri_dai = i2s_alloc_dai(pdev, i2s_dai_data, false);
1292 dev_err(&pdev->dev, "Unable to alloc I2S_pri\n");
1296 spin_lock_init(&pri_dai->spinlock);
1297 pri_dai->lock = &pri_dai->spinlock;
1300 if (i2s_pdata == NULL) {
1301 dev_err(&pdev->dev, "Can't work without s3c_audio_pdata\n");
1305 pri_dai->dma_playback.filter_data = i2s_pdata->dma_playback;
1306 pri_dai->dma_capture.filter_data = i2s_pdata->dma_capture;
1307 pri_dai->filter = i2s_pdata->dma_filter;
1309 quirks = i2s_pdata->type.quirks;
1310 idma_addr = i2s_pdata->type.idma_addr;
1312 quirks = i2s_dai_data->quirks;
1313 if (of_property_read_u32(np, "samsung,idma-addr",
1315 if (quirks & QUIRK_SUPPORTS_IDMA) {
1316 dev_info(&pdev->dev, "idma address is not"\
1321 quirks &= ~(QUIRK_SEC_DAI | QUIRK_SUPPORTS_IDMA);
1323 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1324 pri_dai->addr = devm_ioremap_resource(&pdev->dev, res);
1325 if (IS_ERR(pri_dai->addr))
1326 return PTR_ERR(pri_dai->addr);
1328 regs_base = res->start;
1330 pri_dai->clk = devm_clk_get(&pdev->dev, "iis");
1331 if (IS_ERR(pri_dai->clk)) {
1332 dev_err(&pdev->dev, "Failed to get iis clock\n");
1333 return PTR_ERR(pri_dai->clk);
1336 ret = clk_prepare_enable(pri_dai->clk);
1338 dev_err(&pdev->dev, "failed to enable clock: %d\n", ret);
1341 pri_dai->dma_playback.addr = regs_base + I2STXD;
1342 pri_dai->dma_capture.addr = regs_base + I2SRXD;
1343 pri_dai->dma_playback.chan_name = "tx";
1344 pri_dai->dma_capture.chan_name = "rx";
1345 pri_dai->dma_playback.addr_width = 4;
1346 pri_dai->dma_capture.addr_width = 4;
1347 pri_dai->quirks = quirks;
1348 pri_dai->variant_regs = i2s_dai_data->i2s_variant_regs;
1350 if (quirks & QUIRK_PRI_6CHAN)
1351 pri_dai->i2s_dai_drv.playback.channels_max = 6;
1353 ret = samsung_asoc_dma_platform_register(&pdev->dev, pri_dai->filter,
1356 goto err_disable_clk;
1358 ret = devm_snd_soc_register_component(&pdev->dev,
1359 &samsung_i2s_component,
1360 &pri_dai->i2s_dai_drv, 1);
1362 goto err_disable_clk;
1364 if (quirks & QUIRK_SEC_DAI) {
1365 sec_dai = i2s_alloc_dai(pdev, i2s_dai_data, true);
1367 dev_err(&pdev->dev, "Unable to alloc I2S_sec\n");
1369 goto err_disable_clk;
1372 sec_dai->lock = &pri_dai->spinlock;
1373 sec_dai->variant_regs = pri_dai->variant_regs;
1374 sec_dai->dma_playback.addr = regs_base + I2STXDS;
1375 sec_dai->dma_playback.chan_name = "tx-sec";
1378 sec_dai->dma_playback.filter_data = i2s_pdata->dma_play_sec;
1379 sec_dai->filter = i2s_pdata->dma_filter;
1382 sec_dai->dma_playback.addr_width = 4;
1383 sec_dai->addr = pri_dai->addr;
1384 sec_dai->clk = pri_dai->clk;
1385 sec_dai->quirks = quirks;
1386 sec_dai->idma_playback.addr = idma_addr;
1387 sec_dai->pri_dai = pri_dai;
1388 pri_dai->sec_dai = sec_dai;
1390 ret = samsung_asoc_dma_platform_register(&pdev->dev,
1391 sec_dai->filter, "tx-sec", NULL);
1393 goto err_disable_clk;
1395 ret = devm_snd_soc_register_component(&pdev->dev,
1396 &samsung_i2s_component,
1397 &sec_dai->i2s_dai_drv, 1);
1399 goto err_disable_clk;
1402 if (i2s_pdata && i2s_pdata->cfg_gpio && i2s_pdata->cfg_gpio(pdev)) {
1403 dev_err(&pdev->dev, "Unable to configure gpio\n");
1405 goto err_disable_clk;
1408 dev_set_drvdata(&pdev->dev, pri_dai);
1410 pm_runtime_set_active(&pdev->dev);
1411 pm_runtime_enable(&pdev->dev);
1413 ret = i2s_register_clock_provider(pdev);
1415 goto err_disable_pm;
1417 pri_dai->op_clk = clk_get_parent(pri_dai->clk_table[CLK_I2S_RCLK_SRC]);
1422 pm_runtime_disable(&pdev->dev);
1424 clk_disable_unprepare(pri_dai->clk);
1428 static int samsung_i2s_remove(struct platform_device *pdev)
1430 struct i2s_dai *pri_dai;
1432 pri_dai = dev_get_drvdata(&pdev->dev);
1434 pm_runtime_get_sync(&pdev->dev);
1435 pm_runtime_disable(&pdev->dev);
1437 i2s_unregister_clock_provider(pdev);
1438 clk_disable_unprepare(pri_dai->clk);
1439 pm_runtime_put_noidle(&pdev->dev);
1444 static const struct samsung_i2s_variant_regs i2sv3_regs = {
1458 static const struct samsung_i2s_variant_regs i2sv6_regs = {
1472 static const struct samsung_i2s_variant_regs i2sv7_regs = {
1486 static const struct samsung_i2s_variant_regs i2sv5_i2s1_regs = {
1500 static const struct samsung_i2s_dai_data i2sv3_dai_type = {
1501 .quirks = QUIRK_NO_MUXPSR,
1502 .pcm_rates = SNDRV_PCM_RATE_8000_96000,
1503 .i2s_variant_regs = &i2sv3_regs,
1506 static const struct samsung_i2s_dai_data i2sv5_dai_type = {
1507 .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR |
1508 QUIRK_SUPPORTS_IDMA,
1509 .pcm_rates = SNDRV_PCM_RATE_8000_96000,
1510 .i2s_variant_regs = &i2sv3_regs,
1513 static const struct samsung_i2s_dai_data i2sv6_dai_type = {
1514 .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR |
1515 QUIRK_SUPPORTS_TDM | QUIRK_SUPPORTS_IDMA,
1516 .pcm_rates = SNDRV_PCM_RATE_8000_96000,
1517 .i2s_variant_regs = &i2sv6_regs,
1520 static const struct samsung_i2s_dai_data i2sv7_dai_type = {
1521 .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR |
1523 .pcm_rates = SNDRV_PCM_RATE_8000_192000,
1524 .i2s_variant_regs = &i2sv7_regs,
1527 static const struct samsung_i2s_dai_data i2sv5_dai_type_i2s1 = {
1528 .quirks = QUIRK_PRI_6CHAN | QUIRK_NEED_RSTCLR,
1529 .pcm_rates = SNDRV_PCM_RATE_8000_96000,
1530 .i2s_variant_regs = &i2sv5_i2s1_regs,
1533 static const struct platform_device_id samsung_i2s_driver_ids[] = {
1535 .name = "samsung-i2s",
1536 .driver_data = (kernel_ulong_t)&i2sv3_dai_type,
1540 MODULE_DEVICE_TABLE(platform, samsung_i2s_driver_ids);
1543 static const struct of_device_id exynos_i2s_match[] = {
1545 .compatible = "samsung,s3c6410-i2s",
1546 .data = &i2sv3_dai_type,
1548 .compatible = "samsung,s5pv210-i2s",
1549 .data = &i2sv5_dai_type,
1551 .compatible = "samsung,exynos5420-i2s",
1552 .data = &i2sv6_dai_type,
1554 .compatible = "samsung,exynos7-i2s",
1555 .data = &i2sv7_dai_type,
1557 .compatible = "samsung,exynos7-i2s1",
1558 .data = &i2sv5_dai_type_i2s1,
1562 MODULE_DEVICE_TABLE(of, exynos_i2s_match);
1565 static const struct dev_pm_ops samsung_i2s_pm = {
1566 SET_RUNTIME_PM_OPS(i2s_runtime_suspend,
1567 i2s_runtime_resume, NULL)
1568 SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
1569 pm_runtime_force_resume)
1572 static struct platform_driver samsung_i2s_driver = {
1573 .probe = samsung_i2s_probe,
1574 .remove = samsung_i2s_remove,
1575 .id_table = samsung_i2s_driver_ids,
1577 .name = "samsung-i2s",
1578 .of_match_table = of_match_ptr(exynos_i2s_match),
1579 .pm = &samsung_i2s_pm,
1583 module_platform_driver(samsung_i2s_driver);
1585 /* Module information */
1586 MODULE_AUTHOR("Jaswinder Singh, <jassisinghbrar@gmail.com>");
1587 MODULE_DESCRIPTION("Samsung I2S Interface");
1588 MODULE_ALIAS("platform:samsung-i2s");
1589 MODULE_LICENSE("GPL");