2 * pxa-ssp.c -- ALSA Soc Audio Layer
4 * Copyright 2005,2008 Wolfson Microelectronics PLC.
5 * Author: Liam Girdwood
6 * Mark Brown <broonie@opensource.wolfsonmicro.com>
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
14 * o Test network mode for > 16bit sample size
17 #include <linux/init.h>
18 #include <linux/module.h>
19 #include <linux/platform_device.h>
20 #include <linux/clk.h>
25 #include <sound/core.h>
26 #include <sound/pcm.h>
27 #include <sound/initval.h>
28 #include <sound/pcm_params.h>
29 #include <sound/soc.h>
30 #include <sound/pxa2xx-lib.h>
32 #include <mach/hardware.h>
34 #include <mach/regs-ssp.h>
35 #include <mach/audio.h>
38 #include "pxa2xx-pcm.h"
42 * SSP audio private data
49 struct ssp_state state;
53 #define PXA2xx_SSP1_BASE 0x41000000
54 #define PXA27x_SSP2_BASE 0x41700000
55 #define PXA27x_SSP3_BASE 0x41900000
56 #define PXA3xx_SSP4_BASE 0x41a00000
58 static struct pxa2xx_pcm_dma_params pxa_ssp1_pcm_mono_out = {
59 .name = "SSP1 PCM Mono out",
60 .dev_addr = PXA2xx_SSP1_BASE + SSDR,
62 .dcmd = DCMD_INCSRCADDR | DCMD_FLOWTRG |
63 DCMD_BURST16 | DCMD_WIDTH2,
66 static struct pxa2xx_pcm_dma_params pxa_ssp1_pcm_mono_in = {
67 .name = "SSP1 PCM Mono in",
68 .dev_addr = PXA2xx_SSP1_BASE + SSDR,
70 .dcmd = DCMD_INCTRGADDR | DCMD_FLOWSRC |
71 DCMD_BURST16 | DCMD_WIDTH2,
74 static struct pxa2xx_pcm_dma_params pxa_ssp1_pcm_stereo_out = {
75 .name = "SSP1 PCM Stereo out",
76 .dev_addr = PXA2xx_SSP1_BASE + SSDR,
78 .dcmd = DCMD_INCSRCADDR | DCMD_FLOWTRG |
79 DCMD_BURST16 | DCMD_WIDTH4,
82 static struct pxa2xx_pcm_dma_params pxa_ssp1_pcm_stereo_in = {
83 .name = "SSP1 PCM Stereo in",
84 .dev_addr = PXA2xx_SSP1_BASE + SSDR,
86 .dcmd = DCMD_INCTRGADDR | DCMD_FLOWSRC |
87 DCMD_BURST16 | DCMD_WIDTH4,
90 static struct pxa2xx_pcm_dma_params pxa_ssp2_pcm_mono_out = {
91 .name = "SSP2 PCM Mono out",
92 .dev_addr = PXA27x_SSP2_BASE + SSDR,
94 .dcmd = DCMD_INCSRCADDR | DCMD_FLOWTRG |
95 DCMD_BURST16 | DCMD_WIDTH2,
98 static struct pxa2xx_pcm_dma_params pxa_ssp2_pcm_mono_in = {
99 .name = "SSP2 PCM Mono in",
100 .dev_addr = PXA27x_SSP2_BASE + SSDR,
102 .dcmd = DCMD_INCTRGADDR | DCMD_FLOWSRC |
103 DCMD_BURST16 | DCMD_WIDTH2,
106 static struct pxa2xx_pcm_dma_params pxa_ssp2_pcm_stereo_out = {
107 .name = "SSP2 PCM Stereo out",
108 .dev_addr = PXA27x_SSP2_BASE + SSDR,
110 .dcmd = DCMD_INCSRCADDR | DCMD_FLOWTRG |
111 DCMD_BURST16 | DCMD_WIDTH4,
114 static struct pxa2xx_pcm_dma_params pxa_ssp2_pcm_stereo_in = {
115 .name = "SSP2 PCM Stereo in",
116 .dev_addr = PXA27x_SSP2_BASE + SSDR,
118 .dcmd = DCMD_INCTRGADDR | DCMD_FLOWSRC |
119 DCMD_BURST16 | DCMD_WIDTH4,
122 static struct pxa2xx_pcm_dma_params pxa_ssp3_pcm_mono_out = {
123 .name = "SSP3 PCM Mono out",
124 .dev_addr = PXA27x_SSP3_BASE + SSDR,
126 .dcmd = DCMD_INCSRCADDR | DCMD_FLOWTRG |
127 DCMD_BURST16 | DCMD_WIDTH2,
130 static struct pxa2xx_pcm_dma_params pxa_ssp3_pcm_mono_in = {
131 .name = "SSP3 PCM Mono in",
132 .dev_addr = PXA27x_SSP3_BASE + SSDR,
134 .dcmd = DCMD_INCTRGADDR | DCMD_FLOWSRC |
135 DCMD_BURST16 | DCMD_WIDTH2,
138 static struct pxa2xx_pcm_dma_params pxa_ssp3_pcm_stereo_out = {
139 .name = "SSP3 PCM Stereo out",
140 .dev_addr = PXA27x_SSP3_BASE + SSDR,
142 .dcmd = DCMD_INCSRCADDR | DCMD_FLOWTRG |
143 DCMD_BURST16 | DCMD_WIDTH4,
146 static struct pxa2xx_pcm_dma_params pxa_ssp3_pcm_stereo_in = {
147 .name = "SSP3 PCM Stereo in",
148 .dev_addr = PXA27x_SSP3_BASE + SSDR,
150 .dcmd = DCMD_INCTRGADDR | DCMD_FLOWSRC |
151 DCMD_BURST16 | DCMD_WIDTH4,
154 static struct pxa2xx_pcm_dma_params pxa_ssp4_pcm_mono_out = {
155 .name = "SSP4 PCM Mono out",
156 .dev_addr = PXA3xx_SSP4_BASE + SSDR,
158 .dcmd = DCMD_INCSRCADDR | DCMD_FLOWTRG |
159 DCMD_BURST16 | DCMD_WIDTH2,
162 static struct pxa2xx_pcm_dma_params pxa_ssp4_pcm_mono_in = {
163 .name = "SSP4 PCM Mono in",
164 .dev_addr = PXA3xx_SSP4_BASE + SSDR,
166 .dcmd = DCMD_INCTRGADDR | DCMD_FLOWSRC |
167 DCMD_BURST16 | DCMD_WIDTH2,
170 static struct pxa2xx_pcm_dma_params pxa_ssp4_pcm_stereo_out = {
171 .name = "SSP4 PCM Stereo out",
172 .dev_addr = PXA3xx_SSP4_BASE + SSDR,
174 .dcmd = DCMD_INCSRCADDR | DCMD_FLOWTRG |
175 DCMD_BURST16 | DCMD_WIDTH4,
178 static struct pxa2xx_pcm_dma_params pxa_ssp4_pcm_stereo_in = {
179 .name = "SSP4 PCM Stereo in",
180 .dev_addr = PXA3xx_SSP4_BASE + SSDR,
182 .dcmd = DCMD_INCTRGADDR | DCMD_FLOWSRC |
183 DCMD_BURST16 | DCMD_WIDTH4,
186 static void dump_registers(struct ssp_device *ssp)
188 dev_dbg(&ssp->pdev->dev, "SSCR0 0x%08x SSCR1 0x%08x SSTO 0x%08x\n",
189 ssp_read_reg(ssp, SSCR0), ssp_read_reg(ssp, SSCR1),
190 ssp_read_reg(ssp, SSTO));
192 dev_dbg(&ssp->pdev->dev, "SSPSP 0x%08x SSSR 0x%08x SSACD 0x%08x\n",
193 ssp_read_reg(ssp, SSPSP), ssp_read_reg(ssp, SSSR),
194 ssp_read_reg(ssp, SSACD));
197 static struct pxa2xx_pcm_dma_params *ssp_dma_params[4][4] = {
199 &pxa_ssp1_pcm_mono_out, &pxa_ssp1_pcm_mono_in,
200 &pxa_ssp1_pcm_stereo_out, &pxa_ssp1_pcm_stereo_in,
203 &pxa_ssp2_pcm_mono_out, &pxa_ssp2_pcm_mono_in,
204 &pxa_ssp2_pcm_stereo_out, &pxa_ssp2_pcm_stereo_in,
207 &pxa_ssp3_pcm_mono_out, &pxa_ssp3_pcm_mono_in,
208 &pxa_ssp3_pcm_stereo_out, &pxa_ssp3_pcm_stereo_in,
211 &pxa_ssp4_pcm_mono_out, &pxa_ssp4_pcm_mono_in,
212 &pxa_ssp4_pcm_stereo_out, &pxa_ssp4_pcm_stereo_in,
216 static int pxa_ssp_startup(struct snd_pcm_substream *substream,
217 struct snd_soc_dai *dai)
219 struct snd_soc_pcm_runtime *rtd = substream->private_data;
220 struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai;
221 struct ssp_priv *priv = cpu_dai->private_data;
224 if (!cpu_dai->active) {
225 priv->dev.port = cpu_dai->id + 1;
226 priv->dev.irq = NO_IRQ;
227 clk_enable(priv->dev.ssp->clk);
228 ssp_disable(&priv->dev);
233 static void pxa_ssp_shutdown(struct snd_pcm_substream *substream,
234 struct snd_soc_dai *dai)
236 struct snd_soc_pcm_runtime *rtd = substream->private_data;
237 struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai;
238 struct ssp_priv *priv = cpu_dai->private_data;
240 if (!cpu_dai->active) {
241 ssp_disable(&priv->dev);
242 clk_disable(priv->dev.ssp->clk);
248 static int pxa_ssp_suspend(struct snd_soc_dai *cpu_dai)
250 struct ssp_priv *priv = cpu_dai->private_data;
252 if (!cpu_dai->active)
255 ssp_save_state(&priv->dev, &priv->state);
256 clk_disable(priv->dev.ssp->clk);
260 static int pxa_ssp_resume(struct snd_soc_dai *cpu_dai)
262 struct ssp_priv *priv = cpu_dai->private_data;
264 if (!cpu_dai->active)
267 clk_enable(priv->dev.ssp->clk);
268 ssp_restore_state(&priv->dev, &priv->state);
269 ssp_enable(&priv->dev);
275 #define pxa_ssp_suspend NULL
276 #define pxa_ssp_resume NULL
280 * ssp_set_clkdiv - set SSP clock divider
281 * @div: serial clock rate divider
283 static void ssp_set_scr(struct ssp_dev *dev, u32 div)
285 struct ssp_device *ssp = dev->ssp;
286 u32 sscr0 = ssp_read_reg(dev->ssp, SSCR0) & ~SSCR0_SCR;
288 ssp_write_reg(ssp, SSCR0, (sscr0 | SSCR0_SerClkDiv(div)));
292 * Set the SSP ports SYSCLK.
294 static int pxa_ssp_set_dai_sysclk(struct snd_soc_dai *cpu_dai,
295 int clk_id, unsigned int freq, int dir)
297 struct ssp_priv *priv = cpu_dai->private_data;
298 struct ssp_device *ssp = priv->dev.ssp;
301 u32 sscr0 = ssp_read_reg(ssp, SSCR0) &
302 ~(SSCR0_ECS | SSCR0_NCS | SSCR0_MOD | SSCR0_ACS);
304 dev_dbg(&ssp->pdev->dev,
305 "pxa_ssp_set_dai_sysclk id: %d, clk_id %d, freq %d\n",
306 cpu_dai->id, clk_id, freq);
309 case PXA_SSP_CLK_NET_PLL:
312 case PXA_SSP_CLK_PLL:
313 /* Internal PLL is fixed */
315 priv->sysclk = 1843200;
317 priv->sysclk = 13000000;
319 case PXA_SSP_CLK_EXT:
323 case PXA_SSP_CLK_NET:
325 sscr0 |= SSCR0_NCS | SSCR0_MOD;
327 case PXA_SSP_CLK_AUDIO:
329 ssp_set_scr(&priv->dev, 1);
336 /* The SSP clock must be disabled when changing SSP clock mode
337 * on PXA2xx. On PXA3xx it must be enabled when doing so. */
338 if (!cpu_is_pxa3xx())
339 clk_disable(priv->dev.ssp->clk);
340 val = ssp_read_reg(ssp, SSCR0) | sscr0;
341 ssp_write_reg(ssp, SSCR0, val);
342 if (!cpu_is_pxa3xx())
343 clk_enable(priv->dev.ssp->clk);
349 * Set the SSP clock dividers.
351 static int pxa_ssp_set_dai_clkdiv(struct snd_soc_dai *cpu_dai,
354 struct ssp_priv *priv = cpu_dai->private_data;
355 struct ssp_device *ssp = priv->dev.ssp;
359 case PXA_SSP_AUDIO_DIV_ACDS:
360 val = (ssp_read_reg(ssp, SSACD) & ~0x7) | SSACD_ACDS(div);
361 ssp_write_reg(ssp, SSACD, val);
363 case PXA_SSP_AUDIO_DIV_SCDB:
364 val = ssp_read_reg(ssp, SSACD);
366 #if defined(CONFIG_PXA3xx)
371 case PXA_SSP_CLK_SCDB_1:
374 case PXA_SSP_CLK_SCDB_4:
376 #if defined(CONFIG_PXA3xx)
377 case PXA_SSP_CLK_SCDB_8:
387 ssp_write_reg(ssp, SSACD, val);
389 case PXA_SSP_DIV_SCR:
390 ssp_set_scr(&priv->dev, div);
400 * Configure the PLL frequency pxa27x and (afaik - pxa320 only)
402 static int pxa_ssp_set_dai_pll(struct snd_soc_dai *cpu_dai,
403 int pll_id, unsigned int freq_in, unsigned int freq_out)
405 struct ssp_priv *priv = cpu_dai->private_data;
406 struct ssp_device *ssp = priv->dev.ssp;
407 u32 ssacd = ssp_read_reg(ssp, SSACD) & ~0x70;
409 #if defined(CONFIG_PXA3xx)
411 ssp_write_reg(ssp, SSACDD, 0);
438 /* PXA3xx has a clock ditherer which can be used to generate
439 * a wider range of frequencies - calculate a value for it.
441 if (cpu_is_pxa3xx()) {
445 do_div(tmp, freq_out);
448 val = (val << 16) | 64;;
449 ssp_write_reg(ssp, SSACDD, val);
453 dev_dbg(&ssp->pdev->dev,
454 "Using SSACDD %x to supply %dHz\n",
463 ssp_write_reg(ssp, SSACD, ssacd);
469 * Set the active slots in TDM/Network mode
471 static int pxa_ssp_set_dai_tdm_slot(struct snd_soc_dai *cpu_dai,
472 unsigned int mask, int slots)
474 struct ssp_priv *priv = cpu_dai->private_data;
475 struct ssp_device *ssp = priv->dev.ssp;
478 sscr0 = ssp_read_reg(ssp, SSCR0) & ~SSCR0_SlotsPerFrm(7);
480 /* set number of active slots */
481 sscr0 |= SSCR0_SlotsPerFrm(slots);
482 ssp_write_reg(ssp, SSCR0, sscr0);
484 /* set active slot mask */
485 ssp_write_reg(ssp, SSTSA, mask);
486 ssp_write_reg(ssp, SSRSA, mask);
491 * Tristate the SSP DAI lines
493 static int pxa_ssp_set_dai_tristate(struct snd_soc_dai *cpu_dai,
496 struct ssp_priv *priv = cpu_dai->private_data;
497 struct ssp_device *ssp = priv->dev.ssp;
500 sscr1 = ssp_read_reg(ssp, SSCR1);
505 ssp_write_reg(ssp, SSCR1, sscr1);
511 * Set up the SSP DAI format.
512 * The SSP Port must be inactive before calling this function as the
513 * physical interface format is changed.
515 static int pxa_ssp_set_dai_fmt(struct snd_soc_dai *cpu_dai,
518 struct ssp_priv *priv = cpu_dai->private_data;
519 struct ssp_device *ssp = priv->dev.ssp;
524 /* check if we need to change anything at all */
525 if (priv->dai_fmt == fmt)
528 /* we can only change the settings if the port is not in use */
529 if (ssp_read_reg(ssp, SSCR0) & SSCR0_SSE) {
530 dev_err(&ssp->pdev->dev,
531 "can't change hardware dai format: stream is in use");
535 /* reset port settings */
536 sscr0 = ssp_read_reg(ssp, SSCR0) &
537 (SSCR0_ECS | SSCR0_NCS | SSCR0_MOD | SSCR0_ACS);
538 sscr1 = SSCR1_RxTresh(8) | SSCR1_TxTresh(7);
541 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
542 case SND_SOC_DAIFMT_CBM_CFM:
543 sscr1 |= SSCR1_SCLKDIR | SSCR1_SFRMDIR;
545 case SND_SOC_DAIFMT_CBM_CFS:
546 sscr1 |= SSCR1_SCLKDIR;
548 case SND_SOC_DAIFMT_CBS_CFS:
554 ssp_write_reg(ssp, SSCR0, sscr0);
555 ssp_write_reg(ssp, SSCR1, sscr1);
556 ssp_write_reg(ssp, SSPSP, sspsp);
558 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
559 case SND_SOC_DAIFMT_I2S:
561 sscr1 |= SSCR1_RWOT | SSCR1_TRAIL;
563 /* See hw_params() */
564 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
565 case SND_SOC_DAIFMT_NB_NF:
566 sspsp |= SSPSP_SFRMP;
568 case SND_SOC_DAIFMT_NB_IF:
570 case SND_SOC_DAIFMT_IB_IF:
571 sspsp |= SSPSP_SCMODE(2);
573 case SND_SOC_DAIFMT_IB_NF:
574 sspsp |= SSPSP_SCMODE(2) | SSPSP_SFRMP;
581 case SND_SOC_DAIFMT_DSP_A:
583 case SND_SOC_DAIFMT_DSP_B:
584 sscr0 |= SSCR0_MOD | SSCR0_PSP;
585 sscr1 |= SSCR1_TRAIL | SSCR1_RWOT;
587 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
588 case SND_SOC_DAIFMT_NB_NF:
589 sspsp |= SSPSP_SFRMP;
591 case SND_SOC_DAIFMT_NB_IF:
593 case SND_SOC_DAIFMT_IB_IF:
594 sspsp |= SSPSP_SCMODE(2);
596 case SND_SOC_DAIFMT_IB_NF:
597 sspsp |= SSPSP_SCMODE(2) | SSPSP_SFRMP;
608 ssp_write_reg(ssp, SSCR0, sscr0);
609 ssp_write_reg(ssp, SSCR1, sscr1);
610 ssp_write_reg(ssp, SSPSP, sspsp);
614 /* Since we are configuring the timings for the format by hand
615 * we have to defer some things until hw_params() where we
616 * know parameters like the sample size.
624 * Set the SSP audio DMA parameters and sample size.
625 * Can be called multiple times by oss emulation.
627 static int pxa_ssp_hw_params(struct snd_pcm_substream *substream,
628 struct snd_pcm_hw_params *params,
629 struct snd_soc_dai *dai)
631 struct snd_soc_pcm_runtime *rtd = substream->private_data;
632 struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai;
633 struct ssp_priv *priv = cpu_dai->private_data;
634 struct ssp_device *ssp = priv->dev.ssp;
635 int dma = 0, chn = params_channels(params);
638 int width = snd_pcm_format_physical_width(params_format(params));
639 int ttsa = ssp_read_reg(ssp, SSTSA) & 0xf;
641 /* select correct DMA params */
642 if (substream->stream != SNDRV_PCM_STREAM_PLAYBACK)
643 dma = 1; /* capture DMA offset is 1,3 */
644 /* Network mode with one active slot (ttsa == 1) can be used
645 * to force 16-bit frame width on the wire (for S16_LE), even
646 * with two channels. Use 16-bit DMA transfers for this case.
648 if (((chn == 2) && (ttsa != 1)) || (width == 32))
649 dma += 2; /* 32-bit DMA offset is 2, 16-bit is 0 */
651 cpu_dai->dma_data = ssp_dma_params[cpu_dai->id][dma];
653 dev_dbg(&ssp->pdev->dev, "pxa_ssp_hw_params: dma %d\n", dma);
655 /* we can only change the settings if the port is not in use */
656 if (ssp_read_reg(ssp, SSCR0) & SSCR0_SSE)
659 /* clear selected SSP bits */
660 sscr0 = ssp_read_reg(ssp, SSCR0) & ~(SSCR0_DSS | SSCR0_EDSS);
661 ssp_write_reg(ssp, SSCR0, sscr0);
664 sscr0 = ssp_read_reg(ssp, SSCR0);
665 switch (params_format(params)) {
666 case SNDRV_PCM_FORMAT_S16_LE:
669 sscr0 |= SSCR0_FPCKE;
671 sscr0 |= SSCR0_DataSize(16);
673 case SNDRV_PCM_FORMAT_S24_LE:
674 sscr0 |= (SSCR0_EDSS | SSCR0_DataSize(8));
676 case SNDRV_PCM_FORMAT_S32_LE:
677 sscr0 |= (SSCR0_EDSS | SSCR0_DataSize(16));
680 ssp_write_reg(ssp, SSCR0, sscr0);
682 switch (priv->dai_fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
683 case SND_SOC_DAIFMT_I2S:
684 sspsp = ssp_read_reg(ssp, SSPSP);
686 if (((sscr0 & SSCR0_SCR) == SSCR0_SerClkDiv(4)) &&
688 /* This is a special case where the bitclk is 64fs
689 * and we're not dealing with 2*32 bits of audio
692 * The SSP values used for that are all found out by
693 * trying and failing a lot; some of the registers
694 * needed for that mode are only available on PXA3xx.
698 if (!cpu_is_pxa3xx())
701 sspsp |= SSPSP_SFRMWDTH(width * 2);
702 sspsp |= SSPSP_SFRMDLY(width * 4);
703 sspsp |= SSPSP_EDMYSTOP(3);
704 sspsp |= SSPSP_DMYSTOP(3);
705 sspsp |= SSPSP_DMYSTRT(1);
710 /* The frame width is the width the LRCLK is
711 * asserted for; the delay is expressed in
712 * half cycle units. We need the extra cycle
713 * because the data starts clocking out one BCLK
714 * after LRCLK changes polarity.
716 sspsp |= SSPSP_SFRMWDTH(width + 1);
717 sspsp |= SSPSP_SFRMDLY((width + 1) * 2);
718 sspsp |= SSPSP_DMYSTRT(1);
721 ssp_write_reg(ssp, SSPSP, sspsp);
727 /* When we use a network mode, we always require TDM slots
728 * - complain loudly and fail if they've not been set up yet.
730 if ((sscr0 & SSCR0_MOD) && !ttsa) {
731 dev_err(&ssp->pdev->dev, "No TDM timeslot configured\n");
740 static int pxa_ssp_trigger(struct snd_pcm_substream *substream, int cmd,
741 struct snd_soc_dai *dai)
743 struct snd_soc_pcm_runtime *rtd = substream->private_data;
744 struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai;
746 struct ssp_priv *priv = cpu_dai->private_data;
747 struct ssp_device *ssp = priv->dev.ssp;
751 case SNDRV_PCM_TRIGGER_RESUME:
752 ssp_enable(&priv->dev);
754 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
755 val = ssp_read_reg(ssp, SSCR1);
756 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
760 ssp_write_reg(ssp, SSCR1, val);
761 val = ssp_read_reg(ssp, SSSR);
762 ssp_write_reg(ssp, SSSR, val);
764 case SNDRV_PCM_TRIGGER_START:
765 val = ssp_read_reg(ssp, SSCR1);
766 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
770 ssp_write_reg(ssp, SSCR1, val);
771 ssp_enable(&priv->dev);
773 case SNDRV_PCM_TRIGGER_STOP:
774 val = ssp_read_reg(ssp, SSCR1);
775 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
779 ssp_write_reg(ssp, SSCR1, val);
781 case SNDRV_PCM_TRIGGER_SUSPEND:
782 ssp_disable(&priv->dev);
784 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
785 val = ssp_read_reg(ssp, SSCR1);
786 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
790 ssp_write_reg(ssp, SSCR1, val);
802 static int pxa_ssp_probe(struct platform_device *pdev,
803 struct snd_soc_dai *dai)
805 struct ssp_priv *priv;
808 priv = kzalloc(sizeof(struct ssp_priv), GFP_KERNEL);
812 priv->dev.ssp = ssp_request(dai->id + 1, "SoC audio");
813 if (priv->dev.ssp == NULL) {
818 priv->dai_fmt = (unsigned int) -1;
819 dai->private_data = priv;
828 static void pxa_ssp_remove(struct platform_device *pdev,
829 struct snd_soc_dai *dai)
831 struct ssp_priv *priv = dai->private_data;
832 ssp_free(priv->dev.ssp);
835 #define PXA_SSP_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
836 SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | \
837 SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 | \
838 SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000)
840 #define PXA_SSP_FORMATS (SNDRV_PCM_FMTBIT_S16_LE |\
841 SNDRV_PCM_FMTBIT_S24_LE | \
842 SNDRV_PCM_FMTBIT_S32_LE)
844 static struct snd_soc_dai_ops pxa_ssp_dai_ops = {
845 .startup = pxa_ssp_startup,
846 .shutdown = pxa_ssp_shutdown,
847 .trigger = pxa_ssp_trigger,
848 .hw_params = pxa_ssp_hw_params,
849 .set_sysclk = pxa_ssp_set_dai_sysclk,
850 .set_clkdiv = pxa_ssp_set_dai_clkdiv,
851 .set_pll = pxa_ssp_set_dai_pll,
852 .set_fmt = pxa_ssp_set_dai_fmt,
853 .set_tdm_slot = pxa_ssp_set_dai_tdm_slot,
854 .set_tristate = pxa_ssp_set_dai_tristate,
857 struct snd_soc_dai pxa_ssp_dai[] = {
859 .name = "pxa2xx-ssp1",
861 .probe = pxa_ssp_probe,
862 .remove = pxa_ssp_remove,
863 .suspend = pxa_ssp_suspend,
864 .resume = pxa_ssp_resume,
868 .rates = PXA_SSP_RATES,
869 .formats = PXA_SSP_FORMATS,
874 .rates = PXA_SSP_RATES,
875 .formats = PXA_SSP_FORMATS,
877 .ops = &pxa_ssp_dai_ops,
879 { .name = "pxa2xx-ssp2",
881 .probe = pxa_ssp_probe,
882 .remove = pxa_ssp_remove,
883 .suspend = pxa_ssp_suspend,
884 .resume = pxa_ssp_resume,
888 .rates = PXA_SSP_RATES,
889 .formats = PXA_SSP_FORMATS,
894 .rates = PXA_SSP_RATES,
895 .formats = PXA_SSP_FORMATS,
897 .ops = &pxa_ssp_dai_ops,
900 .name = "pxa2xx-ssp3",
902 .probe = pxa_ssp_probe,
903 .remove = pxa_ssp_remove,
904 .suspend = pxa_ssp_suspend,
905 .resume = pxa_ssp_resume,
909 .rates = PXA_SSP_RATES,
910 .formats = PXA_SSP_FORMATS,
915 .rates = PXA_SSP_RATES,
916 .formats = PXA_SSP_FORMATS,
918 .ops = &pxa_ssp_dai_ops,
921 .name = "pxa2xx-ssp4",
923 .probe = pxa_ssp_probe,
924 .remove = pxa_ssp_remove,
925 .suspend = pxa_ssp_suspend,
926 .resume = pxa_ssp_resume,
930 .rates = PXA_SSP_RATES,
931 .formats = PXA_SSP_FORMATS,
936 .rates = PXA_SSP_RATES,
937 .formats = PXA_SSP_FORMATS,
939 .ops = &pxa_ssp_dai_ops,
942 EXPORT_SYMBOL_GPL(pxa_ssp_dai);
944 static int __init pxa_ssp_init(void)
946 return snd_soc_register_dais(pxa_ssp_dai, ARRAY_SIZE(pxa_ssp_dai));
948 module_init(pxa_ssp_init);
950 static void __exit pxa_ssp_exit(void)
952 snd_soc_unregister_dais(pxa_ssp_dai, ARRAY_SIZE(pxa_ssp_dai));
954 module_exit(pxa_ssp_exit);
956 /* Module information */
957 MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
958 MODULE_DESCRIPTION("PXA SSP/PCM SoC Interface");
959 MODULE_LICENSE("GPL");