1 // SPDX-License-Identifier: GPL-2.0+
5 #include <linux/clk-provider.h>
6 #include <linux/delay.h>
7 #include <linux/dmaengine.h>
8 #include <linux/module.h>
9 #include <linux/of_device.h>
10 #include <linux/of_address.h>
11 #include <linux/pm_runtime.h>
12 #include <linux/regmap.h>
13 #include <linux/slab.h>
14 #include <linux/time.h>
15 #include <linux/pm_qos.h>
16 #include <sound/core.h>
17 #include <sound/dmaengine_pcm.h>
18 #include <sound/pcm_params.h>
19 #include <linux/dma-mapping.h>
21 #include "fsl_aud2htx.h"
24 static int fsl_aud2htx_trigger(struct snd_pcm_substream *substream, int cmd,
25 struct snd_soc_dai *dai)
27 struct fsl_aud2htx *aud2htx = snd_soc_dai_get_drvdata(dai);
30 case SNDRV_PCM_TRIGGER_START:
31 case SNDRV_PCM_TRIGGER_RESUME:
32 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
33 regmap_update_bits(aud2htx->regmap, AUD2HTX_CTRL,
34 AUD2HTX_CTRL_EN, AUD2HTX_CTRL_EN);
35 regmap_update_bits(aud2htx->regmap, AUD2HTX_CTRL_EXT,
36 AUD2HTX_CTRE_DE, AUD2HTX_CTRE_DE);
38 case SNDRV_PCM_TRIGGER_SUSPEND:
39 case SNDRV_PCM_TRIGGER_STOP:
40 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
41 regmap_update_bits(aud2htx->regmap, AUD2HTX_CTRL_EXT,
43 regmap_update_bits(aud2htx->regmap, AUD2HTX_CTRL,
52 static const struct snd_soc_dai_ops fsl_aud2htx_dai_ops = {
53 .trigger = fsl_aud2htx_trigger,
56 static int fsl_aud2htx_dai_probe(struct snd_soc_dai *cpu_dai)
58 struct fsl_aud2htx *aud2htx = dev_get_drvdata(cpu_dai->dev);
60 /* DMA request when number of entries < WTMK_LOW */
61 regmap_update_bits(aud2htx->regmap, AUD2HTX_CTRL_EXT,
62 AUD2HTX_CTRE_DT_MASK, 0);
64 /* Disable interrupts*/
65 regmap_update_bits(aud2htx->regmap, AUD2HTX_IRQ_MASK,
66 AUD2HTX_WM_HIGH_IRQ_MASK |
67 AUD2HTX_WM_LOW_IRQ_MASK |
69 AUD2HTX_WM_HIGH_IRQ_MASK |
70 AUD2HTX_WM_LOW_IRQ_MASK |
73 /* Configure watermark */
74 regmap_update_bits(aud2htx->regmap, AUD2HTX_CTRL_EXT,
76 AUD2HTX_WTMK_LOW << AUD2HTX_CTRE_WL_SHIFT);
77 regmap_update_bits(aud2htx->regmap, AUD2HTX_CTRL_EXT,
79 AUD2HTX_WTMK_HIGH << AUD2HTX_CTRE_WH_SHIFT);
81 snd_soc_dai_init_dma_data(cpu_dai, &aud2htx->dma_params_tx,
82 &aud2htx->dma_params_rx);
87 static struct snd_soc_dai_driver fsl_aud2htx_dai = {
88 .probe = fsl_aud2htx_dai_probe,
90 .stream_name = "CPU-Playback",
93 .rates = SNDRV_PCM_RATE_32000 |
94 SNDRV_PCM_RATE_44100 |
95 SNDRV_PCM_RATE_48000 |
96 SNDRV_PCM_RATE_88200 |
97 SNDRV_PCM_RATE_96000 |
98 SNDRV_PCM_RATE_176400 |
99 SNDRV_PCM_RATE_192000,
100 .formats = FSL_AUD2HTX_FORMATS,
102 .ops = &fsl_aud2htx_dai_ops,
105 static const struct snd_soc_component_driver fsl_aud2htx_component = {
106 .name = "fsl-aud2htx",
107 .legacy_dai_naming = 1,
110 static const struct reg_default fsl_aud2htx_reg_defaults[] = {
111 {AUD2HTX_CTRL, 0x00000000},
112 {AUD2HTX_CTRL_EXT, 0x00000000},
113 {AUD2HTX_WR, 0x00000000},
114 {AUD2HTX_STATUS, 0x00000000},
115 {AUD2HTX_IRQ_NOMASK, 0x00000000},
116 {AUD2HTX_IRQ_MASKED, 0x00000000},
117 {AUD2HTX_IRQ_MASK, 0x00000000},
120 static bool fsl_aud2htx_readable_reg(struct device *dev, unsigned int reg)
124 case AUD2HTX_CTRL_EXT:
126 case AUD2HTX_IRQ_NOMASK:
127 case AUD2HTX_IRQ_MASKED:
128 case AUD2HTX_IRQ_MASK:
135 static bool fsl_aud2htx_writeable_reg(struct device *dev, unsigned int reg)
139 case AUD2HTX_CTRL_EXT:
141 case AUD2HTX_IRQ_NOMASK:
142 case AUD2HTX_IRQ_MASKED:
143 case AUD2HTX_IRQ_MASK:
150 static bool fsl_aud2htx_volatile_reg(struct device *dev, unsigned int reg)
154 case AUD2HTX_IRQ_NOMASK:
155 case AUD2HTX_IRQ_MASKED:
162 static const struct regmap_config fsl_aud2htx_regmap_config = {
167 .max_register = AUD2HTX_IRQ_MASK,
168 .reg_defaults = fsl_aud2htx_reg_defaults,
169 .num_reg_defaults = ARRAY_SIZE(fsl_aud2htx_reg_defaults),
170 .readable_reg = fsl_aud2htx_readable_reg,
171 .volatile_reg = fsl_aud2htx_volatile_reg,
172 .writeable_reg = fsl_aud2htx_writeable_reg,
173 .cache_type = REGCACHE_RBTREE,
176 static const struct of_device_id fsl_aud2htx_dt_ids[] = {
177 { .compatible = "fsl,imx8mp-aud2htx",},
180 MODULE_DEVICE_TABLE(of, fsl_aud2htx_dt_ids);
182 static irqreturn_t fsl_aud2htx_isr(int irq, void *dev_id)
187 static int fsl_aud2htx_probe(struct platform_device *pdev)
189 struct fsl_aud2htx *aud2htx;
190 struct resource *res;
194 aud2htx = devm_kzalloc(&pdev->dev, sizeof(*aud2htx), GFP_KERNEL);
198 aud2htx->pdev = pdev;
200 regs = devm_platform_get_and_ioremap_resource(pdev, 0, &res);
202 return PTR_ERR(regs);
204 aud2htx->regmap = devm_regmap_init_mmio(&pdev->dev, regs,
205 &fsl_aud2htx_regmap_config);
206 if (IS_ERR(aud2htx->regmap)) {
207 dev_err(&pdev->dev, "failed to init regmap");
208 return PTR_ERR(aud2htx->regmap);
211 irq = platform_get_irq(pdev, 0);
215 ret = devm_request_irq(&pdev->dev, irq, fsl_aud2htx_isr, 0,
216 dev_name(&pdev->dev), aud2htx);
218 dev_err(&pdev->dev, "failed to claim irq %u: %d\n", irq, ret);
222 aud2htx->bus_clk = devm_clk_get(&pdev->dev, "bus");
223 if (IS_ERR(aud2htx->bus_clk)) {
224 dev_err(&pdev->dev, "failed to get mem clock\n");
225 return PTR_ERR(aud2htx->bus_clk);
228 aud2htx->dma_params_tx.chan_name = "tx";
229 aud2htx->dma_params_tx.maxburst = AUD2HTX_MAXBURST;
230 aud2htx->dma_params_tx.addr = res->start + AUD2HTX_WR;
232 platform_set_drvdata(pdev, aud2htx);
233 pm_runtime_enable(&pdev->dev);
235 regcache_cache_only(aud2htx->regmap, true);
238 * Register platform component before registering cpu dai for there
239 * is not defer probe for platform component in snd_soc_add_pcm_runtime().
241 ret = devm_snd_dmaengine_pcm_register(&pdev->dev, NULL, 0);
243 dev_err(&pdev->dev, "failed to pcm register\n");
244 pm_runtime_disable(&pdev->dev);
248 ret = devm_snd_soc_register_component(&pdev->dev,
249 &fsl_aud2htx_component,
250 &fsl_aud2htx_dai, 1);
252 dev_err(&pdev->dev, "failed to register ASoC DAI\n");
253 pm_runtime_disable(&pdev->dev);
260 static int fsl_aud2htx_remove(struct platform_device *pdev)
262 pm_runtime_disable(&pdev->dev);
267 static int __maybe_unused fsl_aud2htx_runtime_suspend(struct device *dev)
269 struct fsl_aud2htx *aud2htx = dev_get_drvdata(dev);
271 regcache_cache_only(aud2htx->regmap, true);
272 clk_disable_unprepare(aud2htx->bus_clk);
277 static int __maybe_unused fsl_aud2htx_runtime_resume(struct device *dev)
279 struct fsl_aud2htx *aud2htx = dev_get_drvdata(dev);
282 ret = clk_prepare_enable(aud2htx->bus_clk);
286 regcache_cache_only(aud2htx->regmap, false);
287 regcache_mark_dirty(aud2htx->regmap);
288 regcache_sync(aud2htx->regmap);
293 static const struct dev_pm_ops fsl_aud2htx_pm_ops = {
294 SET_RUNTIME_PM_OPS(fsl_aud2htx_runtime_suspend,
295 fsl_aud2htx_runtime_resume,
297 SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
298 pm_runtime_force_resume)
301 static struct platform_driver fsl_aud2htx_driver = {
302 .probe = fsl_aud2htx_probe,
303 .remove = fsl_aud2htx_remove,
305 .name = "fsl-aud2htx",
306 .pm = &fsl_aud2htx_pm_ops,
307 .of_match_table = fsl_aud2htx_dt_ids,
310 module_platform_driver(fsl_aud2htx_driver);
312 MODULE_AUTHOR("Shengjiu Wang <Shengjiu.Wang@nxp.com>");
313 MODULE_DESCRIPTION("NXP AUD2HTX driver");
314 MODULE_LICENSE("GPL v2");