2 * rt274.c -- RT274 ALSA SoC audio codec driver
4 * Copyright 2017 Realtek Semiconductor Corp.
5 * Author: Bard Liao <bardliao@realtek.com>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
12 #include <linux/module.h>
13 #include <linux/moduleparam.h>
14 #include <linux/init.h>
15 #include <linux/delay.h>
17 #include <linux/i2c.h>
18 #include <linux/platform_device.h>
19 #include <linux/spi/spi.h>
20 #include <linux/dmi.h>
21 #include <linux/acpi.h>
22 #include <sound/core.h>
23 #include <sound/pcm.h>
24 #include <sound/pcm_params.h>
25 #include <sound/soc.h>
26 #include <sound/soc-dapm.h>
27 #include <sound/initval.h>
28 #include <sound/tlv.h>
29 #include <sound/jack.h>
30 #include <linux/workqueue.h>
35 #define RT274_VENDOR_ID 0x10ec0274
38 struct reg_default *index_cache;
40 struct regmap *regmap;
41 struct snd_soc_codec *codec;
42 struct i2c_client *i2c;
43 struct snd_soc_jack *jack;
44 struct delayed_work jack_detect_work;
51 static const struct reg_default rt274_index_def[] = {
181 #define INDEX_CACHE_SIZE ARRAY_SIZE(rt274_index_def)
183 static const struct reg_default rt274_reg[] = {
184 { 0x00170500, 0x00000400 },
185 { 0x00220000, 0x00000031 },
186 { 0x00239000, 0x00000057 },
187 { 0x0023a000, 0x00000057 },
188 { 0x00270500, 0x00000400 },
189 { 0x00370500, 0x00000400 },
190 { 0x00870500, 0x00000400 },
191 { 0x00920000, 0x00000031 },
192 { 0x00935000, 0x00000097 },
193 { 0x00936000, 0x00000097 },
194 { 0x00970500, 0x00000400 },
195 { 0x00b37000, 0x00000400 },
196 { 0x00b37200, 0x00000400 },
197 { 0x00b37300, 0x00000400 },
198 { 0x00c37000, 0x00000400 },
199 { 0x00c37100, 0x00000400 },
200 { 0x01270500, 0x00000400 },
201 { 0x01370500, 0x00000400 },
202 { 0x01371f00, 0x411111f0 },
203 { 0x01937000, 0x00000000 },
204 { 0x01970500, 0x00000400 },
205 { 0x02050000, 0x0000001b },
206 { 0x02139000, 0x00000080 },
207 { 0x0213a000, 0x00000080 },
208 { 0x02170100, 0x00000001 },
209 { 0x02170500, 0x00000400 },
210 { 0x02170700, 0x00000000 },
211 { 0x02270100, 0x00000000 },
212 { 0x02370100, 0x00000000 },
213 { 0x01970700, 0x00000020 },
214 { 0x00830000, 0x00000097 },
215 { 0x00930000, 0x00000097 },
216 { 0x01270700, 0x00000000 },
219 static bool rt274_volatile_register(struct device *dev, unsigned int reg)
223 case RT274_GET_PARAM(AC_NODE_ROOT, AC_PAR_VENDOR_ID):
224 case RT274_GET_HP_SENSE:
225 case RT274_GET_MIC_SENSE:
226 case RT274_PROC_COEF:
227 case VERB_CMD(AC_VERB_GET_EAPD_BTLENABLE, RT274_MIC, 0):
228 case VERB_CMD(AC_VERB_GET_EAPD_BTLENABLE, RT274_HP_OUT, 0):
229 case VERB_CMD(AC_VERB_GET_STREAM_FORMAT, RT274_DAC_OUT0, 0):
230 case VERB_CMD(AC_VERB_GET_STREAM_FORMAT, RT274_DAC_OUT1, 0):
231 case VERB_CMD(AC_VERB_GET_STREAM_FORMAT, RT274_ADC_IN1, 0):
232 case VERB_CMD(AC_VERB_GET_STREAM_FORMAT, RT274_ADC_IN2, 0):
233 case VERB_CMD(AC_VERB_GET_AMP_GAIN_MUTE, RT274_DAC_OUT0, 0):
234 case VERB_CMD(AC_VERB_GET_AMP_GAIN_MUTE, RT274_DAC_OUT1, 0):
235 case VERB_CMD(AC_VERB_GET_AMP_GAIN_MUTE, RT274_ADC_IN1, 0):
236 case VERB_CMD(AC_VERB_GET_AMP_GAIN_MUTE, RT274_ADC_IN2, 0):
237 case VERB_CMD(AC_VERB_GET_AMP_GAIN_MUTE, RT274_DMIC1, 0):
238 case VERB_CMD(AC_VERB_GET_AMP_GAIN_MUTE, RT274_DMIC2, 0):
239 case VERB_CMD(AC_VERB_GET_AMP_GAIN_MUTE, RT274_MIC, 0):
240 case VERB_CMD(AC_VERB_GET_AMP_GAIN_MUTE, RT274_LINE1, 0):
241 case VERB_CMD(AC_VERB_GET_AMP_GAIN_MUTE, RT274_LINE2, 0):
242 case VERB_CMD(AC_VERB_GET_AMP_GAIN_MUTE, RT274_HP_OUT, 0):
243 case VERB_CMD(AC_VERB_GET_CONNECT_SEL, RT274_HP_OUT, 0):
244 case VERB_CMD(AC_VERB_GET_CONNECT_SEL, RT274_MIXER_IN1, 0):
245 case VERB_CMD(AC_VERB_GET_CONNECT_SEL, RT274_MIXER_IN2, 0):
246 case VERB_CMD(AC_VERB_GET_PIN_WIDGET_CONTROL, RT274_DMIC1, 0):
247 case VERB_CMD(AC_VERB_GET_PIN_WIDGET_CONTROL, RT274_DMIC2, 0):
248 case VERB_CMD(AC_VERB_GET_PIN_WIDGET_CONTROL, RT274_MIC, 0):
249 case VERB_CMD(AC_VERB_GET_PIN_WIDGET_CONTROL, RT274_LINE1, 0):
250 case VERB_CMD(AC_VERB_GET_PIN_WIDGET_CONTROL, RT274_LINE2, 0):
251 case VERB_CMD(AC_VERB_GET_PIN_WIDGET_CONTROL, RT274_HP_OUT, 0):
252 case VERB_CMD(AC_VERB_GET_UNSOLICITED_RESPONSE, RT274_HP_OUT, 0):
253 case VERB_CMD(AC_VERB_GET_UNSOLICITED_RESPONSE, RT274_MIC, 0):
254 case VERB_CMD(AC_VERB_GET_UNSOLICITED_RESPONSE, RT274_INLINE_CMD, 0):
263 static bool rt274_readable_register(struct device *dev, unsigned int reg)
267 case RT274_GET_PARAM(AC_NODE_ROOT, AC_PAR_VENDOR_ID):
268 case RT274_GET_HP_SENSE:
269 case RT274_GET_MIC_SENSE:
270 case RT274_SET_AUDIO_POWER:
271 case RT274_SET_HPO_POWER:
272 case RT274_SET_DMIC1_POWER:
278 case RT274_SET_PIN_HPO:
279 case RT274_SET_PIN_LOUT3:
280 case RT274_SET_PIN_DMIC1:
281 case RT274_SET_AMP_GAIN_HPO:
282 case RT274_SET_DMIC2_DEFAULT:
283 case RT274_DAC0L_GAIN:
284 case RT274_DAC0R_GAIN:
285 case RT274_DAC1L_GAIN:
286 case RT274_DAC1R_GAIN:
287 case RT274_ADCL_GAIN:
288 case RT274_ADCR_GAIN:
290 case RT274_HPOL_GAIN:
291 case RT274_HPOR_GAIN:
292 case RT274_LOUTL_GAIN:
293 case RT274_LOUTR_GAIN:
294 case RT274_DAC_FORMAT:
295 case RT274_ADC_FORMAT:
296 case RT274_COEF_INDEX:
297 case RT274_PROC_COEF:
298 case RT274_SET_AMP_GAIN_ADC_IN1:
299 case RT274_SET_AMP_GAIN_ADC_IN2:
300 case RT274_SET_POWER(RT274_DAC_OUT0):
301 case RT274_SET_POWER(RT274_DAC_OUT1):
302 case RT274_SET_POWER(RT274_ADC_IN1):
303 case RT274_SET_POWER(RT274_ADC_IN2):
304 case RT274_SET_POWER(RT274_DMIC2):
305 case RT274_SET_POWER(RT274_MIC):
306 case VERB_CMD(AC_VERB_GET_EAPD_BTLENABLE, RT274_MIC, 0):
307 case VERB_CMD(AC_VERB_GET_EAPD_BTLENABLE, RT274_HP_OUT, 0):
308 case VERB_CMD(AC_VERB_GET_STREAM_FORMAT, RT274_DAC_OUT0, 0):
309 case VERB_CMD(AC_VERB_GET_STREAM_FORMAT, RT274_DAC_OUT1, 0):
310 case VERB_CMD(AC_VERB_GET_STREAM_FORMAT, RT274_ADC_IN1, 0):
311 case VERB_CMD(AC_VERB_GET_STREAM_FORMAT, RT274_ADC_IN2, 0):
312 case VERB_CMD(AC_VERB_GET_AMP_GAIN_MUTE, RT274_DAC_OUT0, 0):
313 case VERB_CMD(AC_VERB_GET_AMP_GAIN_MUTE, RT274_DAC_OUT1, 0):
314 case VERB_CMD(AC_VERB_GET_AMP_GAIN_MUTE, RT274_ADC_IN1, 0):
315 case VERB_CMD(AC_VERB_GET_AMP_GAIN_MUTE, RT274_ADC_IN2, 0):
316 case VERB_CMD(AC_VERB_GET_AMP_GAIN_MUTE, RT274_DMIC1, 0):
317 case VERB_CMD(AC_VERB_GET_AMP_GAIN_MUTE, RT274_DMIC2, 0):
318 case VERB_CMD(AC_VERB_GET_AMP_GAIN_MUTE, RT274_MIC, 0):
319 case VERB_CMD(AC_VERB_GET_AMP_GAIN_MUTE, RT274_LINE1, 0):
320 case VERB_CMD(AC_VERB_GET_AMP_GAIN_MUTE, RT274_LINE2, 0):
321 case VERB_CMD(AC_VERB_GET_AMP_GAIN_MUTE, RT274_HP_OUT, 0):
322 case VERB_CMD(AC_VERB_GET_CONNECT_SEL, RT274_HP_OUT, 0):
323 case VERB_CMD(AC_VERB_GET_CONNECT_SEL, RT274_MIXER_IN1, 0):
324 case VERB_CMD(AC_VERB_GET_CONNECT_SEL, RT274_MIXER_IN2, 0):
325 case VERB_CMD(AC_VERB_GET_PIN_WIDGET_CONTROL, RT274_DMIC1, 0):
326 case VERB_CMD(AC_VERB_GET_PIN_WIDGET_CONTROL, RT274_DMIC2, 0):
327 case VERB_CMD(AC_VERB_GET_PIN_WIDGET_CONTROL, RT274_MIC, 0):
328 case VERB_CMD(AC_VERB_GET_PIN_WIDGET_CONTROL, RT274_LINE1, 0):
329 case VERB_CMD(AC_VERB_GET_PIN_WIDGET_CONTROL, RT274_LINE2, 0):
330 case VERB_CMD(AC_VERB_GET_PIN_WIDGET_CONTROL, RT274_HP_OUT, 0):
331 case VERB_CMD(AC_VERB_GET_UNSOLICITED_RESPONSE, RT274_HP_OUT, 0):
332 case VERB_CMD(AC_VERB_GET_UNSOLICITED_RESPONSE, RT274_MIC, 0):
333 case VERB_CMD(AC_VERB_GET_UNSOLICITED_RESPONSE, RT274_INLINE_CMD, 0):
341 static void rt274_index_sync(struct snd_soc_codec *codec)
343 struct rt274_priv *rt274 = snd_soc_codec_get_drvdata(codec);
346 for (i = 0; i < INDEX_CACHE_SIZE; i++) {
347 snd_soc_write(codec, rt274->index_cache[i].reg,
348 rt274->index_cache[i].def);
353 static int rt274_jack_detect(struct rt274_priv *rt274, bool *hp, bool *mic)
363 regmap_read(rt274->regmap, RT274_GET_HP_SENSE, &buf);
364 *hp = buf & 0x80000000;
365 regmap_read(rt274->regmap, RT274_GET_MIC_SENSE, &buf);
366 *mic = buf & 0x80000000;
368 pr_debug("*hp = %d *mic = %d\n", *hp, *mic);
373 static void rt274_jack_detect_work(struct work_struct *work)
375 struct rt274_priv *rt274 =
376 container_of(work, struct rt274_priv, jack_detect_work.work);
381 if (rt274_jack_detect(rt274, &hp, &mic) < 0)
385 status |= SND_JACK_HEADPHONE;
388 status |= SND_JACK_MICROPHONE;
390 snd_soc_jack_report(rt274->jack, status,
391 SND_JACK_MICROPHONE | SND_JACK_HEADPHONE);
394 static irqreturn_t rt274_irq(int irq, void *data);
396 static int rt274_mic_detect(struct snd_soc_codec *codec,
397 struct snd_soc_jack *jack, void *data)
399 struct rt274_priv *rt274 = snd_soc_codec_get_drvdata(codec);
402 /* Disable jack detection */
403 regmap_update_bits(rt274->regmap, RT274_EAPD_GPIO_IRQ_CTRL,
404 RT274_IRQ_EN, RT274_IRQ_DIS);
410 regmap_update_bits(rt274->regmap, RT274_EAPD_GPIO_IRQ_CTRL,
411 RT274_IRQ_EN, RT274_IRQ_EN);
413 /* Send an initial report */
419 static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -6350, 50, 0);
420 static const DECLARE_TLV_DB_SCALE(mic_vol_tlv, 0, 1000, 0);
422 static const struct snd_kcontrol_new rt274_snd_controls[] = {
423 SOC_DOUBLE_R_TLV("DAC0 Playback Volume", RT274_DAC0L_GAIN,
424 RT274_DAC0R_GAIN, 0, 0x7f, 0, out_vol_tlv),
425 SOC_DOUBLE_R_TLV("DAC1 Playback Volume", RT274_DAC1L_GAIN,
426 RT274_DAC1R_GAIN, 0, 0x7f, 0, out_vol_tlv),
427 SOC_DOUBLE_R_TLV("ADC0 Capture Volume", RT274_ADCL_GAIN,
428 RT274_ADCR_GAIN, 0, 0x7f, 0, out_vol_tlv),
429 SOC_DOUBLE_R("ADC0 Capture Switch", RT274_ADCL_GAIN,
430 RT274_ADCR_GAIN, RT274_MUTE_SFT, 1, 1),
431 SOC_SINGLE_TLV("AMIC Volume", RT274_MIC_GAIN,
432 0, 0x3, 0, mic_vol_tlv),
435 static const struct snd_kcontrol_new hpol_enable_control =
436 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT274_HPOL_GAIN,
437 RT274_MUTE_SFT, 1, 1);
439 static const struct snd_kcontrol_new hpor_enable_control =
440 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT274_HPOR_GAIN,
441 RT274_MUTE_SFT, 1, 1);
443 static const struct snd_kcontrol_new loutl_enable_control =
444 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT274_LOUTL_GAIN,
445 RT274_MUTE_SFT, 1, 1);
447 static const struct snd_kcontrol_new loutr_enable_control =
448 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT274_LOUTR_GAIN,
449 RT274_MUTE_SFT, 1, 1);
452 static const char * const rt274_adc_src[] = {
453 "Mic", "Line1", "Line2", "Dmic"
456 static SOC_ENUM_SINGLE_DECL(
457 rt274_adc0_enum, RT274_ADC0_MUX, RT274_ADC_SEL_SFT,
460 static const struct snd_kcontrol_new rt274_adc0_mux =
461 SOC_DAPM_ENUM("ADC 0 source", rt274_adc0_enum);
463 static SOC_ENUM_SINGLE_DECL(
464 rt274_adc1_enum, RT274_ADC1_MUX, RT274_ADC_SEL_SFT,
467 static const struct snd_kcontrol_new rt274_adc1_mux =
468 SOC_DAPM_ENUM("ADC 1 source", rt274_adc1_enum);
470 static const char * const rt274_dac_src[] = {
471 "DAC OUT0", "DAC OUT1"
474 static SOC_ENUM_SINGLE_DECL(rt274_hpo_enum, RT274_HPO_MUX,
477 static const struct snd_kcontrol_new rt274_hpo_mux =
478 SOC_DAPM_ENUM("HPO source", rt274_hpo_enum);
480 /* Line out source */
481 static SOC_ENUM_SINGLE_DECL(rt274_lout_enum, RT274_LOUT_MUX,
484 static const struct snd_kcontrol_new rt274_lout_mux =
485 SOC_DAPM_ENUM("LOUT source", rt274_lout_enum);
487 static const struct snd_soc_dapm_widget rt274_dapm_widgets[] = {
489 SND_SOC_DAPM_INPUT("DMIC1 Pin"),
490 SND_SOC_DAPM_INPUT("DMIC2 Pin"),
491 SND_SOC_DAPM_INPUT("MIC"),
492 SND_SOC_DAPM_INPUT("LINE1"),
493 SND_SOC_DAPM_INPUT("LINE2"),
496 SND_SOC_DAPM_PGA("DMIC1", SND_SOC_NOPM, 0, 0, NULL, 0),
497 SND_SOC_DAPM_PGA("DMIC2", SND_SOC_NOPM, 0, 0, NULL, 0),
500 SND_SOC_DAPM_ADC("ADC 0", NULL, RT274_SET_STREAMID_ADC1, 4, 0),
501 SND_SOC_DAPM_ADC("ADC 1", NULL, RT274_SET_STREAMID_ADC2, 4, 0),
504 SND_SOC_DAPM_MUX("ADC 0 Mux", SND_SOC_NOPM, 0, 0,
506 SND_SOC_DAPM_MUX("ADC 1 Mux", SND_SOC_NOPM, 0, 0,
509 /* Audio Interface */
510 SND_SOC_DAPM_AIF_IN("AIF1RXL", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
511 SND_SOC_DAPM_AIF_IN("AIF1RXR", "AIF1 Playback", 1, SND_SOC_NOPM, 0, 0),
512 SND_SOC_DAPM_AIF_OUT("AIF1TXL", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
513 SND_SOC_DAPM_AIF_OUT("AIF1TXR", "AIF1 Capture", 1, SND_SOC_NOPM, 0, 0),
514 SND_SOC_DAPM_AIF_IN("AIF2RXL", "AIF1 Playback", 2, SND_SOC_NOPM, 0, 0),
515 SND_SOC_DAPM_AIF_IN("AIF2RXR", "AIF1 Playback", 3, SND_SOC_NOPM, 0, 0),
516 SND_SOC_DAPM_AIF_OUT("AIF2TXL", "AIF1 Capture", 2, SND_SOC_NOPM, 0, 0),
517 SND_SOC_DAPM_AIF_OUT("AIF2TXR", "AIF1 Capture", 3, SND_SOC_NOPM, 0, 0),
521 SND_SOC_DAPM_DAC("DAC 0", NULL, RT274_SET_STREAMID_DAC0, 4, 0),
522 SND_SOC_DAPM_DAC("DAC 1", NULL, RT274_SET_STREAMID_DAC1, 4, 0),
525 SND_SOC_DAPM_MUX("HPO Mux", SND_SOC_NOPM, 0, 0, &rt274_hpo_mux),
526 SND_SOC_DAPM_MUX("LOUT Mux", SND_SOC_NOPM, 0, 0, &rt274_lout_mux),
528 SND_SOC_DAPM_SUPPLY("HP Power", RT274_SET_PIN_HPO,
529 RT274_SET_PIN_SFT, 0, NULL, 0),
530 SND_SOC_DAPM_SUPPLY("LOUT Power", RT274_SET_PIN_LOUT3,
531 RT274_SET_PIN_SFT, 0, NULL, 0),
534 SND_SOC_DAPM_PGA("DAC OUT0", SND_SOC_NOPM, 0, 0,
536 SND_SOC_DAPM_PGA("DAC OUT1", SND_SOC_NOPM, 0, 0,
540 SND_SOC_DAPM_SWITCH("LOUT L", SND_SOC_NOPM, 0, 0,
541 &loutl_enable_control),
542 SND_SOC_DAPM_SWITCH("LOUT R", SND_SOC_NOPM, 0, 0,
543 &loutr_enable_control),
544 SND_SOC_DAPM_SWITCH("HPO L", SND_SOC_NOPM, 0, 0,
545 &hpol_enable_control),
546 SND_SOC_DAPM_SWITCH("HPO R", SND_SOC_NOPM, 0, 0,
547 &hpor_enable_control),
550 SND_SOC_DAPM_OUTPUT("HPO Pin"),
551 SND_SOC_DAPM_OUTPUT("SPDIF"),
552 SND_SOC_DAPM_OUTPUT("LINE3"),
555 static const struct snd_soc_dapm_route rt274_dapm_routes[] = {
556 {"DMIC1", NULL, "DMIC1 Pin"},
557 {"DMIC2", NULL, "DMIC2 Pin"},
559 {"ADC 0 Mux", "Mic", "MIC"},
560 {"ADC 0 Mux", "Dmic", "DMIC1"},
561 {"ADC 0 Mux", "Line1", "LINE1"},
562 {"ADC 0 Mux", "Line2", "LINE2"},
563 {"ADC 1 Mux", "Mic", "MIC"},
564 {"ADC 1 Mux", "Dmic", "DMIC2"},
565 {"ADC 1 Mux", "Line1", "LINE1"},
566 {"ADC 1 Mux", "Line2", "LINE2"},
568 {"ADC 0", NULL, "ADC 0 Mux"},
569 {"ADC 1", NULL, "ADC 1 Mux"},
571 {"AIF1TXL", NULL, "ADC 0"},
572 {"AIF1TXR", NULL, "ADC 0"},
573 {"AIF2TXL", NULL, "ADC 1"},
574 {"AIF2TXR", NULL, "ADC 1"},
576 {"DAC 0", NULL, "AIF1RXL"},
577 {"DAC 0", NULL, "AIF1RXR"},
578 {"DAC 1", NULL, "AIF2RXL"},
579 {"DAC 1", NULL, "AIF2RXR"},
581 {"DAC OUT0", NULL, "DAC 0"},
583 {"DAC OUT1", NULL, "DAC 1"},
585 {"LOUT Mux", "DAC OUT0", "DAC OUT0"},
586 {"LOUT Mux", "DAC OUT1", "DAC OUT1"},
588 {"LOUT L", "Switch", "LOUT Mux"},
589 {"LOUT R", "Switch", "LOUT Mux"},
590 {"LOUT L", NULL, "LOUT Power"},
591 {"LOUT R", NULL, "LOUT Power"},
593 {"LINE3", NULL, "LOUT L"},
594 {"LINE3", NULL, "LOUT R"},
596 {"HPO Mux", "DAC OUT0", "DAC OUT0"},
597 {"HPO Mux", "DAC OUT1", "DAC OUT1"},
599 {"HPO L", "Switch", "HPO Mux"},
600 {"HPO R", "Switch", "HPO Mux"},
601 {"HPO L", NULL, "HP Power"},
602 {"HPO R", NULL, "HP Power"},
604 {"HPO Pin", NULL, "HPO L"},
605 {"HPO Pin", NULL, "HPO R"},
608 static int rt274_hw_params(struct snd_pcm_substream *substream,
609 struct snd_pcm_hw_params *params,
610 struct snd_soc_dai *dai)
612 struct snd_soc_codec *codec = dai->codec;
613 struct rt274_priv *rt274 = snd_soc_codec_get_drvdata(codec);
614 unsigned int val = 0;
615 int d_len_code = 0, c_len_code = 0;
617 switch (params_rate(params)) {
618 /* bit 14 0:48K 1:44.1K */
623 dev_err(codec->dev, "Unsupported sample rate %d\n",
624 params_rate(params));
627 switch (rt274->sys_clk) {
630 if (params_rate(params) != 48000) {
631 dev_err(codec->dev, "Sys_clk is not matched (%d %d)\n",
632 params_rate(params), rt274->sys_clk);
638 if (params_rate(params) != 44100) {
639 dev_err(codec->dev, "Sys_clk is not matched (%d %d)\n",
640 params_rate(params), rt274->sys_clk);
646 if (params_channels(params) <= 16) {
647 /* bit 3:0 Number of Channel */
648 val |= (params_channels(params) - 1);
650 dev_err(codec->dev, "Unsupported channels %d\n",
651 params_channels(params));
655 switch (params_width(params)) {
656 /* bit 6:4 Bits per Sample */
688 snd_soc_update_bits(codec,
689 RT274_I2S_CTRL1, 0xc018, d_len_code << 3 | c_len_code << 14);
690 dev_dbg(codec->dev, "format val = 0x%x\n", val);
692 snd_soc_update_bits(codec, RT274_DAC_FORMAT, 0x407f, val);
693 snd_soc_update_bits(codec, RT274_ADC_FORMAT, 0x407f, val);
698 static int rt274_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
700 struct snd_soc_codec *codec = dai->codec;
701 struct rt274_priv *rt274 = snd_soc_codec_get_drvdata(codec);
703 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
704 case SND_SOC_DAIFMT_CBM_CFM:
705 snd_soc_update_bits(codec,
706 RT274_I2S_CTRL1, RT274_I2S_MODE_MASK, RT274_I2S_MODE_M);
707 rt274->master = true;
709 case SND_SOC_DAIFMT_CBS_CFS:
710 snd_soc_update_bits(codec,
711 RT274_I2S_CTRL1, RT274_I2S_MODE_MASK, RT274_I2S_MODE_S);
712 rt274->master = false;
718 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
719 case SND_SOC_DAIFMT_I2S:
720 snd_soc_update_bits(codec, RT274_I2S_CTRL1,
721 RT274_I2S_FMT_MASK, RT274_I2S_FMT_I2S);
723 case SND_SOC_DAIFMT_LEFT_J:
724 snd_soc_update_bits(codec, RT274_I2S_CTRL1,
725 RT274_I2S_FMT_MASK, RT274_I2S_FMT_LJ);
727 case SND_SOC_DAIFMT_DSP_A:
728 snd_soc_update_bits(codec, RT274_I2S_CTRL1,
729 RT274_I2S_FMT_MASK, RT274_I2S_FMT_PCMA);
731 case SND_SOC_DAIFMT_DSP_B:
732 snd_soc_update_bits(codec, RT274_I2S_CTRL1,
733 RT274_I2S_FMT_MASK, RT274_I2S_FMT_PCMB);
738 /* bit 15 Stream Type 0:PCM 1:Non-PCM */
739 snd_soc_update_bits(codec, RT274_DAC_FORMAT, 0x8000, 0);
740 snd_soc_update_bits(codec, RT274_ADC_FORMAT, 0x8000, 0);
745 static int rt274_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source,
746 unsigned int freq_in, unsigned int freq_out)
748 struct snd_soc_codec *codec = dai->codec;
749 struct rt274_priv *rt274 = snd_soc_codec_get_drvdata(codec);
752 case RT274_PLL2_S_MCLK:
753 snd_soc_update_bits(codec, RT274_PLL2_CTRL,
754 RT274_PLL2_SRC_MASK, RT274_PLL2_SRC_MCLK);
757 dev_warn(codec->dev, "invalid pll source, use BCLK\n");
758 case RT274_PLL2_S_BCLK:
759 snd_soc_update_bits(codec, RT274_PLL2_CTRL,
760 RT274_PLL2_SRC_MASK, RT274_PLL2_SRC_BCLK);
764 if (source == RT274_PLL2_S_BCLK) {
765 snd_soc_update_bits(codec, RT274_MCLK_CTRL,
766 (0x3 << 12), (0x3 << 12));
769 snd_soc_write(codec, 0x7a, 0xaab6);
770 snd_soc_write(codec, 0x7b, 0x0301);
771 snd_soc_write(codec, 0x7c, 0x04fe);
774 snd_soc_write(codec, 0x7a, 0xaa96);
775 snd_soc_write(codec, 0x7b, 0x8003);
776 snd_soc_write(codec, 0x7c, 0x081e);
779 snd_soc_write(codec, 0x7a, 0xaa96);
780 snd_soc_write(codec, 0x7b, 0x8003);
781 snd_soc_write(codec, 0x7c, 0x080e);
784 dev_warn(codec->dev, "invalid freq_in, assume 4.8M\n");
786 snd_soc_write(codec, 0x7a, 0xaab6);
787 snd_soc_write(codec, 0x7b, 0x0301);
788 snd_soc_write(codec, 0x7c, 0x047e);
796 static int rt274_set_dai_sysclk(struct snd_soc_dai *dai,
797 int clk_id, unsigned int freq, int dir)
799 struct snd_soc_codec *codec = dai->codec;
800 struct rt274_priv *rt274 = snd_soc_codec_get_drvdata(codec);
801 unsigned int clk_src, mclk_en;
803 dev_dbg(codec->dev, "%s freq=%d\n", __func__, freq);
806 case RT274_SCLK_S_MCLK:
807 mclk_en = RT274_MCLK_MODE_EN;
808 clk_src = RT274_CLK_SRC_MCLK;
810 case RT274_SCLK_S_PLL1:
811 mclk_en = RT274_MCLK_MODE_DIS;
812 clk_src = RT274_CLK_SRC_MCLK;
814 case RT274_SCLK_S_PLL2:
815 mclk_en = RT274_MCLK_MODE_EN;
816 clk_src = RT274_CLK_SRC_PLL2;
819 mclk_en = RT274_MCLK_MODE_DIS;
820 clk_src = RT274_CLK_SRC_MCLK;
821 dev_warn(codec->dev, "invalid sysclk source, use PLL1\n");
824 snd_soc_update_bits(codec, RT274_MCLK_CTRL,
825 RT274_MCLK_MODE_MASK, mclk_en);
826 snd_soc_update_bits(codec, RT274_CLK_CTRL,
827 RT274_CLK_SRC_MASK, clk_src);
831 if (clk_id == RT274_SCLK_S_MCLK) {
832 dev_err(codec->dev, "Should not use MCLK\n");
835 snd_soc_update_bits(codec,
836 RT274_I2S_CTRL2, 0x40, 0x40);
839 if (clk_id == RT274_SCLK_S_MCLK) {
840 dev_err(codec->dev, "Should not use MCLK\n");
843 snd_soc_update_bits(codec,
844 RT274_I2S_CTRL2, 0x40, 0x0);
848 snd_soc_update_bits(codec,
849 RT274_MCLK_CTRL, 0x1fcf, 0x0008);
853 snd_soc_update_bits(codec,
854 RT274_MCLK_CTRL, 0x1fcf, 0x1543);
857 dev_err(codec->dev, "Unsupported system clock\n");
861 rt274->sys_clk = freq;
862 rt274->clk_id = clk_id;
867 static int rt274_set_bclk_ratio(struct snd_soc_dai *dai, unsigned int ratio)
869 struct snd_soc_codec *codec = dai->codec;
870 struct rt274_priv *rt274 = snd_soc_codec_get_drvdata(codec);
872 dev_dbg(codec->dev, "%s ratio=%d\n", __func__, ratio);
874 if ((ratio / 50) == 0)
875 snd_soc_update_bits(codec,
876 RT274_I2S_CTRL1, 0x1000, 0x1000);
878 snd_soc_update_bits(codec,
879 RT274_I2S_CTRL1, 0x1000, 0x0);
885 static int rt274_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
886 unsigned int rx_mask, int slots, int slot_width)
889 struct snd_soc_codec *codec = dai->codec;
891 if (rx_mask || tx_mask) {
892 snd_soc_update_bits(codec,
893 RT274_I2S_CTRL1, RT274_TDM_EN, RT274_TDM_EN);
895 snd_soc_update_bits(codec,
896 RT274_I2S_CTRL1, RT274_TDM_EN, RT274_TDM_DIS);
902 snd_soc_update_bits(codec,
903 RT274_I2S_CTRL1, RT274_TDM_CH_NUM, RT274_TDM_4CH);
906 snd_soc_update_bits(codec,
907 RT274_I2S_CTRL1, RT274_TDM_CH_NUM, RT274_TDM_2CH);
911 "Support 2 or 4 slots TDM only\n");
918 static int rt274_set_bias_level(struct snd_soc_codec *codec,
919 enum snd_soc_bias_level level)
922 case SND_SOC_BIAS_PREPARE:
923 if (SND_SOC_BIAS_STANDBY ==
924 snd_soc_codec_get_bias_level(codec)) {
926 RT274_SET_AUDIO_POWER, AC_PWRST_D0);
930 case SND_SOC_BIAS_STANDBY:
932 RT274_SET_AUDIO_POWER, AC_PWRST_D3);
942 static irqreturn_t rt274_irq(int irq, void *data)
944 struct rt274_priv *rt274 = data;
950 regmap_update_bits(rt274->regmap, RT274_EAPD_GPIO_IRQ_CTRL,
951 RT274_IRQ_CLR, RT274_IRQ_CLR);
953 ret = rt274_jack_detect(rt274, &hp, &mic);
957 status |= SND_JACK_HEADPHONE;
960 status |= SND_JACK_MICROPHONE;
962 snd_soc_jack_report(rt274->jack, status,
963 SND_JACK_MICROPHONE | SND_JACK_HEADPHONE);
965 pm_wakeup_event(&rt274->i2c->dev, 300);
971 static int rt274_probe(struct snd_soc_codec *codec)
973 struct rt274_priv *rt274 = snd_soc_codec_get_drvdata(codec);
975 rt274->codec = codec;
977 if (rt274->i2c->irq) {
978 INIT_DELAYED_WORK(&rt274->jack_detect_work,
979 rt274_jack_detect_work);
980 schedule_delayed_work(&rt274->jack_detect_work,
981 msecs_to_jiffies(1250));
987 static int rt274_remove(struct snd_soc_codec *codec)
989 struct rt274_priv *rt274 = snd_soc_codec_get_drvdata(codec);
991 cancel_delayed_work_sync(&rt274->jack_detect_work);
997 static int rt274_suspend(struct snd_soc_codec *codec)
999 struct rt274_priv *rt274 = snd_soc_codec_get_drvdata(codec);
1001 regcache_cache_only(rt274->regmap, true);
1002 regcache_mark_dirty(rt274->regmap);
1007 static int rt274_resume(struct snd_soc_codec *codec)
1009 struct rt274_priv *rt274 = snd_soc_codec_get_drvdata(codec);
1011 regcache_cache_only(rt274->regmap, false);
1012 rt274_index_sync(codec);
1013 regcache_sync(rt274->regmap);
1018 #define rt274_suspend NULL
1019 #define rt274_resume NULL
1022 #define RT274_STEREO_RATES (SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000)
1023 #define RT274_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
1024 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
1026 static const struct snd_soc_dai_ops rt274_aif_dai_ops = {
1027 .hw_params = rt274_hw_params,
1028 .set_fmt = rt274_set_dai_fmt,
1029 .set_sysclk = rt274_set_dai_sysclk,
1030 .set_pll = rt274_set_dai_pll,
1031 .set_bclk_ratio = rt274_set_bclk_ratio,
1032 .set_tdm_slot = rt274_set_tdm_slot,
1035 static struct snd_soc_dai_driver rt274_dai[] = {
1037 .name = "rt274-aif1",
1040 .stream_name = "AIF1 Playback",
1043 .rates = RT274_STEREO_RATES,
1044 .formats = RT274_FORMATS,
1047 .stream_name = "AIF1 Capture",
1050 .rates = RT274_STEREO_RATES,
1051 .formats = RT274_FORMATS,
1053 .ops = &rt274_aif_dai_ops,
1054 .symmetric_rates = 1,
1058 static const struct snd_soc_codec_driver soc_codec_dev_rt274 = {
1059 .probe = rt274_probe,
1060 .remove = rt274_remove,
1061 .suspend = rt274_suspend,
1062 .resume = rt274_resume,
1063 .set_bias_level = rt274_set_bias_level,
1064 .idle_bias_off = true,
1065 .component_driver = {
1066 .controls = rt274_snd_controls,
1067 .num_controls = ARRAY_SIZE(rt274_snd_controls),
1068 .dapm_widgets = rt274_dapm_widgets,
1069 .num_dapm_widgets = ARRAY_SIZE(rt274_dapm_widgets),
1070 .dapm_routes = rt274_dapm_routes,
1071 .num_dapm_routes = ARRAY_SIZE(rt274_dapm_routes),
1073 .set_jack = rt274_mic_detect,
1076 static const struct regmap_config rt274_regmap = {
1079 .max_register = 0x05bfffff,
1080 .volatile_reg = rt274_volatile_register,
1081 .readable_reg = rt274_readable_register,
1082 .reg_write = rl6347a_hw_write,
1083 .reg_read = rl6347a_hw_read,
1084 .cache_type = REGCACHE_RBTREE,
1085 .reg_defaults = rt274_reg,
1086 .num_reg_defaults = ARRAY_SIZE(rt274_reg),
1090 static const struct of_device_id rt274_of_match[] = {
1091 {.compatible = "realtek,rt274"},
1094 MODULE_DEVICE_TABLE(of, rt274_of_match);
1097 static const struct i2c_device_id rt274_i2c_id[] = {
1101 MODULE_DEVICE_TABLE(i2c, rt274_i2c_id);
1103 static const struct acpi_device_id rt274_acpi_match[] = {
1108 MODULE_DEVICE_TABLE(acpi, rt274_acpi_match);
1110 static int rt274_i2c_probe(struct i2c_client *i2c,
1111 const struct i2c_device_id *id)
1113 struct rt274_priv *rt274;
1118 rt274 = devm_kzalloc(&i2c->dev, sizeof(*rt274),
1123 rt274->regmap = devm_regmap_init(&i2c->dev, NULL, i2c, &rt274_regmap);
1124 if (IS_ERR(rt274->regmap)) {
1125 ret = PTR_ERR(rt274->regmap);
1126 dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
1131 regmap_read(rt274->regmap,
1132 RT274_GET_PARAM(AC_NODE_ROOT, AC_PAR_VENDOR_ID), &val);
1133 if (val != RT274_VENDOR_ID) {
1135 "Device with ID register %#x is not rt274\n", val);
1139 rt274->index_cache = devm_kmemdup(&i2c->dev, rt274_index_def,
1140 sizeof(rt274_index_def), GFP_KERNEL);
1141 if (!rt274->index_cache)
1144 rt274->index_cache_size = INDEX_CACHE_SIZE;
1146 i2c_set_clientdata(i2c, rt274);
1149 regmap_write(rt274->regmap, RT274_RESET, 0);
1150 regmap_update_bits(rt274->regmap, 0x1a, 0x4000, 0x4000);
1152 /* Set Pad PDB is floating */
1153 regmap_update_bits(rt274->regmap, RT274_PAD_CTRL12, 0x3, 0x0);
1154 regmap_write(rt274->regmap, RT274_COEF5b_INDEX, 0x01);
1155 regmap_write(rt274->regmap, RT274_COEF5b_COEF, 0x8540);
1156 regmap_update_bits(rt274->regmap, 0x6f, 0x0100, 0x0100);
1157 /* Combo jack auto detect */
1158 regmap_write(rt274->regmap, 0x4a, 0x201b);
1160 regmap_update_bits(rt274->regmap, 0x6f, 0x3000, 0x2000);
1161 /* HP DC Calibration */
1162 regmap_update_bits(rt274->regmap, 0x6f, 0xf, 0x0);
1163 /* Set NID=58h.Index 00h [15]= 1b; */
1164 regmap_write(rt274->regmap, RT274_COEF58_INDEX, 0x00);
1165 regmap_write(rt274->regmap, RT274_COEF58_COEF, 0xb888);
1167 regmap_update_bits(rt274->regmap, 0x6f, 0xf, 0xb);
1168 regmap_write(rt274->regmap, RT274_COEF58_INDEX, 0x00);
1169 regmap_write(rt274->regmap, RT274_COEF58_COEF, 0x3888);
1170 /* Set pin widget */
1171 regmap_write(rt274->regmap, RT274_SET_PIN_HPO, 0x40);
1172 regmap_write(rt274->regmap, RT274_SET_PIN_LOUT3, 0x40);
1173 regmap_write(rt274->regmap, RT274_SET_MIC, 0x20);
1174 regmap_write(rt274->regmap, RT274_SET_PIN_DMIC1, 0x20);
1176 regmap_update_bits(rt274->regmap, RT274_I2S_CTRL2, 0xc004, 0x4004);
1177 regmap_update_bits(rt274->regmap, RT274_EAPD_GPIO_IRQ_CTRL,
1178 RT274_GPI2_SEL_MASK, RT274_GPI2_SEL_DMIC_CLK);
1180 /* jack detection */
1181 regmap_write(rt274->regmap, RT274_UNSOLICITED_HP_OUT, 0x81);
1182 regmap_write(rt274->regmap, RT274_UNSOLICITED_MIC, 0x82);
1184 if (rt274->i2c->irq) {
1185 ret = request_threaded_irq(rt274->i2c->irq, NULL, rt274_irq,
1186 IRQF_TRIGGER_HIGH | IRQF_ONESHOT, "rt274", rt274);
1189 "Failed to reguest IRQ: %d\n", ret);
1194 ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt274,
1195 rt274_dai, ARRAY_SIZE(rt274_dai));
1200 static int rt274_i2c_remove(struct i2c_client *i2c)
1202 struct rt274_priv *rt274 = i2c_get_clientdata(i2c);
1205 free_irq(i2c->irq, rt274);
1206 snd_soc_unregister_codec(&i2c->dev);
1212 static struct i2c_driver rt274_i2c_driver = {
1215 .acpi_match_table = ACPI_PTR(rt274_acpi_match),
1217 .of_match_table = of_match_ptr(rt274_of_match),
1220 .probe = rt274_i2c_probe,
1221 .remove = rt274_i2c_remove,
1222 .id_table = rt274_i2c_id,
1225 module_i2c_driver(rt274_i2c_driver);
1227 MODULE_DESCRIPTION("ASoC RT274 driver");
1228 MODULE_AUTHOR("Bard Liao <bardliao@realtek.com>");
1229 MODULE_LICENSE("GPL v2");