2 * arizona.c - Wolfson Arizona class device shared support
4 * Copyright 2012 Wolfson Microelectronics plc
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 #include <linux/delay.h>
14 #include <linux/gcd.h>
15 #include <linux/module.h>
16 #include <linux/pm_runtime.h>
17 #include <sound/pcm.h>
18 #include <sound/pcm_params.h>
19 #include <sound/tlv.h>
21 #include <linux/mfd/arizona/core.h>
22 #include <linux/mfd/arizona/registers.h>
26 #define ARIZONA_AIF_BCLK_CTRL 0x00
27 #define ARIZONA_AIF_TX_PIN_CTRL 0x01
28 #define ARIZONA_AIF_RX_PIN_CTRL 0x02
29 #define ARIZONA_AIF_RATE_CTRL 0x03
30 #define ARIZONA_AIF_FORMAT 0x04
31 #define ARIZONA_AIF_TX_BCLK_RATE 0x05
32 #define ARIZONA_AIF_RX_BCLK_RATE 0x06
33 #define ARIZONA_AIF_FRAME_CTRL_1 0x07
34 #define ARIZONA_AIF_FRAME_CTRL_2 0x08
35 #define ARIZONA_AIF_FRAME_CTRL_3 0x09
36 #define ARIZONA_AIF_FRAME_CTRL_4 0x0A
37 #define ARIZONA_AIF_FRAME_CTRL_5 0x0B
38 #define ARIZONA_AIF_FRAME_CTRL_6 0x0C
39 #define ARIZONA_AIF_FRAME_CTRL_7 0x0D
40 #define ARIZONA_AIF_FRAME_CTRL_8 0x0E
41 #define ARIZONA_AIF_FRAME_CTRL_9 0x0F
42 #define ARIZONA_AIF_FRAME_CTRL_10 0x10
43 #define ARIZONA_AIF_FRAME_CTRL_11 0x11
44 #define ARIZONA_AIF_FRAME_CTRL_12 0x12
45 #define ARIZONA_AIF_FRAME_CTRL_13 0x13
46 #define ARIZONA_AIF_FRAME_CTRL_14 0x14
47 #define ARIZONA_AIF_FRAME_CTRL_15 0x15
48 #define ARIZONA_AIF_FRAME_CTRL_16 0x16
49 #define ARIZONA_AIF_FRAME_CTRL_17 0x17
50 #define ARIZONA_AIF_FRAME_CTRL_18 0x18
51 #define ARIZONA_AIF_TX_ENABLES 0x19
52 #define ARIZONA_AIF_RX_ENABLES 0x1A
53 #define ARIZONA_AIF_FORCE_WRITE 0x1B
55 #define ARIZONA_FLL_VCO_CORNER 141900000
56 #define ARIZONA_FLL_MAX_FREF 13500000
57 #define ARIZONA_FLL_MIN_FVCO 90000000
58 #define ARIZONA_FLL_MAX_FRATIO 16
59 #define ARIZONA_FLL_MAX_REFDIV 8
60 #define ARIZONA_FLL_MIN_OUTDIV 2
61 #define ARIZONA_FLL_MAX_OUTDIV 7
63 #define ARIZONA_FMT_DSP_MODE_A 0
64 #define ARIZONA_FMT_DSP_MODE_B 1
65 #define ARIZONA_FMT_I2S_MODE 2
66 #define ARIZONA_FMT_LEFT_JUSTIFIED_MODE 3
68 #define arizona_fll_err(_fll, fmt, ...) \
69 dev_err(_fll->arizona->dev, "FLL%d: " fmt, _fll->id, ##__VA_ARGS__)
70 #define arizona_fll_warn(_fll, fmt, ...) \
71 dev_warn(_fll->arizona->dev, "FLL%d: " fmt, _fll->id, ##__VA_ARGS__)
72 #define arizona_fll_dbg(_fll, fmt, ...) \
73 dev_dbg(_fll->arizona->dev, "FLL%d: " fmt, _fll->id, ##__VA_ARGS__)
75 #define arizona_aif_err(_dai, fmt, ...) \
76 dev_err(_dai->dev, "AIF%d: " fmt, _dai->id, ##__VA_ARGS__)
77 #define arizona_aif_warn(_dai, fmt, ...) \
78 dev_warn(_dai->dev, "AIF%d: " fmt, _dai->id, ##__VA_ARGS__)
79 #define arizona_aif_dbg(_dai, fmt, ...) \
80 dev_dbg(_dai->dev, "AIF%d: " fmt, _dai->id, ##__VA_ARGS__)
82 static int arizona_spk_ev(struct snd_soc_dapm_widget *w,
83 struct snd_kcontrol *kcontrol,
86 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
87 struct arizona *arizona = dev_get_drvdata(codec->dev->parent);
91 case SND_SOC_DAPM_POST_PMU:
92 val = snd_soc_read(codec, ARIZONA_INTERRUPT_RAW_STATUS_3);
93 if (val & ARIZONA_SPK_OVERHEAT_STS) {
94 dev_crit(arizona->dev,
95 "Speaker not enabled due to temperature\n");
99 regmap_update_bits_async(arizona->regmap,
100 ARIZONA_OUTPUT_ENABLES_1,
101 1 << w->shift, 1 << w->shift);
103 case SND_SOC_DAPM_PRE_PMD:
104 regmap_update_bits_async(arizona->regmap,
105 ARIZONA_OUTPUT_ENABLES_1,
115 static irqreturn_t arizona_thermal_warn(int irq, void *data)
117 struct arizona *arizona = data;
121 ret = regmap_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_3,
124 dev_err(arizona->dev, "Failed to read thermal status: %d\n",
126 } else if (val & ARIZONA_SPK_OVERHEAT_WARN_STS) {
127 dev_crit(arizona->dev, "Thermal warning\n");
133 static irqreturn_t arizona_thermal_shutdown(int irq, void *data)
135 struct arizona *arizona = data;
139 ret = regmap_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_3,
142 dev_err(arizona->dev, "Failed to read thermal status: %d\n",
144 } else if (val & ARIZONA_SPK_OVERHEAT_STS) {
145 dev_crit(arizona->dev, "Thermal shutdown\n");
146 ret = regmap_update_bits(arizona->regmap,
147 ARIZONA_OUTPUT_ENABLES_1,
149 ARIZONA_OUT4R_ENA, 0);
151 dev_crit(arizona->dev,
152 "Failed to disable speaker outputs: %d\n",
159 static const struct snd_soc_dapm_widget arizona_spkl =
160 SND_SOC_DAPM_PGA_E("OUT4L", SND_SOC_NOPM,
161 ARIZONA_OUT4L_ENA_SHIFT, 0, NULL, 0, arizona_spk_ev,
162 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU);
164 static const struct snd_soc_dapm_widget arizona_spkr =
165 SND_SOC_DAPM_PGA_E("OUT4R", SND_SOC_NOPM,
166 ARIZONA_OUT4R_ENA_SHIFT, 0, NULL, 0, arizona_spk_ev,
167 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU);
169 int arizona_init_spk(struct snd_soc_codec *codec)
171 struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
172 struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
173 struct arizona *arizona = priv->arizona;
176 ret = snd_soc_dapm_new_controls(dapm, &arizona_spkl, 1);
180 switch (arizona->type) {
186 ret = snd_soc_dapm_new_controls(dapm, &arizona_spkr, 1);
192 ret = arizona_request_irq(arizona, ARIZONA_IRQ_SPK_OVERHEAT_WARN,
193 "Thermal warning", arizona_thermal_warn,
196 dev_err(arizona->dev,
197 "Failed to get thermal warning IRQ: %d\n",
200 ret = arizona_request_irq(arizona, ARIZONA_IRQ_SPK_OVERHEAT,
201 "Thermal shutdown", arizona_thermal_shutdown,
204 dev_err(arizona->dev,
205 "Failed to get thermal shutdown IRQ: %d\n",
210 EXPORT_SYMBOL_GPL(arizona_init_spk);
212 int arizona_free_spk(struct snd_soc_codec *codec)
214 struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
215 struct arizona *arizona = priv->arizona;
217 arizona_free_irq(arizona, ARIZONA_IRQ_SPK_OVERHEAT_WARN, arizona);
218 arizona_free_irq(arizona, ARIZONA_IRQ_SPK_OVERHEAT, arizona);
222 EXPORT_SYMBOL_GPL(arizona_free_spk);
224 static const struct snd_soc_dapm_route arizona_mono_routes[] = {
225 { "OUT1R", NULL, "OUT1L" },
226 { "OUT2R", NULL, "OUT2L" },
227 { "OUT3R", NULL, "OUT3L" },
228 { "OUT4R", NULL, "OUT4L" },
229 { "OUT5R", NULL, "OUT5L" },
230 { "OUT6R", NULL, "OUT6L" },
233 int arizona_init_mono(struct snd_soc_codec *codec)
235 struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
236 struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
237 struct arizona *arizona = priv->arizona;
240 for (i = 0; i < ARIZONA_MAX_OUTPUT; ++i) {
241 if (arizona->pdata.out_mono[i])
242 snd_soc_dapm_add_routes(dapm,
243 &arizona_mono_routes[i], 1);
248 EXPORT_SYMBOL_GPL(arizona_init_mono);
250 int arizona_init_gpio(struct snd_soc_codec *codec)
252 struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
253 struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
254 struct arizona *arizona = priv->arizona;
257 switch (arizona->type) {
260 snd_soc_dapm_disable_pin(dapm, "DRC2 Signal Activity");
266 snd_soc_dapm_disable_pin(dapm, "DRC1 Signal Activity");
268 for (i = 0; i < ARRAY_SIZE(arizona->pdata.gpio_defaults); i++) {
269 switch (arizona->pdata.gpio_defaults[i] & ARIZONA_GPN_FN_MASK) {
270 case ARIZONA_GP_FN_DRC1_SIGNAL_DETECT:
271 snd_soc_dapm_enable_pin(dapm, "DRC1 Signal Activity");
273 case ARIZONA_GP_FN_DRC2_SIGNAL_DETECT:
274 snd_soc_dapm_enable_pin(dapm, "DRC2 Signal Activity");
283 EXPORT_SYMBOL_GPL(arizona_init_gpio);
285 int arizona_init_notifiers(struct snd_soc_codec *codec)
287 struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
288 struct arizona *arizona = priv->arizona;
290 BLOCKING_INIT_NOTIFIER_HEAD(&arizona->notifier);
294 EXPORT_SYMBOL_GPL(arizona_init_notifiers);
296 const char * const arizona_mixer_texts[ARIZONA_NUM_MIXER_INPUTS] = {
402 EXPORT_SYMBOL_GPL(arizona_mixer_texts);
404 unsigned int arizona_mixer_values[ARIZONA_NUM_MIXER_INPUTS] = {
411 0x0c, /* Noise mixer */
412 0x0d, /* Comfort noise */
485 0xa0, /* ISRC1INT1 */
489 0xa4, /* ISRC1DEC1 */
493 0xa8, /* ISRC2DEC1 */
497 0xac, /* ISRC2INT1 */
501 0xb0, /* ISRC3DEC1 */
505 0xb4, /* ISRC3INT1 */
510 EXPORT_SYMBOL_GPL(arizona_mixer_values);
512 const DECLARE_TLV_DB_SCALE(arizona_mixer_tlv, -3200, 100, 0);
513 EXPORT_SYMBOL_GPL(arizona_mixer_tlv);
515 const char * const arizona_sample_rate_text[ARIZONA_SAMPLE_RATE_ENUM_SIZE] = {
516 "12kHz", "24kHz", "48kHz", "96kHz", "192kHz",
517 "11.025kHz", "22.05kHz", "44.1kHz", "88.2kHz", "176.4kHz",
518 "4kHz", "8kHz", "16kHz", "32kHz",
520 EXPORT_SYMBOL_GPL(arizona_sample_rate_text);
522 const unsigned int arizona_sample_rate_val[ARIZONA_SAMPLE_RATE_ENUM_SIZE] = {
523 0x01, 0x02, 0x03, 0x04, 0x05, 0x09, 0x0A, 0x0B, 0x0C, 0x0D,
524 0x10, 0x11, 0x12, 0x13,
526 EXPORT_SYMBOL_GPL(arizona_sample_rate_val);
528 const char *arizona_sample_rate_val_to_name(unsigned int rate_val)
532 for (i = 0; i < ARRAY_SIZE(arizona_sample_rate_val); ++i) {
533 if (arizona_sample_rate_val[i] == rate_val)
534 return arizona_sample_rate_text[i];
539 EXPORT_SYMBOL_GPL(arizona_sample_rate_val_to_name);
541 const char * const arizona_rate_text[ARIZONA_RATE_ENUM_SIZE] = {
542 "SYNCCLK rate", "8kHz", "16kHz", "ASYNCCLK rate",
544 EXPORT_SYMBOL_GPL(arizona_rate_text);
546 const unsigned int arizona_rate_val[ARIZONA_RATE_ENUM_SIZE] = {
549 EXPORT_SYMBOL_GPL(arizona_rate_val);
552 const struct soc_enum arizona_isrc_fsh[] = {
553 SOC_VALUE_ENUM_SINGLE(ARIZONA_ISRC_1_CTRL_1,
554 ARIZONA_ISRC1_FSH_SHIFT, 0xf,
555 ARIZONA_RATE_ENUM_SIZE,
556 arizona_rate_text, arizona_rate_val),
557 SOC_VALUE_ENUM_SINGLE(ARIZONA_ISRC_2_CTRL_1,
558 ARIZONA_ISRC2_FSH_SHIFT, 0xf,
559 ARIZONA_RATE_ENUM_SIZE,
560 arizona_rate_text, arizona_rate_val),
561 SOC_VALUE_ENUM_SINGLE(ARIZONA_ISRC_3_CTRL_1,
562 ARIZONA_ISRC3_FSH_SHIFT, 0xf,
563 ARIZONA_RATE_ENUM_SIZE,
564 arizona_rate_text, arizona_rate_val),
566 EXPORT_SYMBOL_GPL(arizona_isrc_fsh);
568 const struct soc_enum arizona_isrc_fsl[] = {
569 SOC_VALUE_ENUM_SINGLE(ARIZONA_ISRC_1_CTRL_2,
570 ARIZONA_ISRC1_FSL_SHIFT, 0xf,
571 ARIZONA_RATE_ENUM_SIZE,
572 arizona_rate_text, arizona_rate_val),
573 SOC_VALUE_ENUM_SINGLE(ARIZONA_ISRC_2_CTRL_2,
574 ARIZONA_ISRC2_FSL_SHIFT, 0xf,
575 ARIZONA_RATE_ENUM_SIZE,
576 arizona_rate_text, arizona_rate_val),
577 SOC_VALUE_ENUM_SINGLE(ARIZONA_ISRC_3_CTRL_2,
578 ARIZONA_ISRC3_FSL_SHIFT, 0xf,
579 ARIZONA_RATE_ENUM_SIZE,
580 arizona_rate_text, arizona_rate_val),
582 EXPORT_SYMBOL_GPL(arizona_isrc_fsl);
584 const struct soc_enum arizona_asrc_rate1 =
585 SOC_VALUE_ENUM_SINGLE(ARIZONA_ASRC_RATE1,
586 ARIZONA_ASRC_RATE1_SHIFT, 0xf,
587 ARIZONA_RATE_ENUM_SIZE - 1,
588 arizona_rate_text, arizona_rate_val);
589 EXPORT_SYMBOL_GPL(arizona_asrc_rate1);
591 static const char * const arizona_vol_ramp_text[] = {
592 "0ms/6dB", "0.5ms/6dB", "1ms/6dB", "2ms/6dB", "4ms/6dB", "8ms/6dB",
593 "15ms/6dB", "30ms/6dB",
596 SOC_ENUM_SINGLE_DECL(arizona_in_vd_ramp,
597 ARIZONA_INPUT_VOLUME_RAMP,
598 ARIZONA_IN_VD_RAMP_SHIFT,
599 arizona_vol_ramp_text);
600 EXPORT_SYMBOL_GPL(arizona_in_vd_ramp);
602 SOC_ENUM_SINGLE_DECL(arizona_in_vi_ramp,
603 ARIZONA_INPUT_VOLUME_RAMP,
604 ARIZONA_IN_VI_RAMP_SHIFT,
605 arizona_vol_ramp_text);
606 EXPORT_SYMBOL_GPL(arizona_in_vi_ramp);
608 SOC_ENUM_SINGLE_DECL(arizona_out_vd_ramp,
609 ARIZONA_OUTPUT_VOLUME_RAMP,
610 ARIZONA_OUT_VD_RAMP_SHIFT,
611 arizona_vol_ramp_text);
612 EXPORT_SYMBOL_GPL(arizona_out_vd_ramp);
614 SOC_ENUM_SINGLE_DECL(arizona_out_vi_ramp,
615 ARIZONA_OUTPUT_VOLUME_RAMP,
616 ARIZONA_OUT_VI_RAMP_SHIFT,
617 arizona_vol_ramp_text);
618 EXPORT_SYMBOL_GPL(arizona_out_vi_ramp);
620 static const char * const arizona_lhpf_mode_text[] = {
621 "Low-pass", "High-pass"
624 SOC_ENUM_SINGLE_DECL(arizona_lhpf1_mode,
626 ARIZONA_LHPF1_MODE_SHIFT,
627 arizona_lhpf_mode_text);
628 EXPORT_SYMBOL_GPL(arizona_lhpf1_mode);
630 SOC_ENUM_SINGLE_DECL(arizona_lhpf2_mode,
632 ARIZONA_LHPF2_MODE_SHIFT,
633 arizona_lhpf_mode_text);
634 EXPORT_SYMBOL_GPL(arizona_lhpf2_mode);
636 SOC_ENUM_SINGLE_DECL(arizona_lhpf3_mode,
638 ARIZONA_LHPF3_MODE_SHIFT,
639 arizona_lhpf_mode_text);
640 EXPORT_SYMBOL_GPL(arizona_lhpf3_mode);
642 SOC_ENUM_SINGLE_DECL(arizona_lhpf4_mode,
644 ARIZONA_LHPF4_MODE_SHIFT,
645 arizona_lhpf_mode_text);
646 EXPORT_SYMBOL_GPL(arizona_lhpf4_mode);
648 static const char * const arizona_ng_hold_text[] = {
649 "30ms", "120ms", "250ms", "500ms",
652 SOC_ENUM_SINGLE_DECL(arizona_ng_hold,
653 ARIZONA_NOISE_GATE_CONTROL,
654 ARIZONA_NGATE_HOLD_SHIFT,
655 arizona_ng_hold_text);
656 EXPORT_SYMBOL_GPL(arizona_ng_hold);
658 static const char * const arizona_in_hpf_cut_text[] = {
659 "2.5Hz", "5Hz", "10Hz", "20Hz", "40Hz"
662 SOC_ENUM_SINGLE_DECL(arizona_in_hpf_cut_enum,
664 ARIZONA_IN_HPF_CUT_SHIFT,
665 arizona_in_hpf_cut_text);
666 EXPORT_SYMBOL_GPL(arizona_in_hpf_cut_enum);
668 static const char * const arizona_in_dmic_osr_text[] = {
669 "1.536MHz", "3.072MHz", "6.144MHz", "768kHz",
672 const struct soc_enum arizona_in_dmic_osr[] = {
673 SOC_ENUM_SINGLE(ARIZONA_IN1L_CONTROL, ARIZONA_IN1_OSR_SHIFT,
674 ARRAY_SIZE(arizona_in_dmic_osr_text),
675 arizona_in_dmic_osr_text),
676 SOC_ENUM_SINGLE(ARIZONA_IN2L_CONTROL, ARIZONA_IN2_OSR_SHIFT,
677 ARRAY_SIZE(arizona_in_dmic_osr_text),
678 arizona_in_dmic_osr_text),
679 SOC_ENUM_SINGLE(ARIZONA_IN3L_CONTROL, ARIZONA_IN3_OSR_SHIFT,
680 ARRAY_SIZE(arizona_in_dmic_osr_text),
681 arizona_in_dmic_osr_text),
682 SOC_ENUM_SINGLE(ARIZONA_IN4L_CONTROL, ARIZONA_IN4_OSR_SHIFT,
683 ARRAY_SIZE(arizona_in_dmic_osr_text),
684 arizona_in_dmic_osr_text),
686 EXPORT_SYMBOL_GPL(arizona_in_dmic_osr);
688 static const char * const arizona_anc_input_src_text[] = {
689 "None", "IN1", "IN2", "IN3", "IN4",
692 static const char * const arizona_anc_channel_src_text[] = {
693 "None", "Left", "Right", "Combine",
696 const struct soc_enum arizona_anc_input_src[] = {
697 SOC_ENUM_SINGLE(ARIZONA_ANC_SRC,
698 ARIZONA_IN_RXANCL_SEL_SHIFT,
699 ARRAY_SIZE(arizona_anc_input_src_text),
700 arizona_anc_input_src_text),
701 SOC_ENUM_SINGLE(ARIZONA_FCL_ADC_REFORMATTER_CONTROL,
702 ARIZONA_FCL_MIC_MODE_SEL,
703 ARRAY_SIZE(arizona_anc_channel_src_text),
704 arizona_anc_channel_src_text),
705 SOC_ENUM_SINGLE(ARIZONA_ANC_SRC,
706 ARIZONA_IN_RXANCR_SEL_SHIFT,
707 ARRAY_SIZE(arizona_anc_input_src_text),
708 arizona_anc_input_src_text),
709 SOC_ENUM_SINGLE(ARIZONA_FCR_ADC_REFORMATTER_CONTROL,
710 ARIZONA_FCR_MIC_MODE_SEL,
711 ARRAY_SIZE(arizona_anc_channel_src_text),
712 arizona_anc_channel_src_text),
714 EXPORT_SYMBOL_GPL(arizona_anc_input_src);
716 static const char * const arizona_anc_ng_texts[] = {
722 SOC_ENUM_SINGLE_DECL(arizona_anc_ng_enum, SND_SOC_NOPM, 0,
723 arizona_anc_ng_texts);
724 EXPORT_SYMBOL_GPL(arizona_anc_ng_enum);
726 static const char * const arizona_output_anc_src_text[] = {
727 "None", "RXANCL", "RXANCR",
730 const struct soc_enum arizona_output_anc_src[] = {
731 SOC_ENUM_SINGLE(ARIZONA_OUTPUT_PATH_CONFIG_1L,
732 ARIZONA_OUT1L_ANC_SRC_SHIFT,
733 ARRAY_SIZE(arizona_output_anc_src_text),
734 arizona_output_anc_src_text),
735 SOC_ENUM_SINGLE(ARIZONA_OUTPUT_PATH_CONFIG_1R,
736 ARIZONA_OUT1R_ANC_SRC_SHIFT,
737 ARRAY_SIZE(arizona_output_anc_src_text),
738 arizona_output_anc_src_text),
739 SOC_ENUM_SINGLE(ARIZONA_OUTPUT_PATH_CONFIG_2L,
740 ARIZONA_OUT2L_ANC_SRC_SHIFT,
741 ARRAY_SIZE(arizona_output_anc_src_text),
742 arizona_output_anc_src_text),
743 SOC_ENUM_SINGLE(ARIZONA_OUTPUT_PATH_CONFIG_2R,
744 ARIZONA_OUT2R_ANC_SRC_SHIFT,
745 ARRAY_SIZE(arizona_output_anc_src_text),
746 arizona_output_anc_src_text),
747 SOC_ENUM_SINGLE(ARIZONA_OUTPUT_PATH_CONFIG_3L,
748 ARIZONA_OUT3L_ANC_SRC_SHIFT,
749 ARRAY_SIZE(arizona_output_anc_src_text),
750 arizona_output_anc_src_text),
751 SOC_ENUM_SINGLE(ARIZONA_DAC_VOLUME_LIMIT_3R,
752 ARIZONA_OUT3R_ANC_SRC_SHIFT,
753 ARRAY_SIZE(arizona_output_anc_src_text),
754 arizona_output_anc_src_text),
755 SOC_ENUM_SINGLE(ARIZONA_OUTPUT_PATH_CONFIG_4L,
756 ARIZONA_OUT4L_ANC_SRC_SHIFT,
757 ARRAY_SIZE(arizona_output_anc_src_text),
758 arizona_output_anc_src_text),
759 SOC_ENUM_SINGLE(ARIZONA_OUTPUT_PATH_CONFIG_4R,
760 ARIZONA_OUT4R_ANC_SRC_SHIFT,
761 ARRAY_SIZE(arizona_output_anc_src_text),
762 arizona_output_anc_src_text),
763 SOC_ENUM_SINGLE(ARIZONA_OUTPUT_PATH_CONFIG_5L,
764 ARIZONA_OUT5L_ANC_SRC_SHIFT,
765 ARRAY_SIZE(arizona_output_anc_src_text),
766 arizona_output_anc_src_text),
767 SOC_ENUM_SINGLE(ARIZONA_OUTPUT_PATH_CONFIG_5R,
768 ARIZONA_OUT5R_ANC_SRC_SHIFT,
769 ARRAY_SIZE(arizona_output_anc_src_text),
770 arizona_output_anc_src_text),
771 SOC_ENUM_SINGLE(ARIZONA_OUTPUT_PATH_CONFIG_6L,
772 ARIZONA_OUT6L_ANC_SRC_SHIFT,
773 ARRAY_SIZE(arizona_output_anc_src_text),
774 arizona_output_anc_src_text),
775 SOC_ENUM_SINGLE(ARIZONA_OUTPUT_PATH_CONFIG_6R,
776 ARIZONA_OUT6R_ANC_SRC_SHIFT,
777 ARRAY_SIZE(arizona_output_anc_src_text),
778 arizona_output_anc_src_text),
780 EXPORT_SYMBOL_GPL(arizona_output_anc_src);
782 const struct snd_kcontrol_new arizona_voice_trigger_switch[] = {
783 SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0),
784 SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 1, 1, 0),
785 SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 2, 1, 0),
786 SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 3, 1, 0),
788 EXPORT_SYMBOL_GPL(arizona_voice_trigger_switch);
790 static void arizona_in_set_vu(struct snd_soc_codec *codec, int ena)
792 struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
801 for (i = 0; i < priv->num_inputs; i++)
802 snd_soc_update_bits(codec,
803 ARIZONA_ADC_DIGITAL_VOLUME_1L + (i * 4),
807 bool arizona_input_analog(struct snd_soc_codec *codec, int shift)
809 unsigned int reg = ARIZONA_IN1L_CONTROL + ((shift / 2) * 8);
810 unsigned int val = snd_soc_read(codec, reg);
812 return !(val & ARIZONA_IN1_MODE_MASK);
814 EXPORT_SYMBOL_GPL(arizona_input_analog);
816 int arizona_in_ev(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol,
819 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
820 struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
824 reg = ARIZONA_ADC_DIGITAL_VOLUME_1L + ((w->shift / 2) * 8);
826 reg = ARIZONA_ADC_DIGITAL_VOLUME_1R + ((w->shift / 2) * 8);
829 case SND_SOC_DAPM_PRE_PMU:
832 case SND_SOC_DAPM_POST_PMU:
833 snd_soc_update_bits(codec, reg, ARIZONA_IN1L_MUTE, 0);
835 /* If this is the last input pending then allow VU */
837 if (priv->in_pending == 0) {
839 arizona_in_set_vu(codec, 1);
842 case SND_SOC_DAPM_PRE_PMD:
843 snd_soc_update_bits(codec, reg,
844 ARIZONA_IN1L_MUTE | ARIZONA_IN_VU,
845 ARIZONA_IN1L_MUTE | ARIZONA_IN_VU);
847 case SND_SOC_DAPM_POST_PMD:
848 /* Disable volume updates if no inputs are enabled */
849 reg = snd_soc_read(codec, ARIZONA_INPUT_ENABLES);
851 arizona_in_set_vu(codec, 0);
859 EXPORT_SYMBOL_GPL(arizona_in_ev);
861 int arizona_out_ev(struct snd_soc_dapm_widget *w,
862 struct snd_kcontrol *kcontrol,
865 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
866 struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
869 case SND_SOC_DAPM_PRE_PMU:
871 case ARIZONA_OUT1L_ENA_SHIFT:
872 case ARIZONA_OUT1R_ENA_SHIFT:
873 case ARIZONA_OUT2L_ENA_SHIFT:
874 case ARIZONA_OUT2R_ENA_SHIFT:
875 case ARIZONA_OUT3L_ENA_SHIFT:
876 case ARIZONA_OUT3R_ENA_SHIFT:
877 priv->out_up_pending++;
878 priv->out_up_delay += 17;
884 case SND_SOC_DAPM_POST_PMU:
886 case ARIZONA_OUT1L_ENA_SHIFT:
887 case ARIZONA_OUT1R_ENA_SHIFT:
888 case ARIZONA_OUT2L_ENA_SHIFT:
889 case ARIZONA_OUT2R_ENA_SHIFT:
890 case ARIZONA_OUT3L_ENA_SHIFT:
891 case ARIZONA_OUT3R_ENA_SHIFT:
892 priv->out_up_pending--;
893 if (!priv->out_up_pending) {
894 msleep(priv->out_up_delay);
895 priv->out_up_delay = 0;
903 case SND_SOC_DAPM_PRE_PMD:
905 case ARIZONA_OUT1L_ENA_SHIFT:
906 case ARIZONA_OUT1R_ENA_SHIFT:
907 case ARIZONA_OUT2L_ENA_SHIFT:
908 case ARIZONA_OUT2R_ENA_SHIFT:
909 case ARIZONA_OUT3L_ENA_SHIFT:
910 case ARIZONA_OUT3R_ENA_SHIFT:
911 priv->out_down_pending++;
912 priv->out_down_delay++;
918 case SND_SOC_DAPM_POST_PMD:
920 case ARIZONA_OUT1L_ENA_SHIFT:
921 case ARIZONA_OUT1R_ENA_SHIFT:
922 case ARIZONA_OUT2L_ENA_SHIFT:
923 case ARIZONA_OUT2R_ENA_SHIFT:
924 case ARIZONA_OUT3L_ENA_SHIFT:
925 case ARIZONA_OUT3R_ENA_SHIFT:
926 priv->out_down_pending--;
927 if (!priv->out_down_pending) {
928 msleep(priv->out_down_delay);
929 priv->out_down_delay = 0;
942 EXPORT_SYMBOL_GPL(arizona_out_ev);
944 int arizona_hp_ev(struct snd_soc_dapm_widget *w,
945 struct snd_kcontrol *kcontrol,
948 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
949 struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
950 struct arizona *arizona = priv->arizona;
951 unsigned int mask = 1 << w->shift;
955 case SND_SOC_DAPM_POST_PMU:
958 case SND_SOC_DAPM_PRE_PMD:
961 case SND_SOC_DAPM_PRE_PMU:
962 case SND_SOC_DAPM_POST_PMD:
963 return arizona_out_ev(w, kcontrol, event);
968 /* Store the desired state for the HP outputs */
969 priv->arizona->hp_ena &= ~mask;
970 priv->arizona->hp_ena |= val;
972 /* Force off if HPDET clamp is active */
973 if (priv->arizona->hpdet_clamp)
976 regmap_update_bits_async(arizona->regmap, ARIZONA_OUTPUT_ENABLES_1,
979 return arizona_out_ev(w, kcontrol, event);
981 EXPORT_SYMBOL_GPL(arizona_hp_ev);
983 static int arizona_dvfs_enable(struct snd_soc_codec *codec)
985 const struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
986 struct arizona *arizona = priv->arizona;
989 ret = regulator_set_voltage(arizona->dcvdd, 1800000, 1800000);
991 dev_err(codec->dev, "Failed to boost DCVDD: %d\n", ret);
995 ret = regmap_update_bits(arizona->regmap,
996 ARIZONA_DYNAMIC_FREQUENCY_SCALING_1,
997 ARIZONA_SUBSYS_MAX_FREQ,
998 ARIZONA_SUBSYS_MAX_FREQ);
1000 dev_err(codec->dev, "Failed to enable subsys max: %d\n", ret);
1001 regulator_set_voltage(arizona->dcvdd, 1200000, 1800000);
1008 static int arizona_dvfs_disable(struct snd_soc_codec *codec)
1010 const struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
1011 struct arizona *arizona = priv->arizona;
1014 ret = regmap_update_bits(arizona->regmap,
1015 ARIZONA_DYNAMIC_FREQUENCY_SCALING_1,
1016 ARIZONA_SUBSYS_MAX_FREQ, 0);
1018 dev_err(codec->dev, "Failed to disable subsys max: %d\n", ret);
1022 ret = regulator_set_voltage(arizona->dcvdd, 1200000, 1800000);
1024 dev_err(codec->dev, "Failed to unboost DCVDD: %d\n", ret);
1031 int arizona_dvfs_up(struct snd_soc_codec *codec, unsigned int flags)
1033 struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
1036 mutex_lock(&priv->dvfs_lock);
1038 if (!priv->dvfs_cached && !priv->dvfs_reqs) {
1039 ret = arizona_dvfs_enable(codec);
1044 priv->dvfs_reqs |= flags;
1046 mutex_unlock(&priv->dvfs_lock);
1049 EXPORT_SYMBOL_GPL(arizona_dvfs_up);
1051 int arizona_dvfs_down(struct snd_soc_codec *codec, unsigned int flags)
1053 struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
1054 unsigned int old_reqs;
1057 mutex_lock(&priv->dvfs_lock);
1059 old_reqs = priv->dvfs_reqs;
1060 priv->dvfs_reqs &= ~flags;
1062 if (!priv->dvfs_cached && old_reqs && !priv->dvfs_reqs)
1063 ret = arizona_dvfs_disable(codec);
1065 mutex_unlock(&priv->dvfs_lock);
1068 EXPORT_SYMBOL_GPL(arizona_dvfs_down);
1070 int arizona_dvfs_sysclk_ev(struct snd_soc_dapm_widget *w,
1071 struct snd_kcontrol *kcontrol, int event)
1073 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
1074 struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
1077 mutex_lock(&priv->dvfs_lock);
1080 case SND_SOC_DAPM_POST_PMU:
1081 if (priv->dvfs_reqs)
1082 ret = arizona_dvfs_enable(codec);
1084 priv->dvfs_cached = false;
1086 case SND_SOC_DAPM_PRE_PMD:
1087 /* We must ensure DVFS is disabled before the codec goes into
1088 * suspend so that we are never in an illegal state of DVFS
1089 * enabled without enough DCVDD
1091 priv->dvfs_cached = true;
1093 if (priv->dvfs_reqs)
1094 ret = arizona_dvfs_disable(codec);
1100 mutex_unlock(&priv->dvfs_lock);
1103 EXPORT_SYMBOL_GPL(arizona_dvfs_sysclk_ev);
1105 void arizona_init_dvfs(struct arizona_priv *priv)
1107 mutex_init(&priv->dvfs_lock);
1109 EXPORT_SYMBOL_GPL(arizona_init_dvfs);
1111 int arizona_anc_ev(struct snd_soc_dapm_widget *w,
1112 struct snd_kcontrol *kcontrol,
1115 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
1119 case SND_SOC_DAPM_POST_PMU:
1120 val = 1 << w->shift;
1122 case SND_SOC_DAPM_PRE_PMD:
1123 val = 1 << (w->shift + 1);
1129 snd_soc_write(codec, ARIZONA_CLOCK_CONTROL, val);
1133 EXPORT_SYMBOL_GPL(arizona_anc_ev);
1135 static unsigned int arizona_opclk_ref_48k_rates[] = {
1142 static unsigned int arizona_opclk_ref_44k1_rates[] = {
1149 static int arizona_set_opclk(struct snd_soc_codec *codec, unsigned int clk,
1152 struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
1154 unsigned int *rates;
1155 int ref, div, refclk;
1158 case ARIZONA_CLK_OPCLK:
1159 reg = ARIZONA_OUTPUT_SYSTEM_CLOCK;
1160 refclk = priv->sysclk;
1162 case ARIZONA_CLK_ASYNC_OPCLK:
1163 reg = ARIZONA_OUTPUT_ASYNC_CLOCK;
1164 refclk = priv->asyncclk;
1171 rates = arizona_opclk_ref_44k1_rates;
1173 rates = arizona_opclk_ref_48k_rates;
1175 for (ref = 0; ref < ARRAY_SIZE(arizona_opclk_ref_48k_rates) &&
1176 rates[ref] <= refclk; ref++) {
1178 while (rates[ref] / div >= freq && div < 32) {
1179 if (rates[ref] / div == freq) {
1180 dev_dbg(codec->dev, "Configured %dHz OPCLK\n",
1182 snd_soc_update_bits(codec, reg,
1183 ARIZONA_OPCLK_DIV_MASK |
1184 ARIZONA_OPCLK_SEL_MASK,
1186 ARIZONA_OPCLK_DIV_SHIFT) |
1194 dev_err(codec->dev, "Unable to generate %dHz OPCLK\n", freq);
1198 int arizona_set_sysclk(struct snd_soc_codec *codec, int clk_id,
1199 int source, unsigned int freq, int dir)
1201 struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
1202 struct arizona *arizona = priv->arizona;
1205 unsigned int mask = ARIZONA_SYSCLK_FREQ_MASK | ARIZONA_SYSCLK_SRC_MASK;
1206 unsigned int val = source << ARIZONA_SYSCLK_SRC_SHIFT;
1210 case ARIZONA_CLK_SYSCLK:
1212 reg = ARIZONA_SYSTEM_CLOCK_1;
1213 clk = &priv->sysclk;
1214 mask |= ARIZONA_SYSCLK_FRAC;
1216 case ARIZONA_CLK_ASYNCCLK:
1218 reg = ARIZONA_ASYNC_CLOCK_1;
1219 clk = &priv->asyncclk;
1221 case ARIZONA_CLK_OPCLK:
1222 case ARIZONA_CLK_ASYNC_OPCLK:
1223 return arizona_set_opclk(codec, clk_id, freq);
1234 val |= ARIZONA_CLK_12MHZ << ARIZONA_SYSCLK_FREQ_SHIFT;
1238 val |= ARIZONA_CLK_24MHZ << ARIZONA_SYSCLK_FREQ_SHIFT;
1242 val |= ARIZONA_CLK_49MHZ << ARIZONA_SYSCLK_FREQ_SHIFT;
1246 val |= ARIZONA_CLK_73MHZ << ARIZONA_SYSCLK_FREQ_SHIFT;
1250 val |= ARIZONA_CLK_98MHZ << ARIZONA_SYSCLK_FREQ_SHIFT;
1254 val |= ARIZONA_CLK_147MHZ << ARIZONA_SYSCLK_FREQ_SHIFT;
1257 dev_dbg(arizona->dev, "%s cleared\n", name);
1267 val |= ARIZONA_SYSCLK_FRAC;
1269 dev_dbg(arizona->dev, "%s set to %uHz", name, freq);
1271 return regmap_update_bits(arizona->regmap, reg, mask, val);
1273 EXPORT_SYMBOL_GPL(arizona_set_sysclk);
1275 static int arizona_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
1277 struct snd_soc_codec *codec = dai->codec;
1278 struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
1279 struct arizona *arizona = priv->arizona;
1280 int lrclk, bclk, mode, base;
1282 base = dai->driver->base;
1287 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1288 case SND_SOC_DAIFMT_DSP_A:
1289 mode = ARIZONA_FMT_DSP_MODE_A;
1291 case SND_SOC_DAIFMT_DSP_B:
1292 if ((fmt & SND_SOC_DAIFMT_MASTER_MASK)
1293 != SND_SOC_DAIFMT_CBM_CFM) {
1294 arizona_aif_err(dai, "DSP_B not valid in slave mode\n");
1297 mode = ARIZONA_FMT_DSP_MODE_B;
1299 case SND_SOC_DAIFMT_I2S:
1300 mode = ARIZONA_FMT_I2S_MODE;
1302 case SND_SOC_DAIFMT_LEFT_J:
1303 if ((fmt & SND_SOC_DAIFMT_MASTER_MASK)
1304 != SND_SOC_DAIFMT_CBM_CFM) {
1305 arizona_aif_err(dai, "LEFT_J not valid in slave mode\n");
1308 mode = ARIZONA_FMT_LEFT_JUSTIFIED_MODE;
1311 arizona_aif_err(dai, "Unsupported DAI format %d\n",
1312 fmt & SND_SOC_DAIFMT_FORMAT_MASK);
1316 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1317 case SND_SOC_DAIFMT_CBS_CFS:
1319 case SND_SOC_DAIFMT_CBS_CFM:
1320 lrclk |= ARIZONA_AIF1TX_LRCLK_MSTR;
1322 case SND_SOC_DAIFMT_CBM_CFS:
1323 bclk |= ARIZONA_AIF1_BCLK_MSTR;
1325 case SND_SOC_DAIFMT_CBM_CFM:
1326 bclk |= ARIZONA_AIF1_BCLK_MSTR;
1327 lrclk |= ARIZONA_AIF1TX_LRCLK_MSTR;
1330 arizona_aif_err(dai, "Unsupported master mode %d\n",
1331 fmt & SND_SOC_DAIFMT_MASTER_MASK);
1335 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1336 case SND_SOC_DAIFMT_NB_NF:
1338 case SND_SOC_DAIFMT_IB_IF:
1339 bclk |= ARIZONA_AIF1_BCLK_INV;
1340 lrclk |= ARIZONA_AIF1TX_LRCLK_INV;
1342 case SND_SOC_DAIFMT_IB_NF:
1343 bclk |= ARIZONA_AIF1_BCLK_INV;
1345 case SND_SOC_DAIFMT_NB_IF:
1346 lrclk |= ARIZONA_AIF1TX_LRCLK_INV;
1352 regmap_update_bits_async(arizona->regmap, base + ARIZONA_AIF_BCLK_CTRL,
1353 ARIZONA_AIF1_BCLK_INV |
1354 ARIZONA_AIF1_BCLK_MSTR,
1356 regmap_update_bits_async(arizona->regmap, base + ARIZONA_AIF_TX_PIN_CTRL,
1357 ARIZONA_AIF1TX_LRCLK_INV |
1358 ARIZONA_AIF1TX_LRCLK_MSTR, lrclk);
1359 regmap_update_bits_async(arizona->regmap,
1360 base + ARIZONA_AIF_RX_PIN_CTRL,
1361 ARIZONA_AIF1RX_LRCLK_INV |
1362 ARIZONA_AIF1RX_LRCLK_MSTR, lrclk);
1363 regmap_update_bits(arizona->regmap, base + ARIZONA_AIF_FORMAT,
1364 ARIZONA_AIF1_FMT_MASK, mode);
1369 static const int arizona_48k_bclk_rates[] = {
1391 static const int arizona_44k1_bclk_rates[] = {
1413 static const unsigned int arizona_sr_vals[] = {
1440 #define ARIZONA_48K_RATE_MASK 0x0F003E
1441 #define ARIZONA_44K1_RATE_MASK 0x003E00
1442 #define ARIZONA_RATE_MASK (ARIZONA_48K_RATE_MASK | ARIZONA_44K1_RATE_MASK)
1444 static const struct snd_pcm_hw_constraint_list arizona_constraint = {
1445 .count = ARRAY_SIZE(arizona_sr_vals),
1446 .list = arizona_sr_vals,
1449 static int arizona_startup(struct snd_pcm_substream *substream,
1450 struct snd_soc_dai *dai)
1452 struct snd_soc_codec *codec = dai->codec;
1453 struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
1454 struct arizona_dai_priv *dai_priv = &priv->dai[dai->id - 1];
1455 unsigned int base_rate;
1457 if (!substream->runtime)
1460 switch (dai_priv->clk) {
1461 case ARIZONA_CLK_SYSCLK:
1462 base_rate = priv->sysclk;
1464 case ARIZONA_CLK_ASYNCCLK:
1465 base_rate = priv->asyncclk;
1472 dai_priv->constraint.mask = ARIZONA_RATE_MASK;
1473 else if (base_rate % 8000)
1474 dai_priv->constraint.mask = ARIZONA_44K1_RATE_MASK;
1476 dai_priv->constraint.mask = ARIZONA_48K_RATE_MASK;
1478 return snd_pcm_hw_constraint_list(substream->runtime, 0,
1479 SNDRV_PCM_HW_PARAM_RATE,
1480 &dai_priv->constraint);
1483 static void arizona_wm5102_set_dac_comp(struct snd_soc_codec *codec,
1486 struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
1487 struct arizona *arizona = priv->arizona;
1488 struct reg_sequence dac_comp[] = {
1490 { ARIZONA_DAC_COMP_1, 0 },
1491 { ARIZONA_DAC_COMP_2, 0 },
1495 mutex_lock(&arizona->dac_comp_lock);
1497 dac_comp[1].def = arizona->dac_comp_coeff;
1499 dac_comp[2].def = arizona->dac_comp_enabled;
1501 mutex_unlock(&arizona->dac_comp_lock);
1503 regmap_multi_reg_write(arizona->regmap,
1505 ARRAY_SIZE(dac_comp));
1508 static int arizona_hw_params_rate(struct snd_pcm_substream *substream,
1509 struct snd_pcm_hw_params *params,
1510 struct snd_soc_dai *dai)
1512 struct snd_soc_codec *codec = dai->codec;
1513 struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
1514 struct arizona_dai_priv *dai_priv = &priv->dai[dai->id - 1];
1515 int base = dai->driver->base;
1519 * We will need to be more flexible than this in future,
1520 * currently we use a single sample rate for SYSCLK.
1522 for (i = 0; i < ARRAY_SIZE(arizona_sr_vals); i++)
1523 if (arizona_sr_vals[i] == params_rate(params))
1525 if (i == ARRAY_SIZE(arizona_sr_vals)) {
1526 arizona_aif_err(dai, "Unsupported sample rate %dHz\n",
1527 params_rate(params));
1532 switch (priv->arizona->type) {
1535 if (arizona_sr_vals[sr_val] >= 88200)
1536 ret = arizona_dvfs_up(codec, ARIZONA_DVFS_SR1_RQ);
1538 ret = arizona_dvfs_down(codec, ARIZONA_DVFS_SR1_RQ);
1541 arizona_aif_err(dai, "Failed to change DVFS %d\n", ret);
1549 switch (dai_priv->clk) {
1550 case ARIZONA_CLK_SYSCLK:
1551 switch (priv->arizona->type) {
1553 arizona_wm5102_set_dac_comp(codec,
1554 params_rate(params));
1560 snd_soc_update_bits(codec, ARIZONA_SAMPLE_RATE_1,
1561 ARIZONA_SAMPLE_RATE_1_MASK, sr_val);
1563 snd_soc_update_bits(codec, base + ARIZONA_AIF_RATE_CTRL,
1564 ARIZONA_AIF1_RATE_MASK, 0);
1566 case ARIZONA_CLK_ASYNCCLK:
1567 snd_soc_update_bits(codec, ARIZONA_ASYNC_SAMPLE_RATE_1,
1568 ARIZONA_ASYNC_SAMPLE_RATE_1_MASK, sr_val);
1570 snd_soc_update_bits(codec, base + ARIZONA_AIF_RATE_CTRL,
1571 ARIZONA_AIF1_RATE_MASK,
1572 8 << ARIZONA_AIF1_RATE_SHIFT);
1575 arizona_aif_err(dai, "Invalid clock %d\n", dai_priv->clk);
1582 static bool arizona_aif_cfg_changed(struct snd_soc_codec *codec,
1583 int base, int bclk, int lrclk, int frame)
1587 val = snd_soc_read(codec, base + ARIZONA_AIF_BCLK_CTRL);
1588 if (bclk != (val & ARIZONA_AIF1_BCLK_FREQ_MASK))
1591 val = snd_soc_read(codec, base + ARIZONA_AIF_TX_BCLK_RATE);
1592 if (lrclk != (val & ARIZONA_AIF1TX_BCPF_MASK))
1595 val = snd_soc_read(codec, base + ARIZONA_AIF_FRAME_CTRL_1);
1596 if (frame != (val & (ARIZONA_AIF1TX_WL_MASK |
1597 ARIZONA_AIF1TX_SLOT_LEN_MASK)))
1603 static int arizona_hw_params(struct snd_pcm_substream *substream,
1604 struct snd_pcm_hw_params *params,
1605 struct snd_soc_dai *dai)
1607 struct snd_soc_codec *codec = dai->codec;
1608 struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
1609 struct arizona *arizona = priv->arizona;
1610 int base = dai->driver->base;
1613 int channels = params_channels(params);
1614 int chan_limit = arizona->pdata.max_channels_clocked[dai->id - 1];
1615 int tdm_width = arizona->tdm_width[dai->id - 1];
1616 int tdm_slots = arizona->tdm_slots[dai->id - 1];
1617 int bclk, lrclk, wl, frame, bclk_target;
1619 unsigned int aif_tx_state, aif_rx_state;
1621 if (params_rate(params) % 4000)
1622 rates = &arizona_44k1_bclk_rates[0];
1624 rates = &arizona_48k_bclk_rates[0];
1626 wl = params_width(params);
1629 arizona_aif_dbg(dai, "Configuring for %d %d bit TDM slots\n",
1630 tdm_slots, tdm_width);
1631 bclk_target = tdm_slots * tdm_width * params_rate(params);
1632 channels = tdm_slots;
1634 bclk_target = snd_soc_params_to_bclk(params);
1638 if (chan_limit && chan_limit < channels) {
1639 arizona_aif_dbg(dai, "Limiting to %d channels\n", chan_limit);
1640 bclk_target /= channels;
1641 bclk_target *= chan_limit;
1644 /* Force multiple of 2 channels for I2S mode */
1645 val = snd_soc_read(codec, base + ARIZONA_AIF_FORMAT);
1646 val &= ARIZONA_AIF1_FMT_MASK;
1647 if ((channels & 1) && (val == ARIZONA_FMT_I2S_MODE)) {
1648 arizona_aif_dbg(dai, "Forcing stereo mode\n");
1649 bclk_target /= channels;
1650 bclk_target *= channels + 1;
1653 for (i = 0; i < ARRAY_SIZE(arizona_44k1_bclk_rates); i++) {
1654 if (rates[i] >= bclk_target &&
1655 rates[i] % params_rate(params) == 0) {
1660 if (i == ARRAY_SIZE(arizona_44k1_bclk_rates)) {
1661 arizona_aif_err(dai, "Unsupported sample rate %dHz\n",
1662 params_rate(params));
1666 lrclk = rates[bclk] / params_rate(params);
1668 arizona_aif_dbg(dai, "BCLK %dHz LRCLK %dHz\n",
1669 rates[bclk], rates[bclk] / lrclk);
1671 frame = wl << ARIZONA_AIF1TX_WL_SHIFT | tdm_width;
1673 reconfig = arizona_aif_cfg_changed(codec, base, bclk, lrclk, frame);
1676 /* Save AIF TX/RX state */
1677 aif_tx_state = snd_soc_read(codec,
1678 base + ARIZONA_AIF_TX_ENABLES);
1679 aif_rx_state = snd_soc_read(codec,
1680 base + ARIZONA_AIF_RX_ENABLES);
1681 /* Disable AIF TX/RX before reconfiguring it */
1682 regmap_update_bits_async(arizona->regmap,
1683 base + ARIZONA_AIF_TX_ENABLES, 0xff, 0x0);
1684 regmap_update_bits(arizona->regmap,
1685 base + ARIZONA_AIF_RX_ENABLES, 0xff, 0x0);
1688 ret = arizona_hw_params_rate(substream, params, dai);
1693 regmap_update_bits_async(arizona->regmap,
1694 base + ARIZONA_AIF_BCLK_CTRL,
1695 ARIZONA_AIF1_BCLK_FREQ_MASK, bclk);
1696 regmap_update_bits_async(arizona->regmap,
1697 base + ARIZONA_AIF_TX_BCLK_RATE,
1698 ARIZONA_AIF1TX_BCPF_MASK, lrclk);
1699 regmap_update_bits_async(arizona->regmap,
1700 base + ARIZONA_AIF_RX_BCLK_RATE,
1701 ARIZONA_AIF1RX_BCPF_MASK, lrclk);
1702 regmap_update_bits_async(arizona->regmap,
1703 base + ARIZONA_AIF_FRAME_CTRL_1,
1704 ARIZONA_AIF1TX_WL_MASK |
1705 ARIZONA_AIF1TX_SLOT_LEN_MASK, frame);
1706 regmap_update_bits(arizona->regmap,
1707 base + ARIZONA_AIF_FRAME_CTRL_2,
1708 ARIZONA_AIF1RX_WL_MASK |
1709 ARIZONA_AIF1RX_SLOT_LEN_MASK, frame);
1714 /* Restore AIF TX/RX state */
1715 regmap_update_bits_async(arizona->regmap,
1716 base + ARIZONA_AIF_TX_ENABLES,
1717 0xff, aif_tx_state);
1718 regmap_update_bits(arizona->regmap,
1719 base + ARIZONA_AIF_RX_ENABLES,
1720 0xff, aif_rx_state);
1725 static const char *arizona_dai_clk_str(int clk_id)
1728 case ARIZONA_CLK_SYSCLK:
1730 case ARIZONA_CLK_ASYNCCLK:
1733 return "Unknown clock";
1737 static int arizona_dai_set_sysclk(struct snd_soc_dai *dai,
1738 int clk_id, unsigned int freq, int dir)
1740 struct snd_soc_codec *codec = dai->codec;
1741 struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
1742 struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
1743 struct arizona_dai_priv *dai_priv = &priv->dai[dai->id - 1];
1744 struct snd_soc_dapm_route routes[2];
1747 case ARIZONA_CLK_SYSCLK:
1748 case ARIZONA_CLK_ASYNCCLK:
1754 if (clk_id == dai_priv->clk)
1758 dev_err(codec->dev, "Can't change clock on active DAI %d\n",
1763 dev_dbg(codec->dev, "Setting AIF%d to %s\n", dai->id + 1,
1764 arizona_dai_clk_str(clk_id));
1766 memset(&routes, 0, sizeof(routes));
1767 routes[0].sink = dai->driver->capture.stream_name;
1768 routes[1].sink = dai->driver->playback.stream_name;
1770 routes[0].source = arizona_dai_clk_str(dai_priv->clk);
1771 routes[1].source = arizona_dai_clk_str(dai_priv->clk);
1772 snd_soc_dapm_del_routes(dapm, routes, ARRAY_SIZE(routes));
1774 routes[0].source = arizona_dai_clk_str(clk_id);
1775 routes[1].source = arizona_dai_clk_str(clk_id);
1776 snd_soc_dapm_add_routes(dapm, routes, ARRAY_SIZE(routes));
1778 dai_priv->clk = clk_id;
1780 return snd_soc_dapm_sync(dapm);
1783 static int arizona_set_tristate(struct snd_soc_dai *dai, int tristate)
1785 struct snd_soc_codec *codec = dai->codec;
1786 int base = dai->driver->base;
1790 reg = ARIZONA_AIF1_TRI;
1794 return snd_soc_update_bits(codec, base + ARIZONA_AIF_RATE_CTRL,
1795 ARIZONA_AIF1_TRI, reg);
1798 static void arizona_set_channels_to_mask(struct snd_soc_dai *dai,
1800 int channels, unsigned int mask)
1802 struct snd_soc_codec *codec = dai->codec;
1803 struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
1804 struct arizona *arizona = priv->arizona;
1807 for (i = 0; i < channels; ++i) {
1808 slot = ffs(mask) - 1;
1812 regmap_write(arizona->regmap, base + i, slot);
1814 mask &= ~(1 << slot);
1818 arizona_aif_warn(dai, "Too many channels in TDM mask\n");
1821 static int arizona_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
1822 unsigned int rx_mask, int slots, int slot_width)
1824 struct snd_soc_codec *codec = dai->codec;
1825 struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
1826 struct arizona *arizona = priv->arizona;
1827 int base = dai->driver->base;
1828 int rx_max_chan = dai->driver->playback.channels_max;
1829 int tx_max_chan = dai->driver->capture.channels_max;
1831 /* Only support TDM for the physical AIFs */
1832 if (dai->id > ARIZONA_MAX_AIF)
1836 tx_mask = (1 << tx_max_chan) - 1;
1837 rx_mask = (1 << rx_max_chan) - 1;
1840 arizona_set_channels_to_mask(dai, base + ARIZONA_AIF_FRAME_CTRL_3,
1841 tx_max_chan, tx_mask);
1842 arizona_set_channels_to_mask(dai, base + ARIZONA_AIF_FRAME_CTRL_11,
1843 rx_max_chan, rx_mask);
1845 arizona->tdm_width[dai->id - 1] = slot_width;
1846 arizona->tdm_slots[dai->id - 1] = slots;
1851 const struct snd_soc_dai_ops arizona_dai_ops = {
1852 .startup = arizona_startup,
1853 .set_fmt = arizona_set_fmt,
1854 .set_tdm_slot = arizona_set_tdm_slot,
1855 .hw_params = arizona_hw_params,
1856 .set_sysclk = arizona_dai_set_sysclk,
1857 .set_tristate = arizona_set_tristate,
1859 EXPORT_SYMBOL_GPL(arizona_dai_ops);
1861 const struct snd_soc_dai_ops arizona_simple_dai_ops = {
1862 .startup = arizona_startup,
1863 .hw_params = arizona_hw_params_rate,
1864 .set_sysclk = arizona_dai_set_sysclk,
1866 EXPORT_SYMBOL_GPL(arizona_simple_dai_ops);
1868 int arizona_init_dai(struct arizona_priv *priv, int id)
1870 struct arizona_dai_priv *dai_priv = &priv->dai[id];
1872 dai_priv->clk = ARIZONA_CLK_SYSCLK;
1873 dai_priv->constraint = arizona_constraint;
1877 EXPORT_SYMBOL_GPL(arizona_init_dai);
1885 { 0, 64000, 4, 16 },
1886 { 64000, 128000, 3, 8 },
1887 { 128000, 256000, 2, 4 },
1888 { 256000, 1000000, 1, 2 },
1889 { 1000000, 13500000, 0, 1 },
1892 static const unsigned int pseudo_fref_max[ARIZONA_FLL_MAX_FRATIO] = {
1917 { 256000, 1000000, 2 },
1918 { 1000000, 13500000, 4 },
1921 struct arizona_fll_cfg {
1931 static int arizona_validate_fll(struct arizona_fll *fll,
1935 unsigned int Fvco_min;
1937 if (fll->fout && Fout != fll->fout) {
1938 arizona_fll_err(fll,
1939 "Can't change output on active FLL\n");
1943 if (Fref / ARIZONA_FLL_MAX_REFDIV > ARIZONA_FLL_MAX_FREF) {
1944 arizona_fll_err(fll,
1945 "Can't scale %dMHz in to <=13.5MHz\n",
1950 Fvco_min = ARIZONA_FLL_MIN_FVCO * fll->vco_mult;
1951 if (Fout * ARIZONA_FLL_MAX_OUTDIV < Fvco_min) {
1952 arizona_fll_err(fll, "No FLL_OUTDIV for Fout=%uHz\n",
1960 static int arizona_find_fratio(unsigned int Fref, int *fratio)
1964 /* Find an appropriate FLL_FRATIO */
1965 for (i = 0; i < ARRAY_SIZE(fll_fratios); i++) {
1966 if (fll_fratios[i].min <= Fref && Fref <= fll_fratios[i].max) {
1968 *fratio = fll_fratios[i].fratio;
1969 return fll_fratios[i].ratio;
1976 static int arizona_calc_fratio(struct arizona_fll *fll,
1977 struct arizona_fll_cfg *cfg,
1978 unsigned int target,
1979 unsigned int Fref, bool sync)
1981 int init_ratio, ratio;
1984 /* Fref must be <=13.5MHz, find initial refdiv */
1987 while (Fref > ARIZONA_FLL_MAX_FREF) {
1992 if (div > ARIZONA_FLL_MAX_REFDIV)
1996 /* Find an appropriate FLL_FRATIO */
1997 init_ratio = arizona_find_fratio(Fref, &cfg->fratio);
1998 if (init_ratio < 0) {
1999 arizona_fll_err(fll, "Unable to find FRATIO for Fref=%uHz\n",
2004 switch (fll->arizona->type) {
2010 if (fll->arizona->rev < 3 || sync)
2019 cfg->fratio = init_ratio - 1;
2021 /* Adjust FRATIO/refdiv to avoid integer mode if possible */
2022 refdiv = cfg->refdiv;
2024 arizona_fll_dbg(fll, "pseudo: initial ratio=%u fref=%u refdiv=%u\n",
2025 init_ratio, Fref, refdiv);
2027 while (div <= ARIZONA_FLL_MAX_REFDIV) {
2028 /* start from init_ratio because this may already give a
2031 for (ratio = init_ratio; ratio > 0; ratio--) {
2032 if (target % (ratio * Fref)) {
2033 cfg->refdiv = refdiv;
2034 cfg->fratio = ratio - 1;
2035 arizona_fll_dbg(fll,
2036 "pseudo: found fref=%u refdiv=%d(%d) ratio=%d\n",
2037 Fref, refdiv, div, ratio);
2042 for (ratio = init_ratio + 1; ratio <= ARIZONA_FLL_MAX_FRATIO;
2044 if ((ARIZONA_FLL_VCO_CORNER / 2) /
2045 (fll->vco_mult * ratio) < Fref) {
2046 arizona_fll_dbg(fll, "pseudo: hit VCO corner\n");
2050 if (Fref > pseudo_fref_max[ratio - 1]) {
2051 arizona_fll_dbg(fll,
2052 "pseudo: exceeded max fref(%u) for ratio=%u\n",
2053 pseudo_fref_max[ratio - 1],
2058 if (target % (ratio * Fref)) {
2059 cfg->refdiv = refdiv;
2060 cfg->fratio = ratio - 1;
2061 arizona_fll_dbg(fll,
2062 "pseudo: found fref=%u refdiv=%d(%d) ratio=%d\n",
2063 Fref, refdiv, div, ratio);
2071 init_ratio = arizona_find_fratio(Fref, NULL);
2072 arizona_fll_dbg(fll,
2073 "pseudo: change fref=%u refdiv=%d(%d) ratio=%u\n",
2074 Fref, refdiv, div, init_ratio);
2077 arizona_fll_warn(fll, "Falling back to integer mode operation\n");
2078 return cfg->fratio + 1;
2081 static int arizona_calc_fll(struct arizona_fll *fll,
2082 struct arizona_fll_cfg *cfg,
2083 unsigned int Fref, bool sync)
2085 unsigned int target, div, gcd_fll;
2088 arizona_fll_dbg(fll, "Fref=%u Fout=%u\n", Fref, fll->fout);
2090 /* Fvco should be over the targt; don't check the upper bound */
2091 div = ARIZONA_FLL_MIN_OUTDIV;
2092 while (fll->fout * div < ARIZONA_FLL_MIN_FVCO * fll->vco_mult) {
2094 if (div > ARIZONA_FLL_MAX_OUTDIV)
2097 target = fll->fout * div / fll->vco_mult;
2100 arizona_fll_dbg(fll, "Fvco=%dHz\n", target);
2102 /* Find an appropriate FLL_FRATIO and refdiv */
2103 ratio = arizona_calc_fratio(fll, cfg, target, Fref, sync);
2107 /* Apply the division for our remaining calculations */
2108 Fref = Fref / (1 << cfg->refdiv);
2110 cfg->n = target / (ratio * Fref);
2112 if (target % (ratio * Fref)) {
2113 gcd_fll = gcd(target, ratio * Fref);
2114 arizona_fll_dbg(fll, "GCD=%u\n", gcd_fll);
2116 cfg->theta = (target - (cfg->n * ratio * Fref))
2118 cfg->lambda = (ratio * Fref) / gcd_fll;
2124 /* Round down to 16bit range with cost of accuracy lost.
2125 * Denominator must be bigger than numerator so we only
2128 while (cfg->lambda >= (1 << 16)) {
2133 for (i = 0; i < ARRAY_SIZE(fll_gains); i++) {
2134 if (fll_gains[i].min <= Fref && Fref <= fll_gains[i].max) {
2135 cfg->gain = fll_gains[i].gain;
2139 if (i == ARRAY_SIZE(fll_gains)) {
2140 arizona_fll_err(fll, "Unable to find gain for Fref=%uHz\n",
2145 arizona_fll_dbg(fll, "N=%d THETA=%d LAMBDA=%d\n",
2146 cfg->n, cfg->theta, cfg->lambda);
2147 arizona_fll_dbg(fll, "FRATIO=0x%x(%d) OUTDIV=%d REFCLK_DIV=0x%x(%d)\n",
2148 cfg->fratio, ratio, cfg->outdiv,
2149 cfg->refdiv, 1 << cfg->refdiv);
2150 arizona_fll_dbg(fll, "GAIN=0x%x(%d)\n", cfg->gain, 1 << cfg->gain);
2156 static void arizona_apply_fll(struct arizona *arizona, unsigned int base,
2157 struct arizona_fll_cfg *cfg, int source,
2160 regmap_update_bits_async(arizona->regmap, base + 3,
2161 ARIZONA_FLL1_THETA_MASK, cfg->theta);
2162 regmap_update_bits_async(arizona->regmap, base + 4,
2163 ARIZONA_FLL1_LAMBDA_MASK, cfg->lambda);
2164 regmap_update_bits_async(arizona->regmap, base + 5,
2165 ARIZONA_FLL1_FRATIO_MASK,
2166 cfg->fratio << ARIZONA_FLL1_FRATIO_SHIFT);
2167 regmap_update_bits_async(arizona->regmap, base + 6,
2168 ARIZONA_FLL1_CLK_REF_DIV_MASK |
2169 ARIZONA_FLL1_CLK_REF_SRC_MASK,
2170 cfg->refdiv << ARIZONA_FLL1_CLK_REF_DIV_SHIFT |
2171 source << ARIZONA_FLL1_CLK_REF_SRC_SHIFT);
2174 regmap_update_bits(arizona->regmap, base + 0x7,
2175 ARIZONA_FLL1_GAIN_MASK,
2176 cfg->gain << ARIZONA_FLL1_GAIN_SHIFT);
2178 regmap_update_bits(arizona->regmap, base + 0x5,
2179 ARIZONA_FLL1_OUTDIV_MASK,
2180 cfg->outdiv << ARIZONA_FLL1_OUTDIV_SHIFT);
2181 regmap_update_bits(arizona->regmap, base + 0x9,
2182 ARIZONA_FLL1_GAIN_MASK,
2183 cfg->gain << ARIZONA_FLL1_GAIN_SHIFT);
2186 regmap_update_bits_async(arizona->regmap, base + 2,
2187 ARIZONA_FLL1_CTRL_UPD | ARIZONA_FLL1_N_MASK,
2188 ARIZONA_FLL1_CTRL_UPD | cfg->n);
2191 static int arizona_is_enabled_fll(struct arizona_fll *fll)
2193 struct arizona *arizona = fll->arizona;
2197 ret = regmap_read(arizona->regmap, fll->base + 1, ®);
2199 arizona_fll_err(fll, "Failed to read current state: %d\n",
2204 return reg & ARIZONA_FLL1_ENA;
2207 static int arizona_enable_fll(struct arizona_fll *fll)
2209 struct arizona *arizona = fll->arizona;
2210 bool use_sync = false;
2211 int already_enabled = arizona_is_enabled_fll(fll);
2212 struct arizona_fll_cfg cfg;
2216 if (already_enabled < 0)
2217 return already_enabled;
2219 if (already_enabled) {
2220 /* Facilitate smooth refclk across the transition */
2221 regmap_update_bits_async(fll->arizona->regmap, fll->base + 0x9,
2222 ARIZONA_FLL1_GAIN_MASK, 0);
2223 regmap_update_bits(fll->arizona->regmap, fll->base + 1,
2224 ARIZONA_FLL1_FREERUN, ARIZONA_FLL1_FREERUN);
2229 * If we have both REFCLK and SYNCCLK then enable both,
2230 * otherwise apply the SYNCCLK settings to REFCLK.
2232 if (fll->ref_src >= 0 && fll->ref_freq &&
2233 fll->ref_src != fll->sync_src) {
2234 arizona_calc_fll(fll, &cfg, fll->ref_freq, false);
2236 arizona_apply_fll(arizona, fll->base, &cfg, fll->ref_src,
2238 if (fll->sync_src >= 0) {
2239 arizona_calc_fll(fll, &cfg, fll->sync_freq, true);
2241 arizona_apply_fll(arizona, fll->base + 0x10, &cfg,
2242 fll->sync_src, true);
2245 } else if (fll->sync_src >= 0) {
2246 arizona_calc_fll(fll, &cfg, fll->sync_freq, false);
2248 arizona_apply_fll(arizona, fll->base, &cfg,
2249 fll->sync_src, false);
2251 regmap_update_bits_async(arizona->regmap, fll->base + 0x11,
2252 ARIZONA_FLL1_SYNC_ENA, 0);
2254 arizona_fll_err(fll, "No clocks provided\n");
2259 * Increase the bandwidth if we're not using a low frequency
2262 if (use_sync && fll->sync_freq > 100000)
2263 regmap_update_bits_async(arizona->regmap, fll->base + 0x17,
2264 ARIZONA_FLL1_SYNC_BW, 0);
2266 regmap_update_bits_async(arizona->regmap, fll->base + 0x17,
2267 ARIZONA_FLL1_SYNC_BW,
2268 ARIZONA_FLL1_SYNC_BW);
2270 if (!already_enabled)
2271 pm_runtime_get(arizona->dev);
2273 regmap_update_bits_async(arizona->regmap, fll->base + 1,
2274 ARIZONA_FLL1_ENA, ARIZONA_FLL1_ENA);
2276 regmap_update_bits_async(arizona->regmap, fll->base + 0x11,
2277 ARIZONA_FLL1_SYNC_ENA,
2278 ARIZONA_FLL1_SYNC_ENA);
2280 if (already_enabled)
2281 regmap_update_bits_async(arizona->regmap, fll->base + 1,
2282 ARIZONA_FLL1_FREERUN, 0);
2284 arizona_fll_dbg(fll, "Waiting for FLL lock...\n");
2286 for (i = 0; i < 15; i++) {
2288 usleep_range(200, 400);
2292 regmap_read(arizona->regmap,
2293 ARIZONA_INTERRUPT_RAW_STATUS_5,
2295 if (val & (ARIZONA_FLL1_CLOCK_OK_STS << (fll->id - 1)))
2299 arizona_fll_warn(fll, "Timed out waiting for lock\n");
2301 arizona_fll_dbg(fll, "FLL locked (%d polls)\n", i);
2306 static void arizona_disable_fll(struct arizona_fll *fll)
2308 struct arizona *arizona = fll->arizona;
2311 regmap_update_bits_async(arizona->regmap, fll->base + 1,
2312 ARIZONA_FLL1_FREERUN, ARIZONA_FLL1_FREERUN);
2313 regmap_update_bits_check(arizona->regmap, fll->base + 1,
2314 ARIZONA_FLL1_ENA, 0, &change);
2315 regmap_update_bits(arizona->regmap, fll->base + 0x11,
2316 ARIZONA_FLL1_SYNC_ENA, 0);
2317 regmap_update_bits_async(arizona->regmap, fll->base + 1,
2318 ARIZONA_FLL1_FREERUN, 0);
2321 pm_runtime_put_autosuspend(arizona->dev);
2324 int arizona_set_fll_refclk(struct arizona_fll *fll, int source,
2325 unsigned int Fref, unsigned int Fout)
2329 if (fll->ref_src == source && fll->ref_freq == Fref)
2332 if (fll->fout && Fref > 0) {
2333 ret = arizona_validate_fll(fll, Fref, fll->fout);
2338 fll->ref_src = source;
2339 fll->ref_freq = Fref;
2341 if (fll->fout && Fref > 0) {
2342 ret = arizona_enable_fll(fll);
2347 EXPORT_SYMBOL_GPL(arizona_set_fll_refclk);
2349 int arizona_set_fll(struct arizona_fll *fll, int source,
2350 unsigned int Fref, unsigned int Fout)
2354 if (fll->sync_src == source &&
2355 fll->sync_freq == Fref && fll->fout == Fout)
2359 if (fll->ref_src >= 0) {
2360 ret = arizona_validate_fll(fll, fll->ref_freq, Fout);
2365 ret = arizona_validate_fll(fll, Fref, Fout);
2370 fll->sync_src = source;
2371 fll->sync_freq = Fref;
2375 ret = arizona_enable_fll(fll);
2377 arizona_disable_fll(fll);
2381 EXPORT_SYMBOL_GPL(arizona_set_fll);
2383 int arizona_init_fll(struct arizona *arizona, int id, int base, int lock_irq,
2384 int ok_irq, struct arizona_fll *fll)
2390 fll->arizona = arizona;
2391 fll->sync_src = ARIZONA_FLL_SRC_NONE;
2393 /* Configure default refclk to 32kHz if we have one */
2394 regmap_read(arizona->regmap, ARIZONA_CLOCK_32K_1, &val);
2395 switch (val & ARIZONA_CLK_32K_SRC_MASK) {
2396 case ARIZONA_CLK_SRC_MCLK1:
2397 case ARIZONA_CLK_SRC_MCLK2:
2398 fll->ref_src = val & ARIZONA_CLK_32K_SRC_MASK;
2401 fll->ref_src = ARIZONA_FLL_SRC_NONE;
2403 fll->ref_freq = 32768;
2405 snprintf(fll->lock_name, sizeof(fll->lock_name), "FLL%d lock", id);
2406 snprintf(fll->clock_ok_name, sizeof(fll->clock_ok_name),
2407 "FLL%d clock OK", id);
2409 regmap_update_bits(arizona->regmap, fll->base + 1,
2410 ARIZONA_FLL1_FREERUN, 0);
2414 EXPORT_SYMBOL_GPL(arizona_init_fll);
2417 * arizona_set_output_mode - Set the mode of the specified output
2419 * @codec: Device to configure
2420 * @output: Output number
2421 * @diff: True to set the output to differential mode
2423 * Some systems use external analogue switches to connect more
2424 * analogue devices to the CODEC than are supported by the device. In
2425 * some systems this requires changing the switched output from single
2426 * ended to differential mode dynamically at runtime, an operation
2427 * supported using this function.
2429 * Most systems have a single static configuration and should use
2430 * platform data instead.
2432 int arizona_set_output_mode(struct snd_soc_codec *codec, int output, bool diff)
2434 unsigned int reg, val;
2436 if (output < 1 || output > 6)
2439 reg = ARIZONA_OUTPUT_PATH_CONFIG_1L + (output - 1) * 8;
2442 val = ARIZONA_OUT1_MONO;
2446 return snd_soc_update_bits(codec, reg, ARIZONA_OUT1_MONO, val);
2448 EXPORT_SYMBOL_GPL(arizona_set_output_mode);
2450 static const struct soc_enum arizona_adsp2_rate_enum[] = {
2451 SOC_VALUE_ENUM_SINGLE(ARIZONA_DSP1_CONTROL_1,
2452 ARIZONA_DSP1_RATE_SHIFT, 0xf,
2453 ARIZONA_RATE_ENUM_SIZE,
2454 arizona_rate_text, arizona_rate_val),
2455 SOC_VALUE_ENUM_SINGLE(ARIZONA_DSP2_CONTROL_1,
2456 ARIZONA_DSP1_RATE_SHIFT, 0xf,
2457 ARIZONA_RATE_ENUM_SIZE,
2458 arizona_rate_text, arizona_rate_val),
2459 SOC_VALUE_ENUM_SINGLE(ARIZONA_DSP3_CONTROL_1,
2460 ARIZONA_DSP1_RATE_SHIFT, 0xf,
2461 ARIZONA_RATE_ENUM_SIZE,
2462 arizona_rate_text, arizona_rate_val),
2463 SOC_VALUE_ENUM_SINGLE(ARIZONA_DSP4_CONTROL_1,
2464 ARIZONA_DSP1_RATE_SHIFT, 0xf,
2465 ARIZONA_RATE_ENUM_SIZE,
2466 arizona_rate_text, arizona_rate_val),
2469 const struct snd_kcontrol_new arizona_adsp2_rate_controls[] = {
2470 SOC_ENUM("DSP1 Rate", arizona_adsp2_rate_enum[0]),
2471 SOC_ENUM("DSP2 Rate", arizona_adsp2_rate_enum[1]),
2472 SOC_ENUM("DSP3 Rate", arizona_adsp2_rate_enum[2]),
2473 SOC_ENUM("DSP4 Rate", arizona_adsp2_rate_enum[3]),
2475 EXPORT_SYMBOL_GPL(arizona_adsp2_rate_controls);
2477 static bool arizona_eq_filter_unstable(bool mode, __be16 _a, __be16 _b)
2479 s16 a = be16_to_cpu(_a);
2480 s16 b = be16_to_cpu(_b);
2483 return abs(a) >= 4096;
2488 return (abs((a << 16) / (4096 - b)) >= 4096 << 4);
2492 int arizona_eq_coeff_put(struct snd_kcontrol *kcontrol,
2493 struct snd_ctl_elem_value *ucontrol)
2495 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
2496 struct arizona *arizona = dev_get_drvdata(codec->dev->parent);
2497 struct soc_bytes *params = (void *)kcontrol->private_value;
2503 len = params->num_regs * regmap_get_val_bytes(arizona->regmap);
2505 data = kmemdup(ucontrol->value.bytes.data, len, GFP_KERNEL | GFP_DMA);
2509 data[0] &= cpu_to_be16(ARIZONA_EQ1_B1_MODE);
2511 if (arizona_eq_filter_unstable(!!data[0], data[1], data[2]) ||
2512 arizona_eq_filter_unstable(true, data[4], data[5]) ||
2513 arizona_eq_filter_unstable(true, data[8], data[9]) ||
2514 arizona_eq_filter_unstable(true, data[12], data[13]) ||
2515 arizona_eq_filter_unstable(false, data[16], data[17])) {
2516 dev_err(arizona->dev, "Rejecting unstable EQ coefficients\n");
2521 ret = regmap_read(arizona->regmap, params->base, &val);
2525 val &= ~ARIZONA_EQ1_B1_MODE;
2526 data[0] |= cpu_to_be16(val);
2528 ret = regmap_raw_write(arizona->regmap, params->base, data, len);
2534 EXPORT_SYMBOL_GPL(arizona_eq_coeff_put);
2536 int arizona_lhpf_coeff_put(struct snd_kcontrol *kcontrol,
2537 struct snd_ctl_elem_value *ucontrol)
2539 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
2540 struct arizona *arizona = dev_get_drvdata(codec->dev->parent);
2541 __be16 *data = (__be16 *)ucontrol->value.bytes.data;
2542 s16 val = be16_to_cpu(*data);
2544 if (abs(val) >= 4096) {
2545 dev_err(arizona->dev, "Rejecting unstable LHPF coefficients\n");
2549 return snd_soc_bytes_put(kcontrol, ucontrol);
2551 EXPORT_SYMBOL_GPL(arizona_lhpf_coeff_put);
2553 int arizona_register_notifier(struct snd_soc_codec *codec,
2554 struct notifier_block *nb,
2555 int (*notify)(struct notifier_block *nb,
2556 unsigned long action, void *data))
2558 struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
2559 struct arizona *arizona = priv->arizona;
2561 nb->notifier_call = notify;
2563 return blocking_notifier_chain_register(&arizona->notifier, nb);
2565 EXPORT_SYMBOL_GPL(arizona_register_notifier);
2567 int arizona_unregister_notifier(struct snd_soc_codec *codec,
2568 struct notifier_block *nb)
2570 struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
2571 struct arizona *arizona = priv->arizona;
2573 return blocking_notifier_chain_unregister(&arizona->notifier, nb);
2575 EXPORT_SYMBOL_GPL(arizona_unregister_notifier);
2577 MODULE_DESCRIPTION("ASoC Wolfson Arizona class device support");
2578 MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
2579 MODULE_LICENSE("GPL");