2 * arizona.c - Wolfson Arizona class device shared support
4 * Copyright 2012 Wolfson Microelectronics plc
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 #include <linux/delay.h>
14 #include <linux/gcd.h>
15 #include <linux/module.h>
16 #include <linux/pm_runtime.h>
17 #include <sound/pcm.h>
18 #include <sound/pcm_params.h>
19 #include <sound/tlv.h>
21 #include <linux/mfd/arizona/core.h>
22 #include <linux/mfd/arizona/registers.h>
26 #define ARIZONA_AIF_BCLK_CTRL 0x00
27 #define ARIZONA_AIF_TX_PIN_CTRL 0x01
28 #define ARIZONA_AIF_RX_PIN_CTRL 0x02
29 #define ARIZONA_AIF_RATE_CTRL 0x03
30 #define ARIZONA_AIF_FORMAT 0x04
31 #define ARIZONA_AIF_TX_BCLK_RATE 0x05
32 #define ARIZONA_AIF_RX_BCLK_RATE 0x06
33 #define ARIZONA_AIF_FRAME_CTRL_1 0x07
34 #define ARIZONA_AIF_FRAME_CTRL_2 0x08
35 #define ARIZONA_AIF_FRAME_CTRL_3 0x09
36 #define ARIZONA_AIF_FRAME_CTRL_4 0x0A
37 #define ARIZONA_AIF_FRAME_CTRL_5 0x0B
38 #define ARIZONA_AIF_FRAME_CTRL_6 0x0C
39 #define ARIZONA_AIF_FRAME_CTRL_7 0x0D
40 #define ARIZONA_AIF_FRAME_CTRL_8 0x0E
41 #define ARIZONA_AIF_FRAME_CTRL_9 0x0F
42 #define ARIZONA_AIF_FRAME_CTRL_10 0x10
43 #define ARIZONA_AIF_FRAME_CTRL_11 0x11
44 #define ARIZONA_AIF_FRAME_CTRL_12 0x12
45 #define ARIZONA_AIF_FRAME_CTRL_13 0x13
46 #define ARIZONA_AIF_FRAME_CTRL_14 0x14
47 #define ARIZONA_AIF_FRAME_CTRL_15 0x15
48 #define ARIZONA_AIF_FRAME_CTRL_16 0x16
49 #define ARIZONA_AIF_FRAME_CTRL_17 0x17
50 #define ARIZONA_AIF_FRAME_CTRL_18 0x18
51 #define ARIZONA_AIF_TX_ENABLES 0x19
52 #define ARIZONA_AIF_RX_ENABLES 0x1A
53 #define ARIZONA_AIF_FORCE_WRITE 0x1B
55 #define arizona_fll_err(_fll, fmt, ...) \
56 dev_err(_fll->arizona->dev, "FLL%d: " fmt, _fll->id, ##__VA_ARGS__)
57 #define arizona_fll_warn(_fll, fmt, ...) \
58 dev_warn(_fll->arizona->dev, "FLL%d: " fmt, _fll->id, ##__VA_ARGS__)
59 #define arizona_fll_dbg(_fll, fmt, ...) \
60 dev_dbg(_fll->arizona->dev, "FLL%d: " fmt, _fll->id, ##__VA_ARGS__)
62 #define arizona_aif_err(_dai, fmt, ...) \
63 dev_err(_dai->dev, "AIF%d: " fmt, _dai->id, ##__VA_ARGS__)
64 #define arizona_aif_warn(_dai, fmt, ...) \
65 dev_warn(_dai->dev, "AIF%d: " fmt, _dai->id, ##__VA_ARGS__)
66 #define arizona_aif_dbg(_dai, fmt, ...) \
67 dev_dbg(_dai->dev, "AIF%d: " fmt, _dai->id, ##__VA_ARGS__)
69 static int arizona_spk_ev(struct snd_soc_dapm_widget *w,
70 struct snd_kcontrol *kcontrol,
73 struct snd_soc_codec *codec = w->codec;
74 struct arizona *arizona = dev_get_drvdata(codec->dev->parent);
75 struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
76 bool manual_ena = false;
79 switch (arizona->type) {
81 switch (arizona->rev) {
93 case SND_SOC_DAPM_PRE_PMU:
94 if (!priv->spk_ena && manual_ena) {
95 snd_soc_write(codec, 0x4f5, 0x25a);
96 priv->spk_ena_pending = true;
99 case SND_SOC_DAPM_POST_PMU:
100 val = snd_soc_read(codec, ARIZONA_INTERRUPT_RAW_STATUS_3);
101 if (val & ARIZONA_SPK_SHUTDOWN_STS) {
102 dev_crit(arizona->dev,
103 "Speaker not enabled due to temperature\n");
107 snd_soc_update_bits(codec, ARIZONA_OUTPUT_ENABLES_1,
108 1 << w->shift, 1 << w->shift);
110 if (priv->spk_ena_pending) {
112 snd_soc_write(codec, 0x4f5, 0xda);
113 priv->spk_ena_pending = false;
117 case SND_SOC_DAPM_PRE_PMD:
121 snd_soc_write(codec, 0x4f5, 0x25a);
124 snd_soc_update_bits(codec, ARIZONA_OUTPUT_ENABLES_1,
127 case SND_SOC_DAPM_POST_PMD:
130 snd_soc_write(codec, 0x4f5, 0x0da);
138 static irqreturn_t arizona_thermal_warn(int irq, void *data)
140 struct arizona *arizona = data;
144 ret = regmap_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_3,
147 dev_err(arizona->dev, "Failed to read thermal status: %d\n",
149 } else if (val & ARIZONA_SPK_SHUTDOWN_WARN_STS) {
150 dev_crit(arizona->dev, "Thermal warning\n");
156 static irqreturn_t arizona_thermal_shutdown(int irq, void *data)
158 struct arizona *arizona = data;
162 ret = regmap_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_3,
165 dev_err(arizona->dev, "Failed to read thermal status: %d\n",
167 } else if (val & ARIZONA_SPK_SHUTDOWN_STS) {
168 dev_crit(arizona->dev, "Thermal shutdown\n");
169 ret = regmap_update_bits(arizona->regmap,
170 ARIZONA_OUTPUT_ENABLES_1,
172 ARIZONA_OUT4R_ENA, 0);
174 dev_crit(arizona->dev,
175 "Failed to disable speaker outputs: %d\n",
182 static const struct snd_soc_dapm_widget arizona_spkl =
183 SND_SOC_DAPM_PGA_E("OUT4L", SND_SOC_NOPM,
184 ARIZONA_OUT4L_ENA_SHIFT, 0, NULL, 0, arizona_spk_ev,
185 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU);
187 static const struct snd_soc_dapm_widget arizona_spkr =
188 SND_SOC_DAPM_PGA_E("OUT4R", SND_SOC_NOPM,
189 ARIZONA_OUT4R_ENA_SHIFT, 0, NULL, 0, arizona_spk_ev,
190 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU);
192 int arizona_init_spk(struct snd_soc_codec *codec)
194 struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
195 struct arizona *arizona = priv->arizona;
198 ret = snd_soc_dapm_new_controls(&codec->dapm, &arizona_spkl, 1);
202 ret = snd_soc_dapm_new_controls(&codec->dapm, &arizona_spkr, 1);
206 ret = arizona_request_irq(arizona, ARIZONA_IRQ_SPK_SHUTDOWN_WARN,
207 "Thermal warning", arizona_thermal_warn,
210 dev_err(arizona->dev,
211 "Failed to get thermal warning IRQ: %d\n",
214 ret = arizona_request_irq(arizona, ARIZONA_IRQ_SPK_SHUTDOWN,
215 "Thermal shutdown", arizona_thermal_shutdown,
218 dev_err(arizona->dev,
219 "Failed to get thermal shutdown IRQ: %d\n",
224 EXPORT_SYMBOL_GPL(arizona_init_spk);
226 const char *arizona_mixer_texts[ARIZONA_NUM_MIXER_INPUTS] = {
327 EXPORT_SYMBOL_GPL(arizona_mixer_texts);
329 int arizona_mixer_values[ARIZONA_NUM_MIXER_INPUTS] = {
335 0x0c, /* Noise mixer */
336 0x0d, /* Comfort noise */
405 0xa0, /* ISRC1INT1 */
409 0xa4, /* ISRC1DEC1 */
413 0xa8, /* ISRC2DEC1 */
417 0xac, /* ISRC2INT1 */
421 0xb0, /* ISRC3DEC1 */
425 0xb4, /* ISRC3INT1 */
430 EXPORT_SYMBOL_GPL(arizona_mixer_values);
432 const DECLARE_TLV_DB_SCALE(arizona_mixer_tlv, -3200, 100, 0);
433 EXPORT_SYMBOL_GPL(arizona_mixer_tlv);
435 const char *arizona_rate_text[ARIZONA_RATE_ENUM_SIZE] = {
436 "SYNCCLK rate", "8kHz", "16kHz", "ASYNCCLK rate",
438 EXPORT_SYMBOL_GPL(arizona_rate_text);
440 const int arizona_rate_val[ARIZONA_RATE_ENUM_SIZE] = {
443 EXPORT_SYMBOL_GPL(arizona_rate_val);
446 const struct soc_enum arizona_isrc_fsl[] = {
447 SOC_VALUE_ENUM_SINGLE(ARIZONA_ISRC_1_CTRL_2,
448 ARIZONA_ISRC1_FSL_SHIFT, 0xf,
449 ARIZONA_RATE_ENUM_SIZE,
450 arizona_rate_text, arizona_rate_val),
451 SOC_VALUE_ENUM_SINGLE(ARIZONA_ISRC_2_CTRL_2,
452 ARIZONA_ISRC2_FSL_SHIFT, 0xf,
453 ARIZONA_RATE_ENUM_SIZE,
454 arizona_rate_text, arizona_rate_val),
455 SOC_VALUE_ENUM_SINGLE(ARIZONA_ISRC_3_CTRL_2,
456 ARIZONA_ISRC3_FSL_SHIFT, 0xf,
457 ARIZONA_RATE_ENUM_SIZE,
458 arizona_rate_text, arizona_rate_val),
460 EXPORT_SYMBOL_GPL(arizona_isrc_fsl);
462 static const char *arizona_vol_ramp_text[] = {
463 "0ms/6dB", "0.5ms/6dB", "1ms/6dB", "2ms/6dB", "4ms/6dB", "8ms/6dB",
464 "15ms/6dB", "30ms/6dB",
467 const struct soc_enum arizona_in_vd_ramp =
468 SOC_ENUM_SINGLE(ARIZONA_INPUT_VOLUME_RAMP,
469 ARIZONA_IN_VD_RAMP_SHIFT, 7, arizona_vol_ramp_text);
470 EXPORT_SYMBOL_GPL(arizona_in_vd_ramp);
472 const struct soc_enum arizona_in_vi_ramp =
473 SOC_ENUM_SINGLE(ARIZONA_INPUT_VOLUME_RAMP,
474 ARIZONA_IN_VI_RAMP_SHIFT, 7, arizona_vol_ramp_text);
475 EXPORT_SYMBOL_GPL(arizona_in_vi_ramp);
477 const struct soc_enum arizona_out_vd_ramp =
478 SOC_ENUM_SINGLE(ARIZONA_OUTPUT_VOLUME_RAMP,
479 ARIZONA_OUT_VD_RAMP_SHIFT, 7, arizona_vol_ramp_text);
480 EXPORT_SYMBOL_GPL(arizona_out_vd_ramp);
482 const struct soc_enum arizona_out_vi_ramp =
483 SOC_ENUM_SINGLE(ARIZONA_OUTPUT_VOLUME_RAMP,
484 ARIZONA_OUT_VI_RAMP_SHIFT, 7, arizona_vol_ramp_text);
485 EXPORT_SYMBOL_GPL(arizona_out_vi_ramp);
487 static const char *arizona_lhpf_mode_text[] = {
488 "Low-pass", "High-pass"
491 const struct soc_enum arizona_lhpf1_mode =
492 SOC_ENUM_SINGLE(ARIZONA_HPLPF1_1, ARIZONA_LHPF1_MODE_SHIFT, 2,
493 arizona_lhpf_mode_text);
494 EXPORT_SYMBOL_GPL(arizona_lhpf1_mode);
496 const struct soc_enum arizona_lhpf2_mode =
497 SOC_ENUM_SINGLE(ARIZONA_HPLPF2_1, ARIZONA_LHPF2_MODE_SHIFT, 2,
498 arizona_lhpf_mode_text);
499 EXPORT_SYMBOL_GPL(arizona_lhpf2_mode);
501 const struct soc_enum arizona_lhpf3_mode =
502 SOC_ENUM_SINGLE(ARIZONA_HPLPF3_1, ARIZONA_LHPF3_MODE_SHIFT, 2,
503 arizona_lhpf_mode_text);
504 EXPORT_SYMBOL_GPL(arizona_lhpf3_mode);
506 const struct soc_enum arizona_lhpf4_mode =
507 SOC_ENUM_SINGLE(ARIZONA_HPLPF4_1, ARIZONA_LHPF4_MODE_SHIFT, 2,
508 arizona_lhpf_mode_text);
509 EXPORT_SYMBOL_GPL(arizona_lhpf4_mode);
511 static const char *arizona_ng_hold_text[] = {
512 "30ms", "120ms", "250ms", "500ms",
515 const struct soc_enum arizona_ng_hold =
516 SOC_ENUM_SINGLE(ARIZONA_NOISE_GATE_CONTROL, ARIZONA_NGATE_HOLD_SHIFT,
517 4, arizona_ng_hold_text);
518 EXPORT_SYMBOL_GPL(arizona_ng_hold);
520 static void arizona_in_set_vu(struct snd_soc_codec *codec, int ena)
522 struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
531 for (i = 0; i < priv->num_inputs; i++)
532 snd_soc_update_bits(codec,
533 ARIZONA_ADC_DIGITAL_VOLUME_1L + (i * 4),
537 int arizona_in_ev(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol,
540 struct arizona_priv *priv = snd_soc_codec_get_drvdata(w->codec);
544 reg = ARIZONA_ADC_DIGITAL_VOLUME_1L + ((w->shift / 2) * 8);
546 reg = ARIZONA_ADC_DIGITAL_VOLUME_1R + ((w->shift / 2) * 8);
549 case SND_SOC_DAPM_PRE_PMU:
552 case SND_SOC_DAPM_POST_PMU:
553 snd_soc_update_bits(w->codec, reg, ARIZONA_IN1L_MUTE, 0);
555 /* If this is the last input pending then allow VU */
557 if (priv->in_pending == 0) {
559 arizona_in_set_vu(w->codec, 1);
562 case SND_SOC_DAPM_PRE_PMD:
563 snd_soc_update_bits(w->codec, reg,
564 ARIZONA_IN1L_MUTE | ARIZONA_IN_VU,
565 ARIZONA_IN1L_MUTE | ARIZONA_IN_VU);
567 case SND_SOC_DAPM_POST_PMD:
568 /* Disable volume updates if no inputs are enabled */
569 reg = snd_soc_read(w->codec, ARIZONA_INPUT_ENABLES);
571 arizona_in_set_vu(w->codec, 0);
576 EXPORT_SYMBOL_GPL(arizona_in_ev);
578 int arizona_out_ev(struct snd_soc_dapm_widget *w,
579 struct snd_kcontrol *kcontrol,
583 case SND_SOC_DAPM_POST_PMU:
585 case ARIZONA_OUT1L_ENA_SHIFT:
586 case ARIZONA_OUT1R_ENA_SHIFT:
587 case ARIZONA_OUT2L_ENA_SHIFT:
588 case ARIZONA_OUT2R_ENA_SHIFT:
589 case ARIZONA_OUT3L_ENA_SHIFT:
590 case ARIZONA_OUT3R_ENA_SHIFT:
602 EXPORT_SYMBOL_GPL(arizona_out_ev);
604 int arizona_hp_ev(struct snd_soc_dapm_widget *w,
605 struct snd_kcontrol *kcontrol,
608 struct arizona_priv *priv = snd_soc_codec_get_drvdata(w->codec);
609 unsigned int mask = 1 << w->shift;
613 case SND_SOC_DAPM_POST_PMU:
616 case SND_SOC_DAPM_PRE_PMD:
623 /* Store the desired state for the HP outputs */
624 priv->arizona->hp_ena &= ~mask;
625 priv->arizona->hp_ena |= val;
627 /* Force off if HPDET magic is active */
628 if (priv->arizona->hpdet_magic)
631 snd_soc_update_bits(w->codec, ARIZONA_OUTPUT_ENABLES_1, mask, val);
633 return arizona_out_ev(w, kcontrol, event);
635 EXPORT_SYMBOL_GPL(arizona_hp_ev);
637 static unsigned int arizona_sysclk_48k_rates[] = {
647 static unsigned int arizona_sysclk_44k1_rates[] = {
657 static int arizona_set_opclk(struct snd_soc_codec *codec, unsigned int clk,
660 struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
663 int ref, div, refclk;
666 case ARIZONA_CLK_OPCLK:
667 reg = ARIZONA_OUTPUT_SYSTEM_CLOCK;
668 refclk = priv->sysclk;
670 case ARIZONA_CLK_ASYNC_OPCLK:
671 reg = ARIZONA_OUTPUT_ASYNC_CLOCK;
672 refclk = priv->asyncclk;
679 rates = arizona_sysclk_44k1_rates;
681 rates = arizona_sysclk_48k_rates;
683 for (ref = 0; ref < ARRAY_SIZE(arizona_sysclk_48k_rates) &&
684 rates[ref] <= refclk; ref++) {
686 while (rates[ref] / div >= freq && div < 32) {
687 if (rates[ref] / div == freq) {
688 dev_dbg(codec->dev, "Configured %dHz OPCLK\n",
690 snd_soc_update_bits(codec, reg,
691 ARIZONA_OPCLK_DIV_MASK |
692 ARIZONA_OPCLK_SEL_MASK,
694 ARIZONA_OPCLK_DIV_SHIFT) |
702 dev_err(codec->dev, "Unable to generate %dHz OPCLK\n", freq);
706 int arizona_set_sysclk(struct snd_soc_codec *codec, int clk_id,
707 int source, unsigned int freq, int dir)
709 struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
710 struct arizona *arizona = priv->arizona;
713 unsigned int mask = ARIZONA_SYSCLK_FREQ_MASK | ARIZONA_SYSCLK_SRC_MASK;
714 unsigned int val = source << ARIZONA_SYSCLK_SRC_SHIFT;
718 case ARIZONA_CLK_SYSCLK:
720 reg = ARIZONA_SYSTEM_CLOCK_1;
722 mask |= ARIZONA_SYSCLK_FRAC;
724 case ARIZONA_CLK_ASYNCCLK:
726 reg = ARIZONA_ASYNC_CLOCK_1;
727 clk = &priv->asyncclk;
729 case ARIZONA_CLK_OPCLK:
730 case ARIZONA_CLK_ASYNC_OPCLK:
731 return arizona_set_opclk(codec, clk_id, freq);
742 val |= ARIZONA_CLK_12MHZ << ARIZONA_SYSCLK_FREQ_SHIFT;
746 val |= ARIZONA_CLK_24MHZ << ARIZONA_SYSCLK_FREQ_SHIFT;
750 val |= ARIZONA_CLK_49MHZ << ARIZONA_SYSCLK_FREQ_SHIFT;
754 val |= ARIZONA_CLK_73MHZ << ARIZONA_SYSCLK_FREQ_SHIFT;
758 val |= ARIZONA_CLK_98MHZ << ARIZONA_SYSCLK_FREQ_SHIFT;
762 val |= ARIZONA_CLK_147MHZ << ARIZONA_SYSCLK_FREQ_SHIFT;
765 dev_dbg(arizona->dev, "%s cleared\n", name);
775 val |= ARIZONA_SYSCLK_FRAC;
777 dev_dbg(arizona->dev, "%s set to %uHz", name, freq);
779 return regmap_update_bits(arizona->regmap, reg, mask, val);
781 EXPORT_SYMBOL_GPL(arizona_set_sysclk);
783 static int arizona_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
785 struct snd_soc_codec *codec = dai->codec;
786 int lrclk, bclk, mode, base;
788 base = dai->driver->base;
793 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
794 case SND_SOC_DAIFMT_DSP_A:
797 case SND_SOC_DAIFMT_I2S:
801 arizona_aif_err(dai, "Unsupported DAI format %d\n",
802 fmt & SND_SOC_DAIFMT_FORMAT_MASK);
806 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
807 case SND_SOC_DAIFMT_CBS_CFS:
809 case SND_SOC_DAIFMT_CBS_CFM:
810 lrclk |= ARIZONA_AIF1TX_LRCLK_MSTR;
812 case SND_SOC_DAIFMT_CBM_CFS:
813 bclk |= ARIZONA_AIF1_BCLK_MSTR;
815 case SND_SOC_DAIFMT_CBM_CFM:
816 bclk |= ARIZONA_AIF1_BCLK_MSTR;
817 lrclk |= ARIZONA_AIF1TX_LRCLK_MSTR;
820 arizona_aif_err(dai, "Unsupported master mode %d\n",
821 fmt & SND_SOC_DAIFMT_MASTER_MASK);
825 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
826 case SND_SOC_DAIFMT_NB_NF:
828 case SND_SOC_DAIFMT_IB_IF:
829 bclk |= ARIZONA_AIF1_BCLK_INV;
830 lrclk |= ARIZONA_AIF1TX_LRCLK_INV;
832 case SND_SOC_DAIFMT_IB_NF:
833 bclk |= ARIZONA_AIF1_BCLK_INV;
835 case SND_SOC_DAIFMT_NB_IF:
836 lrclk |= ARIZONA_AIF1TX_LRCLK_INV;
842 snd_soc_update_bits(codec, base + ARIZONA_AIF_BCLK_CTRL,
843 ARIZONA_AIF1_BCLK_INV | ARIZONA_AIF1_BCLK_MSTR,
845 snd_soc_update_bits(codec, base + ARIZONA_AIF_TX_PIN_CTRL,
846 ARIZONA_AIF1TX_LRCLK_INV |
847 ARIZONA_AIF1TX_LRCLK_MSTR, lrclk);
848 snd_soc_update_bits(codec, base + ARIZONA_AIF_RX_PIN_CTRL,
849 ARIZONA_AIF1RX_LRCLK_INV |
850 ARIZONA_AIF1RX_LRCLK_MSTR, lrclk);
851 snd_soc_update_bits(codec, base + ARIZONA_AIF_FORMAT,
852 ARIZONA_AIF1_FMT_MASK, mode);
857 static const int arizona_48k_bclk_rates[] = {
879 static const unsigned int arizona_48k_rates[] = {
897 static const struct snd_pcm_hw_constraint_list arizona_48k_constraint = {
898 .count = ARRAY_SIZE(arizona_48k_rates),
899 .list = arizona_48k_rates,
902 static const int arizona_44k1_bclk_rates[] = {
924 static const unsigned int arizona_44k1_rates[] = {
934 static const struct snd_pcm_hw_constraint_list arizona_44k1_constraint = {
935 .count = ARRAY_SIZE(arizona_44k1_rates),
936 .list = arizona_44k1_rates,
939 static int arizona_sr_vals[] = {
966 static int arizona_startup(struct snd_pcm_substream *substream,
967 struct snd_soc_dai *dai)
969 struct snd_soc_codec *codec = dai->codec;
970 struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
971 struct arizona_dai_priv *dai_priv = &priv->dai[dai->id - 1];
972 const struct snd_pcm_hw_constraint_list *constraint;
973 unsigned int base_rate;
975 switch (dai_priv->clk) {
976 case ARIZONA_CLK_SYSCLK:
977 base_rate = priv->sysclk;
979 case ARIZONA_CLK_ASYNCCLK:
980 base_rate = priv->asyncclk;
989 if (base_rate % 8000)
990 constraint = &arizona_44k1_constraint;
992 constraint = &arizona_48k_constraint;
994 return snd_pcm_hw_constraint_list(substream->runtime, 0,
995 SNDRV_PCM_HW_PARAM_RATE,
999 static int arizona_hw_params_rate(struct snd_pcm_substream *substream,
1000 struct snd_pcm_hw_params *params,
1001 struct snd_soc_dai *dai)
1003 struct snd_soc_codec *codec = dai->codec;
1004 struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
1005 struct arizona_dai_priv *dai_priv = &priv->dai[dai->id - 1];
1006 int base = dai->driver->base;
1010 * We will need to be more flexible than this in future,
1011 * currently we use a single sample rate for SYSCLK.
1013 for (i = 0; i < ARRAY_SIZE(arizona_sr_vals); i++)
1014 if (arizona_sr_vals[i] == params_rate(params))
1016 if (i == ARRAY_SIZE(arizona_sr_vals)) {
1017 arizona_aif_err(dai, "Unsupported sample rate %dHz\n",
1018 params_rate(params));
1023 switch (dai_priv->clk) {
1024 case ARIZONA_CLK_SYSCLK:
1025 snd_soc_update_bits(codec, ARIZONA_SAMPLE_RATE_1,
1026 ARIZONA_SAMPLE_RATE_1_MASK, sr_val);
1028 snd_soc_update_bits(codec, base + ARIZONA_AIF_RATE_CTRL,
1029 ARIZONA_AIF1_RATE_MASK, 0);
1031 case ARIZONA_CLK_ASYNCCLK:
1032 snd_soc_update_bits(codec, ARIZONA_ASYNC_SAMPLE_RATE_1,
1033 ARIZONA_ASYNC_SAMPLE_RATE_MASK, sr_val);
1035 snd_soc_update_bits(codec, base + ARIZONA_AIF_RATE_CTRL,
1036 ARIZONA_AIF1_RATE_MASK,
1037 8 << ARIZONA_AIF1_RATE_SHIFT);
1040 arizona_aif_err(dai, "Invalid clock %d\n", dai_priv->clk);
1047 static int arizona_hw_params(struct snd_pcm_substream *substream,
1048 struct snd_pcm_hw_params *params,
1049 struct snd_soc_dai *dai)
1051 struct snd_soc_codec *codec = dai->codec;
1052 struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
1053 struct arizona *arizona = priv->arizona;
1054 int base = dai->driver->base;
1057 int chan_limit = arizona->pdata.max_channels_clocked[dai->id - 1];
1058 int bclk, lrclk, wl, frame, bclk_target;
1060 if (params_rate(params) % 8000)
1061 rates = &arizona_44k1_bclk_rates[0];
1063 rates = &arizona_48k_bclk_rates[0];
1065 bclk_target = snd_soc_params_to_bclk(params);
1066 if (chan_limit && chan_limit < params_channels(params)) {
1067 arizona_aif_dbg(dai, "Limiting to %d channels\n", chan_limit);
1068 bclk_target /= params_channels(params);
1069 bclk_target *= chan_limit;
1072 /* Force stereo for I2S mode */
1073 val = snd_soc_read(codec, base + ARIZONA_AIF_FORMAT);
1074 if (params_channels(params) == 1 && (val & ARIZONA_AIF1_FMT_MASK)) {
1075 arizona_aif_dbg(dai, "Forcing stereo mode\n");
1079 for (i = 0; i < ARRAY_SIZE(arizona_44k1_bclk_rates); i++) {
1080 if (rates[i] >= bclk_target &&
1081 rates[i] % params_rate(params) == 0) {
1086 if (i == ARRAY_SIZE(arizona_44k1_bclk_rates)) {
1087 arizona_aif_err(dai, "Unsupported sample rate %dHz\n",
1088 params_rate(params));
1092 lrclk = rates[bclk] / params_rate(params);
1094 arizona_aif_dbg(dai, "BCLK %dHz LRCLK %dHz\n",
1095 rates[bclk], rates[bclk] / lrclk);
1097 wl = snd_pcm_format_width(params_format(params));
1098 frame = wl << ARIZONA_AIF1TX_WL_SHIFT | wl;
1100 ret = arizona_hw_params_rate(substream, params, dai);
1104 snd_soc_update_bits(codec, base + ARIZONA_AIF_BCLK_CTRL,
1105 ARIZONA_AIF1_BCLK_FREQ_MASK, bclk);
1106 snd_soc_update_bits(codec, base + ARIZONA_AIF_TX_BCLK_RATE,
1107 ARIZONA_AIF1TX_BCPF_MASK, lrclk);
1108 snd_soc_update_bits(codec, base + ARIZONA_AIF_RX_BCLK_RATE,
1109 ARIZONA_AIF1RX_BCPF_MASK, lrclk);
1110 snd_soc_update_bits(codec, base + ARIZONA_AIF_FRAME_CTRL_1,
1111 ARIZONA_AIF1TX_WL_MASK |
1112 ARIZONA_AIF1TX_SLOT_LEN_MASK, frame);
1113 snd_soc_update_bits(codec, base + ARIZONA_AIF_FRAME_CTRL_2,
1114 ARIZONA_AIF1RX_WL_MASK |
1115 ARIZONA_AIF1RX_SLOT_LEN_MASK, frame);
1120 static const char *arizona_dai_clk_str(int clk_id)
1123 case ARIZONA_CLK_SYSCLK:
1125 case ARIZONA_CLK_ASYNCCLK:
1128 return "Unknown clock";
1132 static int arizona_dai_set_sysclk(struct snd_soc_dai *dai,
1133 int clk_id, unsigned int freq, int dir)
1135 struct snd_soc_codec *codec = dai->codec;
1136 struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
1137 struct arizona_dai_priv *dai_priv = &priv->dai[dai->id - 1];
1138 struct snd_soc_dapm_route routes[2];
1141 case ARIZONA_CLK_SYSCLK:
1142 case ARIZONA_CLK_ASYNCCLK:
1148 if (clk_id == dai_priv->clk)
1152 dev_err(codec->dev, "Can't change clock on active DAI %d\n",
1157 dev_dbg(codec->dev, "Setting AIF%d to %s\n", dai->id + 1,
1158 arizona_dai_clk_str(clk_id));
1160 memset(&routes, 0, sizeof(routes));
1161 routes[0].sink = dai->driver->capture.stream_name;
1162 routes[1].sink = dai->driver->playback.stream_name;
1164 routes[0].source = arizona_dai_clk_str(dai_priv->clk);
1165 routes[1].source = arizona_dai_clk_str(dai_priv->clk);
1166 snd_soc_dapm_del_routes(&codec->dapm, routes, ARRAY_SIZE(routes));
1168 routes[0].source = arizona_dai_clk_str(clk_id);
1169 routes[1].source = arizona_dai_clk_str(clk_id);
1170 snd_soc_dapm_add_routes(&codec->dapm, routes, ARRAY_SIZE(routes));
1172 dai_priv->clk = clk_id;
1174 return snd_soc_dapm_sync(&codec->dapm);
1177 static int arizona_set_tristate(struct snd_soc_dai *dai, int tristate)
1179 struct snd_soc_codec *codec = dai->codec;
1180 int base = dai->driver->base;
1184 reg = ARIZONA_AIF1_TRI;
1188 return snd_soc_update_bits(codec, base + ARIZONA_AIF_RATE_CTRL,
1189 ARIZONA_AIF1_TRI, reg);
1192 const struct snd_soc_dai_ops arizona_dai_ops = {
1193 .startup = arizona_startup,
1194 .set_fmt = arizona_set_fmt,
1195 .hw_params = arizona_hw_params,
1196 .set_sysclk = arizona_dai_set_sysclk,
1197 .set_tristate = arizona_set_tristate,
1199 EXPORT_SYMBOL_GPL(arizona_dai_ops);
1201 const struct snd_soc_dai_ops arizona_simple_dai_ops = {
1202 .startup = arizona_startup,
1203 .hw_params = arizona_hw_params_rate,
1204 .set_sysclk = arizona_dai_set_sysclk,
1206 EXPORT_SYMBOL_GPL(arizona_simple_dai_ops);
1208 int arizona_init_dai(struct arizona_priv *priv, int id)
1210 struct arizona_dai_priv *dai_priv = &priv->dai[id];
1212 dai_priv->clk = ARIZONA_CLK_SYSCLK;
1216 EXPORT_SYMBOL_GPL(arizona_init_dai);
1218 static irqreturn_t arizona_fll_clock_ok(int irq, void *data)
1220 struct arizona_fll *fll = data;
1222 arizona_fll_dbg(fll, "clock OK\n");
1235 { 0, 64000, 4, 16 },
1236 { 64000, 128000, 3, 8 },
1237 { 128000, 256000, 2, 4 },
1238 { 256000, 1000000, 1, 2 },
1239 { 1000000, 13500000, 0, 1 },
1248 { 256000, 1000000, 2 },
1249 { 1000000, 13500000, 4 },
1252 struct arizona_fll_cfg {
1262 static int arizona_calc_fll(struct arizona_fll *fll,
1263 struct arizona_fll_cfg *cfg,
1267 unsigned int target, div, gcd_fll;
1270 arizona_fll_dbg(fll, "Fref=%u Fout=%u\n", Fref, Fout);
1272 /* Fref must be <=13.5MHz */
1275 while ((Fref / div) > 13500000) {
1280 arizona_fll_err(fll,
1281 "Can't scale %dMHz in to <=13.5MHz\n",
1287 /* Apply the division for our remaining calculations */
1290 /* Fvco should be over the targt; don't check the upper bound */
1292 while (Fout * div < 90000000 * fll->vco_mult) {
1295 arizona_fll_err(fll, "No FLL_OUTDIV for Fout=%uHz\n",
1300 target = Fout * div / fll->vco_mult;
1303 arizona_fll_dbg(fll, "Fvco=%dHz\n", target);
1305 /* Find an appropraite FLL_FRATIO and factor it out of the target */
1306 for (i = 0; i < ARRAY_SIZE(fll_fratios); i++) {
1307 if (fll_fratios[i].min <= Fref && Fref <= fll_fratios[i].max) {
1308 cfg->fratio = fll_fratios[i].fratio;
1309 ratio = fll_fratios[i].ratio;
1313 if (i == ARRAY_SIZE(fll_fratios)) {
1314 arizona_fll_err(fll, "Unable to find FRATIO for Fref=%uHz\n",
1319 for (i = 0; i < ARRAY_SIZE(fll_gains); i++) {
1320 if (fll_gains[i].min <= Fref && Fref <= fll_gains[i].max) {
1321 cfg->gain = fll_gains[i].gain;
1325 if (i == ARRAY_SIZE(fll_gains)) {
1326 arizona_fll_err(fll, "Unable to find gain for Fref=%uHz\n",
1331 cfg->n = target / (ratio * Fref);
1333 if (target % (ratio * Fref)) {
1334 gcd_fll = gcd(target, ratio * Fref);
1335 arizona_fll_dbg(fll, "GCD=%u\n", gcd_fll);
1337 cfg->theta = (target - (cfg->n * ratio * Fref))
1339 cfg->lambda = (ratio * Fref) / gcd_fll;
1345 /* Round down to 16bit range with cost of accuracy lost.
1346 * Denominator must be bigger than numerator so we only
1349 while (cfg->lambda >= (1 << 16)) {
1354 arizona_fll_dbg(fll, "N=%x THETA=%x LAMBDA=%x\n",
1355 cfg->n, cfg->theta, cfg->lambda);
1356 arizona_fll_dbg(fll, "FRATIO=%x(%d) OUTDIV=%x REFCLK_DIV=%x\n",
1357 cfg->fratio, cfg->fratio, cfg->outdiv, cfg->refdiv);
1358 arizona_fll_dbg(fll, "GAIN=%d\n", cfg->gain);
1364 static void arizona_apply_fll(struct arizona *arizona, unsigned int base,
1365 struct arizona_fll_cfg *cfg, int source,
1368 regmap_update_bits(arizona->regmap, base + 3,
1369 ARIZONA_FLL1_THETA_MASK, cfg->theta);
1370 regmap_update_bits(arizona->regmap, base + 4,
1371 ARIZONA_FLL1_LAMBDA_MASK, cfg->lambda);
1372 regmap_update_bits(arizona->regmap, base + 5,
1373 ARIZONA_FLL1_FRATIO_MASK,
1374 cfg->fratio << ARIZONA_FLL1_FRATIO_SHIFT);
1375 regmap_update_bits(arizona->regmap, base + 6,
1376 ARIZONA_FLL1_CLK_REF_DIV_MASK |
1377 ARIZONA_FLL1_CLK_REF_SRC_MASK,
1378 cfg->refdiv << ARIZONA_FLL1_CLK_REF_DIV_SHIFT |
1379 source << ARIZONA_FLL1_CLK_REF_SRC_SHIFT);
1382 regmap_update_bits(arizona->regmap, base + 0x7,
1383 ARIZONA_FLL1_GAIN_MASK,
1384 cfg->gain << ARIZONA_FLL1_GAIN_SHIFT);
1386 regmap_update_bits(arizona->regmap, base + 0x9,
1387 ARIZONA_FLL1_GAIN_MASK,
1388 cfg->gain << ARIZONA_FLL1_GAIN_SHIFT);
1390 regmap_update_bits(arizona->regmap, base + 2,
1391 ARIZONA_FLL1_CTRL_UPD | ARIZONA_FLL1_N_MASK,
1392 ARIZONA_FLL1_CTRL_UPD | cfg->n);
1395 static bool arizona_is_enabled_fll(struct arizona_fll *fll)
1397 struct arizona *arizona = fll->arizona;
1401 ret = regmap_read(arizona->regmap, fll->base + 1, ®);
1403 arizona_fll_err(fll, "Failed to read current state: %d\n",
1408 return reg & ARIZONA_FLL1_ENA;
1411 static void arizona_enable_fll(struct arizona_fll *fll,
1412 struct arizona_fll_cfg *ref,
1413 struct arizona_fll_cfg *sync)
1415 struct arizona *arizona = fll->arizona;
1419 * If we have both REFCLK and SYNCCLK then enable both,
1420 * otherwise apply the SYNCCLK settings to REFCLK.
1422 if (fll->ref_src >= 0 && fll->ref_src != fll->sync_src) {
1423 regmap_update_bits(arizona->regmap, fll->base + 5,
1424 ARIZONA_FLL1_OUTDIV_MASK,
1425 ref->outdiv << ARIZONA_FLL1_OUTDIV_SHIFT);
1427 arizona_apply_fll(arizona, fll->base, ref, fll->ref_src,
1429 if (fll->sync_src >= 0)
1430 arizona_apply_fll(arizona, fll->base + 0x10, sync,
1431 fll->sync_src, true);
1432 } else if (fll->sync_src >= 0) {
1433 regmap_update_bits(arizona->regmap, fll->base + 5,
1434 ARIZONA_FLL1_OUTDIV_MASK,
1435 sync->outdiv << ARIZONA_FLL1_OUTDIV_SHIFT);
1437 arizona_apply_fll(arizona, fll->base, sync,
1438 fll->sync_src, false);
1440 regmap_update_bits(arizona->regmap, fll->base + 0x11,
1441 ARIZONA_FLL1_SYNC_ENA, 0);
1443 arizona_fll_err(fll, "No clocks provided\n");
1448 * Increase the bandwidth if we're not using a low frequency
1451 if (fll->sync_src >= 0 && fll->sync_freq > 100000)
1452 regmap_update_bits(arizona->regmap, fll->base + 0x17,
1453 ARIZONA_FLL1_SYNC_BW, 0);
1455 regmap_update_bits(arizona->regmap, fll->base + 0x17,
1456 ARIZONA_FLL1_SYNC_BW, ARIZONA_FLL1_SYNC_BW);
1458 if (!arizona_is_enabled_fll(fll))
1459 pm_runtime_get(arizona->dev);
1461 /* Clear any pending completions */
1462 try_wait_for_completion(&fll->ok);
1464 regmap_update_bits(arizona->regmap, fll->base + 1,
1465 ARIZONA_FLL1_ENA, ARIZONA_FLL1_ENA);
1466 if (fll->ref_src >= 0 && fll->sync_src >= 0 &&
1467 fll->ref_src != fll->sync_src)
1468 regmap_update_bits(arizona->regmap, fll->base + 0x11,
1469 ARIZONA_FLL1_SYNC_ENA,
1470 ARIZONA_FLL1_SYNC_ENA);
1472 ret = wait_for_completion_timeout(&fll->ok,
1473 msecs_to_jiffies(250));
1475 arizona_fll_warn(fll, "Timed out waiting for lock\n");
1478 static void arizona_disable_fll(struct arizona_fll *fll)
1480 struct arizona *arizona = fll->arizona;
1483 regmap_update_bits_check(arizona->regmap, fll->base + 1,
1484 ARIZONA_FLL1_ENA, 0, &change);
1485 regmap_update_bits(arizona->regmap, fll->base + 0x11,
1486 ARIZONA_FLL1_SYNC_ENA, 0);
1489 pm_runtime_put_autosuspend(arizona->dev);
1492 int arizona_set_fll_refclk(struct arizona_fll *fll, int source,
1493 unsigned int Fref, unsigned int Fout)
1495 struct arizona_fll_cfg ref, sync;
1498 if (fll->ref_src == source && fll->ref_freq == Fref)
1501 if (fll->fout && Fref > 0) {
1502 ret = arizona_calc_fll(fll, &ref, Fref, fll->fout);
1506 if (fll->sync_src >= 0) {
1507 ret = arizona_calc_fll(fll, &sync, fll->sync_freq,
1514 fll->ref_src = source;
1515 fll->ref_freq = Fref;
1517 if (fll->fout && Fref > 0) {
1518 arizona_enable_fll(fll, &ref, &sync);
1523 EXPORT_SYMBOL_GPL(arizona_set_fll_refclk);
1525 int arizona_set_fll(struct arizona_fll *fll, int source,
1526 unsigned int Fref, unsigned int Fout)
1528 struct arizona_fll_cfg ref, sync;
1531 if (fll->sync_src == source &&
1532 fll->sync_freq == Fref && fll->fout == Fout)
1536 if (fll->ref_src >= 0) {
1537 ret = arizona_calc_fll(fll, &ref, fll->ref_freq,
1543 ret = arizona_calc_fll(fll, &sync, Fref, Fout);
1548 fll->sync_src = source;
1549 fll->sync_freq = Fref;
1553 arizona_enable_fll(fll, &ref, &sync);
1555 arizona_disable_fll(fll);
1560 EXPORT_SYMBOL_GPL(arizona_set_fll);
1562 int arizona_init_fll(struct arizona *arizona, int id, int base, int lock_irq,
1563 int ok_irq, struct arizona_fll *fll)
1568 init_completion(&fll->ok);
1572 fll->arizona = arizona;
1573 fll->sync_src = ARIZONA_FLL_SRC_NONE;
1575 /* Configure default refclk to 32kHz if we have one */
1576 regmap_read(arizona->regmap, ARIZONA_CLOCK_32K_1, &val);
1577 switch (val & ARIZONA_CLK_32K_SRC_MASK) {
1578 case ARIZONA_CLK_SRC_MCLK1:
1579 case ARIZONA_CLK_SRC_MCLK2:
1580 fll->ref_src = val & ARIZONA_CLK_32K_SRC_MASK;
1583 fll->ref_src = ARIZONA_FLL_SRC_NONE;
1585 fll->ref_freq = 32768;
1587 snprintf(fll->lock_name, sizeof(fll->lock_name), "FLL%d lock", id);
1588 snprintf(fll->clock_ok_name, sizeof(fll->clock_ok_name),
1589 "FLL%d clock OK", id);
1591 ret = arizona_request_irq(arizona, ok_irq, fll->clock_ok_name,
1592 arizona_fll_clock_ok, fll);
1594 dev_err(arizona->dev, "Failed to get FLL%d clock OK IRQ: %d\n",
1598 regmap_update_bits(arizona->regmap, fll->base + 1,
1599 ARIZONA_FLL1_FREERUN, 0);
1603 EXPORT_SYMBOL_GPL(arizona_init_fll);
1606 * arizona_set_output_mode - Set the mode of the specified output
1608 * @codec: Device to configure
1609 * @output: Output number
1610 * @diff: True to set the output to differential mode
1612 * Some systems use external analogue switches to connect more
1613 * analogue devices to the CODEC than are supported by the device. In
1614 * some systems this requires changing the switched output from single
1615 * ended to differential mode dynamically at runtime, an operation
1616 * supported using this function.
1618 * Most systems have a single static configuration and should use
1619 * platform data instead.
1621 int arizona_set_output_mode(struct snd_soc_codec *codec, int output, bool diff)
1623 unsigned int reg, val;
1625 if (output < 1 || output > 6)
1628 reg = ARIZONA_OUTPUT_PATH_CONFIG_1L + (output - 1) * 8;
1631 val = ARIZONA_OUT1_MONO;
1635 return snd_soc_update_bits(codec, reg, ARIZONA_OUT1_MONO, val);
1637 EXPORT_SYMBOL_GPL(arizona_set_output_mode);
1639 MODULE_DESCRIPTION("ASoC Wolfson Arizona class device support");
1640 MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
1641 MODULE_LICENSE("GPL");