1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
4 * Routines for control of YMF724/740/744/754 chips
7 #include <linux/delay.h>
8 #include <linux/firmware.h>
9 #include <linux/init.h>
10 #include <linux/interrupt.h>
11 #include <linux/pci.h>
12 #include <linux/sched.h>
13 #include <linux/slab.h>
14 #include <linux/mutex.h>
15 #include <linux/module.h>
18 #include <sound/core.h>
19 #include <sound/control.h>
20 #include <sound/info.h>
21 #include <sound/tlv.h>
23 #include <sound/asoundef.h>
24 #include <sound/mpu401.h>
26 #include <asm/byteorder.h>
32 static void snd_ymfpci_irq_wait(struct snd_ymfpci *chip);
34 static inline u8 snd_ymfpci_readb(struct snd_ymfpci *chip, u32 offset)
36 return readb(chip->reg_area_virt + offset);
39 static inline void snd_ymfpci_writeb(struct snd_ymfpci *chip, u32 offset, u8 val)
41 writeb(val, chip->reg_area_virt + offset);
44 static inline u16 snd_ymfpci_readw(struct snd_ymfpci *chip, u32 offset)
46 return readw(chip->reg_area_virt + offset);
49 static inline void snd_ymfpci_writew(struct snd_ymfpci *chip, u32 offset, u16 val)
51 writew(val, chip->reg_area_virt + offset);
54 static inline u32 snd_ymfpci_readl(struct snd_ymfpci *chip, u32 offset)
56 return readl(chip->reg_area_virt + offset);
59 static inline void snd_ymfpci_writel(struct snd_ymfpci *chip, u32 offset, u32 val)
61 writel(val, chip->reg_area_virt + offset);
64 static int snd_ymfpci_codec_ready(struct snd_ymfpci *chip, int secondary)
66 unsigned long end_time;
67 u32 reg = secondary ? YDSXGR_SECSTATUSADR : YDSXGR_PRISTATUSADR;
69 end_time = jiffies + msecs_to_jiffies(750);
71 if ((snd_ymfpci_readw(chip, reg) & 0x8000) == 0)
73 schedule_timeout_uninterruptible(1);
74 } while (time_before(jiffies, end_time));
75 dev_err(chip->card->dev,
76 "codec_ready: codec %i is not ready [0x%x]\n",
77 secondary, snd_ymfpci_readw(chip, reg));
81 static void snd_ymfpci_codec_write(struct snd_ac97 *ac97, u16 reg, u16 val)
83 struct snd_ymfpci *chip = ac97->private_data;
86 snd_ymfpci_codec_ready(chip, 0);
87 cmd = ((YDSXG_AC97WRITECMD | reg) << 16) | val;
88 snd_ymfpci_writel(chip, YDSXGR_AC97CMDDATA, cmd);
91 static u16 snd_ymfpci_codec_read(struct snd_ac97 *ac97, u16 reg)
93 struct snd_ymfpci *chip = ac97->private_data;
95 if (snd_ymfpci_codec_ready(chip, 0))
97 snd_ymfpci_writew(chip, YDSXGR_AC97CMDADR, YDSXG_AC97READCMD | reg);
98 if (snd_ymfpci_codec_ready(chip, 0))
100 if (chip->device_id == PCI_DEVICE_ID_YAMAHA_744 && chip->rev < 2) {
102 for (i = 0; i < 600; i++)
103 snd_ymfpci_readw(chip, YDSXGR_PRISTATUSDATA);
105 return snd_ymfpci_readw(chip, YDSXGR_PRISTATUSDATA);
112 static u32 snd_ymfpci_calc_delta(u32 rate)
115 case 8000: return 0x02aaab00;
116 case 11025: return 0x03accd00;
117 case 16000: return 0x05555500;
118 case 22050: return 0x07599a00;
119 case 32000: return 0x0aaaab00;
120 case 44100: return 0x0eb33300;
121 default: return ((rate << 16) / 375) << 5;
125 static u32 def_rate[8] = {
126 100, 2000, 8000, 11025, 16000, 22050, 32000, 48000
129 static u32 snd_ymfpci_calc_lpfK(u32 rate)
132 static u32 val[8] = {
133 0x00570000, 0x06AA0000, 0x18B20000, 0x20930000,
134 0x2B9A0000, 0x35A10000, 0x3EAA0000, 0x40000000
138 return 0x40000000; /* FIXME: What's the right value? */
139 for (i = 0; i < 8; i++)
140 if (rate <= def_rate[i])
145 static u32 snd_ymfpci_calc_lpfQ(u32 rate)
148 static u32 val[8] = {
149 0x35280000, 0x34A70000, 0x32020000, 0x31770000,
150 0x31390000, 0x31C90000, 0x33D00000, 0x40000000
155 for (i = 0; i < 8; i++)
156 if (rate <= def_rate[i])
162 * Hardware start management
165 static void snd_ymfpci_hw_start(struct snd_ymfpci *chip)
169 spin_lock_irqsave(&chip->reg_lock, flags);
170 if (chip->start_count++ > 0)
172 snd_ymfpci_writel(chip, YDSXGR_MODE,
173 snd_ymfpci_readl(chip, YDSXGR_MODE) | 3);
174 chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT) & 1;
176 spin_unlock_irqrestore(&chip->reg_lock, flags);
179 static void snd_ymfpci_hw_stop(struct snd_ymfpci *chip)
184 spin_lock_irqsave(&chip->reg_lock, flags);
185 if (--chip->start_count > 0)
187 snd_ymfpci_writel(chip, YDSXGR_MODE,
188 snd_ymfpci_readl(chip, YDSXGR_MODE) & ~3);
189 while (timeout-- > 0) {
190 if ((snd_ymfpci_readl(chip, YDSXGR_STATUS) & 2) == 0)
193 if (atomic_read(&chip->interrupt_sleep_count)) {
194 atomic_set(&chip->interrupt_sleep_count, 0);
195 wake_up(&chip->interrupt_sleep);
198 spin_unlock_irqrestore(&chip->reg_lock, flags);
202 * Playback voice management
205 static int voice_alloc(struct snd_ymfpci *chip,
206 enum snd_ymfpci_voice_type type, int pair,
207 struct snd_ymfpci_voice **rvoice)
209 struct snd_ymfpci_voice *voice, *voice2;
213 for (idx = 0; idx < YDSXG_PLAYBACK_VOICES; idx += pair ? 2 : 1) {
214 voice = &chip->voices[idx];
215 voice2 = pair ? &chip->voices[idx+1] : NULL;
216 if (voice->use || (voice2 && voice2->use))
234 snd_ymfpci_hw_start(chip);
236 snd_ymfpci_hw_start(chip);
243 static int snd_ymfpci_voice_alloc(struct snd_ymfpci *chip,
244 enum snd_ymfpci_voice_type type, int pair,
245 struct snd_ymfpci_voice **rvoice)
250 if (snd_BUG_ON(!rvoice))
252 if (snd_BUG_ON(pair && type != YMFPCI_PCM))
255 spin_lock_irqsave(&chip->voice_lock, flags);
257 result = voice_alloc(chip, type, pair, rvoice);
258 if (result == 0 || type != YMFPCI_PCM)
260 /* TODO: synth/midi voice deallocation */
263 spin_unlock_irqrestore(&chip->voice_lock, flags);
267 static int snd_ymfpci_voice_free(struct snd_ymfpci *chip, struct snd_ymfpci_voice *pvoice)
271 if (snd_BUG_ON(!pvoice))
273 snd_ymfpci_hw_stop(chip);
274 spin_lock_irqsave(&chip->voice_lock, flags);
275 if (pvoice->number == chip->src441_used) {
276 chip->src441_used = -1;
277 pvoice->ypcm->use_441_slot = 0;
279 pvoice->use = pvoice->pcm = pvoice->synth = pvoice->midi = 0;
281 pvoice->interrupt = NULL;
282 spin_unlock_irqrestore(&chip->voice_lock, flags);
290 static void snd_ymfpci_pcm_interrupt(struct snd_ymfpci *chip, struct snd_ymfpci_voice *voice)
292 struct snd_ymfpci_pcm *ypcm;
295 if ((ypcm = voice->ypcm) == NULL)
297 if (ypcm->substream == NULL)
299 spin_lock(&chip->reg_lock);
301 pos = le32_to_cpu(voice->bank[chip->active_bank].start);
302 if (pos < ypcm->last_pos)
303 delta = pos + (ypcm->buffer_size - ypcm->last_pos);
305 delta = pos - ypcm->last_pos;
306 ypcm->period_pos += delta;
307 ypcm->last_pos = pos;
308 if (ypcm->period_pos >= ypcm->period_size) {
310 dev_dbg(chip->card->dev,
311 "done - active_bank = 0x%x, start = 0x%x\n",
313 voice->bank[chip->active_bank].start);
315 ypcm->period_pos %= ypcm->period_size;
316 spin_unlock(&chip->reg_lock);
317 snd_pcm_period_elapsed(ypcm->substream);
318 spin_lock(&chip->reg_lock);
321 if (unlikely(ypcm->update_pcm_vol)) {
322 unsigned int subs = ypcm->substream->number;
323 unsigned int next_bank = 1 - chip->active_bank;
324 struct snd_ymfpci_playback_bank *bank;
327 bank = &voice->bank[next_bank];
328 volume = cpu_to_le32(chip->pcm_mixer[subs].left << 15);
329 bank->left_gain_end = volume;
330 if (ypcm->output_rear)
331 bank->eff2_gain_end = volume;
333 bank = &ypcm->voices[1]->bank[next_bank];
334 volume = cpu_to_le32(chip->pcm_mixer[subs].right << 15);
335 bank->right_gain_end = volume;
336 if (ypcm->output_rear)
337 bank->eff3_gain_end = volume;
338 ypcm->update_pcm_vol--;
341 spin_unlock(&chip->reg_lock);
344 static void snd_ymfpci_pcm_capture_interrupt(struct snd_pcm_substream *substream)
346 struct snd_pcm_runtime *runtime = substream->runtime;
347 struct snd_ymfpci_pcm *ypcm = runtime->private_data;
348 struct snd_ymfpci *chip = ypcm->chip;
351 spin_lock(&chip->reg_lock);
353 pos = le32_to_cpu(chip->bank_capture[ypcm->capture_bank_number][chip->active_bank]->start) >> ypcm->shift;
354 if (pos < ypcm->last_pos)
355 delta = pos + (ypcm->buffer_size - ypcm->last_pos);
357 delta = pos - ypcm->last_pos;
358 ypcm->period_pos += delta;
359 ypcm->last_pos = pos;
360 if (ypcm->period_pos >= ypcm->period_size) {
361 ypcm->period_pos %= ypcm->period_size;
363 dev_dbg(chip->card->dev,
364 "done - active_bank = 0x%x, start = 0x%x\n",
366 voice->bank[chip->active_bank].start);
368 spin_unlock(&chip->reg_lock);
369 snd_pcm_period_elapsed(substream);
370 spin_lock(&chip->reg_lock);
373 spin_unlock(&chip->reg_lock);
376 static int snd_ymfpci_playback_trigger(struct snd_pcm_substream *substream,
379 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
380 struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data;
381 struct snd_kcontrol *kctl = NULL;
384 spin_lock(&chip->reg_lock);
385 if (ypcm->voices[0] == NULL) {
390 case SNDRV_PCM_TRIGGER_START:
391 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
392 case SNDRV_PCM_TRIGGER_RESUME:
393 chip->ctrl_playback[ypcm->voices[0]->number + 1] = cpu_to_le32(ypcm->voices[0]->bank_addr);
394 if (ypcm->voices[1] != NULL && !ypcm->use_441_slot)
395 chip->ctrl_playback[ypcm->voices[1]->number + 1] = cpu_to_le32(ypcm->voices[1]->bank_addr);
398 case SNDRV_PCM_TRIGGER_STOP:
399 if (substream->pcm == chip->pcm && !ypcm->use_441_slot) {
400 kctl = chip->pcm_mixer[substream->number].ctl;
401 kctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
404 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
405 case SNDRV_PCM_TRIGGER_SUSPEND:
406 chip->ctrl_playback[ypcm->voices[0]->number + 1] = 0;
407 if (ypcm->voices[1] != NULL && !ypcm->use_441_slot)
408 chip->ctrl_playback[ypcm->voices[1]->number + 1] = 0;
416 spin_unlock(&chip->reg_lock);
418 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_INFO, &kctl->id);
421 static int snd_ymfpci_capture_trigger(struct snd_pcm_substream *substream,
424 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
425 struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data;
429 spin_lock(&chip->reg_lock);
431 case SNDRV_PCM_TRIGGER_START:
432 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
433 case SNDRV_PCM_TRIGGER_RESUME:
434 tmp = snd_ymfpci_readl(chip, YDSXGR_MAPOFREC) | (1 << ypcm->capture_bank_number);
435 snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, tmp);
438 case SNDRV_PCM_TRIGGER_STOP:
439 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
440 case SNDRV_PCM_TRIGGER_SUSPEND:
441 tmp = snd_ymfpci_readl(chip, YDSXGR_MAPOFREC) & ~(1 << ypcm->capture_bank_number);
442 snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, tmp);
449 spin_unlock(&chip->reg_lock);
453 static int snd_ymfpci_pcm_voice_alloc(struct snd_ymfpci_pcm *ypcm, int voices)
457 if (ypcm->voices[1] != NULL && voices < 2) {
458 snd_ymfpci_voice_free(ypcm->chip, ypcm->voices[1]);
459 ypcm->voices[1] = NULL;
461 if (voices == 1 && ypcm->voices[0] != NULL)
462 return 0; /* already allocated */
463 if (voices == 2 && ypcm->voices[0] != NULL && ypcm->voices[1] != NULL)
464 return 0; /* already allocated */
466 if (ypcm->voices[0] != NULL && ypcm->voices[1] == NULL) {
467 snd_ymfpci_voice_free(ypcm->chip, ypcm->voices[0]);
468 ypcm->voices[0] = NULL;
471 err = snd_ymfpci_voice_alloc(ypcm->chip, YMFPCI_PCM, voices > 1, &ypcm->voices[0]);
474 ypcm->voices[0]->ypcm = ypcm;
475 ypcm->voices[0]->interrupt = snd_ymfpci_pcm_interrupt;
477 ypcm->voices[1] = &ypcm->chip->voices[ypcm->voices[0]->number + 1];
478 ypcm->voices[1]->ypcm = ypcm;
483 static void snd_ymfpci_pcm_init_voice(struct snd_ymfpci_pcm *ypcm, unsigned int voiceidx,
484 struct snd_pcm_runtime *runtime,
487 struct snd_ymfpci_voice *voice = ypcm->voices[voiceidx];
489 u32 delta = snd_ymfpci_calc_delta(runtime->rate);
490 u32 lpfQ = snd_ymfpci_calc_lpfQ(runtime->rate);
491 u32 lpfK = snd_ymfpci_calc_lpfK(runtime->rate);
492 struct snd_ymfpci_playback_bank *bank;
494 __le32 vol_left, vol_right;
495 u8 use_left, use_right;
498 if (snd_BUG_ON(!voice))
500 if (runtime->channels == 1) {
504 use_left = (voiceidx & 1) == 0;
505 use_right = !use_left;
507 if (has_pcm_volume) {
508 vol_left = cpu_to_le32(ypcm->chip->pcm_mixer
509 [ypcm->substream->number].left << 15);
510 vol_right = cpu_to_le32(ypcm->chip->pcm_mixer
511 [ypcm->substream->number].right << 15);
513 vol_left = cpu_to_le32(0x40000000);
514 vol_right = cpu_to_le32(0x40000000);
516 spin_lock_irqsave(&ypcm->chip->voice_lock, flags);
517 format = runtime->channels == 2 ? 0x00010000 : 0;
518 if (snd_pcm_format_width(runtime->format) == 8)
519 format |= 0x80000000;
520 else if (ypcm->chip->device_id == PCI_DEVICE_ID_YAMAHA_754 &&
521 runtime->rate == 44100 && runtime->channels == 2 &&
522 voiceidx == 0 && (ypcm->chip->src441_used == -1 ||
523 ypcm->chip->src441_used == voice->number)) {
524 ypcm->chip->src441_used = voice->number;
525 ypcm->use_441_slot = 1;
526 format |= 0x10000000;
528 if (ypcm->chip->src441_used == voice->number &&
529 (format & 0x10000000) == 0) {
530 ypcm->chip->src441_used = -1;
531 ypcm->use_441_slot = 0;
533 if (runtime->channels == 2 && (voiceidx & 1) != 0)
535 spin_unlock_irqrestore(&ypcm->chip->voice_lock, flags);
536 for (nbank = 0; nbank < 2; nbank++) {
537 bank = &voice->bank[nbank];
538 memset(bank, 0, sizeof(*bank));
539 bank->format = cpu_to_le32(format);
540 bank->base = cpu_to_le32(runtime->dma_addr);
541 bank->loop_end = cpu_to_le32(ypcm->buffer_size);
542 bank->lpfQ = cpu_to_le32(lpfQ);
544 bank->delta_end = cpu_to_le32(delta);
546 bank->lpfK_end = cpu_to_le32(lpfK);
548 bank->eg_gain_end = cpu_to_le32(0x40000000);
550 if (ypcm->output_front) {
553 bank->left_gain_end = vol_left;
557 bank->right_gain_end = vol_right;
560 if (ypcm->output_rear) {
561 if (!ypcm->swap_rear) {
564 bank->eff2_gain_end = vol_left;
568 bank->eff3_gain_end = vol_right;
571 /* The SPDIF out channels seem to be swapped, so we have
572 * to swap them here, too. The rear analog out channels
573 * will be wrong, but otherwise AC3 would not work.
577 bank->eff3_gain_end = vol_left;
581 bank->eff2_gain_end = vol_right;
588 static int snd_ymfpci_ac3_init(struct snd_ymfpci *chip)
590 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci),
591 4096, &chip->ac3_tmp_base) < 0)
594 chip->bank_effect[3][0]->base =
595 chip->bank_effect[3][1]->base = cpu_to_le32(chip->ac3_tmp_base.addr);
596 chip->bank_effect[3][0]->loop_end =
597 chip->bank_effect[3][1]->loop_end = cpu_to_le32(1024);
598 chip->bank_effect[4][0]->base =
599 chip->bank_effect[4][1]->base = cpu_to_le32(chip->ac3_tmp_base.addr + 2048);
600 chip->bank_effect[4][0]->loop_end =
601 chip->bank_effect[4][1]->loop_end = cpu_to_le32(1024);
603 spin_lock_irq(&chip->reg_lock);
604 snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT,
605 snd_ymfpci_readl(chip, YDSXGR_MAPOFEFFECT) | 3 << 3);
606 spin_unlock_irq(&chip->reg_lock);
610 static int snd_ymfpci_ac3_done(struct snd_ymfpci *chip)
612 spin_lock_irq(&chip->reg_lock);
613 snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT,
614 snd_ymfpci_readl(chip, YDSXGR_MAPOFEFFECT) & ~(3 << 3));
615 spin_unlock_irq(&chip->reg_lock);
616 // snd_ymfpci_irq_wait(chip);
617 if (chip->ac3_tmp_base.area) {
618 snd_dma_free_pages(&chip->ac3_tmp_base);
619 chip->ac3_tmp_base.area = NULL;
624 static int snd_ymfpci_playback_hw_params(struct snd_pcm_substream *substream,
625 struct snd_pcm_hw_params *hw_params)
627 struct snd_pcm_runtime *runtime = substream->runtime;
628 struct snd_ymfpci_pcm *ypcm = runtime->private_data;
631 if ((err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params))) < 0)
633 if ((err = snd_ymfpci_pcm_voice_alloc(ypcm, params_channels(hw_params))) < 0)
638 static int snd_ymfpci_playback_hw_free(struct snd_pcm_substream *substream)
640 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
641 struct snd_pcm_runtime *runtime = substream->runtime;
642 struct snd_ymfpci_pcm *ypcm;
644 if (runtime->private_data == NULL)
646 ypcm = runtime->private_data;
648 /* wait, until the PCI operations are not finished */
649 snd_ymfpci_irq_wait(chip);
650 snd_pcm_lib_free_pages(substream);
651 if (ypcm->voices[1]) {
652 snd_ymfpci_voice_free(chip, ypcm->voices[1]);
653 ypcm->voices[1] = NULL;
655 if (ypcm->voices[0]) {
656 snd_ymfpci_voice_free(chip, ypcm->voices[0]);
657 ypcm->voices[0] = NULL;
662 static int snd_ymfpci_playback_prepare(struct snd_pcm_substream *substream)
664 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
665 struct snd_pcm_runtime *runtime = substream->runtime;
666 struct snd_ymfpci_pcm *ypcm = runtime->private_data;
667 struct snd_kcontrol *kctl;
670 ypcm->period_size = runtime->period_size;
671 ypcm->buffer_size = runtime->buffer_size;
672 ypcm->period_pos = 0;
674 for (nvoice = 0; nvoice < runtime->channels; nvoice++)
675 snd_ymfpci_pcm_init_voice(ypcm, nvoice, runtime,
676 substream->pcm == chip->pcm);
678 if (substream->pcm == chip->pcm && !ypcm->use_441_slot) {
679 kctl = chip->pcm_mixer[substream->number].ctl;
680 kctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
681 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_INFO, &kctl->id);
686 static int snd_ymfpci_capture_hw_params(struct snd_pcm_substream *substream,
687 struct snd_pcm_hw_params *hw_params)
689 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
692 static int snd_ymfpci_capture_hw_free(struct snd_pcm_substream *substream)
694 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
696 /* wait, until the PCI operations are not finished */
697 snd_ymfpci_irq_wait(chip);
698 return snd_pcm_lib_free_pages(substream);
701 static int snd_ymfpci_capture_prepare(struct snd_pcm_substream *substream)
703 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
704 struct snd_pcm_runtime *runtime = substream->runtime;
705 struct snd_ymfpci_pcm *ypcm = runtime->private_data;
706 struct snd_ymfpci_capture_bank * bank;
710 ypcm->period_size = runtime->period_size;
711 ypcm->buffer_size = runtime->buffer_size;
712 ypcm->period_pos = 0;
715 rate = ((48000 * 4096) / runtime->rate) - 1;
717 if (runtime->channels == 2) {
721 if (snd_pcm_format_width(runtime->format) == 8)
725 switch (ypcm->capture_bank_number) {
727 snd_ymfpci_writel(chip, YDSXGR_RECFORMAT, format);
728 snd_ymfpci_writel(chip, YDSXGR_RECSLOTSR, rate);
731 snd_ymfpci_writel(chip, YDSXGR_ADCFORMAT, format);
732 snd_ymfpci_writel(chip, YDSXGR_ADCSLOTSR, rate);
735 for (nbank = 0; nbank < 2; nbank++) {
736 bank = chip->bank_capture[ypcm->capture_bank_number][nbank];
737 bank->base = cpu_to_le32(runtime->dma_addr);
738 bank->loop_end = cpu_to_le32(ypcm->buffer_size << ypcm->shift);
740 bank->num_of_loops = 0;
745 static snd_pcm_uframes_t snd_ymfpci_playback_pointer(struct snd_pcm_substream *substream)
747 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
748 struct snd_pcm_runtime *runtime = substream->runtime;
749 struct snd_ymfpci_pcm *ypcm = runtime->private_data;
750 struct snd_ymfpci_voice *voice = ypcm->voices[0];
752 if (!(ypcm->running && voice))
754 return le32_to_cpu(voice->bank[chip->active_bank].start);
757 static snd_pcm_uframes_t snd_ymfpci_capture_pointer(struct snd_pcm_substream *substream)
759 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
760 struct snd_pcm_runtime *runtime = substream->runtime;
761 struct snd_ymfpci_pcm *ypcm = runtime->private_data;
765 return le32_to_cpu(chip->bank_capture[ypcm->capture_bank_number][chip->active_bank]->start) >> ypcm->shift;
768 static void snd_ymfpci_irq_wait(struct snd_ymfpci *chip)
770 wait_queue_entry_t wait;
773 while (loops-- > 0) {
774 if ((snd_ymfpci_readl(chip, YDSXGR_MODE) & 3) == 0)
776 init_waitqueue_entry(&wait, current);
777 add_wait_queue(&chip->interrupt_sleep, &wait);
778 atomic_inc(&chip->interrupt_sleep_count);
779 schedule_timeout_uninterruptible(msecs_to_jiffies(50));
780 remove_wait_queue(&chip->interrupt_sleep, &wait);
784 static irqreturn_t snd_ymfpci_interrupt(int irq, void *dev_id)
786 struct snd_ymfpci *chip = dev_id;
787 u32 status, nvoice, mode;
788 struct snd_ymfpci_voice *voice;
790 status = snd_ymfpci_readl(chip, YDSXGR_STATUS);
791 if (status & 0x80000000) {
792 chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT) & 1;
793 spin_lock(&chip->voice_lock);
794 for (nvoice = 0; nvoice < YDSXG_PLAYBACK_VOICES; nvoice++) {
795 voice = &chip->voices[nvoice];
796 if (voice->interrupt)
797 voice->interrupt(chip, voice);
799 for (nvoice = 0; nvoice < YDSXG_CAPTURE_VOICES; nvoice++) {
800 if (chip->capture_substream[nvoice])
801 snd_ymfpci_pcm_capture_interrupt(chip->capture_substream[nvoice]);
804 for (nvoice = 0; nvoice < YDSXG_EFFECT_VOICES; nvoice++) {
805 if (chip->effect_substream[nvoice])
806 snd_ymfpci_pcm_effect_interrupt(chip->effect_substream[nvoice]);
809 spin_unlock(&chip->voice_lock);
810 spin_lock(&chip->reg_lock);
811 snd_ymfpci_writel(chip, YDSXGR_STATUS, 0x80000000);
812 mode = snd_ymfpci_readl(chip, YDSXGR_MODE) | 2;
813 snd_ymfpci_writel(chip, YDSXGR_MODE, mode);
814 spin_unlock(&chip->reg_lock);
816 if (atomic_read(&chip->interrupt_sleep_count)) {
817 atomic_set(&chip->interrupt_sleep_count, 0);
818 wake_up(&chip->interrupt_sleep);
822 status = snd_ymfpci_readw(chip, YDSXGR_INTFLAG);
825 snd_timer_interrupt(chip->timer, chip->timer_ticks);
827 snd_ymfpci_writew(chip, YDSXGR_INTFLAG, status);
830 snd_mpu401_uart_interrupt(irq, chip->rawmidi->private_data);
834 static const struct snd_pcm_hardware snd_ymfpci_playback =
836 .info = (SNDRV_PCM_INFO_MMAP |
837 SNDRV_PCM_INFO_MMAP_VALID |
838 SNDRV_PCM_INFO_INTERLEAVED |
839 SNDRV_PCM_INFO_BLOCK_TRANSFER |
840 SNDRV_PCM_INFO_PAUSE |
841 SNDRV_PCM_INFO_RESUME),
842 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
843 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
848 .buffer_bytes_max = 256 * 1024, /* FIXME: enough? */
849 .period_bytes_min = 64,
850 .period_bytes_max = 256 * 1024, /* FIXME: enough? */
856 static const struct snd_pcm_hardware snd_ymfpci_capture =
858 .info = (SNDRV_PCM_INFO_MMAP |
859 SNDRV_PCM_INFO_MMAP_VALID |
860 SNDRV_PCM_INFO_INTERLEAVED |
861 SNDRV_PCM_INFO_BLOCK_TRANSFER |
862 SNDRV_PCM_INFO_PAUSE |
863 SNDRV_PCM_INFO_RESUME),
864 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
865 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
870 .buffer_bytes_max = 256 * 1024, /* FIXME: enough? */
871 .period_bytes_min = 64,
872 .period_bytes_max = 256 * 1024, /* FIXME: enough? */
878 static void snd_ymfpci_pcm_free_substream(struct snd_pcm_runtime *runtime)
880 kfree(runtime->private_data);
883 static int snd_ymfpci_playback_open_1(struct snd_pcm_substream *substream)
885 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
886 struct snd_pcm_runtime *runtime = substream->runtime;
887 struct snd_ymfpci_pcm *ypcm;
890 runtime->hw = snd_ymfpci_playback;
891 /* FIXME? True value is 256/48 = 5.33333 ms */
892 err = snd_pcm_hw_constraint_minmax(runtime,
893 SNDRV_PCM_HW_PARAM_PERIOD_TIME,
897 err = snd_pcm_hw_rule_noresample(runtime, 48000);
901 ypcm = kzalloc(sizeof(*ypcm), GFP_KERNEL);
905 ypcm->type = PLAYBACK_VOICE;
906 ypcm->substream = substream;
907 runtime->private_data = ypcm;
908 runtime->private_free = snd_ymfpci_pcm_free_substream;
912 /* call with spinlock held */
913 static void ymfpci_open_extension(struct snd_ymfpci *chip)
915 if (! chip->rear_opened) {
916 if (! chip->spdif_opened) /* set AC3 */
917 snd_ymfpci_writel(chip, YDSXGR_MODE,
918 snd_ymfpci_readl(chip, YDSXGR_MODE) | (1 << 30));
919 /* enable second codec (4CHEN) */
920 snd_ymfpci_writew(chip, YDSXGR_SECCONFIG,
921 (snd_ymfpci_readw(chip, YDSXGR_SECCONFIG) & ~0x0330) | 0x0010);
925 /* call with spinlock held */
926 static void ymfpci_close_extension(struct snd_ymfpci *chip)
928 if (! chip->rear_opened) {
929 if (! chip->spdif_opened)
930 snd_ymfpci_writel(chip, YDSXGR_MODE,
931 snd_ymfpci_readl(chip, YDSXGR_MODE) & ~(1 << 30));
932 snd_ymfpci_writew(chip, YDSXGR_SECCONFIG,
933 (snd_ymfpci_readw(chip, YDSXGR_SECCONFIG) & ~0x0330) & ~0x0010);
937 static int snd_ymfpci_playback_open(struct snd_pcm_substream *substream)
939 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
940 struct snd_pcm_runtime *runtime = substream->runtime;
941 struct snd_ymfpci_pcm *ypcm;
944 if ((err = snd_ymfpci_playback_open_1(substream)) < 0)
946 ypcm = runtime->private_data;
947 ypcm->output_front = 1;
948 ypcm->output_rear = chip->mode_dup4ch ? 1 : 0;
950 spin_lock_irq(&chip->reg_lock);
951 if (ypcm->output_rear) {
952 ymfpci_open_extension(chip);
955 spin_unlock_irq(&chip->reg_lock);
959 static int snd_ymfpci_playback_spdif_open(struct snd_pcm_substream *substream)
961 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
962 struct snd_pcm_runtime *runtime = substream->runtime;
963 struct snd_ymfpci_pcm *ypcm;
966 if ((err = snd_ymfpci_playback_open_1(substream)) < 0)
968 ypcm = runtime->private_data;
969 ypcm->output_front = 0;
970 ypcm->output_rear = 1;
972 spin_lock_irq(&chip->reg_lock);
973 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL,
974 snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) | 2);
975 ymfpci_open_extension(chip);
976 chip->spdif_pcm_bits = chip->spdif_bits;
977 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_pcm_bits);
978 chip->spdif_opened++;
979 spin_unlock_irq(&chip->reg_lock);
981 chip->spdif_pcm_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
982 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE |
983 SNDRV_CTL_EVENT_MASK_INFO, &chip->spdif_pcm_ctl->id);
987 static int snd_ymfpci_playback_4ch_open(struct snd_pcm_substream *substream)
989 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
990 struct snd_pcm_runtime *runtime = substream->runtime;
991 struct snd_ymfpci_pcm *ypcm;
994 if ((err = snd_ymfpci_playback_open_1(substream)) < 0)
996 ypcm = runtime->private_data;
997 ypcm->output_front = 0;
998 ypcm->output_rear = 1;
1000 spin_lock_irq(&chip->reg_lock);
1001 ymfpci_open_extension(chip);
1002 chip->rear_opened++;
1003 spin_unlock_irq(&chip->reg_lock);
1007 static int snd_ymfpci_capture_open(struct snd_pcm_substream *substream,
1008 u32 capture_bank_number)
1010 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
1011 struct snd_pcm_runtime *runtime = substream->runtime;
1012 struct snd_ymfpci_pcm *ypcm;
1015 runtime->hw = snd_ymfpci_capture;
1016 /* FIXME? True value is 256/48 = 5.33333 ms */
1017 err = snd_pcm_hw_constraint_minmax(runtime,
1018 SNDRV_PCM_HW_PARAM_PERIOD_TIME,
1022 err = snd_pcm_hw_rule_noresample(runtime, 48000);
1026 ypcm = kzalloc(sizeof(*ypcm), GFP_KERNEL);
1030 ypcm->type = capture_bank_number + CAPTURE_REC;
1031 ypcm->substream = substream;
1032 ypcm->capture_bank_number = capture_bank_number;
1033 chip->capture_substream[capture_bank_number] = substream;
1034 runtime->private_data = ypcm;
1035 runtime->private_free = snd_ymfpci_pcm_free_substream;
1036 snd_ymfpci_hw_start(chip);
1040 static int snd_ymfpci_capture_rec_open(struct snd_pcm_substream *substream)
1042 return snd_ymfpci_capture_open(substream, 0);
1045 static int snd_ymfpci_capture_ac97_open(struct snd_pcm_substream *substream)
1047 return snd_ymfpci_capture_open(substream, 1);
1050 static int snd_ymfpci_playback_close_1(struct snd_pcm_substream *substream)
1055 static int snd_ymfpci_playback_close(struct snd_pcm_substream *substream)
1057 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
1058 struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data;
1060 spin_lock_irq(&chip->reg_lock);
1061 if (ypcm->output_rear && chip->rear_opened > 0) {
1062 chip->rear_opened--;
1063 ymfpci_close_extension(chip);
1065 spin_unlock_irq(&chip->reg_lock);
1066 return snd_ymfpci_playback_close_1(substream);
1069 static int snd_ymfpci_playback_spdif_close(struct snd_pcm_substream *substream)
1071 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
1073 spin_lock_irq(&chip->reg_lock);
1074 chip->spdif_opened = 0;
1075 ymfpci_close_extension(chip);
1076 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL,
1077 snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & ~2);
1078 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits);
1079 spin_unlock_irq(&chip->reg_lock);
1080 chip->spdif_pcm_ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
1081 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE |
1082 SNDRV_CTL_EVENT_MASK_INFO, &chip->spdif_pcm_ctl->id);
1083 return snd_ymfpci_playback_close_1(substream);
1086 static int snd_ymfpci_playback_4ch_close(struct snd_pcm_substream *substream)
1088 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
1090 spin_lock_irq(&chip->reg_lock);
1091 if (chip->rear_opened > 0) {
1092 chip->rear_opened--;
1093 ymfpci_close_extension(chip);
1095 spin_unlock_irq(&chip->reg_lock);
1096 return snd_ymfpci_playback_close_1(substream);
1099 static int snd_ymfpci_capture_close(struct snd_pcm_substream *substream)
1101 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
1102 struct snd_pcm_runtime *runtime = substream->runtime;
1103 struct snd_ymfpci_pcm *ypcm = runtime->private_data;
1106 chip->capture_substream[ypcm->capture_bank_number] = NULL;
1107 snd_ymfpci_hw_stop(chip);
1112 static const struct snd_pcm_ops snd_ymfpci_playback_ops = {
1113 .open = snd_ymfpci_playback_open,
1114 .close = snd_ymfpci_playback_close,
1115 .ioctl = snd_pcm_lib_ioctl,
1116 .hw_params = snd_ymfpci_playback_hw_params,
1117 .hw_free = snd_ymfpci_playback_hw_free,
1118 .prepare = snd_ymfpci_playback_prepare,
1119 .trigger = snd_ymfpci_playback_trigger,
1120 .pointer = snd_ymfpci_playback_pointer,
1123 static const struct snd_pcm_ops snd_ymfpci_capture_rec_ops = {
1124 .open = snd_ymfpci_capture_rec_open,
1125 .close = snd_ymfpci_capture_close,
1126 .ioctl = snd_pcm_lib_ioctl,
1127 .hw_params = snd_ymfpci_capture_hw_params,
1128 .hw_free = snd_ymfpci_capture_hw_free,
1129 .prepare = snd_ymfpci_capture_prepare,
1130 .trigger = snd_ymfpci_capture_trigger,
1131 .pointer = snd_ymfpci_capture_pointer,
1134 int snd_ymfpci_pcm(struct snd_ymfpci *chip, int device)
1136 struct snd_pcm *pcm;
1139 if ((err = snd_pcm_new(chip->card, "YMFPCI", device, 32, 1, &pcm)) < 0)
1141 pcm->private_data = chip;
1143 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_ops);
1144 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ymfpci_capture_rec_ops);
1147 pcm->info_flags = 0;
1148 strcpy(pcm->name, "YMFPCI");
1151 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1152 snd_dma_pci_data(chip->pci), 64*1024, 256*1024);
1154 return snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK,
1155 snd_pcm_std_chmaps, 2, 0, NULL);
1158 static const struct snd_pcm_ops snd_ymfpci_capture_ac97_ops = {
1159 .open = snd_ymfpci_capture_ac97_open,
1160 .close = snd_ymfpci_capture_close,
1161 .ioctl = snd_pcm_lib_ioctl,
1162 .hw_params = snd_ymfpci_capture_hw_params,
1163 .hw_free = snd_ymfpci_capture_hw_free,
1164 .prepare = snd_ymfpci_capture_prepare,
1165 .trigger = snd_ymfpci_capture_trigger,
1166 .pointer = snd_ymfpci_capture_pointer,
1169 int snd_ymfpci_pcm2(struct snd_ymfpci *chip, int device)
1171 struct snd_pcm *pcm;
1174 if ((err = snd_pcm_new(chip->card, "YMFPCI - PCM2", device, 0, 1, &pcm)) < 0)
1176 pcm->private_data = chip;
1178 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ymfpci_capture_ac97_ops);
1181 pcm->info_flags = 0;
1182 sprintf(pcm->name, "YMFPCI - %s",
1183 chip->device_id == PCI_DEVICE_ID_YAMAHA_754 ? "Direct Recording" : "AC'97");
1186 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1187 snd_dma_pci_data(chip->pci), 64*1024, 256*1024);
1192 static const struct snd_pcm_ops snd_ymfpci_playback_spdif_ops = {
1193 .open = snd_ymfpci_playback_spdif_open,
1194 .close = snd_ymfpci_playback_spdif_close,
1195 .ioctl = snd_pcm_lib_ioctl,
1196 .hw_params = snd_ymfpci_playback_hw_params,
1197 .hw_free = snd_ymfpci_playback_hw_free,
1198 .prepare = snd_ymfpci_playback_prepare,
1199 .trigger = snd_ymfpci_playback_trigger,
1200 .pointer = snd_ymfpci_playback_pointer,
1203 int snd_ymfpci_pcm_spdif(struct snd_ymfpci *chip, int device)
1205 struct snd_pcm *pcm;
1208 if ((err = snd_pcm_new(chip->card, "YMFPCI - IEC958", device, 1, 0, &pcm)) < 0)
1210 pcm->private_data = chip;
1212 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_spdif_ops);
1215 pcm->info_flags = 0;
1216 strcpy(pcm->name, "YMFPCI - IEC958");
1217 chip->pcm_spdif = pcm;
1219 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1220 snd_dma_pci_data(chip->pci), 64*1024, 256*1024);
1225 static const struct snd_pcm_ops snd_ymfpci_playback_4ch_ops = {
1226 .open = snd_ymfpci_playback_4ch_open,
1227 .close = snd_ymfpci_playback_4ch_close,
1228 .ioctl = snd_pcm_lib_ioctl,
1229 .hw_params = snd_ymfpci_playback_hw_params,
1230 .hw_free = snd_ymfpci_playback_hw_free,
1231 .prepare = snd_ymfpci_playback_prepare,
1232 .trigger = snd_ymfpci_playback_trigger,
1233 .pointer = snd_ymfpci_playback_pointer,
1236 static const struct snd_pcm_chmap_elem surround_map[] = {
1238 .map = { SNDRV_CHMAP_MONO } },
1240 .map = { SNDRV_CHMAP_RL, SNDRV_CHMAP_RR } },
1244 int snd_ymfpci_pcm_4ch(struct snd_ymfpci *chip, int device)
1246 struct snd_pcm *pcm;
1249 if ((err = snd_pcm_new(chip->card, "YMFPCI - Rear", device, 1, 0, &pcm)) < 0)
1251 pcm->private_data = chip;
1253 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_4ch_ops);
1256 pcm->info_flags = 0;
1257 strcpy(pcm->name, "YMFPCI - Rear PCM");
1258 chip->pcm_4ch = pcm;
1260 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1261 snd_dma_pci_data(chip->pci), 64*1024, 256*1024);
1263 return snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK,
1264 surround_map, 2, 0, NULL);
1267 static int snd_ymfpci_spdif_default_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1269 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1274 static int snd_ymfpci_spdif_default_get(struct snd_kcontrol *kcontrol,
1275 struct snd_ctl_elem_value *ucontrol)
1277 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1279 spin_lock_irq(&chip->reg_lock);
1280 ucontrol->value.iec958.status[0] = (chip->spdif_bits >> 0) & 0xff;
1281 ucontrol->value.iec958.status[1] = (chip->spdif_bits >> 8) & 0xff;
1282 ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS_48000;
1283 spin_unlock_irq(&chip->reg_lock);
1287 static int snd_ymfpci_spdif_default_put(struct snd_kcontrol *kcontrol,
1288 struct snd_ctl_elem_value *ucontrol)
1290 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1294 val = ((ucontrol->value.iec958.status[0] & 0x3e) << 0) |
1295 (ucontrol->value.iec958.status[1] << 8);
1296 spin_lock_irq(&chip->reg_lock);
1297 change = chip->spdif_bits != val;
1298 chip->spdif_bits = val;
1299 if ((snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & 1) && chip->pcm_spdif == NULL)
1300 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits);
1301 spin_unlock_irq(&chip->reg_lock);
1305 static const struct snd_kcontrol_new snd_ymfpci_spdif_default =
1307 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1308 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
1309 .info = snd_ymfpci_spdif_default_info,
1310 .get = snd_ymfpci_spdif_default_get,
1311 .put = snd_ymfpci_spdif_default_put
1314 static int snd_ymfpci_spdif_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1316 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1321 static int snd_ymfpci_spdif_mask_get(struct snd_kcontrol *kcontrol,
1322 struct snd_ctl_elem_value *ucontrol)
1324 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1326 spin_lock_irq(&chip->reg_lock);
1327 ucontrol->value.iec958.status[0] = 0x3e;
1328 ucontrol->value.iec958.status[1] = 0xff;
1329 spin_unlock_irq(&chip->reg_lock);
1333 static const struct snd_kcontrol_new snd_ymfpci_spdif_mask =
1335 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1336 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1337 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK),
1338 .info = snd_ymfpci_spdif_mask_info,
1339 .get = snd_ymfpci_spdif_mask_get,
1342 static int snd_ymfpci_spdif_stream_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1344 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1349 static int snd_ymfpci_spdif_stream_get(struct snd_kcontrol *kcontrol,
1350 struct snd_ctl_elem_value *ucontrol)
1352 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1354 spin_lock_irq(&chip->reg_lock);
1355 ucontrol->value.iec958.status[0] = (chip->spdif_pcm_bits >> 0) & 0xff;
1356 ucontrol->value.iec958.status[1] = (chip->spdif_pcm_bits >> 8) & 0xff;
1357 ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS_48000;
1358 spin_unlock_irq(&chip->reg_lock);
1362 static int snd_ymfpci_spdif_stream_put(struct snd_kcontrol *kcontrol,
1363 struct snd_ctl_elem_value *ucontrol)
1365 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1369 val = ((ucontrol->value.iec958.status[0] & 0x3e) << 0) |
1370 (ucontrol->value.iec958.status[1] << 8);
1371 spin_lock_irq(&chip->reg_lock);
1372 change = chip->spdif_pcm_bits != val;
1373 chip->spdif_pcm_bits = val;
1374 if ((snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & 2))
1375 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_pcm_bits);
1376 spin_unlock_irq(&chip->reg_lock);
1380 static const struct snd_kcontrol_new snd_ymfpci_spdif_stream =
1382 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE,
1383 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1384 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM),
1385 .info = snd_ymfpci_spdif_stream_info,
1386 .get = snd_ymfpci_spdif_stream_get,
1387 .put = snd_ymfpci_spdif_stream_put
1390 static int snd_ymfpci_drec_source_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *info)
1392 static const char *const texts[3] = {"AC'97", "IEC958", "ZV Port"};
1394 return snd_ctl_enum_info(info, 1, 3, texts);
1397 static int snd_ymfpci_drec_source_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *value)
1399 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1402 spin_lock_irq(&chip->reg_lock);
1403 reg = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
1404 spin_unlock_irq(&chip->reg_lock);
1406 value->value.enumerated.item[0] = 0;
1408 value->value.enumerated.item[0] = 1 + ((reg & 0x200) != 0);
1412 static int snd_ymfpci_drec_source_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *value)
1414 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1417 spin_lock_irq(&chip->reg_lock);
1418 old_reg = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
1419 if (value->value.enumerated.item[0] == 0)
1420 reg = old_reg & ~0x100;
1422 reg = (old_reg & ~0x300) | 0x100 | ((value->value.enumerated.item[0] == 2) << 9);
1423 snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, reg);
1424 spin_unlock_irq(&chip->reg_lock);
1425 return reg != old_reg;
1428 static const struct snd_kcontrol_new snd_ymfpci_drec_source = {
1429 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
1430 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1431 .name = "Direct Recording Source",
1432 .info = snd_ymfpci_drec_source_info,
1433 .get = snd_ymfpci_drec_source_get,
1434 .put = snd_ymfpci_drec_source_put
1441 #define YMFPCI_SINGLE(xname, xindex, reg, shift) \
1442 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1443 .info = snd_ymfpci_info_single, \
1444 .get = snd_ymfpci_get_single, .put = snd_ymfpci_put_single, \
1445 .private_value = ((reg) | ((shift) << 16)) }
1447 #define snd_ymfpci_info_single snd_ctl_boolean_mono_info
1449 static int snd_ymfpci_get_single(struct snd_kcontrol *kcontrol,
1450 struct snd_ctl_elem_value *ucontrol)
1452 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1453 int reg = kcontrol->private_value & 0xffff;
1454 unsigned int shift = (kcontrol->private_value >> 16) & 0xff;
1455 unsigned int mask = 1;
1458 case YDSXGR_SPDIFOUTCTRL: break;
1459 case YDSXGR_SPDIFINCTRL: break;
1460 default: return -EINVAL;
1462 ucontrol->value.integer.value[0] =
1463 (snd_ymfpci_readl(chip, reg) >> shift) & mask;
1467 static int snd_ymfpci_put_single(struct snd_kcontrol *kcontrol,
1468 struct snd_ctl_elem_value *ucontrol)
1470 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1471 int reg = kcontrol->private_value & 0xffff;
1472 unsigned int shift = (kcontrol->private_value >> 16) & 0xff;
1473 unsigned int mask = 1;
1475 unsigned int val, oval;
1478 case YDSXGR_SPDIFOUTCTRL: break;
1479 case YDSXGR_SPDIFINCTRL: break;
1480 default: return -EINVAL;
1482 val = (ucontrol->value.integer.value[0] & mask);
1484 spin_lock_irq(&chip->reg_lock);
1485 oval = snd_ymfpci_readl(chip, reg);
1486 val = (oval & ~(mask << shift)) | val;
1487 change = val != oval;
1488 snd_ymfpci_writel(chip, reg, val);
1489 spin_unlock_irq(&chip->reg_lock);
1493 static const DECLARE_TLV_DB_LINEAR(db_scale_native, TLV_DB_GAIN_MUTE, 0);
1495 #define YMFPCI_DOUBLE(xname, xindex, reg) \
1496 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1497 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ, \
1498 .info = snd_ymfpci_info_double, \
1499 .get = snd_ymfpci_get_double, .put = snd_ymfpci_put_double, \
1500 .private_value = reg, \
1501 .tlv = { .p = db_scale_native } }
1503 static int snd_ymfpci_info_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1505 unsigned int reg = kcontrol->private_value;
1507 if (reg < 0x80 || reg >= 0xc0)
1509 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1511 uinfo->value.integer.min = 0;
1512 uinfo->value.integer.max = 16383;
1516 static int snd_ymfpci_get_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1518 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1519 unsigned int reg = kcontrol->private_value;
1520 unsigned int shift_left = 0, shift_right = 16, mask = 16383;
1523 if (reg < 0x80 || reg >= 0xc0)
1525 spin_lock_irq(&chip->reg_lock);
1526 val = snd_ymfpci_readl(chip, reg);
1527 spin_unlock_irq(&chip->reg_lock);
1528 ucontrol->value.integer.value[0] = (val >> shift_left) & mask;
1529 ucontrol->value.integer.value[1] = (val >> shift_right) & mask;
1533 static int snd_ymfpci_put_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1535 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1536 unsigned int reg = kcontrol->private_value;
1537 unsigned int shift_left = 0, shift_right = 16, mask = 16383;
1539 unsigned int val1, val2, oval;
1541 if (reg < 0x80 || reg >= 0xc0)
1543 val1 = ucontrol->value.integer.value[0] & mask;
1544 val2 = ucontrol->value.integer.value[1] & mask;
1545 val1 <<= shift_left;
1546 val2 <<= shift_right;
1547 spin_lock_irq(&chip->reg_lock);
1548 oval = snd_ymfpci_readl(chip, reg);
1549 val1 = (oval & ~((mask << shift_left) | (mask << shift_right))) | val1 | val2;
1550 change = val1 != oval;
1551 snd_ymfpci_writel(chip, reg, val1);
1552 spin_unlock_irq(&chip->reg_lock);
1556 static int snd_ymfpci_put_nativedacvol(struct snd_kcontrol *kcontrol,
1557 struct snd_ctl_elem_value *ucontrol)
1559 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1560 unsigned int reg = YDSXGR_NATIVEDACOUTVOL;
1561 unsigned int reg2 = YDSXGR_BUF441OUTVOL;
1563 unsigned int value, oval;
1565 value = ucontrol->value.integer.value[0] & 0x3fff;
1566 value |= (ucontrol->value.integer.value[1] & 0x3fff) << 16;
1567 spin_lock_irq(&chip->reg_lock);
1568 oval = snd_ymfpci_readl(chip, reg);
1569 change = value != oval;
1570 snd_ymfpci_writel(chip, reg, value);
1571 snd_ymfpci_writel(chip, reg2, value);
1572 spin_unlock_irq(&chip->reg_lock);
1579 #define snd_ymfpci_info_dup4ch snd_ctl_boolean_mono_info
1581 static int snd_ymfpci_get_dup4ch(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1583 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1584 ucontrol->value.integer.value[0] = chip->mode_dup4ch;
1588 static int snd_ymfpci_put_dup4ch(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1590 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1592 change = (ucontrol->value.integer.value[0] != chip->mode_dup4ch);
1594 chip->mode_dup4ch = !!ucontrol->value.integer.value[0];
1598 static const struct snd_kcontrol_new snd_ymfpci_dup4ch = {
1599 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1600 .name = "4ch Duplication",
1601 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
1602 .info = snd_ymfpci_info_dup4ch,
1603 .get = snd_ymfpci_get_dup4ch,
1604 .put = snd_ymfpci_put_dup4ch,
1607 static struct snd_kcontrol_new snd_ymfpci_controls[] = {
1609 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1610 .name = "Wave Playback Volume",
1611 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE |
1612 SNDRV_CTL_ELEM_ACCESS_TLV_READ,
1613 .info = snd_ymfpci_info_double,
1614 .get = snd_ymfpci_get_double,
1615 .put = snd_ymfpci_put_nativedacvol,
1616 .private_value = YDSXGR_NATIVEDACOUTVOL,
1617 .tlv = { .p = db_scale_native },
1619 YMFPCI_DOUBLE("Wave Capture Volume", 0, YDSXGR_NATIVEDACLOOPVOL),
1620 YMFPCI_DOUBLE("Digital Capture Volume", 0, YDSXGR_NATIVEDACINVOL),
1621 YMFPCI_DOUBLE("Digital Capture Volume", 1, YDSXGR_NATIVEADCINVOL),
1622 YMFPCI_DOUBLE("ADC Playback Volume", 0, YDSXGR_PRIADCOUTVOL),
1623 YMFPCI_DOUBLE("ADC Capture Volume", 0, YDSXGR_PRIADCLOOPVOL),
1624 YMFPCI_DOUBLE("ADC Playback Volume", 1, YDSXGR_SECADCOUTVOL),
1625 YMFPCI_DOUBLE("ADC Capture Volume", 1, YDSXGR_SECADCLOOPVOL),
1626 YMFPCI_DOUBLE("FM Legacy Playback Volume", 0, YDSXGR_LEGACYOUTVOL),
1627 YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("AC97 ", PLAYBACK,VOLUME), 0, YDSXGR_ZVOUTVOL),
1628 YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("", CAPTURE,VOLUME), 0, YDSXGR_ZVLOOPVOL),
1629 YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("AC97 ",PLAYBACK,VOLUME), 1, YDSXGR_SPDIFOUTVOL),
1630 YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,VOLUME), 1, YDSXGR_SPDIFLOOPVOL),
1631 YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("",PLAYBACK,SWITCH), 0, YDSXGR_SPDIFOUTCTRL, 0),
1632 YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,SWITCH), 0, YDSXGR_SPDIFINCTRL, 0),
1633 YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("Loop",NONE,NONE), 0, YDSXGR_SPDIFINCTRL, 4),
1641 static int snd_ymfpci_get_gpio_out(struct snd_ymfpci *chip, int pin)
1644 unsigned long flags;
1646 spin_lock_irqsave(&chip->reg_lock, flags);
1647 reg = snd_ymfpci_readw(chip, YDSXGR_GPIOFUNCENABLE);
1648 reg &= ~(1 << (pin + 8));
1650 snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg);
1651 /* set the level mode for input line */
1652 mode = snd_ymfpci_readw(chip, YDSXGR_GPIOTYPECONFIG);
1653 mode &= ~(3 << (pin * 2));
1654 snd_ymfpci_writew(chip, YDSXGR_GPIOTYPECONFIG, mode);
1655 snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg | (1 << (pin + 8)));
1656 mode = snd_ymfpci_readw(chip, YDSXGR_GPIOINSTATUS);
1657 spin_unlock_irqrestore(&chip->reg_lock, flags);
1658 return (mode >> pin) & 1;
1661 static int snd_ymfpci_set_gpio_out(struct snd_ymfpci *chip, int pin, int enable)
1664 unsigned long flags;
1666 spin_lock_irqsave(&chip->reg_lock, flags);
1667 reg = snd_ymfpci_readw(chip, YDSXGR_GPIOFUNCENABLE);
1669 reg &= ~(1 << (pin + 8));
1670 snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg);
1671 snd_ymfpci_writew(chip, YDSXGR_GPIOOUTCTRL, enable << pin);
1672 snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg | (1 << (pin + 8)));
1673 spin_unlock_irqrestore(&chip->reg_lock, flags);
1678 #define snd_ymfpci_gpio_sw_info snd_ctl_boolean_mono_info
1680 static int snd_ymfpci_gpio_sw_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1682 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1683 int pin = (int)kcontrol->private_value;
1684 ucontrol->value.integer.value[0] = snd_ymfpci_get_gpio_out(chip, pin);
1688 static int snd_ymfpci_gpio_sw_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1690 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1691 int pin = (int)kcontrol->private_value;
1693 if (snd_ymfpci_get_gpio_out(chip, pin) != ucontrol->value.integer.value[0]) {
1694 snd_ymfpci_set_gpio_out(chip, pin, !!ucontrol->value.integer.value[0]);
1695 ucontrol->value.integer.value[0] = snd_ymfpci_get_gpio_out(chip, pin);
1701 static const struct snd_kcontrol_new snd_ymfpci_rear_shared = {
1702 .name = "Shared Rear/Line-In Switch",
1703 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1704 .info = snd_ymfpci_gpio_sw_info,
1705 .get = snd_ymfpci_gpio_sw_get,
1706 .put = snd_ymfpci_gpio_sw_put,
1714 static int snd_ymfpci_pcm_vol_info(struct snd_kcontrol *kcontrol,
1715 struct snd_ctl_elem_info *uinfo)
1717 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1719 uinfo->value.integer.min = 0;
1720 uinfo->value.integer.max = 0x8000;
1724 static int snd_ymfpci_pcm_vol_get(struct snd_kcontrol *kcontrol,
1725 struct snd_ctl_elem_value *ucontrol)
1727 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1728 unsigned int subs = kcontrol->id.subdevice;
1730 ucontrol->value.integer.value[0] = chip->pcm_mixer[subs].left;
1731 ucontrol->value.integer.value[1] = chip->pcm_mixer[subs].right;
1735 static int snd_ymfpci_pcm_vol_put(struct snd_kcontrol *kcontrol,
1736 struct snd_ctl_elem_value *ucontrol)
1738 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
1739 unsigned int subs = kcontrol->id.subdevice;
1740 struct snd_pcm_substream *substream;
1741 unsigned long flags;
1743 if (ucontrol->value.integer.value[0] != chip->pcm_mixer[subs].left ||
1744 ucontrol->value.integer.value[1] != chip->pcm_mixer[subs].right) {
1745 chip->pcm_mixer[subs].left = ucontrol->value.integer.value[0];
1746 chip->pcm_mixer[subs].right = ucontrol->value.integer.value[1];
1747 if (chip->pcm_mixer[subs].left > 0x8000)
1748 chip->pcm_mixer[subs].left = 0x8000;
1749 if (chip->pcm_mixer[subs].right > 0x8000)
1750 chip->pcm_mixer[subs].right = 0x8000;
1752 substream = (struct snd_pcm_substream *)kcontrol->private_value;
1753 spin_lock_irqsave(&chip->voice_lock, flags);
1754 if (substream->runtime && substream->runtime->private_data) {
1755 struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data;
1756 if (!ypcm->use_441_slot)
1757 ypcm->update_pcm_vol = 2;
1759 spin_unlock_irqrestore(&chip->voice_lock, flags);
1765 static const struct snd_kcontrol_new snd_ymfpci_pcm_volume = {
1766 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1767 .name = "PCM Playback Volume",
1768 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE |
1769 SNDRV_CTL_ELEM_ACCESS_INACTIVE,
1770 .info = snd_ymfpci_pcm_vol_info,
1771 .get = snd_ymfpci_pcm_vol_get,
1772 .put = snd_ymfpci_pcm_vol_put,
1780 static void snd_ymfpci_mixer_free_ac97_bus(struct snd_ac97_bus *bus)
1782 struct snd_ymfpci *chip = bus->private_data;
1783 chip->ac97_bus = NULL;
1786 static void snd_ymfpci_mixer_free_ac97(struct snd_ac97 *ac97)
1788 struct snd_ymfpci *chip = ac97->private_data;
1792 int snd_ymfpci_mixer(struct snd_ymfpci *chip, int rear_switch)
1794 struct snd_ac97_template ac97;
1795 struct snd_kcontrol *kctl;
1796 struct snd_pcm_substream *substream;
1799 static struct snd_ac97_bus_ops ops = {
1800 .write = snd_ymfpci_codec_write,
1801 .read = snd_ymfpci_codec_read,
1804 if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus)) < 0)
1806 chip->ac97_bus->private_free = snd_ymfpci_mixer_free_ac97_bus;
1807 chip->ac97_bus->no_vra = 1; /* YMFPCI doesn't need VRA */
1809 memset(&ac97, 0, sizeof(ac97));
1810 ac97.private_data = chip;
1811 ac97.private_free = snd_ymfpci_mixer_free_ac97;
1812 if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97)) < 0)
1816 snd_ac97_update_bits(chip->ac97, AC97_EXTENDED_STATUS,
1817 AC97_EA_VRA|AC97_EA_VRM, 0);
1819 for (idx = 0; idx < ARRAY_SIZE(snd_ymfpci_controls); idx++) {
1820 if ((err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_ymfpci_controls[idx], chip))) < 0)
1823 if (chip->ac97->ext_id & AC97_EI_SDAC) {
1824 kctl = snd_ctl_new1(&snd_ymfpci_dup4ch, chip);
1825 err = snd_ctl_add(chip->card, kctl);
1830 /* add S/PDIF control */
1831 if (snd_BUG_ON(!chip->pcm_spdif))
1833 if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_default, chip))) < 0)
1835 kctl->id.device = chip->pcm_spdif->device;
1836 if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_mask, chip))) < 0)
1838 kctl->id.device = chip->pcm_spdif->device;
1839 if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_stream, chip))) < 0)
1841 kctl->id.device = chip->pcm_spdif->device;
1842 chip->spdif_pcm_ctl = kctl;
1844 /* direct recording source */
1845 if (chip->device_id == PCI_DEVICE_ID_YAMAHA_754 &&
1846 (err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_drec_source, chip))) < 0)
1850 * shared rear/line-in
1853 if ((err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_ymfpci_rear_shared, chip))) < 0)
1857 /* per-voice volume */
1858 substream = chip->pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream;
1859 for (idx = 0; idx < 32; ++idx) {
1860 kctl = snd_ctl_new1(&snd_ymfpci_pcm_volume, chip);
1863 kctl->id.device = chip->pcm->device;
1864 kctl->id.subdevice = idx;
1865 kctl->private_value = (unsigned long)substream;
1866 if ((err = snd_ctl_add(chip->card, kctl)) < 0)
1868 chip->pcm_mixer[idx].left = 0x8000;
1869 chip->pcm_mixer[idx].right = 0x8000;
1870 chip->pcm_mixer[idx].ctl = kctl;
1871 substream = substream->next;
1882 static int snd_ymfpci_timer_start(struct snd_timer *timer)
1884 struct snd_ymfpci *chip;
1885 unsigned long flags;
1888 chip = snd_timer_chip(timer);
1889 spin_lock_irqsave(&chip->reg_lock, flags);
1890 if (timer->sticks > 1) {
1891 chip->timer_ticks = timer->sticks;
1892 count = timer->sticks - 1;
1895 * Divisor 1 is not allowed; fake it by using divisor 2 and
1896 * counting two ticks for each interrupt.
1898 chip->timer_ticks = 2;
1901 snd_ymfpci_writew(chip, YDSXGR_TIMERCOUNT, count);
1902 snd_ymfpci_writeb(chip, YDSXGR_TIMERCTRL, 0x03);
1903 spin_unlock_irqrestore(&chip->reg_lock, flags);
1907 static int snd_ymfpci_timer_stop(struct snd_timer *timer)
1909 struct snd_ymfpci *chip;
1910 unsigned long flags;
1912 chip = snd_timer_chip(timer);
1913 spin_lock_irqsave(&chip->reg_lock, flags);
1914 snd_ymfpci_writeb(chip, YDSXGR_TIMERCTRL, 0x00);
1915 spin_unlock_irqrestore(&chip->reg_lock, flags);
1919 static int snd_ymfpci_timer_precise_resolution(struct snd_timer *timer,
1920 unsigned long *num, unsigned long *den)
1927 static struct snd_timer_hardware snd_ymfpci_timer_hw = {
1928 .flags = SNDRV_TIMER_HW_AUTO,
1929 .resolution = 10417, /* 1 / 96 kHz = 10.41666...us */
1931 .start = snd_ymfpci_timer_start,
1932 .stop = snd_ymfpci_timer_stop,
1933 .precise_resolution = snd_ymfpci_timer_precise_resolution,
1936 int snd_ymfpci_timer(struct snd_ymfpci *chip, int device)
1938 struct snd_timer *timer = NULL;
1939 struct snd_timer_id tid;
1942 tid.dev_class = SNDRV_TIMER_CLASS_CARD;
1943 tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE;
1944 tid.card = chip->card->number;
1945 tid.device = device;
1947 if ((err = snd_timer_new(chip->card, "YMFPCI", &tid, &timer)) >= 0) {
1948 strcpy(timer->name, "YMFPCI timer");
1949 timer->private_data = chip;
1950 timer->hw = snd_ymfpci_timer_hw;
1952 chip->timer = timer;
1961 static void snd_ymfpci_proc_read(struct snd_info_entry *entry,
1962 struct snd_info_buffer *buffer)
1964 struct snd_ymfpci *chip = entry->private_data;
1967 snd_iprintf(buffer, "YMFPCI\n\n");
1968 for (i = 0; i <= YDSXGR_WORKBASE; i += 4)
1969 snd_iprintf(buffer, "%04x: %04x\n", i, snd_ymfpci_readl(chip, i));
1972 static int snd_ymfpci_proc_init(struct snd_card *card, struct snd_ymfpci *chip)
1974 return snd_card_ro_proc_new(card, "ymfpci", chip, snd_ymfpci_proc_read);
1978 * initialization routines
1981 static void snd_ymfpci_aclink_reset(struct pci_dev * pci)
1985 pci_read_config_byte(pci, PCIR_DSXG_CTRL, &cmd);
1986 #if 0 // force to reset
1989 pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd & 0xfc);
1990 pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd | 0x03);
1991 pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd & 0xfc);
1992 pci_write_config_word(pci, PCIR_DSXG_PWRCTRL1, 0);
1993 pci_write_config_word(pci, PCIR_DSXG_PWRCTRL2, 0);
1999 static void snd_ymfpci_enable_dsp(struct snd_ymfpci *chip)
2001 snd_ymfpci_writel(chip, YDSXGR_CONFIG, 0x00000001);
2004 static void snd_ymfpci_disable_dsp(struct snd_ymfpci *chip)
2009 val = snd_ymfpci_readl(chip, YDSXGR_CONFIG);
2011 snd_ymfpci_writel(chip, YDSXGR_CONFIG, 0x00000000);
2012 while (timeout-- > 0) {
2013 val = snd_ymfpci_readl(chip, YDSXGR_STATUS);
2014 if ((val & 0x00000002) == 0)
2019 static int snd_ymfpci_request_firmware(struct snd_ymfpci *chip)
2024 err = request_firmware(&chip->dsp_microcode, "yamaha/ds1_dsp.fw",
2027 if (chip->dsp_microcode->size != YDSXG_DSPLENGTH) {
2028 dev_err(chip->card->dev,
2029 "DSP microcode has wrong size\n");
2035 is_1e = chip->device_id == PCI_DEVICE_ID_YAMAHA_724F ||
2036 chip->device_id == PCI_DEVICE_ID_YAMAHA_740C ||
2037 chip->device_id == PCI_DEVICE_ID_YAMAHA_744 ||
2038 chip->device_id == PCI_DEVICE_ID_YAMAHA_754;
2039 name = is_1e ? "yamaha/ds1e_ctrl.fw" : "yamaha/ds1_ctrl.fw";
2040 err = request_firmware(&chip->controller_microcode, name,
2043 if (chip->controller_microcode->size != YDSXG_CTRLLENGTH) {
2044 dev_err(chip->card->dev,
2045 "controller microcode has wrong size\n");
2054 MODULE_FIRMWARE("yamaha/ds1_dsp.fw");
2055 MODULE_FIRMWARE("yamaha/ds1_ctrl.fw");
2056 MODULE_FIRMWARE("yamaha/ds1e_ctrl.fw");
2058 static void snd_ymfpci_download_image(struct snd_ymfpci *chip)
2064 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0x00000000);
2065 snd_ymfpci_disable_dsp(chip);
2066 snd_ymfpci_writel(chip, YDSXGR_MODE, 0x00010000);
2067 snd_ymfpci_writel(chip, YDSXGR_MODE, 0x00000000);
2068 snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, 0x00000000);
2069 snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT, 0x00000000);
2070 snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, 0x00000000);
2071 snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, 0x00000000);
2072 snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, 0x00000000);
2073 ctrl = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
2074 snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, ctrl & ~0x0007);
2076 /* setup DSP instruction code */
2077 inst = (const __le32 *)chip->dsp_microcode->data;
2078 for (i = 0; i < YDSXG_DSPLENGTH / 4; i++)
2079 snd_ymfpci_writel(chip, YDSXGR_DSPINSTRAM + (i << 2),
2080 le32_to_cpu(inst[i]));
2082 /* setup control instruction code */
2083 inst = (const __le32 *)chip->controller_microcode->data;
2084 for (i = 0; i < YDSXG_CTRLLENGTH / 4; i++)
2085 snd_ymfpci_writel(chip, YDSXGR_CTRLINSTRAM + (i << 2),
2086 le32_to_cpu(inst[i]));
2088 snd_ymfpci_enable_dsp(chip);
2091 static int snd_ymfpci_memalloc(struct snd_ymfpci *chip)
2093 long size, playback_ctrl_size;
2094 int voice, bank, reg;
2096 dma_addr_t ptr_addr;
2098 playback_ctrl_size = 4 + 4 * YDSXG_PLAYBACK_VOICES;
2099 chip->bank_size_playback = snd_ymfpci_readl(chip, YDSXGR_PLAYCTRLSIZE) << 2;
2100 chip->bank_size_capture = snd_ymfpci_readl(chip, YDSXGR_RECCTRLSIZE) << 2;
2101 chip->bank_size_effect = snd_ymfpci_readl(chip, YDSXGR_EFFCTRLSIZE) << 2;
2102 chip->work_size = YDSXG_DEFAULT_WORK_SIZE;
2104 size = ALIGN(playback_ctrl_size, 0x100) +
2105 ALIGN(chip->bank_size_playback * 2 * YDSXG_PLAYBACK_VOICES, 0x100) +
2106 ALIGN(chip->bank_size_capture * 2 * YDSXG_CAPTURE_VOICES, 0x100) +
2107 ALIGN(chip->bank_size_effect * 2 * YDSXG_EFFECT_VOICES, 0x100) +
2109 /* work_ptr must be aligned to 256 bytes, but it's already
2110 covered with the kernel page allocation mechanism */
2111 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci),
2112 size, &chip->work_ptr) < 0)
2114 ptr = chip->work_ptr.area;
2115 ptr_addr = chip->work_ptr.addr;
2116 memset(ptr, 0, size); /* for sure */
2118 chip->bank_base_playback = ptr;
2119 chip->bank_base_playback_addr = ptr_addr;
2120 chip->ctrl_playback = (__le32 *)ptr;
2121 chip->ctrl_playback[0] = cpu_to_le32(YDSXG_PLAYBACK_VOICES);
2122 ptr += ALIGN(playback_ctrl_size, 0x100);
2123 ptr_addr += ALIGN(playback_ctrl_size, 0x100);
2124 for (voice = 0; voice < YDSXG_PLAYBACK_VOICES; voice++) {
2125 chip->voices[voice].number = voice;
2126 chip->voices[voice].bank = (struct snd_ymfpci_playback_bank *)ptr;
2127 chip->voices[voice].bank_addr = ptr_addr;
2128 for (bank = 0; bank < 2; bank++) {
2129 chip->bank_playback[voice][bank] = (struct snd_ymfpci_playback_bank *)ptr;
2130 ptr += chip->bank_size_playback;
2131 ptr_addr += chip->bank_size_playback;
2134 ptr = (char *)ALIGN((unsigned long)ptr, 0x100);
2135 ptr_addr = ALIGN(ptr_addr, 0x100);
2136 chip->bank_base_capture = ptr;
2137 chip->bank_base_capture_addr = ptr_addr;
2138 for (voice = 0; voice < YDSXG_CAPTURE_VOICES; voice++)
2139 for (bank = 0; bank < 2; bank++) {
2140 chip->bank_capture[voice][bank] = (struct snd_ymfpci_capture_bank *)ptr;
2141 ptr += chip->bank_size_capture;
2142 ptr_addr += chip->bank_size_capture;
2144 ptr = (char *)ALIGN((unsigned long)ptr, 0x100);
2145 ptr_addr = ALIGN(ptr_addr, 0x100);
2146 chip->bank_base_effect = ptr;
2147 chip->bank_base_effect_addr = ptr_addr;
2148 for (voice = 0; voice < YDSXG_EFFECT_VOICES; voice++)
2149 for (bank = 0; bank < 2; bank++) {
2150 chip->bank_effect[voice][bank] = (struct snd_ymfpci_effect_bank *)ptr;
2151 ptr += chip->bank_size_effect;
2152 ptr_addr += chip->bank_size_effect;
2154 ptr = (char *)ALIGN((unsigned long)ptr, 0x100);
2155 ptr_addr = ALIGN(ptr_addr, 0x100);
2156 chip->work_base = ptr;
2157 chip->work_base_addr = ptr_addr;
2159 snd_BUG_ON(ptr + chip->work_size !=
2160 chip->work_ptr.area + chip->work_ptr.bytes);
2162 snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, chip->bank_base_playback_addr);
2163 snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, chip->bank_base_capture_addr);
2164 snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, chip->bank_base_effect_addr);
2165 snd_ymfpci_writel(chip, YDSXGR_WORKBASE, chip->work_base_addr);
2166 snd_ymfpci_writel(chip, YDSXGR_WORKSIZE, chip->work_size >> 2);
2168 /* S/PDIF output initialization */
2169 chip->spdif_bits = chip->spdif_pcm_bits = SNDRV_PCM_DEFAULT_CON_SPDIF & 0xffff;
2170 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL, 0);
2171 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits);
2173 /* S/PDIF input initialization */
2174 snd_ymfpci_writew(chip, YDSXGR_SPDIFINCTRL, 0);
2176 /* digital mixer setup */
2177 for (reg = 0x80; reg < 0xc0; reg += 4)
2178 snd_ymfpci_writel(chip, reg, 0);
2179 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0x3fff3fff);
2180 snd_ymfpci_writel(chip, YDSXGR_BUF441OUTVOL, 0x3fff3fff);
2181 snd_ymfpci_writel(chip, YDSXGR_ZVOUTVOL, 0x3fff3fff);
2182 snd_ymfpci_writel(chip, YDSXGR_SPDIFOUTVOL, 0x3fff3fff);
2183 snd_ymfpci_writel(chip, YDSXGR_NATIVEADCINVOL, 0x3fff3fff);
2184 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACINVOL, 0x3fff3fff);
2185 snd_ymfpci_writel(chip, YDSXGR_PRIADCLOOPVOL, 0x3fff3fff);
2186 snd_ymfpci_writel(chip, YDSXGR_LEGACYOUTVOL, 0x3fff3fff);
2191 static int snd_ymfpci_free(struct snd_ymfpci *chip)
2195 if (snd_BUG_ON(!chip))
2198 if (chip->res_reg_area) { /* don't touch busy hardware */
2199 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0);
2200 snd_ymfpci_writel(chip, YDSXGR_BUF441OUTVOL, 0);
2201 snd_ymfpci_writel(chip, YDSXGR_LEGACYOUTVOL, 0);
2202 snd_ymfpci_writel(chip, YDSXGR_STATUS, ~0);
2203 snd_ymfpci_disable_dsp(chip);
2204 snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, 0);
2205 snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, 0);
2206 snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, 0);
2207 snd_ymfpci_writel(chip, YDSXGR_WORKBASE, 0);
2208 snd_ymfpci_writel(chip, YDSXGR_WORKSIZE, 0);
2209 ctrl = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
2210 snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, ctrl & ~0x0007);
2213 snd_ymfpci_ac3_done(chip);
2215 /* Set PCI device to D3 state */
2217 /* FIXME: temporarily disabled, otherwise we cannot fire up
2218 * the chip again unless reboot. ACPI bug?
2220 pci_set_power_state(chip->pci, PCI_D3hot);
2223 #ifdef CONFIG_PM_SLEEP
2224 kfree(chip->saved_regs);
2227 free_irq(chip->irq, chip);
2228 release_and_free_resource(chip->mpu_res);
2229 release_and_free_resource(chip->fm_res);
2230 snd_ymfpci_free_gameport(chip);
2231 iounmap(chip->reg_area_virt);
2232 if (chip->work_ptr.area)
2233 snd_dma_free_pages(&chip->work_ptr);
2235 release_and_free_resource(chip->res_reg_area);
2237 pci_write_config_word(chip->pci, 0x40, chip->old_legacy_ctrl);
2239 pci_disable_device(chip->pci);
2240 release_firmware(chip->dsp_microcode);
2241 release_firmware(chip->controller_microcode);
2246 static int snd_ymfpci_dev_free(struct snd_device *device)
2248 struct snd_ymfpci *chip = device->device_data;
2249 return snd_ymfpci_free(chip);
2252 #ifdef CONFIG_PM_SLEEP
2253 static int saved_regs_index[] = {
2255 YDSXGR_SPDIFOUTCTRL,
2256 YDSXGR_SPDIFOUTSTATUS,
2259 YDSXGR_PRIADCLOOPVOL,
2260 YDSXGR_NATIVEDACINVOL,
2261 YDSXGR_NATIVEDACOUTVOL,
2262 YDSXGR_BUF441OUTVOL,
2263 YDSXGR_NATIVEADCINVOL,
2264 YDSXGR_SPDIFLOOPVOL,
2267 YDSXGR_LEGACYOUTVOL,
2269 YDSXGR_PLAYCTRLBASE,
2273 /* capture set up */
2280 #define YDSXGR_NUM_SAVED_REGS ARRAY_SIZE(saved_regs_index)
2282 static int snd_ymfpci_suspend(struct device *dev)
2284 struct snd_card *card = dev_get_drvdata(dev);
2285 struct snd_ymfpci *chip = card->private_data;
2288 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
2289 snd_ac97_suspend(chip->ac97);
2290 for (i = 0; i < YDSXGR_NUM_SAVED_REGS; i++)
2291 chip->saved_regs[i] = snd_ymfpci_readl(chip, saved_regs_index[i]);
2292 chip->saved_ydsxgr_mode = snd_ymfpci_readl(chip, YDSXGR_MODE);
2293 pci_read_config_word(chip->pci, PCIR_DSXG_LEGACY,
2294 &chip->saved_dsxg_legacy);
2295 pci_read_config_word(chip->pci, PCIR_DSXG_ELEGACY,
2296 &chip->saved_dsxg_elegacy);
2297 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0);
2298 snd_ymfpci_writel(chip, YDSXGR_BUF441OUTVOL, 0);
2299 snd_ymfpci_disable_dsp(chip);
2303 static int snd_ymfpci_resume(struct device *dev)
2305 struct pci_dev *pci = to_pci_dev(dev);
2306 struct snd_card *card = dev_get_drvdata(dev);
2307 struct snd_ymfpci *chip = card->private_data;
2310 snd_ymfpci_aclink_reset(pci);
2311 snd_ymfpci_codec_ready(chip, 0);
2312 snd_ymfpci_download_image(chip);
2315 for (i = 0; i < YDSXGR_NUM_SAVED_REGS; i++)
2316 snd_ymfpci_writel(chip, saved_regs_index[i], chip->saved_regs[i]);
2318 snd_ac97_resume(chip->ac97);
2320 pci_write_config_word(chip->pci, PCIR_DSXG_LEGACY,
2321 chip->saved_dsxg_legacy);
2322 pci_write_config_word(chip->pci, PCIR_DSXG_ELEGACY,
2323 chip->saved_dsxg_elegacy);
2325 /* start hw again */
2326 if (chip->start_count > 0) {
2327 spin_lock_irq(&chip->reg_lock);
2328 snd_ymfpci_writel(chip, YDSXGR_MODE, chip->saved_ydsxgr_mode);
2329 chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT);
2330 spin_unlock_irq(&chip->reg_lock);
2332 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
2336 SIMPLE_DEV_PM_OPS(snd_ymfpci_pm, snd_ymfpci_suspend, snd_ymfpci_resume);
2337 #endif /* CONFIG_PM_SLEEP */
2339 int snd_ymfpci_create(struct snd_card *card,
2340 struct pci_dev *pci,
2341 unsigned short old_legacy_ctrl,
2342 struct snd_ymfpci **rchip)
2344 struct snd_ymfpci *chip;
2346 static struct snd_device_ops ops = {
2347 .dev_free = snd_ymfpci_dev_free,
2352 /* enable PCI device */
2353 if ((err = pci_enable_device(pci)) < 0)
2356 chip = kzalloc(sizeof(*chip), GFP_KERNEL);
2358 pci_disable_device(pci);
2361 chip->old_legacy_ctrl = old_legacy_ctrl;
2362 spin_lock_init(&chip->reg_lock);
2363 spin_lock_init(&chip->voice_lock);
2364 init_waitqueue_head(&chip->interrupt_sleep);
2365 atomic_set(&chip->interrupt_sleep_count, 0);
2369 chip->device_id = pci->device;
2370 chip->rev = pci->revision;
2371 chip->reg_area_phys = pci_resource_start(pci, 0);
2372 chip->reg_area_virt = ioremap_nocache(chip->reg_area_phys, 0x8000);
2373 pci_set_master(pci);
2374 chip->src441_used = -1;
2376 if ((chip->res_reg_area = request_mem_region(chip->reg_area_phys, 0x8000, "YMFPCI")) == NULL) {
2377 dev_err(chip->card->dev,
2378 "unable to grab memory region 0x%lx-0x%lx\n",
2379 chip->reg_area_phys, chip->reg_area_phys + 0x8000 - 1);
2383 if (request_irq(pci->irq, snd_ymfpci_interrupt, IRQF_SHARED,
2384 KBUILD_MODNAME, chip)) {
2385 dev_err(chip->card->dev, "unable to grab IRQ %d\n", pci->irq);
2389 chip->irq = pci->irq;
2391 snd_ymfpci_aclink_reset(pci);
2392 if (snd_ymfpci_codec_ready(chip, 0) < 0) {
2397 err = snd_ymfpci_request_firmware(chip);
2399 dev_err(chip->card->dev, "firmware request failed: %d\n", err);
2402 snd_ymfpci_download_image(chip);
2404 udelay(100); /* seems we need a delay after downloading image.. */
2406 if (snd_ymfpci_memalloc(chip) < 0) {
2411 err = snd_ymfpci_ac3_init(chip);
2415 #ifdef CONFIG_PM_SLEEP
2416 chip->saved_regs = kmalloc_array(YDSXGR_NUM_SAVED_REGS, sizeof(u32),
2418 if (chip->saved_regs == NULL) {
2424 err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops);
2428 snd_ymfpci_proc_init(card, chip);
2434 snd_ymfpci_free(chip);