sound/pci/rme9652/rme9652.c

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  *   ALSA driver for RME Digi9652 audio interfaces
   4  *
   5  *      Copyright (c) 1999 IEM - Winfried Ritsch
   6  *      Copyright (c) 1999-2001  Paul Davis
   7  */
   8
   9 #include <linux/delay.h>
  10 #include <linux/init.h>
  11 #include <linux/interrupt.h>
  12 #include <linux/pci.h>
  13 #include <linux/module.h>
  14 #include <linux/io.h>
  15 #include <linux/nospec.h>
  16
  17 #include <sound/core.h>
  18 #include <sound/control.h>
  19 #include <sound/pcm.h>
  20 #include <sound/info.h>
  21 #include <sound/asoundef.h>
  22 #include <sound/initval.h>
  23
  24 #include <asm/current.h>
  25
  26 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;      /* Index 0-MAX */
  27 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;       /* ID for this card */
  28 static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;     /* Enable this card */
  29 static bool precise_ptr[SNDRV_CARDS];                   /* Enable precise pointer */
  30
  31 module_param_array(index, int, NULL, 0444);
  32 MODULE_PARM_DESC(index, "Index value for RME Digi9652 (Hammerfall) soundcard.");
  33 module_param_array(id, charp, NULL, 0444);
  34 MODULE_PARM_DESC(id, "ID string for RME Digi9652 (Hammerfall) soundcard.");
  35 module_param_array(enable, bool, NULL, 0444);
  36 MODULE_PARM_DESC(enable, "Enable/disable specific RME96{52,36} soundcards.");
  37 module_param_array(precise_ptr, bool, NULL, 0444);
  38 MODULE_PARM_DESC(precise_ptr, "Enable precise pointer (doesn't work reliably).");
  39 MODULE_AUTHOR("Paul Davis <pbd@op.net>, Winfried Ritsch");
  40 MODULE_DESCRIPTION("RME Digi9652/Digi9636");
  41 MODULE_LICENSE("GPL");
  42 MODULE_SUPPORTED_DEVICE("{{RME,Hammerfall},"
  43                 "{RME,Hammerfall-Light}}");
  44
  45 /* The Hammerfall has two sets of 24 ADAT + 2 S/PDIF channels, one for
  46    capture, one for playback. Both the ADAT and S/PDIF channels appear
  47    to the host CPU in the same block of memory. There is no functional
  48    difference between them in terms of access.
  49
  50    The Hammerfall Light is identical to the Hammerfall, except that it
  51    has 2 sets 18 channels (16 ADAT + 2 S/PDIF) for capture and playback.
  52 */
  53
  54 #define RME9652_NCHANNELS       26
  55 #define RME9636_NCHANNELS       18
  56
  57 /* Preferred sync source choices - used by "sync_pref" control switch */
  58
  59 #define RME9652_SYNC_FROM_SPDIF 0
  60 #define RME9652_SYNC_FROM_ADAT1 1
  61 #define RME9652_SYNC_FROM_ADAT2 2
  62 #define RME9652_SYNC_FROM_ADAT3 3
  63
  64 /* Possible sources of S/PDIF input */
  65
  66 #define RME9652_SPDIFIN_OPTICAL 0       /* optical (ADAT1) */
  67 #define RME9652_SPDIFIN_COAXIAL 1       /* coaxial (RCA) */
  68 #define RME9652_SPDIFIN_INTERN  2       /* internal (CDROM) */
  69
  70 /* ------------- Status-Register bits --------------------- */
  71
  72 #define RME9652_IRQ        (1<<0)       /* IRQ is High if not reset by irq_clear */
  73 #define RME9652_lock_2     (1<<1)       /* ADAT 3-PLL: 1=locked, 0=unlocked */
  74 #define RME9652_lock_1     (1<<2)       /* ADAT 2-PLL: 1=locked, 0=unlocked */
  75 #define RME9652_lock_0     (1<<3)       /* ADAT 1-PLL: 1=locked, 0=unlocked */
  76 #define RME9652_fs48       (1<<4)       /* sample rate is 0=44.1/88.2,1=48/96 Khz */
  77 #define RME9652_wsel_rd    (1<<5)       /* if Word-Clock is used and valid then 1 */
  78                                         /* bits 6-15 encode h/w buffer pointer position */
  79 #define RME9652_sync_2     (1<<16)      /* if ADAT-IN 3 in sync to system clock */
  80 #define RME9652_sync_1     (1<<17)      /* if ADAT-IN 2 in sync to system clock */
  81 #define RME9652_sync_0     (1<<18)      /* if ADAT-IN 1 in sync to system clock */
  82 #define RME9652_DS_rd      (1<<19)      /* 1=Double Speed Mode, 0=Normal Speed */
  83 #define RME9652_tc_busy    (1<<20)      /* 1=time-code copy in progress (960ms) */
  84 #define RME9652_tc_out     (1<<21)      /* time-code out bit */
  85 #define RME9652_F_0        (1<<22)      /* 000=64kHz, 100=88.2kHz, 011=96kHz  */
  86 #define RME9652_F_1        (1<<23)      /* 111=32kHz, 110=44.1kHz, 101=48kHz, */
  87 #define RME9652_F_2        (1<<24)      /* external Crystal Chip if ERF=1 */
  88 #define RME9652_ERF        (1<<25)      /* Error-Flag of SDPIF Receiver (1=No Lock) */
  89 #define RME9652_buffer_id  (1<<26)      /* toggles by each interrupt on rec/play */
  90 #define RME9652_tc_valid   (1<<27)      /* 1 = a signal is detected on time-code input */
  91 #define RME9652_SPDIF_READ (1<<28)      /* byte available from Rev 1.5+ S/PDIF interface */
  92
  93 #define RME9652_sync      (RME9652_sync_0|RME9652_sync_1|RME9652_sync_2)
  94 #define RME9652_lock      (RME9652_lock_0|RME9652_lock_1|RME9652_lock_2)
  95 #define RME9652_F         (RME9652_F_0|RME9652_F_1|RME9652_F_2)
  96 #define rme9652_decode_spdif_rate(x) ((x)>>22)
  97
  98 /* Bit 6..15 : h/w buffer pointer */
  99
 100 #define RME9652_buf_pos   0x000FFC0
 101
 102 /* Bits 31,30,29 are bits 5,4,3 of h/w pointer position on later
 103    Rev G EEPROMS and Rev 1.5 cards or later.
 104 */
 105
 106 #define RME9652_REV15_buf_pos(x) ((((x)&0xE0000000)>>26)|((x)&RME9652_buf_pos))
 107
 108 /* amount of io space we remap for register access. i'm not sure we
 109    even need this much, but 1K is nice round number :)
 110 */
 111
 112 #define RME9652_IO_EXTENT     1024
 113
 114 #define RME9652_init_buffer       0
 115 #define RME9652_play_buffer       32    /* holds ptr to 26x64kBit host RAM */
 116 #define RME9652_rec_buffer        36    /* holds ptr to 26x64kBit host RAM */
 117 #define RME9652_control_register  64
 118 #define RME9652_irq_clear         96
 119 #define RME9652_time_code         100   /* useful if used with alesis adat */
 120 #define RME9652_thru_base         128   /* 132...228 Thru for 26 channels */
 121
 122 /* Read-only registers */
 123
 124 /* Writing to any of the register locations writes to the status
 125    register. We'll use the first location as our point of access.
 126 */
 127
 128 #define RME9652_status_register    0
 129
 130 /* --------- Control-Register Bits ---------------- */
 131
 132
 133 #define RME9652_start_bit          (1<<0)       /* start record/play */
 134                                                 /* bits 1-3 encode buffersize/latency */
 135 #define RME9652_Master             (1<<4)       /* Clock Mode Master=1,Slave/Auto=0 */
 136 #define RME9652_IE                 (1<<5)       /* Interrupt Enable */
 137 #define RME9652_freq               (1<<6)       /* samplerate 0=44.1/88.2, 1=48/96 kHz */
 138 #define RME9652_freq1              (1<<7)       /* if 0, 32kHz, else always 1 */
 139 #define RME9652_DS                 (1<<8)       /* Doule Speed 0=44.1/48, 1=88.2/96 Khz */
 140 #define RME9652_PRO                (1<<9)       /* S/PDIF out: 0=consumer, 1=professional */
 141 #define RME9652_EMP                (1<<10)      /*  Emphasis 0=None, 1=ON */
 142 #define RME9652_Dolby              (1<<11)      /*  Non-audio bit 1=set, 0=unset */
 143 #define RME9652_opt_out            (1<<12)      /* Use 1st optical OUT as SPDIF: 1=yes,0=no */
 144 #define RME9652_wsel               (1<<13)      /* use Wordclock as sync (overwrites master) */
 145 #define RME9652_inp_0              (1<<14)      /* SPDIF-IN: 00=optical (ADAT1),     */
 146 #define RME9652_inp_1              (1<<15)      /* 01=koaxial (Cinch), 10=Internal CDROM */
 147 #define RME9652_SyncPref_ADAT2     (1<<16)
 148 #define RME9652_SyncPref_ADAT3     (1<<17)
 149 #define RME9652_SPDIF_RESET        (1<<18)      /* Rev 1.5+: h/w S/PDIF receiver */
 150 #define RME9652_SPDIF_SELECT       (1<<19)
 151 #define RME9652_SPDIF_CLOCK        (1<<20)
 152 #define RME9652_SPDIF_WRITE        (1<<21)
 153 #define RME9652_ADAT1_INTERNAL     (1<<22)      /* Rev 1.5+: if set, internal CD connector carries ADAT */
 154
 155 /* buffersize = 512Bytes * 2^n, where n is made from Bit2 ... Bit0 */
 156
 157 #define RME9652_latency            0x0e
 158 #define rme9652_encode_latency(x)  (((x)&0x7)<<1)
 159 #define rme9652_decode_latency(x)  (((x)>>1)&0x7)
 160 #define rme9652_running_double_speed(s) ((s)->control_register & RME9652_DS)
 161 #define RME9652_inp                (RME9652_inp_0|RME9652_inp_1)
 162 #define rme9652_encode_spdif_in(x) (((x)&0x3)<<14)
 163 #define rme9652_decode_spdif_in(x) (((x)>>14)&0x3)
 164
 165 #define RME9652_SyncPref_Mask      (RME9652_SyncPref_ADAT2|RME9652_SyncPref_ADAT3)
 166 #define RME9652_SyncPref_ADAT1     0
 167 #define RME9652_SyncPref_SPDIF     (RME9652_SyncPref_ADAT2|RME9652_SyncPref_ADAT3)
 168
 169 /* the size of a substream (1 mono data stream) */
 170
 171 #define RME9652_CHANNEL_BUFFER_SAMPLES  (16*1024)
 172 #define RME9652_CHANNEL_BUFFER_BYTES    (4*RME9652_CHANNEL_BUFFER_SAMPLES)
 173
 174 /* the size of the area we need to allocate for DMA transfers. the
 175    size is the same regardless of the number of channels - the
 176    9636 still uses the same memory area.
 177
 178    Note that we allocate 1 more channel than is apparently needed
 179    because the h/w seems to write 1 byte beyond the end of the last
 180    page. Sigh.
 181 */
 182
 183 #define RME9652_DMA_AREA_BYTES ((RME9652_NCHANNELS+1) * RME9652_CHANNEL_BUFFER_BYTES)
 184 #define RME9652_DMA_AREA_KILOBYTES (RME9652_DMA_AREA_BYTES/1024)
 185
 186 struct snd_rme9652 {
 187         int dev;
 188
 189         spinlock_t lock;
 190         int irq;
 191         unsigned long port;
 192         void __iomem *iobase;
 193
 194         int precise_ptr;
 195
 196         u32 control_register;   /* cached value */
 197         u32 thru_bits;          /* thru 1=on, 0=off channel 1=Bit1... channel 26= Bit26 */
 198
 199         u32 creg_spdif;
 200         u32 creg_spdif_stream;
 201
 202         char *card_name;                /* hammerfall or hammerfall light names */
 203
 204         size_t hw_offsetmask;           /* &-with status register to get real hw_offset */
 205         size_t prev_hw_offset;          /* previous hw offset */
 206         size_t max_jitter;              /* maximum jitter in frames for
 207                                            hw pointer */
 208         size_t period_bytes;            /* guess what this is */
 209
 210         unsigned char ds_channels;
 211         unsigned char ss_channels;      /* different for hammerfall/hammerfall-light */
 212
 213         struct snd_dma_buffer playback_dma_buf;
 214         struct snd_dma_buffer capture_dma_buf;
 215
 216         unsigned char *capture_buffer;  /* suitably aligned address */
 217         unsigned char *playback_buffer; /* suitably aligned address */
 218
 219         pid_t capture_pid;
 220         pid_t playback_pid;
 221
 222         struct snd_pcm_substream *capture_substream;
 223         struct snd_pcm_substream *playback_substream;
 224         int running;
 225
 226         int passthru;                   /* non-zero if doing pass-thru */
 227         int hw_rev;                     /* h/w rev * 10 (i.e. 1.5 has hw_rev = 15) */
 228
 229         int last_spdif_sample_rate;     /* so that we can catch externally ... */
 230         int last_adat_sample_rate;      /* ... induced rate changes            */
 231
 232         const char *channel_map;
 233
 234         struct snd_card *card;
 235         struct snd_pcm *pcm;
 236         struct pci_dev *pci;
 237         struct snd_kcontrol *spdif_ctl;
 238
 239 };
 240
 241 /* These tables map the ALSA channels 1..N to the channels that we
 242    need to use in order to find the relevant channel buffer. RME
 243    refer to this kind of mapping as between "the ADAT channel and
 244    the DMA channel." We index it using the logical audio channel,
 245    and the value is the DMA channel (i.e. channel buffer number)
 246    where the data for that channel can be read/written from/to.
 247 */
 248
 249 static const char channel_map_9652_ss[26] = {
 250         0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17,
 251         18, 19, 20, 21, 22, 23, 24, 25
 252 };
 253
 254 static const char channel_map_9636_ss[26] = {
 255         0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
 256         /* channels 16 and 17 are S/PDIF */
 257         24, 25,
 258         /* channels 18-25 don't exist */
 259         -1, -1, -1, -1, -1, -1, -1, -1
 260 };
 261
 262 static const char channel_map_9652_ds[26] = {
 263         /* ADAT channels are remapped */
 264         1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23,
 265         /* channels 12 and 13 are S/PDIF */
 266         24, 25,
 267         /* others don't exist */
 268         -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1
 269 };
 270
 271 static const char channel_map_9636_ds[26] = {
 272         /* ADAT channels are remapped */
 273         1, 3, 5, 7, 9, 11, 13, 15,
 274         /* channels 8 and 9 are S/PDIF */
 275         24, 25,
 276         /* others don't exist */
 277         -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1
 278 };
 279
 280 static int snd_hammerfall_get_buffer(struct pci_dev *pci, struct snd_dma_buffer *dmab, size_t size)
 281 {
 282         return snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, &pci->dev, size, dmab);
 283 }
 284
 285 static void snd_hammerfall_free_buffer(struct snd_dma_buffer *dmab, struct pci_dev *pci)
 286 {
 287         if (dmab->area)
 288                 snd_dma_free_pages(dmab);
 289 }
 290
 291
 292 static const struct pci_device_id snd_rme9652_ids[] = {
 293         {
 294                 .vendor    = 0x10ee,
 295                 .device    = 0x3fc4,
 296                 .subvendor = PCI_ANY_ID,
 297                 .subdevice = PCI_ANY_ID,
 298         },      /* RME Digi9652 */
 299         { 0, },
 300 };
 301
 302 MODULE_DEVICE_TABLE(pci, snd_rme9652_ids);
 303
 304 static inline void rme9652_write(struct snd_rme9652 *rme9652, int reg, int val)
 305 {
 306         writel(val, rme9652->iobase + reg);
 307 }
 308
 309 static inline unsigned int rme9652_read(struct snd_rme9652 *rme9652, int reg)
 310 {
 311         return readl(rme9652->iobase + reg);
 312 }
 313
 314 static inline int snd_rme9652_use_is_exclusive(struct snd_rme9652 *rme9652)
 315 {
 316         unsigned long flags;
 317         int ret = 1;
 318
 319         spin_lock_irqsave(&rme9652->lock, flags);
 320         if ((rme9652->playback_pid != rme9652->capture_pid) &&
 321             (rme9652->playback_pid >= 0) && (rme9652->capture_pid >= 0)) {
 322                 ret = 0;
 323         }
 324         spin_unlock_irqrestore(&rme9652->lock, flags);
 325         return ret;
 326 }
 327
 328 static inline int rme9652_adat_sample_rate(struct snd_rme9652 *rme9652)
 329 {
 330         if (rme9652_running_double_speed(rme9652)) {
 331                 return (rme9652_read(rme9652, RME9652_status_register) &
 332                         RME9652_fs48) ? 96000 : 88200;
 333         } else {
 334                 return (rme9652_read(rme9652, RME9652_status_register) &
 335                         RME9652_fs48) ? 48000 : 44100;
 336         }
 337 }
 338
 339 static inline void rme9652_compute_period_size(struct snd_rme9652 *rme9652)
 340 {
 341         unsigned int i;
 342
 343         i = rme9652->control_register & RME9652_latency;
 344         rme9652->period_bytes = 1 << ((rme9652_decode_latency(i) + 8));
 345         rme9652->hw_offsetmask =
 346                 (rme9652->period_bytes * 2 - 1) & RME9652_buf_pos;
 347         rme9652->max_jitter = 80;
 348 }
 349
 350 static snd_pcm_uframes_t rme9652_hw_pointer(struct snd_rme9652 *rme9652)
 351 {
 352         int status;
 353         unsigned int offset, frag;
 354         snd_pcm_uframes_t period_size = rme9652->period_bytes / 4;
 355         snd_pcm_sframes_t delta;
 356
 357         status = rme9652_read(rme9652, RME9652_status_register);
 358         if (!rme9652->precise_ptr)
 359                 return (status & RME9652_buffer_id) ? period_size : 0;
 360         offset = status & RME9652_buf_pos;
 361
 362         /* The hardware may give a backward movement for up to 80 frames
 363            Martin Kirst <martin.kirst@freenet.de> knows the details.
 364         */
 365
 366         delta = rme9652->prev_hw_offset - offset;
 367         delta &= 0xffff;
 368         if (delta <= (snd_pcm_sframes_t)rme9652->max_jitter * 4)
 369                 offset = rme9652->prev_hw_offset;
 370         else
 371                 rme9652->prev_hw_offset = offset;
 372         offset &= rme9652->hw_offsetmask;
 373         offset /= 4;
 374         frag = status & RME9652_buffer_id;
 375
 376         if (offset < period_size) {
 377                 if (offset > rme9652->max_jitter) {
 378                         if (frag)
 379                                 dev_err(rme9652->card->dev,
 380                                         "Unexpected hw_pointer position (bufid == 0): status: %x offset: %d\n",
 381                                         status, offset);
 382                 } else if (!frag)
 383                         return 0;
 384                 offset -= rme9652->max_jitter;
 385                 if ((int)offset < 0)
 386                         offset += period_size * 2;
 387         } else {
 388                 if (offset > period_size + rme9652->max_jitter) {
 389                         if (!frag)
 390                                 dev_err(rme9652->card->dev,
 391                                         "Unexpected hw_pointer position (bufid == 1): status: %x offset: %d\n",
 392                                         status, offset);
 393                 } else if (frag)
 394                         return period_size;
 395                 offset -= rme9652->max_jitter;
 396         }
 397
 398         return offset;
 399 }
 400
 401 static inline void rme9652_reset_hw_pointer(struct snd_rme9652 *rme9652)
 402 {
 403         int i;
 404
 405         /* reset the FIFO pointer to zero. We do this by writing to 8
 406            registers, each of which is a 32bit wide register, and set
 407            them all to zero. Note that s->iobase is a pointer to
 408            int32, not pointer to char.
 409         */
 410
 411         for (i = 0; i < 8; i++) {
 412                 rme9652_write(rme9652, i * 4, 0);
 413                 udelay(10);
 414         }
 415         rme9652->prev_hw_offset = 0;
 416 }
 417
 418 static inline void rme9652_start(struct snd_rme9652 *s)
 419 {
 420         s->control_register |= (RME9652_IE | RME9652_start_bit);
 421         rme9652_write(s, RME9652_control_register, s->control_register);
 422 }
 423
 424 static inline void rme9652_stop(struct snd_rme9652 *s)
 425 {
 426         s->control_register &= ~(RME9652_start_bit | RME9652_IE);
 427         rme9652_write(s, RME9652_control_register, s->control_register);
 428 }
 429
 430 static int rme9652_set_interrupt_interval(struct snd_rme9652 *s,
 431                                           unsigned int frames)
 432 {
 433         int restart = 0;
 434         int n;
 435
 436         spin_lock_irq(&s->lock);
 437
 438         if ((restart = s->running)) {
 439                 rme9652_stop(s);
 440         }
 441
 442         frames >>= 7;
 443         n = 0;
 444         while (frames) {
 445                 n++;
 446                 frames >>= 1;
 447         }
 448
 449         s->control_register &= ~RME9652_latency;
 450         s->control_register |= rme9652_encode_latency(n);
 451
 452         rme9652_write(s, RME9652_control_register, s->control_register);
 453
 454         rme9652_compute_period_size(s);
 455
 456         if (restart)
 457                 rme9652_start(s);
 458
 459         spin_unlock_irq(&s->lock);
 460
 461         return 0;
 462 }
 463
 464 static int rme9652_set_rate(struct snd_rme9652 *rme9652, int rate)
 465 {
 466         int restart;
 467         int reject_if_open = 0;
 468         int xrate;
 469
 470         if (!snd_rme9652_use_is_exclusive (rme9652)) {
 471                 return -EBUSY;
 472         }
 473
 474         /* Changing from a "single speed" to a "double speed" rate is
 475            not allowed if any substreams are open. This is because
 476            such a change causes a shift in the location of
 477            the DMA buffers and a reduction in the number of available
 478            buffers.
 479
 480            Note that a similar but essentially insoluble problem
 481            exists for externally-driven rate changes. All we can do
 482            is to flag rate changes in the read/write routines.
 483          */
 484
 485         spin_lock_irq(&rme9652->lock);
 486         xrate = rme9652_adat_sample_rate(rme9652);
 487
 488         switch (rate) {
 489         case 44100:
 490                 if (xrate > 48000) {
 491                         reject_if_open = 1;
 492                 }
 493                 rate = 0;
 494                 break;
 495         case 48000:
 496                 if (xrate > 48000) {
 497                         reject_if_open = 1;
 498                 }
 499                 rate = RME9652_freq;
 500                 break;
 501         case 88200:
 502                 if (xrate < 48000) {
 503                         reject_if_open = 1;
 504                 }
 505                 rate = RME9652_DS;
 506                 break;
 507         case 96000:
 508                 if (xrate < 48000) {
 509                         reject_if_open = 1;
 510                 }
 511                 rate = RME9652_DS | RME9652_freq;
 512                 break;
 513         default:
 514                 spin_unlock_irq(&rme9652->lock);
 515                 return -EINVAL;
 516         }
 517
 518         if (reject_if_open && (rme9652->capture_pid >= 0 || rme9652->playback_pid >= 0)) {
 519                 spin_unlock_irq(&rme9652->lock);
 520                 return -EBUSY;
 521         }
 522
 523         if ((restart = rme9652->running)) {
 524                 rme9652_stop(rme9652);
 525         }
 526         rme9652->control_register &= ~(RME9652_freq | RME9652_DS);
 527         rme9652->control_register |= rate;
 528         rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
 529
 530         if (restart) {
 531                 rme9652_start(rme9652);
 532         }
 533
 534         if (rate & RME9652_DS) {
 535                 if (rme9652->ss_channels == RME9652_NCHANNELS) {
 536                         rme9652->channel_map = channel_map_9652_ds;
 537                 } else {
 538                         rme9652->channel_map = channel_map_9636_ds;
 539                 }
 540         } else {
 541                 if (rme9652->ss_channels == RME9652_NCHANNELS) {
 542                         rme9652->channel_map = channel_map_9652_ss;
 543                 } else {
 544                         rme9652->channel_map = channel_map_9636_ss;
 545                 }
 546         }
 547
 548         spin_unlock_irq(&rme9652->lock);
 549         return 0;
 550 }
 551
 552 static void rme9652_set_thru(struct snd_rme9652 *rme9652, int channel, int enable)
 553 {
 554         int i;
 555
 556         rme9652->passthru = 0;
 557
 558         if (channel < 0) {
 559
 560                 /* set thru for all channels */
 561
 562                 if (enable) {
 563                         for (i = 0; i < RME9652_NCHANNELS; i++) {
 564                                 rme9652->thru_bits |= (1 << i);
 565                                 rme9652_write(rme9652, RME9652_thru_base + i * 4, 1);
 566                         }
 567                 } else {
 568                         for (i = 0; i < RME9652_NCHANNELS; i++) {
 569                                 rme9652->thru_bits &= ~(1 << i);
 570                                 rme9652_write(rme9652, RME9652_thru_base + i * 4, 0);
 571                         }
 572                 }
 573
 574         } else {
 575                 int mapped_channel;
 576
 577                 mapped_channel = rme9652->channel_map[channel];
 578
 579                 if (enable) {
 580                         rme9652->thru_bits |= (1 << mapped_channel);
 581                 } else {
 582                         rme9652->thru_bits &= ~(1 << mapped_channel);
 583                 }
 584
 585                 rme9652_write(rme9652,
 586                                RME9652_thru_base + mapped_channel * 4,
 587                                enable ? 1 : 0);
 588         }
 589 }
 590
 591 static int rme9652_set_passthru(struct snd_rme9652 *rme9652, int onoff)
 592 {
 593         if (onoff) {
 594                 rme9652_set_thru(rme9652, -1, 1);
 595
 596                 /* we don't want interrupts, so do a
 597                    custom version of rme9652_start().
 598                 */
 599
 600                 rme9652->control_register =
 601                         RME9652_inp_0 |
 602                         rme9652_encode_latency(7) |
 603                         RME9652_start_bit;
 604
 605                 rme9652_reset_hw_pointer(rme9652);
 606
 607                 rme9652_write(rme9652, RME9652_control_register,
 608                               rme9652->control_register);
 609                 rme9652->passthru = 1;
 610         } else {
 611                 rme9652_set_thru(rme9652, -1, 0);
 612                 rme9652_stop(rme9652);
 613                 rme9652->passthru = 0;
 614         }
 615
 616         return 0;
 617 }
 618
 619 static void rme9652_spdif_set_bit (struct snd_rme9652 *rme9652, int mask, int onoff)
 620 {
 621         if (onoff)
 622                 rme9652->control_register |= mask;
 623         else
 624                 rme9652->control_register &= ~mask;
 625
 626         rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
 627 }
 628
 629 static void rme9652_spdif_write_byte (struct snd_rme9652 *rme9652, const int val)
 630 {
 631         long mask;
 632         long i;
 633
 634         for (i = 0, mask = 0x80; i < 8; i++, mask >>= 1) {
 635                 if (val & mask)
 636                         rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_WRITE, 1);
 637                 else
 638                         rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_WRITE, 0);
 639
 640                 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 1);
 641                 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 0);
 642         }
 643 }
 644
 645 static int rme9652_spdif_read_byte (struct snd_rme9652 *rme9652)
 646 {
 647         long mask;
 648         long val;
 649         long i;
 650
 651         val = 0;
 652
 653         for (i = 0, mask = 0x80;  i < 8; i++, mask >>= 1) {
 654                 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 1);
 655                 if (rme9652_read (rme9652, RME9652_status_register) & RME9652_SPDIF_READ)
 656                         val |= mask;
 657                 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 0);
 658         }
 659
 660         return val;
 661 }
 662
 663 static void rme9652_write_spdif_codec (struct snd_rme9652 *rme9652, const int address, const int data)
 664 {
 665         rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 1);
 666         rme9652_spdif_write_byte (rme9652, 0x20);
 667         rme9652_spdif_write_byte (rme9652, address);
 668         rme9652_spdif_write_byte (rme9652, data);
 669         rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 0);
 670 }
 671
 672
 673 static int rme9652_spdif_read_codec (struct snd_rme9652 *rme9652, const int address)
 674 {
 675         int ret;
 676
 677         rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 1);
 678         rme9652_spdif_write_byte (rme9652, 0x20);
 679         rme9652_spdif_write_byte (rme9652, address);
 680         rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 0);
 681         rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 1);
 682
 683         rme9652_spdif_write_byte (rme9652, 0x21);
 684         ret = rme9652_spdif_read_byte (rme9652);
 685         rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 0);
 686
 687         return ret;
 688 }
 689
 690 static void rme9652_initialize_spdif_receiver (struct snd_rme9652 *rme9652)
 691 {
 692         /* XXX what unsets this ? */
 693
 694         rme9652->control_register |= RME9652_SPDIF_RESET;
 695
 696         rme9652_write_spdif_codec (rme9652, 4, 0x40);
 697         rme9652_write_spdif_codec (rme9652, 17, 0x13);
 698         rme9652_write_spdif_codec (rme9652, 6, 0x02);
 699 }
 700
 701 static inline int rme9652_spdif_sample_rate(struct snd_rme9652 *s)
 702 {
 703         unsigned int rate_bits;
 704
 705         if (rme9652_read(s, RME9652_status_register) & RME9652_ERF) {
 706                 return -1;      /* error condition */
 707         }
 708
 709         if (s->hw_rev == 15) {
 710
 711                 int x, y, ret;
 712
 713                 x = rme9652_spdif_read_codec (s, 30);
 714
 715                 if (x != 0)
 716                         y = 48000 * 64 / x;
 717                 else
 718                         y = 0;
 719
 720                 if      (y > 30400 && y < 33600)  ret = 32000;
 721                 else if (y > 41900 && y < 46000)  ret = 44100;
 722                 else if (y > 46000 && y < 50400)  ret = 48000;
 723                 else if (y > 60800 && y < 67200)  ret = 64000;
 724                 else if (y > 83700 && y < 92000)  ret = 88200;
 725                 else if (y > 92000 && y < 100000) ret = 96000;
 726                 else                              ret = 0;
 727                 return ret;
 728         }
 729
 730         rate_bits = rme9652_read(s, RME9652_status_register) & RME9652_F;
 731
 732         switch (rme9652_decode_spdif_rate(rate_bits)) {
 733         case 0x7:
 734                 return 32000;
 735
 736         case 0x6:
 737                 return 44100;
 738
 739         case 0x5:
 740                 return 48000;
 741
 742         case 0x4:
 743                 return 88200;
 744
 745         case 0x3:
 746                 return 96000;
 747
 748         case 0x0:
 749                 return 64000;
 750
 751         default:
 752                 dev_err(s->card->dev,
 753                         "%s: unknown S/PDIF input rate (bits = 0x%x)\n",
 754                            s->card_name, rate_bits);
 755                 return 0;
 756         }
 757 }
 758
 759 /*-----------------------------------------------------------------------------
 760   Control Interface
 761   ----------------------------------------------------------------------------*/
 762
 763 static u32 snd_rme9652_convert_from_aes(struct snd_aes_iec958 *aes)
 764 {
 765         u32 val = 0;
 766         val |= (aes->status[0] & IEC958_AES0_PROFESSIONAL) ? RME9652_PRO : 0;
 767         val |= (aes->status[0] & IEC958_AES0_NONAUDIO) ? RME9652_Dolby : 0;
 768         if (val & RME9652_PRO)
 769                 val |= (aes->status[0] & IEC958_AES0_PRO_EMPHASIS_5015) ? RME9652_EMP : 0;
 770         else
 771                 val |= (aes->status[0] & IEC958_AES0_CON_EMPHASIS_5015) ? RME9652_EMP : 0;
 772         return val;
 773 }
 774
 775 static void snd_rme9652_convert_to_aes(struct snd_aes_iec958 *aes, u32 val)
 776 {
 777         aes->status[0] = ((val & RME9652_PRO) ? IEC958_AES0_PROFESSIONAL : 0) |
 778                          ((val & RME9652_Dolby) ? IEC958_AES0_NONAUDIO : 0);
 779         if (val & RME9652_PRO)
 780                 aes->status[0] |= (val & RME9652_EMP) ? IEC958_AES0_PRO_EMPHASIS_5015 : 0;
 781         else
 782                 aes->status[0] |= (val & RME9652_EMP) ? IEC958_AES0_CON_EMPHASIS_5015 : 0;
 783 }
 784
 785 static int snd_rme9652_control_spdif_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
 786 {
 787         uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
 788         uinfo->count = 1;
 789         return 0;
 790 }
 791
 792 static int snd_rme9652_control_spdif_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
 793 {
 794         struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
 795
 796         snd_rme9652_convert_to_aes(&ucontrol->value.iec958, rme9652->creg_spdif);
 797         return 0;
 798 }
 799
 800 static int snd_rme9652_control_spdif_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
 801 {
 802         struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
 803         int change;
 804         u32 val;
 805
 806         val = snd_rme9652_convert_from_aes(&ucontrol->value.iec958);
 807         spin_lock_irq(&rme9652->lock);
 808         change = val != rme9652->creg_spdif;
 809         rme9652->creg_spdif = val;
 810         spin_unlock_irq(&rme9652->lock);
 811         return change;
 812 }
 813
 814 static int snd_rme9652_control_spdif_stream_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
 815 {
 816         uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
 817         uinfo->count = 1;
 818         return 0;
 819 }
 820
 821 static int snd_rme9652_control_spdif_stream_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
 822 {
 823         struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
 824
 825         snd_rme9652_convert_to_aes(&ucontrol->value.iec958, rme9652->creg_spdif_stream);
 826         return 0;
 827 }
 828
 829 static int snd_rme9652_control_spdif_stream_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
 830 {
 831         struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
 832         int change;
 833         u32 val;
 834
 835         val = snd_rme9652_convert_from_aes(&ucontrol->value.iec958);
 836         spin_lock_irq(&rme9652->lock);
 837         change = val != rme9652->creg_spdif_stream;
 838         rme9652->creg_spdif_stream = val;
 839         rme9652->control_register &= ~(RME9652_PRO | RME9652_Dolby | RME9652_EMP);
 840         rme9652_write(rme9652, RME9652_control_register, rme9652->control_register |= val);
 841         spin_unlock_irq(&rme9652->lock);
 842         return change;
 843 }
 844
 845 static int snd_rme9652_control_spdif_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
 846 {
 847         uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
 848         uinfo->count = 1;
 849         return 0;
 850 }
 851
 852 static int snd_rme9652_control_spdif_mask_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
 853 {
 854         ucontrol->value.iec958.status[0] = kcontrol->private_value;
 855         return 0;
 856 }
 857
 858 #define RME9652_ADAT1_IN(xname, xindex) \
 859 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
 860   .info = snd_rme9652_info_adat1_in, \
 861   .get = snd_rme9652_get_adat1_in, \
 862   .put = snd_rme9652_put_adat1_in }
 863
 864 static unsigned int rme9652_adat1_in(struct snd_rme9652 *rme9652)
 865 {
 866         if (rme9652->control_register & RME9652_ADAT1_INTERNAL)
 867                 return 1;
 868         return 0;
 869 }
 870
 871 static int rme9652_set_adat1_input(struct snd_rme9652 *rme9652, int internal)
 872 {
 873         int restart = 0;
 874
 875         if (internal) {
 876                 rme9652->control_register |= RME9652_ADAT1_INTERNAL;
 877         } else {
 878                 rme9652->control_register &= ~RME9652_ADAT1_INTERNAL;
 879         }
 880
 881         /* XXX do we actually need to stop the card when we do this ? */
 882
 883         if ((restart = rme9652->running)) {
 884                 rme9652_stop(rme9652);
 885         }
 886
 887         rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
 888
 889         if (restart) {
 890                 rme9652_start(rme9652);
 891         }
 892
 893         return 0;
 894 }
 895
 896 static int snd_rme9652_info_adat1_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
 897 {
 898         static const char * const texts[2] = {"ADAT1", "Internal"};
 899
 900         return snd_ctl_enum_info(uinfo, 1, 2, texts);
 901 }
 902
 903 static int snd_rme9652_get_adat1_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
 904 {
 905         struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
 906
 907         spin_lock_irq(&rme9652->lock);
 908         ucontrol->value.enumerated.item[0] = rme9652_adat1_in(rme9652);
 909         spin_unlock_irq(&rme9652->lock);
 910         return 0;
 911 }
 912
 913 static int snd_rme9652_put_adat1_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
 914 {
 915         struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
 916         int change;
 917         unsigned int val;
 918
 919         if (!snd_rme9652_use_is_exclusive(rme9652))
 920                 return -EBUSY;
 921         val = ucontrol->value.enumerated.item[0] % 2;
 922         spin_lock_irq(&rme9652->lock);
 923         change = val != rme9652_adat1_in(rme9652);
 924         if (change)
 925                 rme9652_set_adat1_input(rme9652, val);
 926         spin_unlock_irq(&rme9652->lock);
 927         return change;
 928 }
 929
 930 #define RME9652_SPDIF_IN(xname, xindex) \
 931 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
 932   .info = snd_rme9652_info_spdif_in, \
 933   .get = snd_rme9652_get_spdif_in, .put = snd_rme9652_put_spdif_in }
 934
 935 static unsigned int rme9652_spdif_in(struct snd_rme9652 *rme9652)
 936 {
 937         return rme9652_decode_spdif_in(rme9652->control_register &
 938                                        RME9652_inp);
 939 }
 940
 941 static int rme9652_set_spdif_input(struct snd_rme9652 *rme9652, int in)
 942 {
 943         int restart = 0;
 944
 945         rme9652->control_register &= ~RME9652_inp;
 946         rme9652->control_register |= rme9652_encode_spdif_in(in);
 947
 948         if ((restart = rme9652->running)) {
 949                 rme9652_stop(rme9652);
 950         }
 951
 952         rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
 953
 954         if (restart) {
 955                 rme9652_start(rme9652);
 956         }
 957
 958         return 0;
 959 }
 960
 961 static int snd_rme9652_info_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
 962 {
 963         static const char * const texts[3] = {"ADAT1", "Coaxial", "Internal"};
 964
 965         return snd_ctl_enum_info(uinfo, 1, 3, texts);
 966 }
 967
 968 static int snd_rme9652_get_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
 969 {
 970         struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
 971
 972         spin_lock_irq(&rme9652->lock);
 973         ucontrol->value.enumerated.item[0] = rme9652_spdif_in(rme9652);
 974         spin_unlock_irq(&rme9652->lock);
 975         return 0;
 976 }
 977
 978 static int snd_rme9652_put_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
 979 {
 980         struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
 981         int change;
 982         unsigned int val;
 983
 984         if (!snd_rme9652_use_is_exclusive(rme9652))
 985                 return -EBUSY;
 986         val = ucontrol->value.enumerated.item[0] % 3;
 987         spin_lock_irq(&rme9652->lock);
 988         change = val != rme9652_spdif_in(rme9652);
 989         if (change)
 990                 rme9652_set_spdif_input(rme9652, val);
 991         spin_unlock_irq(&rme9652->lock);
 992         return change;
 993 }
 994
 995 #define RME9652_SPDIF_OUT(xname, xindex) \
 996 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
 997   .info = snd_rme9652_info_spdif_out, \
 998   .get = snd_rme9652_get_spdif_out, .put = snd_rme9652_put_spdif_out }
 999
1000 static int rme9652_spdif_out(struct snd_rme9652 *rme9652)
1001 {
1002         return (rme9652->control_register & RME9652_opt_out) ? 1 : 0;
1003 }
1004
1005 static int rme9652_set_spdif_output(struct snd_rme9652 *rme9652, int out)
1006 {
1007         int restart = 0;
1008
1009         if (out) {
1010                 rme9652->control_register |= RME9652_opt_out;
1011         } else {
1012                 rme9652->control_register &= ~RME9652_opt_out;
1013         }
1014
1015         if ((restart = rme9652->running)) {
1016                 rme9652_stop(rme9652);
1017         }
1018
1019         rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1020
1021         if (restart) {
1022                 rme9652_start(rme9652);
1023         }
1024
1025         return 0;
1026 }
1027
1028 #define snd_rme9652_info_spdif_out      snd_ctl_boolean_mono_info
1029
1030 static int snd_rme9652_get_spdif_out(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1031 {
1032         struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1033
1034         spin_lock_irq(&rme9652->lock);
1035         ucontrol->value.integer.value[0] = rme9652_spdif_out(rme9652);
1036         spin_unlock_irq(&rme9652->lock);
1037         return 0;
1038 }
1039
1040 static int snd_rme9652_put_spdif_out(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1041 {
1042         struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1043         int change;
1044         unsigned int val;
1045
1046         if (!snd_rme9652_use_is_exclusive(rme9652))
1047                 return -EBUSY;
1048         val = ucontrol->value.integer.value[0] & 1;
1049         spin_lock_irq(&rme9652->lock);
1050         change = (int)val != rme9652_spdif_out(rme9652);
1051         rme9652_set_spdif_output(rme9652, val);
1052         spin_unlock_irq(&rme9652->lock);
1053         return change;
1054 }
1055
1056 #define RME9652_SYNC_MODE(xname, xindex) \
1057 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1058   .info = snd_rme9652_info_sync_mode, \
1059   .get = snd_rme9652_get_sync_mode, .put = snd_rme9652_put_sync_mode }
1060
1061 static int rme9652_sync_mode(struct snd_rme9652 *rme9652)
1062 {
1063         if (rme9652->control_register & RME9652_wsel) {
1064                 return 2;
1065         } else if (rme9652->control_register & RME9652_Master) {
1066                 return 1;
1067         } else {
1068                 return 0;
1069         }
1070 }
1071
1072 static int rme9652_set_sync_mode(struct snd_rme9652 *rme9652, int mode)
1073 {
1074         int restart = 0;
1075
1076         switch (mode) {
1077         case 0:
1078                 rme9652->control_register &=
1079                     ~(RME9652_Master | RME9652_wsel);
1080                 break;
1081         case 1:
1082                 rme9652->control_register =
1083                     (rme9652->control_register & ~RME9652_wsel) | RME9652_Master;
1084                 break;
1085         case 2:
1086                 rme9652->control_register |=
1087                     (RME9652_Master | RME9652_wsel);
1088                 break;
1089         }
1090
1091         if ((restart = rme9652->running)) {
1092                 rme9652_stop(rme9652);
1093         }
1094
1095         rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1096
1097         if (restart) {
1098                 rme9652_start(rme9652);
1099         }
1100
1101         return 0;
1102 }
1103
1104 static int snd_rme9652_info_sync_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1105 {
1106         static const char * const texts[3] = {
1107                 "AutoSync", "Master", "Word Clock"
1108         };
1109
1110         return snd_ctl_enum_info(uinfo, 1, 3, texts);
1111 }
1112
1113 static int snd_rme9652_get_sync_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1114 {
1115         struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1116
1117         spin_lock_irq(&rme9652->lock);
1118         ucontrol->value.enumerated.item[0] = rme9652_sync_mode(rme9652);
1119         spin_unlock_irq(&rme9652->lock);
1120         return 0;
1121 }
1122
1123 static int snd_rme9652_put_sync_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1124 {
1125         struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1126         int change;
1127         unsigned int val;
1128
1129         val = ucontrol->value.enumerated.item[0] % 3;
1130         spin_lock_irq(&rme9652->lock);
1131         change = (int)val != rme9652_sync_mode(rme9652);
1132         rme9652_set_sync_mode(rme9652, val);
1133         spin_unlock_irq(&rme9652->lock);
1134         return change;
1135 }
1136
1137 #define RME9652_SYNC_PREF(xname, xindex) \
1138 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1139   .info = snd_rme9652_info_sync_pref, \
1140   .get = snd_rme9652_get_sync_pref, .put = snd_rme9652_put_sync_pref }
1141
1142 static int rme9652_sync_pref(struct snd_rme9652 *rme9652)
1143 {
1144         switch (rme9652->control_register & RME9652_SyncPref_Mask) {
1145         case RME9652_SyncPref_ADAT1:
1146                 return RME9652_SYNC_FROM_ADAT1;
1147         case RME9652_SyncPref_ADAT2:
1148                 return RME9652_SYNC_FROM_ADAT2;
1149         case RME9652_SyncPref_ADAT3:
1150                 return RME9652_SYNC_FROM_ADAT3;
1151         case RME9652_SyncPref_SPDIF:
1152                 return RME9652_SYNC_FROM_SPDIF;
1153         }
1154         /* Not reachable */
1155         return 0;
1156 }
1157
1158 static int rme9652_set_sync_pref(struct snd_rme9652 *rme9652, int pref)
1159 {
1160         int restart;
1161
1162         rme9652->control_register &= ~RME9652_SyncPref_Mask;
1163         switch (pref) {
1164         case RME9652_SYNC_FROM_ADAT1:
1165                 rme9652->control_register |= RME9652_SyncPref_ADAT1;
1166                 break;
1167         case RME9652_SYNC_FROM_ADAT2:
1168                 rme9652->control_register |= RME9652_SyncPref_ADAT2;
1169                 break;
1170         case RME9652_SYNC_FROM_ADAT3:
1171                 rme9652->control_register |= RME9652_SyncPref_ADAT3;
1172                 break;
1173         case RME9652_SYNC_FROM_SPDIF:
1174                 rme9652->control_register |= RME9652_SyncPref_SPDIF;
1175                 break;
1176         }
1177
1178         if ((restart = rme9652->running)) {
1179                 rme9652_stop(rme9652);
1180         }
1181
1182         rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1183
1184         if (restart) {
1185                 rme9652_start(rme9652);
1186         }
1187
1188         return 0;
1189 }
1190
1191 static int snd_rme9652_info_sync_pref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1192 {
1193         static const char * const texts[4] = {
1194                 "IEC958 In", "ADAT1 In", "ADAT2 In", "ADAT3 In"
1195         };
1196         struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1197
1198         return snd_ctl_enum_info(uinfo, 1,
1199                                  rme9652->ss_channels == RME9652_NCHANNELS ? 4 : 3,
1200                                  texts);
1201 }
1202
1203 static int snd_rme9652_get_sync_pref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1204 {
1205         struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1206
1207         spin_lock_irq(&rme9652->lock);
1208         ucontrol->value.enumerated.item[0] = rme9652_sync_pref(rme9652);
1209         spin_unlock_irq(&rme9652->lock);
1210         return 0;
1211 }
1212
1213 static int snd_rme9652_put_sync_pref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1214 {
1215         struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1216         int change, max;
1217         unsigned int val;
1218
1219         if (!snd_rme9652_use_is_exclusive(rme9652))
1220                 return -EBUSY;
1221         max = rme9652->ss_channels == RME9652_NCHANNELS ? 4 : 3;
1222         val = ucontrol->value.enumerated.item[0] % max;
1223         spin_lock_irq(&rme9652->lock);
1224         change = (int)val != rme9652_sync_pref(rme9652);
1225         rme9652_set_sync_pref(rme9652, val);
1226         spin_unlock_irq(&rme9652->lock);
1227         return change;
1228 }
1229
1230 static int snd_rme9652_info_thru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1231 {
1232         struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1233         uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1234         uinfo->count = rme9652->ss_channels;
1235         uinfo->value.integer.min = 0;
1236         uinfo->value.integer.max = 1;
1237         return 0;
1238 }
1239
1240 static int snd_rme9652_get_thru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1241 {
1242         struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1243         unsigned int k;
1244         u32 thru_bits = rme9652->thru_bits;
1245
1246         for (k = 0; k < rme9652->ss_channels; ++k) {
1247                 ucontrol->value.integer.value[k] = !!(thru_bits & (1 << k));
1248         }
1249         return 0;
1250 }
1251
1252 static int snd_rme9652_put_thru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1253 {
1254         struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1255         int change;
1256         unsigned int chn;
1257         u32 thru_bits = 0;
1258
1259         if (!snd_rme9652_use_is_exclusive(rme9652))
1260                 return -EBUSY;
1261
1262         for (chn = 0; chn < rme9652->ss_channels; ++chn) {
1263                 if (ucontrol->value.integer.value[chn])
1264                         thru_bits |= 1 << chn;
1265         }
1266
1267         spin_lock_irq(&rme9652->lock);
1268         change = thru_bits ^ rme9652->thru_bits;
1269         if (change) {
1270                 for (chn = 0; chn < rme9652->ss_channels; ++chn) {
1271                         if (!(change & (1 << chn)))
1272                                 continue;
1273                         rme9652_set_thru(rme9652,chn,thru_bits&(1<<chn));
1274                 }
1275         }
1276         spin_unlock_irq(&rme9652->lock);
1277         return !!change;
1278 }
1279
1280 #define RME9652_PASSTHRU(xname, xindex) \
1281 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1282   .info = snd_rme9652_info_passthru, \
1283   .put = snd_rme9652_put_passthru, \
1284   .get = snd_rme9652_get_passthru }
1285
1286 #define snd_rme9652_info_passthru       snd_ctl_boolean_mono_info
1287
1288 static int snd_rme9652_get_passthru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1289 {
1290         struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1291
1292         spin_lock_irq(&rme9652->lock);
1293         ucontrol->value.integer.value[0] = rme9652->passthru;
1294         spin_unlock_irq(&rme9652->lock);
1295         return 0;
1296 }
1297
1298 static int snd_rme9652_put_passthru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1299 {
1300         struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1301         int change;
1302         unsigned int val;
1303         int err = 0;
1304
1305         if (!snd_rme9652_use_is_exclusive(rme9652))
1306                 return -EBUSY;
1307
1308         val = ucontrol->value.integer.value[0] & 1;
1309         spin_lock_irq(&rme9652->lock);
1310         change = (ucontrol->value.integer.value[0] != rme9652->passthru);
1311         if (change)
1312                 err = rme9652_set_passthru(rme9652, val);
1313         spin_unlock_irq(&rme9652->lock);
1314         return err ? err : change;
1315 }
1316
1317 /* Read-only switches */
1318
1319 #define RME9652_SPDIF_RATE(xname, xindex) \
1320 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1321   .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
1322   .info = snd_rme9652_info_spdif_rate, \
1323   .get = snd_rme9652_get_spdif_rate }
1324
1325 static int snd_rme9652_info_spdif_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1326 {
1327         uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1328         uinfo->count = 1;
1329         uinfo->value.integer.min = 0;
1330         uinfo->value.integer.max = 96000;
1331         return 0;
1332 }
1333
1334 static int snd_rme9652_get_spdif_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1335 {
1336         struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1337
1338         spin_lock_irq(&rme9652->lock);
1339         ucontrol->value.integer.value[0] = rme9652_spdif_sample_rate(rme9652);
1340         spin_unlock_irq(&rme9652->lock);
1341         return 0;
1342 }
1343
1344 #define RME9652_ADAT_SYNC(xname, xindex, xidx) \
1345 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1346   .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
1347   .info = snd_rme9652_info_adat_sync, \
1348   .get = snd_rme9652_get_adat_sync, .private_value = xidx }
1349
1350 static int snd_rme9652_info_adat_sync(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1351 {
1352         static const char * const texts[4] = {
1353                 "No Lock", "Lock", "No Lock Sync", "Lock Sync"
1354         };
1355
1356         return snd_ctl_enum_info(uinfo, 1, 4, texts);
1357 }
1358
1359 static int snd_rme9652_get_adat_sync(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1360 {
1361         struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1362         unsigned int mask1, mask2, val;
1363
1364         switch (kcontrol->private_value) {
1365         case 0: mask1 = RME9652_lock_0; mask2 = RME9652_sync_0; break;
1366         case 1: mask1 = RME9652_lock_1; mask2 = RME9652_sync_1; break;
1367         case 2: mask1 = RME9652_lock_2; mask2 = RME9652_sync_2; break;
1368         default: return -EINVAL;
1369         }
1370         val = rme9652_read(rme9652, RME9652_status_register);
1371         ucontrol->value.enumerated.item[0] = (val & mask1) ? 1 : 0;
1372         ucontrol->value.enumerated.item[0] |= (val & mask2) ? 2 : 0;
1373         return 0;
1374 }
1375
1376 #define RME9652_TC_VALID(xname, xindex) \
1377 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1378   .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
1379   .info = snd_rme9652_info_tc_valid, \
1380   .get = snd_rme9652_get_tc_valid }
1381
1382 #define snd_rme9652_info_tc_valid       snd_ctl_boolean_mono_info
1383
1384 static int snd_rme9652_get_tc_valid(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1385 {
1386         struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1387
1388         ucontrol->value.integer.value[0] =
1389                 (rme9652_read(rme9652, RME9652_status_register) & RME9652_tc_valid) ? 1 : 0;
1390         return 0;
1391 }
1392
1393 #ifdef ALSA_HAS_STANDARD_WAY_OF_RETURNING_TIMECODE
1394
1395 /* FIXME: this routine needs a port to the new control API --jk */
1396
1397 static int snd_rme9652_get_tc_value(void *private_data,
1398                                     snd_kswitch_t *kswitch,
1399                                     snd_switch_t *uswitch)
1400 {
1401         struct snd_rme9652 *s = (struct snd_rme9652 *) private_data;
1402         u32 value;
1403         int i;
1404
1405         uswitch->type = SNDRV_SW_TYPE_DWORD;
1406
1407         if ((rme9652_read(s, RME9652_status_register) &
1408              RME9652_tc_valid) == 0) {
1409                 uswitch->value.data32[0] = 0;
1410                 return 0;
1411         }
1412
1413         /* timecode request */
1414
1415         rme9652_write(s, RME9652_time_code, 0);
1416
1417         /* XXX bug alert: loop-based timing !!!! */
1418
1419         for (i = 0; i < 50; i++) {
1420                 if (!(rme9652_read(s, i * 4) & RME9652_tc_busy))
1421                         break;
1422         }
1423
1424         if (!(rme9652_read(s, i * 4) & RME9652_tc_busy)) {
1425                 return -EIO;
1426         }
1427
1428         value = 0;
1429
1430         for (i = 0; i < 32; i++) {
1431                 value >>= 1;
1432
1433                 if (rme9652_read(s, i * 4) & RME9652_tc_out)
1434                         value |= 0x80000000;
1435         }
1436
1437         if (value > 2 * 60 * 48000) {
1438                 value -= 2 * 60 * 48000;
1439         } else {
1440                 value = 0;
1441         }
1442
1443         uswitch->value.data32[0] = value;
1444
1445         return 0;
1446 }
1447
1448 #endif                          /* ALSA_HAS_STANDARD_WAY_OF_RETURNING_TIMECODE */
1449
1450 static const struct snd_kcontrol_new snd_rme9652_controls[] = {
1451 {
1452         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
1453         .name =         SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
1454         .info =         snd_rme9652_control_spdif_info,
1455         .get =          snd_rme9652_control_spdif_get,
1456         .put =          snd_rme9652_control_spdif_put,
1457 },
1458 {
1459         .access =       SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE,
1460         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
1461         .name =         SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM),
1462         .info =         snd_rme9652_control_spdif_stream_info,
1463         .get =          snd_rme9652_control_spdif_stream_get,
1464         .put =          snd_rme9652_control_spdif_stream_put,
1465 },
1466 {
1467         .access =       SNDRV_CTL_ELEM_ACCESS_READ,
1468         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
1469         .name =         SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK),
1470         .info =         snd_rme9652_control_spdif_mask_info,
1471         .get =          snd_rme9652_control_spdif_mask_get,
1472         .private_value = IEC958_AES0_NONAUDIO |
1473                         IEC958_AES0_PROFESSIONAL |
1474                         IEC958_AES0_CON_EMPHASIS,
1475 },
1476 {
1477         .access =       SNDRV_CTL_ELEM_ACCESS_READ,
1478         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
1479         .name =         SNDRV_CTL_NAME_IEC958("",PLAYBACK,PRO_MASK),
1480         .info =         snd_rme9652_control_spdif_mask_info,
1481         .get =          snd_rme9652_control_spdif_mask_get,
1482         .private_value = IEC958_AES0_NONAUDIO |
1483                         IEC958_AES0_PROFESSIONAL |
1484                         IEC958_AES0_PRO_EMPHASIS,
1485 },
1486 RME9652_SPDIF_IN("IEC958 Input Connector", 0),
1487 RME9652_SPDIF_OUT("IEC958 Output also on ADAT1", 0),
1488 RME9652_SYNC_MODE("Sync Mode", 0),
1489 RME9652_SYNC_PREF("Preferred Sync Source", 0),
1490 {
1491         .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1492         .name = "Channels Thru",
1493         .index = 0,
1494         .info = snd_rme9652_info_thru,
1495         .get = snd_rme9652_get_thru,
1496         .put = snd_rme9652_put_thru,
1497 },
1498 RME9652_SPDIF_RATE("IEC958 Sample Rate", 0),
1499 RME9652_ADAT_SYNC("ADAT1 Sync Check", 0, 0),
1500 RME9652_ADAT_SYNC("ADAT2 Sync Check", 0, 1),
1501 RME9652_TC_VALID("Timecode Valid", 0),
1502 RME9652_PASSTHRU("Passthru", 0)
1503 };
1504
1505 static const struct snd_kcontrol_new snd_rme9652_adat3_check =
1506 RME9652_ADAT_SYNC("ADAT3 Sync Check", 0, 2);
1507
1508 static const struct snd_kcontrol_new snd_rme9652_adat1_input =
1509 RME9652_ADAT1_IN("ADAT1 Input Source", 0);
1510
1511 static int snd_rme9652_create_controls(struct snd_card *card, struct snd_rme9652 *rme9652)
1512 {
1513         unsigned int idx;
1514         int err;
1515         struct snd_kcontrol *kctl;
1516
1517         for (idx = 0; idx < ARRAY_SIZE(snd_rme9652_controls); idx++) {
1518                 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_rme9652_controls[idx], rme9652))) < 0)
1519                         return err;
1520                 if (idx == 1)   /* IEC958 (S/PDIF) Stream */
1521                         rme9652->spdif_ctl = kctl;
1522         }
1523
1524         if (rme9652->ss_channels == RME9652_NCHANNELS)
1525                 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_rme9652_adat3_check, rme9652))) < 0)
1526                         return err;
1527
1528         if (rme9652->hw_rev >= 15)
1529                 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_rme9652_adat1_input, rme9652))) < 0)
1530                         return err;
1531
1532         return 0;
1533 }
1534
1535 /*------------------------------------------------------------
1536    /proc interface
1537  ------------------------------------------------------------*/
1538
1539 static void
1540 snd_rme9652_proc_read(struct snd_info_entry *entry, struct snd_info_buffer *buffer)
1541 {
1542         struct snd_rme9652 *rme9652 = (struct snd_rme9652 *) entry->private_data;
1543         u32 thru_bits = rme9652->thru_bits;
1544         int show_auto_sync_source = 0;
1545         int i;
1546         unsigned int status;
1547         int x;
1548
1549         status = rme9652_read(rme9652, RME9652_status_register);
1550
1551         snd_iprintf(buffer, "%s (Card #%d)\n", rme9652->card_name, rme9652->card->number + 1);
1552         snd_iprintf(buffer, "Buffers: capture %p playback %p\n",
1553                     rme9652->capture_buffer, rme9652->playback_buffer);
1554         snd_iprintf(buffer, "IRQ: %d Registers bus: 0x%lx VM: 0x%lx\n",
1555                     rme9652->irq, rme9652->port, (unsigned long)rme9652->iobase);
1556         snd_iprintf(buffer, "Control register: %x\n", rme9652->control_register);
1557
1558         snd_iprintf(buffer, "\n");
1559
1560         x = 1 << (6 + rme9652_decode_latency(rme9652->control_register &
1561                                              RME9652_latency));
1562
1563         snd_iprintf(buffer, "Latency: %d samples (2 periods of %lu bytes)\n",
1564                     x, (unsigned long) rme9652->period_bytes);
1565         snd_iprintf(buffer, "Hardware pointer (frames): %ld\n",
1566                     rme9652_hw_pointer(rme9652));
1567         snd_iprintf(buffer, "Passthru: %s\n",
1568                     rme9652->passthru ? "yes" : "no");
1569
1570         if ((rme9652->control_register & (RME9652_Master | RME9652_wsel)) == 0) {
1571                 snd_iprintf(buffer, "Clock mode: autosync\n");
1572                 show_auto_sync_source = 1;
1573         } else if (rme9652->control_register & RME9652_wsel) {
1574                 if (status & RME9652_wsel_rd) {
1575                         snd_iprintf(buffer, "Clock mode: word clock\n");
1576                 } else {
1577                         snd_iprintf(buffer, "Clock mode: word clock (no signal)\n");
1578                 }
1579         } else {
1580                 snd_iprintf(buffer, "Clock mode: master\n");
1581         }
1582
1583         if (show_auto_sync_source) {
1584                 switch (rme9652->control_register & RME9652_SyncPref_Mask) {
1585                 case RME9652_SyncPref_ADAT1:
1586                         snd_iprintf(buffer, "Pref. sync source: ADAT1\n");
1587                         break;
1588                 case RME9652_SyncPref_ADAT2:
1589                         snd_iprintf(buffer, "Pref. sync source: ADAT2\n");
1590                         break;
1591                 case RME9652_SyncPref_ADAT3:
1592                         snd_iprintf(buffer, "Pref. sync source: ADAT3\n");
1593                         break;
1594                 case RME9652_SyncPref_SPDIF:
1595                         snd_iprintf(buffer, "Pref. sync source: IEC958\n");
1596                         break;
1597                 default:
1598                         snd_iprintf(buffer, "Pref. sync source: ???\n");
1599                 }
1600         }
1601
1602         if (rme9652->hw_rev >= 15)
1603                 snd_iprintf(buffer, "\nADAT1 Input source: %s\n",
1604                             (rme9652->control_register & RME9652_ADAT1_INTERNAL) ?
1605                             "Internal" : "ADAT1 optical");
1606
1607         snd_iprintf(buffer, "\n");
1608
1609         switch (rme9652_decode_spdif_in(rme9652->control_register &
1610                                         RME9652_inp)) {
1611         case RME9652_SPDIFIN_OPTICAL:
1612                 snd_iprintf(buffer, "IEC958 input: ADAT1\n");
1613                 break;
1614         case RME9652_SPDIFIN_COAXIAL:
1615                 snd_iprintf(buffer, "IEC958 input: Coaxial\n");
1616                 break;
1617         case RME9652_SPDIFIN_INTERN:
1618                 snd_iprintf(buffer, "IEC958 input: Internal\n");
1619                 break;
1620         default:
1621                 snd_iprintf(buffer, "IEC958 input: ???\n");
1622                 break;
1623         }
1624
1625         if (rme9652->control_register & RME9652_opt_out) {
1626                 snd_iprintf(buffer, "IEC958 output: Coaxial & ADAT1\n");
1627         } else {
1628                 snd_iprintf(buffer, "IEC958 output: Coaxial only\n");
1629         }
1630
1631         if (rme9652->control_register & RME9652_PRO) {
1632                 snd_iprintf(buffer, "IEC958 quality: Professional\n");
1633         } else {
1634                 snd_iprintf(buffer, "IEC958 quality: Consumer\n");
1635         }
1636
1637         if (rme9652->control_register & RME9652_EMP) {
1638                 snd_iprintf(buffer, "IEC958 emphasis: on\n");
1639         } else {
1640                 snd_iprintf(buffer, "IEC958 emphasis: off\n");
1641         }
1642
1643         if (rme9652->control_register & RME9652_Dolby) {
1644                 snd_iprintf(buffer, "IEC958 Dolby: on\n");
1645         } else {
1646                 snd_iprintf(buffer, "IEC958 Dolby: off\n");
1647         }
1648
1649         i = rme9652_spdif_sample_rate(rme9652);
1650
1651         if (i < 0) {
1652                 snd_iprintf(buffer,
1653                             "IEC958 sample rate: error flag set\n");
1654         } else if (i == 0) {
1655                 snd_iprintf(buffer, "IEC958 sample rate: undetermined\n");
1656         } else {
1657                 snd_iprintf(buffer, "IEC958 sample rate: %d\n", i);
1658         }
1659
1660         snd_iprintf(buffer, "\n");
1661
1662         snd_iprintf(buffer, "ADAT Sample rate: %dHz\n",
1663                     rme9652_adat_sample_rate(rme9652));
1664
1665         /* Sync Check */
1666
1667         x = status & RME9652_sync_0;
1668         if (status & RME9652_lock_0) {
1669                 snd_iprintf(buffer, "ADAT1: %s\n", x ? "Sync" : "Lock");
1670         } else {
1671                 snd_iprintf(buffer, "ADAT1: No Lock\n");
1672         }
1673
1674         x = status & RME9652_sync_1;
1675         if (status & RME9652_lock_1) {
1676                 snd_iprintf(buffer, "ADAT2: %s\n", x ? "Sync" : "Lock");
1677         } else {
1678                 snd_iprintf(buffer, "ADAT2: No Lock\n");
1679         }
1680
1681         x = status & RME9652_sync_2;
1682         if (status & RME9652_lock_2) {
1683                 snd_iprintf(buffer, "ADAT3: %s\n", x ? "Sync" : "Lock");
1684         } else {
1685                 snd_iprintf(buffer, "ADAT3: No Lock\n");
1686         }
1687
1688         snd_iprintf(buffer, "\n");
1689
1690         snd_iprintf(buffer, "Timecode signal: %s\n",
1691                     (status & RME9652_tc_valid) ? "yes" : "no");
1692
1693         /* thru modes */
1694
1695         snd_iprintf(buffer, "Punch Status:\n\n");
1696
1697         for (i = 0; i < rme9652->ss_channels; i++) {
1698                 if (thru_bits & (1 << i)) {
1699                         snd_iprintf(buffer, "%2d:  on ", i + 1);
1700                 } else {
1701                         snd_iprintf(buffer, "%2d: off ", i + 1);
1702                 }
1703
1704                 if (((i + 1) % 8) == 0) {
1705                         snd_iprintf(buffer, "\n");
1706                 }
1707         }
1708
1709         snd_iprintf(buffer, "\n");
1710 }
1711
1712 static void snd_rme9652_proc_init(struct snd_rme9652 *rme9652)
1713 {
1714         snd_card_ro_proc_new(rme9652->card, "rme9652", rme9652,
1715                              snd_rme9652_proc_read);
1716 }
1717
1718 static void snd_rme9652_free_buffers(struct snd_rme9652 *rme9652)
1719 {
1720         snd_hammerfall_free_buffer(&rme9652->capture_dma_buf, rme9652->pci);
1721         snd_hammerfall_free_buffer(&rme9652->playback_dma_buf, rme9652->pci);
1722 }
1723
1724 static int snd_rme9652_free(struct snd_rme9652 *rme9652)
1725 {
1726         if (rme9652->irq >= 0)
1727                 rme9652_stop(rme9652);
1728         snd_rme9652_free_buffers(rme9652);
1729
1730         if (rme9652->irq >= 0)
1731                 free_irq(rme9652->irq, (void *)rme9652);
1732         iounmap(rme9652->iobase);
1733         if (rme9652->port)
1734                 pci_release_regions(rme9652->pci);
1735
1736         pci_disable_device(rme9652->pci);
1737         return 0;
1738 }
1739
1740 static int snd_rme9652_initialize_memory(struct snd_rme9652 *rme9652)
1741 {
1742         unsigned long pb_bus, cb_bus;
1743
1744         if (snd_hammerfall_get_buffer(rme9652->pci, &rme9652->capture_dma_buf, RME9652_DMA_AREA_BYTES) < 0 ||
1745             snd_hammerfall_get_buffer(rme9652->pci, &rme9652->playback_dma_buf, RME9652_DMA_AREA_BYTES) < 0) {
1746                 if (rme9652->capture_dma_buf.area)
1747                         snd_dma_free_pages(&rme9652->capture_dma_buf);
1748                 dev_err(rme9652->card->dev,
1749                         "%s: no buffers available\n", rme9652->card_name);
1750                 return -ENOMEM;
1751         }
1752
1753         /* Align to bus-space 64K boundary */
1754
1755         cb_bus = ALIGN(rme9652->capture_dma_buf.addr, 0x10000ul);
1756         pb_bus = ALIGN(rme9652->playback_dma_buf.addr, 0x10000ul);
1757
1758         /* Tell the card where it is */
1759
1760         rme9652_write(rme9652, RME9652_rec_buffer, cb_bus);
1761         rme9652_write(rme9652, RME9652_play_buffer, pb_bus);
1762
1763         rme9652->capture_buffer = rme9652->capture_dma_buf.area + (cb_bus - rme9652->capture_dma_buf.addr);
1764         rme9652->playback_buffer = rme9652->playback_dma_buf.area + (pb_bus - rme9652->playback_dma_buf.addr);
1765
1766         return 0;
1767 }
1768
1769 static void snd_rme9652_set_defaults(struct snd_rme9652 *rme9652)
1770 {
1771         unsigned int k;
1772
1773         /* ASSUMPTION: rme9652->lock is either held, or
1774            there is no need to hold it (e.g. during module
1775            initialization).
1776          */
1777
1778         /* set defaults:
1779
1780            SPDIF Input via Coax
1781            autosync clock mode
1782            maximum latency (7 = 8192 samples, 64Kbyte buffer,
1783            which implies 2 4096 sample, 32Kbyte periods).
1784
1785            if rev 1.5, initialize the S/PDIF receiver.
1786
1787          */
1788
1789         rme9652->control_register =
1790             RME9652_inp_0 | rme9652_encode_latency(7);
1791
1792         rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1793
1794         rme9652_reset_hw_pointer(rme9652);
1795         rme9652_compute_period_size(rme9652);
1796
1797         /* default: thru off for all channels */
1798
1799         for (k = 0; k < RME9652_NCHANNELS; ++k)
1800                 rme9652_write(rme9652, RME9652_thru_base + k * 4, 0);
1801
1802         rme9652->thru_bits = 0;
1803         rme9652->passthru = 0;
1804
1805         /* set a default rate so that the channel map is set up */
1806
1807         rme9652_set_rate(rme9652, 48000);
1808 }
1809
1810 static irqreturn_t snd_rme9652_interrupt(int irq, void *dev_id)
1811 {
1812         struct snd_rme9652 *rme9652 = (struct snd_rme9652 *) dev_id;
1813
1814         if (!(rme9652_read(rme9652, RME9652_status_register) & RME9652_IRQ)) {
1815                 return IRQ_NONE;
1816         }
1817
1818         rme9652_write(rme9652, RME9652_irq_clear, 0);
1819
1820         if (rme9652->capture_substream) {
1821                 snd_pcm_period_elapsed(rme9652->pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream);
1822         }
1823
1824         if (rme9652->playback_substream) {
1825                 snd_pcm_period_elapsed(rme9652->pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream);
1826         }
1827         return IRQ_HANDLED;
1828 }
1829
1830 static snd_pcm_uframes_t snd_rme9652_hw_pointer(struct snd_pcm_substream *substream)
1831 {
1832         struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1833         return rme9652_hw_pointer(rme9652);
1834 }
1835
1836 static char *rme9652_channel_buffer_location(struct snd_rme9652 *rme9652,
1837                                              int stream,
1838                                              int channel)
1839
1840 {
1841         int mapped_channel;
1842
1843         if (snd_BUG_ON(channel < 0 || channel >= RME9652_NCHANNELS))
1844                 return NULL;
1845
1846         if ((mapped_channel = rme9652->channel_map[channel]) < 0) {
1847                 return NULL;
1848         }
1849
1850         if (stream == SNDRV_PCM_STREAM_CAPTURE) {
1851                 return rme9652->capture_buffer +
1852                         (mapped_channel * RME9652_CHANNEL_BUFFER_BYTES);
1853         } else {
1854                 return rme9652->playback_buffer +
1855                         (mapped_channel * RME9652_CHANNEL_BUFFER_BYTES);
1856         }
1857 }
1858
1859 static int snd_rme9652_playback_copy(struct snd_pcm_substream *substream,
1860                                      int channel, unsigned long pos,
1861                                      void __user *src, unsigned long count)
1862 {
1863         struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1864         char *channel_buf;
1865
1866         if (snd_BUG_ON(pos + count > RME9652_CHANNEL_BUFFER_BYTES))
1867                 return -EINVAL;
1868
1869         channel_buf = rme9652_channel_buffer_location (rme9652,
1870                                                        substream->pstr->stream,
1871                                                        channel);
1872         if (snd_BUG_ON(!channel_buf))
1873                 return -EIO;
1874         if (copy_from_user(channel_buf + pos, src, count))
1875                 return -EFAULT;
1876         return 0;
1877 }
1878
1879 static int snd_rme9652_playback_copy_kernel(struct snd_pcm_substream *substream,
1880                                             int channel, unsigned long pos,
1881                                             void *src, unsigned long count)
1882 {
1883         struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1884         char *channel_buf;
1885
1886         channel_buf = rme9652_channel_buffer_location(rme9652,
1887                                                       substream->pstr->stream,
1888                                                       channel);
1889         if (snd_BUG_ON(!channel_buf))
1890                 return -EIO;
1891         memcpy(channel_buf + pos, src, count);
1892         return 0;
1893 }
1894
1895 static int snd_rme9652_capture_copy(struct snd_pcm_substream *substream,
1896                                     int channel, unsigned long pos,
1897                                     void __user *dst, unsigned long count)
1898 {
1899         struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1900         char *channel_buf;
1901
1902         if (snd_BUG_ON(pos + count > RME9652_CHANNEL_BUFFER_BYTES))
1903                 return -EINVAL;
1904
1905         channel_buf = rme9652_channel_buffer_location (rme9652,
1906                                                        substream->pstr->stream,
1907                                                        channel);
1908         if (snd_BUG_ON(!channel_buf))
1909                 return -EIO;
1910         if (copy_to_user(dst, channel_buf + pos, count))
1911                 return -EFAULT;
1912         return 0;
1913 }
1914
1915 static int snd_rme9652_capture_copy_kernel(struct snd_pcm_substream *substream,
1916                                            int channel, unsigned long pos,
1917                                            void *dst, unsigned long count)
1918 {
1919         struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1920         char *channel_buf;
1921
1922         channel_buf = rme9652_channel_buffer_location(rme9652,
1923                                                       substream->pstr->stream,
1924                                                       channel);
1925         if (snd_BUG_ON(!channel_buf))
1926                 return -EIO;
1927         memcpy(dst, channel_buf + pos, count);
1928         return 0;
1929 }
1930
1931 static int snd_rme9652_hw_silence(struct snd_pcm_substream *substream,
1932                                   int channel, unsigned long pos,
1933                                   unsigned long count)
1934 {
1935         struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1936         char *channel_buf;
1937
1938         channel_buf = rme9652_channel_buffer_location (rme9652,
1939                                                        substream->pstr->stream,
1940                                                        channel);
1941         if (snd_BUG_ON(!channel_buf))
1942                 return -EIO;
1943         memset(channel_buf + pos, 0, count);
1944         return 0;
1945 }
1946
1947 static int snd_rme9652_reset(struct snd_pcm_substream *substream)
1948 {
1949         struct snd_pcm_runtime *runtime = substream->runtime;
1950         struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1951         struct snd_pcm_substream *other;
1952         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
1953                 other = rme9652->capture_substream;
1954         else
1955                 other = rme9652->playback_substream;
1956         if (rme9652->running)
1957                 runtime->status->hw_ptr = rme9652_hw_pointer(rme9652);
1958         else
1959                 runtime->status->hw_ptr = 0;
1960         if (other) {
1961                 struct snd_pcm_substream *s;
1962                 struct snd_pcm_runtime *oruntime = other->runtime;
1963                 snd_pcm_group_for_each_entry(s, substream) {
1964                         if (s == other) {
1965                                 oruntime->status->hw_ptr = runtime->status->hw_ptr;
1966                                 break;
1967                         }
1968                 }
1969         }
1970         return 0;
1971 }
1972
1973 static int snd_rme9652_hw_params(struct snd_pcm_substream *substream,
1974                                  struct snd_pcm_hw_params *params)
1975 {
1976         struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1977         int err;
1978         pid_t this_pid;
1979         pid_t other_pid;
1980
1981         spin_lock_irq(&rme9652->lock);
1982
1983         if (substream->pstr->stream == SNDRV_PCM_STREAM_PLAYBACK) {
1984                 rme9652->control_register &= ~(RME9652_PRO | RME9652_Dolby | RME9652_EMP);
1985                 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register |= rme9652->creg_spdif_stream);
1986                 this_pid = rme9652->playback_pid;
1987                 other_pid = rme9652->capture_pid;
1988         } else {
1989                 this_pid = rme9652->capture_pid;
1990                 other_pid = rme9652->playback_pid;
1991         }
1992
1993         if ((other_pid > 0) && (this_pid != other_pid)) {
1994
1995                 /* The other stream is open, and not by the same
1996                    task as this one. Make sure that the parameters
1997                    that matter are the same.
1998                  */
1999
2000                 if ((int)params_rate(params) !=
2001                     rme9652_adat_sample_rate(rme9652)) {
2002                         spin_unlock_irq(&rme9652->lock);
2003                         _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_RATE);
2004                         return -EBUSY;
2005                 }
2006
2007                 if (params_period_size(params) != rme9652->period_bytes / 4) {
2008                         spin_unlock_irq(&rme9652->lock);
2009                         _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_PERIOD_SIZE);
2010                         return -EBUSY;
2011                 }
2012
2013                 /* We're fine. */
2014
2015                 spin_unlock_irq(&rme9652->lock);
2016                 return 0;
2017
2018         } else {
2019                 spin_unlock_irq(&rme9652->lock);
2020         }
2021
2022         /* how to make sure that the rate matches an externally-set one ?
2023          */
2024
2025         if ((err = rme9652_set_rate(rme9652, params_rate(params))) < 0) {
2026                 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_RATE);
2027                 return err;
2028         }
2029
2030         if ((err = rme9652_set_interrupt_interval(rme9652, params_period_size(params))) < 0) {
2031                 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_PERIOD_SIZE);
2032                 return err;
2033         }
2034
2035         return 0;
2036 }
2037
2038 static int snd_rme9652_channel_info(struct snd_pcm_substream *substream,
2039                                     struct snd_pcm_channel_info *info)
2040 {
2041         struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2042         int chn;
2043
2044         if (snd_BUG_ON(info->channel >= RME9652_NCHANNELS))
2045                 return -EINVAL;
2046
2047         chn = rme9652->channel_map[array_index_nospec(info->channel,
2048                                                       RME9652_NCHANNELS)];
2049         if (chn < 0)
2050                 return -EINVAL;
2051
2052         info->offset = chn * RME9652_CHANNEL_BUFFER_BYTES;
2053         info->first = 0;
2054         info->step = 32;
2055         return 0;
2056 }
2057
2058 static int snd_rme9652_ioctl(struct snd_pcm_substream *substream,
2059                              unsigned int cmd, void *arg)
2060 {
2061         switch (cmd) {
2062         case SNDRV_PCM_IOCTL1_RESET:
2063         {
2064                 return snd_rme9652_reset(substream);
2065         }
2066         case SNDRV_PCM_IOCTL1_CHANNEL_INFO:
2067         {
2068                 struct snd_pcm_channel_info *info = arg;
2069                 return snd_rme9652_channel_info(substream, info);
2070         }
2071         default:
2072                 break;
2073         }
2074
2075         return snd_pcm_lib_ioctl(substream, cmd, arg);
2076 }
2077
2078 static void rme9652_silence_playback(struct snd_rme9652 *rme9652)
2079 {
2080         memset(rme9652->playback_buffer, 0, RME9652_DMA_AREA_BYTES);
2081 }
2082
2083 static int snd_rme9652_trigger(struct snd_pcm_substream *substream,
2084                                int cmd)
2085 {
2086         struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2087         struct snd_pcm_substream *other;
2088         int running;
2089         spin_lock(&rme9652->lock);
2090         running = rme9652->running;
2091         switch (cmd) {
2092         case SNDRV_PCM_TRIGGER_START:
2093                 running |= 1 << substream->stream;
2094                 break;
2095         case SNDRV_PCM_TRIGGER_STOP:
2096                 running &= ~(1 << substream->stream);
2097                 break;
2098         default:
2099                 snd_BUG();
2100                 spin_unlock(&rme9652->lock);
2101                 return -EINVAL;
2102         }
2103         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
2104                 other = rme9652->capture_substream;
2105         else
2106                 other = rme9652->playback_substream;
2107
2108         if (other) {
2109                 struct snd_pcm_substream *s;
2110                 snd_pcm_group_for_each_entry(s, substream) {
2111                         if (s == other) {
2112                                 snd_pcm_trigger_done(s, substream);
2113                                 if (cmd == SNDRV_PCM_TRIGGER_START)
2114                                         running |= 1 << s->stream;
2115                                 else
2116                                         running &= ~(1 << s->stream);
2117                                 goto _ok;
2118                         }
2119                 }
2120                 if (cmd == SNDRV_PCM_TRIGGER_START) {
2121                         if (!(running & (1 << SNDRV_PCM_STREAM_PLAYBACK)) &&
2122                             substream->stream == SNDRV_PCM_STREAM_CAPTURE)
2123                                 rme9652_silence_playback(rme9652);
2124                 } else {
2125                         if (running &&
2126                             substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
2127                                 rme9652_silence_playback(rme9652);
2128                 }
2129         } else {
2130                 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
2131                         rme9652_silence_playback(rme9652);
2132         }
2133  _ok:
2134         snd_pcm_trigger_done(substream, substream);
2135         if (!rme9652->running && running)
2136                 rme9652_start(rme9652);
2137         else if (rme9652->running && !running)
2138                 rme9652_stop(rme9652);
2139         rme9652->running = running;
2140         spin_unlock(&rme9652->lock);
2141
2142         return 0;
2143 }
2144
2145 static int snd_rme9652_prepare(struct snd_pcm_substream *substream)
2146 {
2147         struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2148         unsigned long flags;
2149
2150         spin_lock_irqsave(&rme9652->lock, flags);
2151         if (!rme9652->running)
2152                 rme9652_reset_hw_pointer(rme9652);
2153         spin_unlock_irqrestore(&rme9652->lock, flags);
2154         return 0;
2155 }
2156
2157 static const struct snd_pcm_hardware snd_rme9652_playback_subinfo =
2158 {
2159         .info =                 (SNDRV_PCM_INFO_MMAP |
2160                                  SNDRV_PCM_INFO_MMAP_VALID |
2161                                  SNDRV_PCM_INFO_NONINTERLEAVED |
2162                                  SNDRV_PCM_INFO_SYNC_START |
2163                                  SNDRV_PCM_INFO_DOUBLE),
2164         .formats =              SNDRV_PCM_FMTBIT_S32_LE,
2165         .rates =                (SNDRV_PCM_RATE_44100 |
2166                                  SNDRV_PCM_RATE_48000 |
2167                                  SNDRV_PCM_RATE_88200 |
2168                                  SNDRV_PCM_RATE_96000),
2169         .rate_min =             44100,
2170         .rate_max =             96000,
2171         .channels_min =         10,
2172         .channels_max =         26,
2173         .buffer_bytes_max =     RME9652_CHANNEL_BUFFER_BYTES * 26,
2174         .period_bytes_min =     (64 * 4) * 10,
2175         .period_bytes_max =     (8192 * 4) * 26,
2176         .periods_min =          2,
2177         .periods_max =          2,
2178         .fifo_size =            0,
2179 };
2180
2181 static const struct snd_pcm_hardware snd_rme9652_capture_subinfo =
2182 {
2183         .info =                 (SNDRV_PCM_INFO_MMAP |
2184                                  SNDRV_PCM_INFO_MMAP_VALID |
2185                                  SNDRV_PCM_INFO_NONINTERLEAVED |
2186                                  SNDRV_PCM_INFO_SYNC_START),
2187         .formats =              SNDRV_PCM_FMTBIT_S32_LE,
2188         .rates =                (SNDRV_PCM_RATE_44100 |
2189                                  SNDRV_PCM_RATE_48000 |
2190                                  SNDRV_PCM_RATE_88200 |
2191                                  SNDRV_PCM_RATE_96000),
2192         .rate_min =             44100,
2193         .rate_max =             96000,
2194         .channels_min =         10,
2195         .channels_max =         26,
2196         .buffer_bytes_max =     RME9652_CHANNEL_BUFFER_BYTES *26,
2197         .period_bytes_min =     (64 * 4) * 10,
2198         .period_bytes_max =     (8192 * 4) * 26,
2199         .periods_min =          2,
2200         .periods_max =          2,
2201         .fifo_size =            0,
2202 };
2203
2204 static const unsigned int period_sizes[] = { 64, 128, 256, 512, 1024, 2048, 4096, 8192 };
2205
2206 static const struct snd_pcm_hw_constraint_list hw_constraints_period_sizes = {
2207         .count = ARRAY_SIZE(period_sizes),
2208         .list = period_sizes,
2209         .mask = 0
2210 };
2211
2212 static int snd_rme9652_hw_rule_channels(struct snd_pcm_hw_params *params,
2213                                         struct snd_pcm_hw_rule *rule)
2214 {
2215         struct snd_rme9652 *rme9652 = rule->private;
2216         struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
2217         unsigned int list[2] = { rme9652->ds_channels, rme9652->ss_channels };
2218         return snd_interval_list(c, 2, list, 0);
2219 }
2220
2221 static int snd_rme9652_hw_rule_channels_rate(struct snd_pcm_hw_params *params,
2222                                              struct snd_pcm_hw_rule *rule)
2223 {
2224         struct snd_rme9652 *rme9652 = rule->private;
2225         struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
2226         struct snd_interval *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
2227         if (r->min > 48000) {
2228                 struct snd_interval t = {
2229                         .min = rme9652->ds_channels,
2230                         .max = rme9652->ds_channels,
2231                         .integer = 1,
2232                 };
2233                 return snd_interval_refine(c, &t);
2234         } else if (r->max < 88200) {
2235                 struct snd_interval t = {
2236                         .min = rme9652->ss_channels,
2237                         .max = rme9652->ss_channels,
2238                         .integer = 1,
2239                 };
2240                 return snd_interval_refine(c, &t);
2241         }
2242         return 0;
2243 }
2244
2245 static int snd_rme9652_hw_rule_rate_channels(struct snd_pcm_hw_params *params,
2246                                              struct snd_pcm_hw_rule *rule)
2247 {
2248         struct snd_rme9652 *rme9652 = rule->private;
2249         struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
2250         struct snd_interval *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
2251         if (c->min >= rme9652->ss_channels) {
2252                 struct snd_interval t = {
2253                         .min = 44100,
2254                         .max = 48000,
2255                         .integer = 1,
2256                 };
2257                 return snd_interval_refine(r, &t);
2258         } else if (c->max <= rme9652->ds_channels) {
2259                 struct snd_interval t = {
2260                         .min = 88200,
2261                         .max = 96000,
2262                         .integer = 1,
2263                 };
2264                 return snd_interval_refine(r, &t);
2265         }
2266         return 0;
2267 }
2268
2269 static int snd_rme9652_playback_open(struct snd_pcm_substream *substream)
2270 {
2271         struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2272         struct snd_pcm_runtime *runtime = substream->runtime;
2273
2274         spin_lock_irq(&rme9652->lock);
2275
2276         snd_pcm_set_sync(substream);
2277
2278         runtime->hw = snd_rme9652_playback_subinfo;
2279         runtime->dma_area = rme9652->playback_buffer;
2280         runtime->dma_bytes = RME9652_DMA_AREA_BYTES;
2281
2282         if (rme9652->capture_substream == NULL) {
2283                 rme9652_stop(rme9652);
2284                 rme9652_set_thru(rme9652, -1, 0);
2285         }
2286
2287         rme9652->playback_pid = current->pid;
2288         rme9652->playback_substream = substream;
2289
2290         spin_unlock_irq(&rme9652->lock);
2291
2292         snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
2293         snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, &hw_constraints_period_sizes);
2294         snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
2295                              snd_rme9652_hw_rule_channels, rme9652,
2296                              SNDRV_PCM_HW_PARAM_CHANNELS, -1);
2297         snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
2298                              snd_rme9652_hw_rule_channels_rate, rme9652,
2299                              SNDRV_PCM_HW_PARAM_RATE, -1);
2300         snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
2301                              snd_rme9652_hw_rule_rate_channels, rme9652,
2302                              SNDRV_PCM_HW_PARAM_CHANNELS, -1);
2303
2304         rme9652->creg_spdif_stream = rme9652->creg_spdif;
2305         rme9652->spdif_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
2306         snd_ctl_notify(rme9652->card, SNDRV_CTL_EVENT_MASK_VALUE |
2307                        SNDRV_CTL_EVENT_MASK_INFO, &rme9652->spdif_ctl->id);
2308         return 0;
2309 }
2310
2311 static int snd_rme9652_playback_release(struct snd_pcm_substream *substream)
2312 {
2313         struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2314
2315         spin_lock_irq(&rme9652->lock);
2316
2317         rme9652->playback_pid = -1;
2318         rme9652->playback_substream = NULL;
2319
2320         spin_unlock_irq(&rme9652->lock);
2321
2322         rme9652->spdif_ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
2323         snd_ctl_notify(rme9652->card, SNDRV_CTL_EVENT_MASK_VALUE |
2324                        SNDRV_CTL_EVENT_MASK_INFO, &rme9652->spdif_ctl->id);
2325         return 0;
2326 }
2327
2328
2329 static int snd_rme9652_capture_open(struct snd_pcm_substream *substream)
2330 {
2331         struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2332         struct snd_pcm_runtime *runtime = substream->runtime;
2333
2334         spin_lock_irq(&rme9652->lock);
2335
2336         snd_pcm_set_sync(substream);
2337
2338         runtime->hw = snd_rme9652_capture_subinfo;
2339         runtime->dma_area = rme9652->capture_buffer;
2340         runtime->dma_bytes = RME9652_DMA_AREA_BYTES;
2341
2342         if (rme9652->playback_substream == NULL) {
2343                 rme9652_stop(rme9652);
2344                 rme9652_set_thru(rme9652, -1, 0);
2345         }
2346
2347         rme9652->capture_pid = current->pid;
2348         rme9652->capture_substream = substream;
2349
2350         spin_unlock_irq(&rme9652->lock);
2351
2352         snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
2353         snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, &hw_constraints_period_sizes);
2354         snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
2355                              snd_rme9652_hw_rule_channels, rme9652,
2356                              SNDRV_PCM_HW_PARAM_CHANNELS, -1);
2357         snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
2358                              snd_rme9652_hw_rule_channels_rate, rme9652,
2359                              SNDRV_PCM_HW_PARAM_RATE, -1);
2360         snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
2361                              snd_rme9652_hw_rule_rate_channels, rme9652,
2362                              SNDRV_PCM_HW_PARAM_CHANNELS, -1);
2363         return 0;
2364 }
2365
2366 static int snd_rme9652_capture_release(struct snd_pcm_substream *substream)
2367 {
2368         struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2369
2370         spin_lock_irq(&rme9652->lock);
2371
2372         rme9652->capture_pid = -1;
2373         rme9652->capture_substream = NULL;
2374
2375         spin_unlock_irq(&rme9652->lock);
2376         return 0;
2377 }
2378
2379 static const struct snd_pcm_ops snd_rme9652_playback_ops = {
2380         .open =         snd_rme9652_playback_open,
2381         .close =        snd_rme9652_playback_release,
2382         .ioctl =        snd_rme9652_ioctl,
2383         .hw_params =    snd_rme9652_hw_params,
2384         .prepare =      snd_rme9652_prepare,
2385         .trigger =      snd_rme9652_trigger,
2386         .pointer =      snd_rme9652_hw_pointer,
2387         .copy_user =    snd_rme9652_playback_copy,
2388         .copy_kernel =  snd_rme9652_playback_copy_kernel,
2389         .fill_silence = snd_rme9652_hw_silence,
2390 };
2391
2392 static const struct snd_pcm_ops snd_rme9652_capture_ops = {
2393         .open =         snd_rme9652_capture_open,
2394         .close =        snd_rme9652_capture_release,
2395         .ioctl =        snd_rme9652_ioctl,
2396         .hw_params =    snd_rme9652_hw_params,
2397         .prepare =      snd_rme9652_prepare,
2398         .trigger =      snd_rme9652_trigger,
2399         .pointer =      snd_rme9652_hw_pointer,
2400         .copy_user =    snd_rme9652_capture_copy,
2401         .copy_kernel =  snd_rme9652_capture_copy_kernel,
2402 };
2403
2404 static int snd_rme9652_create_pcm(struct snd_card *card,
2405                                   struct snd_rme9652 *rme9652)
2406 {
2407         struct snd_pcm *pcm;
2408         int err;
2409
2410         if ((err = snd_pcm_new(card,
2411                                rme9652->card_name,
2412                                0, 1, 1, &pcm)) < 0) {
2413                 return err;
2414         }
2415
2416         rme9652->pcm = pcm;
2417         pcm->private_data = rme9652;
2418         strcpy(pcm->name, rme9652->card_name);
2419
2420         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_rme9652_playback_ops);
2421         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_rme9652_capture_ops);
2422
2423         pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX;
2424
2425         return 0;
2426 }
2427
2428 static int snd_rme9652_create(struct snd_card *card,
2429                               struct snd_rme9652 *rme9652,
2430                               int precise_ptr)
2431 {
2432         struct pci_dev *pci = rme9652->pci;
2433         int err;
2434         int status;
2435         unsigned short rev;
2436
2437         rme9652->irq = -1;
2438         rme9652->card = card;
2439
2440         pci_read_config_word(rme9652->pci, PCI_CLASS_REVISION, &rev);
2441
2442         switch (rev & 0xff) {
2443         case 3:
2444         case 4:
2445         case 8:
2446         case 9:
2447                 break;
2448
2449         default:
2450                 /* who knows? */
2451                 return -ENODEV;
2452         }
2453
2454         if ((err = pci_enable_device(pci)) < 0)
2455                 return err;
2456
2457         spin_lock_init(&rme9652->lock);
2458
2459         if ((err = pci_request_regions(pci, "rme9652")) < 0)
2460                 return err;
2461         rme9652->port = pci_resource_start(pci, 0);
2462         rme9652->iobase = ioremap(rme9652->port, RME9652_IO_EXTENT);
2463         if (rme9652->iobase == NULL) {
2464                 dev_err(card->dev, "unable to remap region 0x%lx-0x%lx\n",
2465                         rme9652->port, rme9652->port + RME9652_IO_EXTENT - 1);
2466                 return -EBUSY;
2467         }
2468
2469         if (request_irq(pci->irq, snd_rme9652_interrupt, IRQF_SHARED,
2470                         KBUILD_MODNAME, rme9652)) {
2471                 dev_err(card->dev, "unable to request IRQ %d\n", pci->irq);
2472                 return -EBUSY;
2473         }
2474         rme9652->irq = pci->irq;
2475         card->sync_irq = rme9652->irq;
2476         rme9652->precise_ptr = precise_ptr;
2477
2478         /* Determine the h/w rev level of the card. This seems like
2479            a particularly kludgy way to encode it, but its what RME
2480            chose to do, so we follow them ...
2481         */
2482
2483         status = rme9652_read(rme9652, RME9652_status_register);
2484         if (rme9652_decode_spdif_rate(status&RME9652_F) == 1) {
2485                 rme9652->hw_rev = 15;
2486         } else {
2487                 rme9652->hw_rev = 11;
2488         }
2489
2490         /* Differentiate between the standard Hammerfall, and the
2491            "Light", which does not have the expansion board. This
2492            method comes from information received from Mathhias
2493            Clausen at RME. Display the EEPROM and h/w revID where
2494            relevant.
2495         */
2496
2497         switch (rev) {
2498         case 8: /* original eprom */
2499                 strcpy(card->driver, "RME9636");
2500                 if (rme9652->hw_rev == 15) {
2501                         rme9652->card_name = "RME Digi9636 (Rev 1.5)";
2502                 } else {
2503                         rme9652->card_name = "RME Digi9636";
2504                 }
2505                 rme9652->ss_channels = RME9636_NCHANNELS;
2506                 break;
2507         case 9: /* W36_G EPROM */
2508                 strcpy(card->driver, "RME9636");
2509                 rme9652->card_name = "RME Digi9636 (Rev G)";
2510                 rme9652->ss_channels = RME9636_NCHANNELS;
2511                 break;
2512         case 4: /* W52_G EPROM */
2513                 strcpy(card->driver, "RME9652");
2514                 rme9652->card_name = "RME Digi9652 (Rev G)";
2515                 rme9652->ss_channels = RME9652_NCHANNELS;
2516                 break;
2517         case 3: /* original eprom */
2518                 strcpy(card->driver, "RME9652");
2519                 if (rme9652->hw_rev == 15) {
2520                         rme9652->card_name = "RME Digi9652 (Rev 1.5)";
2521                 } else {
2522                         rme9652->card_name = "RME Digi9652";
2523                 }
2524                 rme9652->ss_channels = RME9652_NCHANNELS;
2525                 break;
2526         }
2527
2528         rme9652->ds_channels = (rme9652->ss_channels - 2) / 2 + 2;
2529
2530         pci_set_master(rme9652->pci);
2531
2532         if ((err = snd_rme9652_initialize_memory(rme9652)) < 0) {
2533                 return err;
2534         }
2535
2536         if ((err = snd_rme9652_create_pcm(card, rme9652)) < 0) {
2537                 return err;
2538         }
2539
2540         if ((err = snd_rme9652_create_controls(card, rme9652)) < 0) {
2541                 return err;
2542         }
2543
2544         snd_rme9652_proc_init(rme9652);
2545
2546         rme9652->last_spdif_sample_rate = -1;
2547         rme9652->last_adat_sample_rate = -1;
2548         rme9652->playback_pid = -1;
2549         rme9652->capture_pid = -1;
2550         rme9652->capture_substream = NULL;
2551         rme9652->playback_substream = NULL;
2552
2553         snd_rme9652_set_defaults(rme9652);
2554
2555         if (rme9652->hw_rev == 15) {
2556                 rme9652_initialize_spdif_receiver (rme9652);
2557         }
2558
2559         return 0;
2560 }
2561
2562 static void snd_rme9652_card_free(struct snd_card *card)
2563 {
2564         struct snd_rme9652 *rme9652 = (struct snd_rme9652 *) card->private_data;
2565
2566         if (rme9652)
2567                 snd_rme9652_free(rme9652);
2568 }
2569
2570 static int snd_rme9652_probe(struct pci_dev *pci,
2571                              const struct pci_device_id *pci_id)
2572 {
2573         static int dev;
2574         struct snd_rme9652 *rme9652;
2575         struct snd_card *card;
2576         int err;
2577
2578         if (dev >= SNDRV_CARDS)
2579                 return -ENODEV;
2580         if (!enable[dev]) {
2581                 dev++;
2582                 return -ENOENT;
2583         }
2584
2585         err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
2586                            sizeof(struct snd_rme9652), &card);
2587
2588         if (err < 0)
2589                 return err;
2590
2591         rme9652 = (struct snd_rme9652 *) card->private_data;
2592         card->private_free = snd_rme9652_card_free;
2593         rme9652->dev = dev;
2594         rme9652->pci = pci;
2595         err = snd_rme9652_create(card, rme9652, precise_ptr[dev]);
2596         if (err)
2597                 goto free_card;
2598
2599         strcpy(card->shortname, rme9652->card_name);
2600
2601         sprintf(card->longname, "%s at 0x%lx, irq %d",
2602                 card->shortname, rme9652->port, rme9652->irq);
2603         err = snd_card_register(card);
2604         if (err) {
2605 free_card:
2606                 snd_card_free(card);
2607                 return err;
2608         }
2609         pci_set_drvdata(pci, card);
2610         dev++;
2611         return 0;
2612 }
2613
2614 static void snd_rme9652_remove(struct pci_dev *pci)
2615 {
2616         snd_card_free(pci_get_drvdata(pci));
2617 }
2618
2619 static struct pci_driver rme9652_driver = {
2620         .name     = KBUILD_MODNAME,
2621         .id_table = snd_rme9652_ids,
2622         .probe    = snd_rme9652_probe,
2623         .remove   = snd_rme9652_remove,
2624 };
2625
2626 module_pci_driver(rme9652_driver);