1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * ALSA driver for RME Digi9652 audio interfaces
5 * Copyright (c) 1999 IEM - Winfried Ritsch
6 * Copyright (c) 1999-2001 Paul Davis
9 #include <linux/delay.h>
10 #include <linux/init.h>
11 #include <linux/interrupt.h>
12 #include <linux/pci.h>
13 #include <linux/module.h>
15 #include <linux/nospec.h>
17 #include <sound/core.h>
18 #include <sound/control.h>
19 #include <sound/pcm.h>
20 #include <sound/info.h>
21 #include <sound/asoundef.h>
22 #include <sound/initval.h>
24 #include <asm/current.h>
26 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
27 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
28 static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
29 static bool precise_ptr[SNDRV_CARDS]; /* Enable precise pointer */
31 module_param_array(index, int, NULL, 0444);
32 MODULE_PARM_DESC(index, "Index value for RME Digi9652 (Hammerfall) soundcard.");
33 module_param_array(id, charp, NULL, 0444);
34 MODULE_PARM_DESC(id, "ID string for RME Digi9652 (Hammerfall) soundcard.");
35 module_param_array(enable, bool, NULL, 0444);
36 MODULE_PARM_DESC(enable, "Enable/disable specific RME96{52,36} soundcards.");
37 module_param_array(precise_ptr, bool, NULL, 0444);
38 MODULE_PARM_DESC(precise_ptr, "Enable precise pointer (doesn't work reliably).");
39 MODULE_AUTHOR("Paul Davis <pbd@op.net>, Winfried Ritsch");
40 MODULE_DESCRIPTION("RME Digi9652/Digi9636");
41 MODULE_LICENSE("GPL");
43 /* The Hammerfall has two sets of 24 ADAT + 2 S/PDIF channels, one for
44 capture, one for playback. Both the ADAT and S/PDIF channels appear
45 to the host CPU in the same block of memory. There is no functional
46 difference between them in terms of access.
48 The Hammerfall Light is identical to the Hammerfall, except that it
49 has 2 sets 18 channels (16 ADAT + 2 S/PDIF) for capture and playback.
52 #define RME9652_NCHANNELS 26
53 #define RME9636_NCHANNELS 18
55 /* Preferred sync source choices - used by "sync_pref" control switch */
57 #define RME9652_SYNC_FROM_SPDIF 0
58 #define RME9652_SYNC_FROM_ADAT1 1
59 #define RME9652_SYNC_FROM_ADAT2 2
60 #define RME9652_SYNC_FROM_ADAT3 3
62 /* Possible sources of S/PDIF input */
64 #define RME9652_SPDIFIN_OPTICAL 0 /* optical (ADAT1) */
65 #define RME9652_SPDIFIN_COAXIAL 1 /* coaxial (RCA) */
66 #define RME9652_SPDIFIN_INTERN 2 /* internal (CDROM) */
68 /* ------------- Status-Register bits --------------------- */
70 #define RME9652_IRQ (1<<0) /* IRQ is High if not reset by irq_clear */
71 #define RME9652_lock_2 (1<<1) /* ADAT 3-PLL: 1=locked, 0=unlocked */
72 #define RME9652_lock_1 (1<<2) /* ADAT 2-PLL: 1=locked, 0=unlocked */
73 #define RME9652_lock_0 (1<<3) /* ADAT 1-PLL: 1=locked, 0=unlocked */
74 #define RME9652_fs48 (1<<4) /* sample rate is 0=44.1/88.2,1=48/96 Khz */
75 #define RME9652_wsel_rd (1<<5) /* if Word-Clock is used and valid then 1 */
76 /* bits 6-15 encode h/w buffer pointer position */
77 #define RME9652_sync_2 (1<<16) /* if ADAT-IN 3 in sync to system clock */
78 #define RME9652_sync_1 (1<<17) /* if ADAT-IN 2 in sync to system clock */
79 #define RME9652_sync_0 (1<<18) /* if ADAT-IN 1 in sync to system clock */
80 #define RME9652_DS_rd (1<<19) /* 1=Double Speed Mode, 0=Normal Speed */
81 #define RME9652_tc_busy (1<<20) /* 1=time-code copy in progress (960ms) */
82 #define RME9652_tc_out (1<<21) /* time-code out bit */
83 #define RME9652_F_0 (1<<22) /* 000=64kHz, 100=88.2kHz, 011=96kHz */
84 #define RME9652_F_1 (1<<23) /* 111=32kHz, 110=44.1kHz, 101=48kHz, */
85 #define RME9652_F_2 (1<<24) /* external Crystal Chip if ERF=1 */
86 #define RME9652_ERF (1<<25) /* Error-Flag of SDPIF Receiver (1=No Lock) */
87 #define RME9652_buffer_id (1<<26) /* toggles by each interrupt on rec/play */
88 #define RME9652_tc_valid (1<<27) /* 1 = a signal is detected on time-code input */
89 #define RME9652_SPDIF_READ (1<<28) /* byte available from Rev 1.5+ S/PDIF interface */
91 #define RME9652_sync (RME9652_sync_0|RME9652_sync_1|RME9652_sync_2)
92 #define RME9652_lock (RME9652_lock_0|RME9652_lock_1|RME9652_lock_2)
93 #define RME9652_F (RME9652_F_0|RME9652_F_1|RME9652_F_2)
94 #define rme9652_decode_spdif_rate(x) ((x)>>22)
96 /* Bit 6..15 : h/w buffer pointer */
98 #define RME9652_buf_pos 0x000FFC0
100 /* Bits 31,30,29 are bits 5,4,3 of h/w pointer position on later
101 Rev G EEPROMS and Rev 1.5 cards or later.
104 #define RME9652_REV15_buf_pos(x) ((((x)&0xE0000000)>>26)|((x)&RME9652_buf_pos))
106 /* amount of io space we remap for register access. i'm not sure we
107 even need this much, but 1K is nice round number :)
110 #define RME9652_IO_EXTENT 1024
112 #define RME9652_init_buffer 0
113 #define RME9652_play_buffer 32 /* holds ptr to 26x64kBit host RAM */
114 #define RME9652_rec_buffer 36 /* holds ptr to 26x64kBit host RAM */
115 #define RME9652_control_register 64
116 #define RME9652_irq_clear 96
117 #define RME9652_time_code 100 /* useful if used with alesis adat */
118 #define RME9652_thru_base 128 /* 132...228 Thru for 26 channels */
120 /* Read-only registers */
122 /* Writing to any of the register locations writes to the status
123 register. We'll use the first location as our point of access.
126 #define RME9652_status_register 0
128 /* --------- Control-Register Bits ---------------- */
131 #define RME9652_start_bit (1<<0) /* start record/play */
132 /* bits 1-3 encode buffersize/latency */
133 #define RME9652_Master (1<<4) /* Clock Mode Master=1,Slave/Auto=0 */
134 #define RME9652_IE (1<<5) /* Interrupt Enable */
135 #define RME9652_freq (1<<6) /* samplerate 0=44.1/88.2, 1=48/96 kHz */
136 #define RME9652_freq1 (1<<7) /* if 0, 32kHz, else always 1 */
137 #define RME9652_DS (1<<8) /* Doule Speed 0=44.1/48, 1=88.2/96 Khz */
138 #define RME9652_PRO (1<<9) /* S/PDIF out: 0=consumer, 1=professional */
139 #define RME9652_EMP (1<<10) /* Emphasis 0=None, 1=ON */
140 #define RME9652_Dolby (1<<11) /* Non-audio bit 1=set, 0=unset */
141 #define RME9652_opt_out (1<<12) /* Use 1st optical OUT as SPDIF: 1=yes,0=no */
142 #define RME9652_wsel (1<<13) /* use Wordclock as sync (overwrites master) */
143 #define RME9652_inp_0 (1<<14) /* SPDIF-IN: 00=optical (ADAT1), */
144 #define RME9652_inp_1 (1<<15) /* 01=koaxial (Cinch), 10=Internal CDROM */
145 #define RME9652_SyncPref_ADAT2 (1<<16)
146 #define RME9652_SyncPref_ADAT3 (1<<17)
147 #define RME9652_SPDIF_RESET (1<<18) /* Rev 1.5+: h/w S/PDIF receiver */
148 #define RME9652_SPDIF_SELECT (1<<19)
149 #define RME9652_SPDIF_CLOCK (1<<20)
150 #define RME9652_SPDIF_WRITE (1<<21)
151 #define RME9652_ADAT1_INTERNAL (1<<22) /* Rev 1.5+: if set, internal CD connector carries ADAT */
153 /* buffersize = 512Bytes * 2^n, where n is made from Bit2 ... Bit0 */
155 #define RME9652_latency 0x0e
156 #define rme9652_encode_latency(x) (((x)&0x7)<<1)
157 #define rme9652_decode_latency(x) (((x)>>1)&0x7)
158 #define rme9652_running_double_speed(s) ((s)->control_register & RME9652_DS)
159 #define RME9652_inp (RME9652_inp_0|RME9652_inp_1)
160 #define rme9652_encode_spdif_in(x) (((x)&0x3)<<14)
161 #define rme9652_decode_spdif_in(x) (((x)>>14)&0x3)
163 #define RME9652_SyncPref_Mask (RME9652_SyncPref_ADAT2|RME9652_SyncPref_ADAT3)
164 #define RME9652_SyncPref_ADAT1 0
165 #define RME9652_SyncPref_SPDIF (RME9652_SyncPref_ADAT2|RME9652_SyncPref_ADAT3)
167 /* the size of a substream (1 mono data stream) */
169 #define RME9652_CHANNEL_BUFFER_SAMPLES (16*1024)
170 #define RME9652_CHANNEL_BUFFER_BYTES (4*RME9652_CHANNEL_BUFFER_SAMPLES)
172 /* the size of the area we need to allocate for DMA transfers. the
173 size is the same regardless of the number of channels - the
174 9636 still uses the same memory area.
176 Note that we allocate 1 more channel than is apparently needed
177 because the h/w seems to write 1 byte beyond the end of the last
181 #define RME9652_DMA_AREA_BYTES ((RME9652_NCHANNELS+1) * RME9652_CHANNEL_BUFFER_BYTES)
182 #define RME9652_DMA_AREA_KILOBYTES (RME9652_DMA_AREA_BYTES/1024)
190 void __iomem *iobase;
194 u32 control_register; /* cached value */
195 u32 thru_bits; /* thru 1=on, 0=off channel 1=Bit1... channel 26= Bit26 */
198 u32 creg_spdif_stream;
200 char *card_name; /* hammerfall or hammerfall light names */
202 size_t hw_offsetmask; /* &-with status register to get real hw_offset */
203 size_t prev_hw_offset; /* previous hw offset */
204 size_t max_jitter; /* maximum jitter in frames for
206 size_t period_bytes; /* guess what this is */
208 unsigned char ds_channels;
209 unsigned char ss_channels; /* different for hammerfall/hammerfall-light */
211 struct snd_dma_buffer playback_dma_buf;
212 struct snd_dma_buffer capture_dma_buf;
214 unsigned char *capture_buffer; /* suitably aligned address */
215 unsigned char *playback_buffer; /* suitably aligned address */
220 struct snd_pcm_substream *capture_substream;
221 struct snd_pcm_substream *playback_substream;
224 int passthru; /* non-zero if doing pass-thru */
225 int hw_rev; /* h/w rev * 10 (i.e. 1.5 has hw_rev = 15) */
227 int last_spdif_sample_rate; /* so that we can catch externally ... */
228 int last_adat_sample_rate; /* ... induced rate changes */
230 const char *channel_map;
232 struct snd_card *card;
235 struct snd_kcontrol *spdif_ctl;
239 /* These tables map the ALSA channels 1..N to the channels that we
240 need to use in order to find the relevant channel buffer. RME
241 refer to this kind of mapping as between "the ADAT channel and
242 the DMA channel." We index it using the logical audio channel,
243 and the value is the DMA channel (i.e. channel buffer number)
244 where the data for that channel can be read/written from/to.
247 static const char channel_map_9652_ss[26] = {
248 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17,
249 18, 19, 20, 21, 22, 23, 24, 25
252 static const char channel_map_9636_ss[26] = {
253 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
254 /* channels 16 and 17 are S/PDIF */
256 /* channels 18-25 don't exist */
257 -1, -1, -1, -1, -1, -1, -1, -1
260 static const char channel_map_9652_ds[26] = {
261 /* ADAT channels are remapped */
262 1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23,
263 /* channels 12 and 13 are S/PDIF */
265 /* others don't exist */
266 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1
269 static const char channel_map_9636_ds[26] = {
270 /* ADAT channels are remapped */
271 1, 3, 5, 7, 9, 11, 13, 15,
272 /* channels 8 and 9 are S/PDIF */
274 /* others don't exist */
275 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1
278 static int snd_hammerfall_get_buffer(struct pci_dev *pci, struct snd_dma_buffer *dmab, size_t size)
280 return snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, &pci->dev, size, dmab);
283 static void snd_hammerfall_free_buffer(struct snd_dma_buffer *dmab, struct pci_dev *pci)
286 snd_dma_free_pages(dmab);
290 static const struct pci_device_id snd_rme9652_ids[] = {
294 .subvendor = PCI_ANY_ID,
295 .subdevice = PCI_ANY_ID,
296 }, /* RME Digi9652 */
300 MODULE_DEVICE_TABLE(pci, snd_rme9652_ids);
302 static inline void rme9652_write(struct snd_rme9652 *rme9652, int reg, int val)
304 writel(val, rme9652->iobase + reg);
307 static inline unsigned int rme9652_read(struct snd_rme9652 *rme9652, int reg)
309 return readl(rme9652->iobase + reg);
312 static inline int snd_rme9652_use_is_exclusive(struct snd_rme9652 *rme9652)
317 spin_lock_irqsave(&rme9652->lock, flags);
318 if ((rme9652->playback_pid != rme9652->capture_pid) &&
319 (rme9652->playback_pid >= 0) && (rme9652->capture_pid >= 0)) {
322 spin_unlock_irqrestore(&rme9652->lock, flags);
326 static inline int rme9652_adat_sample_rate(struct snd_rme9652 *rme9652)
328 if (rme9652_running_double_speed(rme9652)) {
329 return (rme9652_read(rme9652, RME9652_status_register) &
330 RME9652_fs48) ? 96000 : 88200;
332 return (rme9652_read(rme9652, RME9652_status_register) &
333 RME9652_fs48) ? 48000 : 44100;
337 static inline void rme9652_compute_period_size(struct snd_rme9652 *rme9652)
341 i = rme9652->control_register & RME9652_latency;
342 rme9652->period_bytes = 1 << ((rme9652_decode_latency(i) + 8));
343 rme9652->hw_offsetmask =
344 (rme9652->period_bytes * 2 - 1) & RME9652_buf_pos;
345 rme9652->max_jitter = 80;
348 static snd_pcm_uframes_t rme9652_hw_pointer(struct snd_rme9652 *rme9652)
351 unsigned int offset, frag;
352 snd_pcm_uframes_t period_size = rme9652->period_bytes / 4;
353 snd_pcm_sframes_t delta;
355 status = rme9652_read(rme9652, RME9652_status_register);
356 if (!rme9652->precise_ptr)
357 return (status & RME9652_buffer_id) ? period_size : 0;
358 offset = status & RME9652_buf_pos;
360 /* The hardware may give a backward movement for up to 80 frames
361 Martin Kirst <martin.kirst@freenet.de> knows the details.
364 delta = rme9652->prev_hw_offset - offset;
366 if (delta <= (snd_pcm_sframes_t)rme9652->max_jitter * 4)
367 offset = rme9652->prev_hw_offset;
369 rme9652->prev_hw_offset = offset;
370 offset &= rme9652->hw_offsetmask;
372 frag = status & RME9652_buffer_id;
374 if (offset < period_size) {
375 if (offset > rme9652->max_jitter) {
377 dev_err(rme9652->card->dev,
378 "Unexpected hw_pointer position (bufid == 0): status: %x offset: %d\n",
382 offset -= rme9652->max_jitter;
384 offset += period_size * 2;
386 if (offset > period_size + rme9652->max_jitter) {
388 dev_err(rme9652->card->dev,
389 "Unexpected hw_pointer position (bufid == 1): status: %x offset: %d\n",
393 offset -= rme9652->max_jitter;
399 static inline void rme9652_reset_hw_pointer(struct snd_rme9652 *rme9652)
403 /* reset the FIFO pointer to zero. We do this by writing to 8
404 registers, each of which is a 32bit wide register, and set
405 them all to zero. Note that s->iobase is a pointer to
406 int32, not pointer to char.
409 for (i = 0; i < 8; i++) {
410 rme9652_write(rme9652, i * 4, 0);
413 rme9652->prev_hw_offset = 0;
416 static inline void rme9652_start(struct snd_rme9652 *s)
418 s->control_register |= (RME9652_IE | RME9652_start_bit);
419 rme9652_write(s, RME9652_control_register, s->control_register);
422 static inline void rme9652_stop(struct snd_rme9652 *s)
424 s->control_register &= ~(RME9652_start_bit | RME9652_IE);
425 rme9652_write(s, RME9652_control_register, s->control_register);
428 static int rme9652_set_interrupt_interval(struct snd_rme9652 *s,
434 spin_lock_irq(&s->lock);
436 if ((restart = s->running)) {
447 s->control_register &= ~RME9652_latency;
448 s->control_register |= rme9652_encode_latency(n);
450 rme9652_write(s, RME9652_control_register, s->control_register);
452 rme9652_compute_period_size(s);
457 spin_unlock_irq(&s->lock);
462 static int rme9652_set_rate(struct snd_rme9652 *rme9652, int rate)
465 int reject_if_open = 0;
468 if (!snd_rme9652_use_is_exclusive (rme9652)) {
472 /* Changing from a "single speed" to a "double speed" rate is
473 not allowed if any substreams are open. This is because
474 such a change causes a shift in the location of
475 the DMA buffers and a reduction in the number of available
478 Note that a similar but essentially insoluble problem
479 exists for externally-driven rate changes. All we can do
480 is to flag rate changes in the read/write routines.
483 spin_lock_irq(&rme9652->lock);
484 xrate = rme9652_adat_sample_rate(rme9652);
509 rate = RME9652_DS | RME9652_freq;
512 spin_unlock_irq(&rme9652->lock);
516 if (reject_if_open && (rme9652->capture_pid >= 0 || rme9652->playback_pid >= 0)) {
517 spin_unlock_irq(&rme9652->lock);
521 if ((restart = rme9652->running)) {
522 rme9652_stop(rme9652);
524 rme9652->control_register &= ~(RME9652_freq | RME9652_DS);
525 rme9652->control_register |= rate;
526 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
529 rme9652_start(rme9652);
532 if (rate & RME9652_DS) {
533 if (rme9652->ss_channels == RME9652_NCHANNELS) {
534 rme9652->channel_map = channel_map_9652_ds;
536 rme9652->channel_map = channel_map_9636_ds;
539 if (rme9652->ss_channels == RME9652_NCHANNELS) {
540 rme9652->channel_map = channel_map_9652_ss;
542 rme9652->channel_map = channel_map_9636_ss;
546 spin_unlock_irq(&rme9652->lock);
550 static void rme9652_set_thru(struct snd_rme9652 *rme9652, int channel, int enable)
554 rme9652->passthru = 0;
558 /* set thru for all channels */
561 for (i = 0; i < RME9652_NCHANNELS; i++) {
562 rme9652->thru_bits |= (1 << i);
563 rme9652_write(rme9652, RME9652_thru_base + i * 4, 1);
566 for (i = 0; i < RME9652_NCHANNELS; i++) {
567 rme9652->thru_bits &= ~(1 << i);
568 rme9652_write(rme9652, RME9652_thru_base + i * 4, 0);
575 mapped_channel = rme9652->channel_map[channel];
578 rme9652->thru_bits |= (1 << mapped_channel);
580 rme9652->thru_bits &= ~(1 << mapped_channel);
583 rme9652_write(rme9652,
584 RME9652_thru_base + mapped_channel * 4,
589 static int rme9652_set_passthru(struct snd_rme9652 *rme9652, int onoff)
592 rme9652_set_thru(rme9652, -1, 1);
594 /* we don't want interrupts, so do a
595 custom version of rme9652_start().
598 rme9652->control_register =
600 rme9652_encode_latency(7) |
603 rme9652_reset_hw_pointer(rme9652);
605 rme9652_write(rme9652, RME9652_control_register,
606 rme9652->control_register);
607 rme9652->passthru = 1;
609 rme9652_set_thru(rme9652, -1, 0);
610 rme9652_stop(rme9652);
611 rme9652->passthru = 0;
617 static void rme9652_spdif_set_bit (struct snd_rme9652 *rme9652, int mask, int onoff)
620 rme9652->control_register |= mask;
622 rme9652->control_register &= ~mask;
624 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
627 static void rme9652_spdif_write_byte (struct snd_rme9652 *rme9652, const int val)
632 for (i = 0, mask = 0x80; i < 8; i++, mask >>= 1) {
634 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_WRITE, 1);
636 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_WRITE, 0);
638 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 1);
639 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 0);
643 static int rme9652_spdif_read_byte (struct snd_rme9652 *rme9652)
651 for (i = 0, mask = 0x80; i < 8; i++, mask >>= 1) {
652 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 1);
653 if (rme9652_read (rme9652, RME9652_status_register) & RME9652_SPDIF_READ)
655 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 0);
661 static void rme9652_write_spdif_codec (struct snd_rme9652 *rme9652, const int address, const int data)
663 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 1);
664 rme9652_spdif_write_byte (rme9652, 0x20);
665 rme9652_spdif_write_byte (rme9652, address);
666 rme9652_spdif_write_byte (rme9652, data);
667 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 0);
671 static int rme9652_spdif_read_codec (struct snd_rme9652 *rme9652, const int address)
675 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 1);
676 rme9652_spdif_write_byte (rme9652, 0x20);
677 rme9652_spdif_write_byte (rme9652, address);
678 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 0);
679 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 1);
681 rme9652_spdif_write_byte (rme9652, 0x21);
682 ret = rme9652_spdif_read_byte (rme9652);
683 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 0);
688 static void rme9652_initialize_spdif_receiver (struct snd_rme9652 *rme9652)
690 /* XXX what unsets this ? */
692 rme9652->control_register |= RME9652_SPDIF_RESET;
694 rme9652_write_spdif_codec (rme9652, 4, 0x40);
695 rme9652_write_spdif_codec (rme9652, 17, 0x13);
696 rme9652_write_spdif_codec (rme9652, 6, 0x02);
699 static inline int rme9652_spdif_sample_rate(struct snd_rme9652 *s)
701 unsigned int rate_bits;
703 if (rme9652_read(s, RME9652_status_register) & RME9652_ERF) {
704 return -1; /* error condition */
707 if (s->hw_rev == 15) {
711 x = rme9652_spdif_read_codec (s, 30);
718 if (y > 30400 && y < 33600) ret = 32000;
719 else if (y > 41900 && y < 46000) ret = 44100;
720 else if (y > 46000 && y < 50400) ret = 48000;
721 else if (y > 60800 && y < 67200) ret = 64000;
722 else if (y > 83700 && y < 92000) ret = 88200;
723 else if (y > 92000 && y < 100000) ret = 96000;
728 rate_bits = rme9652_read(s, RME9652_status_register) & RME9652_F;
730 switch (rme9652_decode_spdif_rate(rate_bits)) {
750 dev_err(s->card->dev,
751 "%s: unknown S/PDIF input rate (bits = 0x%x)\n",
752 s->card_name, rate_bits);
757 /*-----------------------------------------------------------------------------
759 ----------------------------------------------------------------------------*/
761 static u32 snd_rme9652_convert_from_aes(struct snd_aes_iec958 *aes)
764 val |= (aes->status[0] & IEC958_AES0_PROFESSIONAL) ? RME9652_PRO : 0;
765 val |= (aes->status[0] & IEC958_AES0_NONAUDIO) ? RME9652_Dolby : 0;
766 if (val & RME9652_PRO)
767 val |= (aes->status[0] & IEC958_AES0_PRO_EMPHASIS_5015) ? RME9652_EMP : 0;
769 val |= (aes->status[0] & IEC958_AES0_CON_EMPHASIS_5015) ? RME9652_EMP : 0;
773 static void snd_rme9652_convert_to_aes(struct snd_aes_iec958 *aes, u32 val)
775 aes->status[0] = ((val & RME9652_PRO) ? IEC958_AES0_PROFESSIONAL : 0) |
776 ((val & RME9652_Dolby) ? IEC958_AES0_NONAUDIO : 0);
777 if (val & RME9652_PRO)
778 aes->status[0] |= (val & RME9652_EMP) ? IEC958_AES0_PRO_EMPHASIS_5015 : 0;
780 aes->status[0] |= (val & RME9652_EMP) ? IEC958_AES0_CON_EMPHASIS_5015 : 0;
783 static int snd_rme9652_control_spdif_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
785 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
790 static int snd_rme9652_control_spdif_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
792 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
794 snd_rme9652_convert_to_aes(&ucontrol->value.iec958, rme9652->creg_spdif);
798 static int snd_rme9652_control_spdif_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
800 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
804 val = snd_rme9652_convert_from_aes(&ucontrol->value.iec958);
805 spin_lock_irq(&rme9652->lock);
806 change = val != rme9652->creg_spdif;
807 rme9652->creg_spdif = val;
808 spin_unlock_irq(&rme9652->lock);
812 static int snd_rme9652_control_spdif_stream_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
814 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
819 static int snd_rme9652_control_spdif_stream_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
821 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
823 snd_rme9652_convert_to_aes(&ucontrol->value.iec958, rme9652->creg_spdif_stream);
827 static int snd_rme9652_control_spdif_stream_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
829 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
833 val = snd_rme9652_convert_from_aes(&ucontrol->value.iec958);
834 spin_lock_irq(&rme9652->lock);
835 change = val != rme9652->creg_spdif_stream;
836 rme9652->creg_spdif_stream = val;
837 rme9652->control_register &= ~(RME9652_PRO | RME9652_Dolby | RME9652_EMP);
838 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register |= val);
839 spin_unlock_irq(&rme9652->lock);
843 static int snd_rme9652_control_spdif_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
845 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
850 static int snd_rme9652_control_spdif_mask_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
852 ucontrol->value.iec958.status[0] = kcontrol->private_value;
856 #define RME9652_ADAT1_IN(xname, xindex) \
857 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
858 .info = snd_rme9652_info_adat1_in, \
859 .get = snd_rme9652_get_adat1_in, \
860 .put = snd_rme9652_put_adat1_in }
862 static unsigned int rme9652_adat1_in(struct snd_rme9652 *rme9652)
864 if (rme9652->control_register & RME9652_ADAT1_INTERNAL)
869 static int rme9652_set_adat1_input(struct snd_rme9652 *rme9652, int internal)
874 rme9652->control_register |= RME9652_ADAT1_INTERNAL;
876 rme9652->control_register &= ~RME9652_ADAT1_INTERNAL;
879 /* XXX do we actually need to stop the card when we do this ? */
881 if ((restart = rme9652->running)) {
882 rme9652_stop(rme9652);
885 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
888 rme9652_start(rme9652);
894 static int snd_rme9652_info_adat1_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
896 static const char * const texts[2] = {"ADAT1", "Internal"};
898 return snd_ctl_enum_info(uinfo, 1, 2, texts);
901 static int snd_rme9652_get_adat1_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
903 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
905 spin_lock_irq(&rme9652->lock);
906 ucontrol->value.enumerated.item[0] = rme9652_adat1_in(rme9652);
907 spin_unlock_irq(&rme9652->lock);
911 static int snd_rme9652_put_adat1_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
913 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
917 if (!snd_rme9652_use_is_exclusive(rme9652))
919 val = ucontrol->value.enumerated.item[0] % 2;
920 spin_lock_irq(&rme9652->lock);
921 change = val != rme9652_adat1_in(rme9652);
923 rme9652_set_adat1_input(rme9652, val);
924 spin_unlock_irq(&rme9652->lock);
928 #define RME9652_SPDIF_IN(xname, xindex) \
929 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
930 .info = snd_rme9652_info_spdif_in, \
931 .get = snd_rme9652_get_spdif_in, .put = snd_rme9652_put_spdif_in }
933 static unsigned int rme9652_spdif_in(struct snd_rme9652 *rme9652)
935 return rme9652_decode_spdif_in(rme9652->control_register &
939 static int rme9652_set_spdif_input(struct snd_rme9652 *rme9652, int in)
943 rme9652->control_register &= ~RME9652_inp;
944 rme9652->control_register |= rme9652_encode_spdif_in(in);
946 if ((restart = rme9652->running)) {
947 rme9652_stop(rme9652);
950 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
953 rme9652_start(rme9652);
959 static int snd_rme9652_info_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
961 static const char * const texts[3] = {"ADAT1", "Coaxial", "Internal"};
963 return snd_ctl_enum_info(uinfo, 1, 3, texts);
966 static int snd_rme9652_get_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
968 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
970 spin_lock_irq(&rme9652->lock);
971 ucontrol->value.enumerated.item[0] = rme9652_spdif_in(rme9652);
972 spin_unlock_irq(&rme9652->lock);
976 static int snd_rme9652_put_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
978 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
982 if (!snd_rme9652_use_is_exclusive(rme9652))
984 val = ucontrol->value.enumerated.item[0] % 3;
985 spin_lock_irq(&rme9652->lock);
986 change = val != rme9652_spdif_in(rme9652);
988 rme9652_set_spdif_input(rme9652, val);
989 spin_unlock_irq(&rme9652->lock);
993 #define RME9652_SPDIF_OUT(xname, xindex) \
994 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
995 .info = snd_rme9652_info_spdif_out, \
996 .get = snd_rme9652_get_spdif_out, .put = snd_rme9652_put_spdif_out }
998 static int rme9652_spdif_out(struct snd_rme9652 *rme9652)
1000 return (rme9652->control_register & RME9652_opt_out) ? 1 : 0;
1003 static int rme9652_set_spdif_output(struct snd_rme9652 *rme9652, int out)
1008 rme9652->control_register |= RME9652_opt_out;
1010 rme9652->control_register &= ~RME9652_opt_out;
1013 if ((restart = rme9652->running)) {
1014 rme9652_stop(rme9652);
1017 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1020 rme9652_start(rme9652);
1026 #define snd_rme9652_info_spdif_out snd_ctl_boolean_mono_info
1028 static int snd_rme9652_get_spdif_out(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1030 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1032 spin_lock_irq(&rme9652->lock);
1033 ucontrol->value.integer.value[0] = rme9652_spdif_out(rme9652);
1034 spin_unlock_irq(&rme9652->lock);
1038 static int snd_rme9652_put_spdif_out(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1040 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1044 if (!snd_rme9652_use_is_exclusive(rme9652))
1046 val = ucontrol->value.integer.value[0] & 1;
1047 spin_lock_irq(&rme9652->lock);
1048 change = (int)val != rme9652_spdif_out(rme9652);
1049 rme9652_set_spdif_output(rme9652, val);
1050 spin_unlock_irq(&rme9652->lock);
1054 #define RME9652_SYNC_MODE(xname, xindex) \
1055 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1056 .info = snd_rme9652_info_sync_mode, \
1057 .get = snd_rme9652_get_sync_mode, .put = snd_rme9652_put_sync_mode }
1059 static int rme9652_sync_mode(struct snd_rme9652 *rme9652)
1061 if (rme9652->control_register & RME9652_wsel) {
1063 } else if (rme9652->control_register & RME9652_Master) {
1070 static int rme9652_set_sync_mode(struct snd_rme9652 *rme9652, int mode)
1076 rme9652->control_register &=
1077 ~(RME9652_Master | RME9652_wsel);
1080 rme9652->control_register =
1081 (rme9652->control_register & ~RME9652_wsel) | RME9652_Master;
1084 rme9652->control_register |=
1085 (RME9652_Master | RME9652_wsel);
1089 if ((restart = rme9652->running)) {
1090 rme9652_stop(rme9652);
1093 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1096 rme9652_start(rme9652);
1102 static int snd_rme9652_info_sync_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1104 static const char * const texts[3] = {
1105 "AutoSync", "Master", "Word Clock"
1108 return snd_ctl_enum_info(uinfo, 1, 3, texts);
1111 static int snd_rme9652_get_sync_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1113 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1115 spin_lock_irq(&rme9652->lock);
1116 ucontrol->value.enumerated.item[0] = rme9652_sync_mode(rme9652);
1117 spin_unlock_irq(&rme9652->lock);
1121 static int snd_rme9652_put_sync_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1123 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1127 val = ucontrol->value.enumerated.item[0] % 3;
1128 spin_lock_irq(&rme9652->lock);
1129 change = (int)val != rme9652_sync_mode(rme9652);
1130 rme9652_set_sync_mode(rme9652, val);
1131 spin_unlock_irq(&rme9652->lock);
1135 #define RME9652_SYNC_PREF(xname, xindex) \
1136 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1137 .info = snd_rme9652_info_sync_pref, \
1138 .get = snd_rme9652_get_sync_pref, .put = snd_rme9652_put_sync_pref }
1140 static int rme9652_sync_pref(struct snd_rme9652 *rme9652)
1142 switch (rme9652->control_register & RME9652_SyncPref_Mask) {
1143 case RME9652_SyncPref_ADAT1:
1144 return RME9652_SYNC_FROM_ADAT1;
1145 case RME9652_SyncPref_ADAT2:
1146 return RME9652_SYNC_FROM_ADAT2;
1147 case RME9652_SyncPref_ADAT3:
1148 return RME9652_SYNC_FROM_ADAT3;
1149 case RME9652_SyncPref_SPDIF:
1150 return RME9652_SYNC_FROM_SPDIF;
1156 static int rme9652_set_sync_pref(struct snd_rme9652 *rme9652, int pref)
1160 rme9652->control_register &= ~RME9652_SyncPref_Mask;
1162 case RME9652_SYNC_FROM_ADAT1:
1163 rme9652->control_register |= RME9652_SyncPref_ADAT1;
1165 case RME9652_SYNC_FROM_ADAT2:
1166 rme9652->control_register |= RME9652_SyncPref_ADAT2;
1168 case RME9652_SYNC_FROM_ADAT3:
1169 rme9652->control_register |= RME9652_SyncPref_ADAT3;
1171 case RME9652_SYNC_FROM_SPDIF:
1172 rme9652->control_register |= RME9652_SyncPref_SPDIF;
1176 if ((restart = rme9652->running)) {
1177 rme9652_stop(rme9652);
1180 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1183 rme9652_start(rme9652);
1189 static int snd_rme9652_info_sync_pref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1191 static const char * const texts[4] = {
1192 "IEC958 In", "ADAT1 In", "ADAT2 In", "ADAT3 In"
1194 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1196 return snd_ctl_enum_info(uinfo, 1,
1197 rme9652->ss_channels == RME9652_NCHANNELS ? 4 : 3,
1201 static int snd_rme9652_get_sync_pref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1203 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1205 spin_lock_irq(&rme9652->lock);
1206 ucontrol->value.enumerated.item[0] = rme9652_sync_pref(rme9652);
1207 spin_unlock_irq(&rme9652->lock);
1211 static int snd_rme9652_put_sync_pref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1213 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1217 if (!snd_rme9652_use_is_exclusive(rme9652))
1219 max = rme9652->ss_channels == RME9652_NCHANNELS ? 4 : 3;
1220 val = ucontrol->value.enumerated.item[0] % max;
1221 spin_lock_irq(&rme9652->lock);
1222 change = (int)val != rme9652_sync_pref(rme9652);
1223 rme9652_set_sync_pref(rme9652, val);
1224 spin_unlock_irq(&rme9652->lock);
1228 static int snd_rme9652_info_thru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1230 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1231 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1232 uinfo->count = rme9652->ss_channels;
1233 uinfo->value.integer.min = 0;
1234 uinfo->value.integer.max = 1;
1238 static int snd_rme9652_get_thru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1240 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1242 u32 thru_bits = rme9652->thru_bits;
1244 for (k = 0; k < rme9652->ss_channels; ++k) {
1245 ucontrol->value.integer.value[k] = !!(thru_bits & (1 << k));
1250 static int snd_rme9652_put_thru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1252 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1257 if (!snd_rme9652_use_is_exclusive(rme9652))
1260 for (chn = 0; chn < rme9652->ss_channels; ++chn) {
1261 if (ucontrol->value.integer.value[chn])
1262 thru_bits |= 1 << chn;
1265 spin_lock_irq(&rme9652->lock);
1266 change = thru_bits ^ rme9652->thru_bits;
1268 for (chn = 0; chn < rme9652->ss_channels; ++chn) {
1269 if (!(change & (1 << chn)))
1271 rme9652_set_thru(rme9652,chn,thru_bits&(1<<chn));
1274 spin_unlock_irq(&rme9652->lock);
1278 #define RME9652_PASSTHRU(xname, xindex) \
1279 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1280 .info = snd_rme9652_info_passthru, \
1281 .put = snd_rme9652_put_passthru, \
1282 .get = snd_rme9652_get_passthru }
1284 #define snd_rme9652_info_passthru snd_ctl_boolean_mono_info
1286 static int snd_rme9652_get_passthru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1288 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1290 spin_lock_irq(&rme9652->lock);
1291 ucontrol->value.integer.value[0] = rme9652->passthru;
1292 spin_unlock_irq(&rme9652->lock);
1296 static int snd_rme9652_put_passthru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1298 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1303 if (!snd_rme9652_use_is_exclusive(rme9652))
1306 val = ucontrol->value.integer.value[0] & 1;
1307 spin_lock_irq(&rme9652->lock);
1308 change = (ucontrol->value.integer.value[0] != rme9652->passthru);
1310 err = rme9652_set_passthru(rme9652, val);
1311 spin_unlock_irq(&rme9652->lock);
1312 return err ? err : change;
1315 /* Read-only switches */
1317 #define RME9652_SPDIF_RATE(xname, xindex) \
1318 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1319 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
1320 .info = snd_rme9652_info_spdif_rate, \
1321 .get = snd_rme9652_get_spdif_rate }
1323 static int snd_rme9652_info_spdif_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1325 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1327 uinfo->value.integer.min = 0;
1328 uinfo->value.integer.max = 96000;
1332 static int snd_rme9652_get_spdif_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1334 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1336 spin_lock_irq(&rme9652->lock);
1337 ucontrol->value.integer.value[0] = rme9652_spdif_sample_rate(rme9652);
1338 spin_unlock_irq(&rme9652->lock);
1342 #define RME9652_ADAT_SYNC(xname, xindex, xidx) \
1343 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1344 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
1345 .info = snd_rme9652_info_adat_sync, \
1346 .get = snd_rme9652_get_adat_sync, .private_value = xidx }
1348 static int snd_rme9652_info_adat_sync(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1350 static const char * const texts[4] = {
1351 "No Lock", "Lock", "No Lock Sync", "Lock Sync"
1354 return snd_ctl_enum_info(uinfo, 1, 4, texts);
1357 static int snd_rme9652_get_adat_sync(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1359 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1360 unsigned int mask1, mask2, val;
1362 switch (kcontrol->private_value) {
1363 case 0: mask1 = RME9652_lock_0; mask2 = RME9652_sync_0; break;
1364 case 1: mask1 = RME9652_lock_1; mask2 = RME9652_sync_1; break;
1365 case 2: mask1 = RME9652_lock_2; mask2 = RME9652_sync_2; break;
1366 default: return -EINVAL;
1368 val = rme9652_read(rme9652, RME9652_status_register);
1369 ucontrol->value.enumerated.item[0] = (val & mask1) ? 1 : 0;
1370 ucontrol->value.enumerated.item[0] |= (val & mask2) ? 2 : 0;
1374 #define RME9652_TC_VALID(xname, xindex) \
1375 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1376 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
1377 .info = snd_rme9652_info_tc_valid, \
1378 .get = snd_rme9652_get_tc_valid }
1380 #define snd_rme9652_info_tc_valid snd_ctl_boolean_mono_info
1382 static int snd_rme9652_get_tc_valid(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1384 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1386 ucontrol->value.integer.value[0] =
1387 (rme9652_read(rme9652, RME9652_status_register) & RME9652_tc_valid) ? 1 : 0;
1391 #ifdef ALSA_HAS_STANDARD_WAY_OF_RETURNING_TIMECODE
1393 /* FIXME: this routine needs a port to the new control API --jk */
1395 static int snd_rme9652_get_tc_value(void *private_data,
1396 snd_kswitch_t *kswitch,
1397 snd_switch_t *uswitch)
1399 struct snd_rme9652 *s = (struct snd_rme9652 *) private_data;
1403 uswitch->type = SNDRV_SW_TYPE_DWORD;
1405 if ((rme9652_read(s, RME9652_status_register) &
1406 RME9652_tc_valid) == 0) {
1407 uswitch->value.data32[0] = 0;
1411 /* timecode request */
1413 rme9652_write(s, RME9652_time_code, 0);
1415 /* XXX bug alert: loop-based timing !!!! */
1417 for (i = 0; i < 50; i++) {
1418 if (!(rme9652_read(s, i * 4) & RME9652_tc_busy))
1422 if (!(rme9652_read(s, i * 4) & RME9652_tc_busy)) {
1428 for (i = 0; i < 32; i++) {
1431 if (rme9652_read(s, i * 4) & RME9652_tc_out)
1432 value |= 0x80000000;
1435 if (value > 2 * 60 * 48000) {
1436 value -= 2 * 60 * 48000;
1441 uswitch->value.data32[0] = value;
1446 #endif /* ALSA_HAS_STANDARD_WAY_OF_RETURNING_TIMECODE */
1448 static const struct snd_kcontrol_new snd_rme9652_controls[] = {
1450 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1451 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
1452 .info = snd_rme9652_control_spdif_info,
1453 .get = snd_rme9652_control_spdif_get,
1454 .put = snd_rme9652_control_spdif_put,
1457 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE,
1458 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1459 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM),
1460 .info = snd_rme9652_control_spdif_stream_info,
1461 .get = snd_rme9652_control_spdif_stream_get,
1462 .put = snd_rme9652_control_spdif_stream_put,
1465 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1466 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1467 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK),
1468 .info = snd_rme9652_control_spdif_mask_info,
1469 .get = snd_rme9652_control_spdif_mask_get,
1470 .private_value = IEC958_AES0_NONAUDIO |
1471 IEC958_AES0_PROFESSIONAL |
1472 IEC958_AES0_CON_EMPHASIS,
1475 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1476 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1477 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PRO_MASK),
1478 .info = snd_rme9652_control_spdif_mask_info,
1479 .get = snd_rme9652_control_spdif_mask_get,
1480 .private_value = IEC958_AES0_NONAUDIO |
1481 IEC958_AES0_PROFESSIONAL |
1482 IEC958_AES0_PRO_EMPHASIS,
1484 RME9652_SPDIF_IN("IEC958 Input Connector", 0),
1485 RME9652_SPDIF_OUT("IEC958 Output also on ADAT1", 0),
1486 RME9652_SYNC_MODE("Sync Mode", 0),
1487 RME9652_SYNC_PREF("Preferred Sync Source", 0),
1489 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1490 .name = "Channels Thru",
1492 .info = snd_rme9652_info_thru,
1493 .get = snd_rme9652_get_thru,
1494 .put = snd_rme9652_put_thru,
1496 RME9652_SPDIF_RATE("IEC958 Sample Rate", 0),
1497 RME9652_ADAT_SYNC("ADAT1 Sync Check", 0, 0),
1498 RME9652_ADAT_SYNC("ADAT2 Sync Check", 0, 1),
1499 RME9652_TC_VALID("Timecode Valid", 0),
1500 RME9652_PASSTHRU("Passthru", 0)
1503 static const struct snd_kcontrol_new snd_rme9652_adat3_check =
1504 RME9652_ADAT_SYNC("ADAT3 Sync Check", 0, 2);
1506 static const struct snd_kcontrol_new snd_rme9652_adat1_input =
1507 RME9652_ADAT1_IN("ADAT1 Input Source", 0);
1509 static int snd_rme9652_create_controls(struct snd_card *card, struct snd_rme9652 *rme9652)
1513 struct snd_kcontrol *kctl;
1515 for (idx = 0; idx < ARRAY_SIZE(snd_rme9652_controls); idx++) {
1516 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_rme9652_controls[idx], rme9652))) < 0)
1518 if (idx == 1) /* IEC958 (S/PDIF) Stream */
1519 rme9652->spdif_ctl = kctl;
1522 if (rme9652->ss_channels == RME9652_NCHANNELS)
1523 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_rme9652_adat3_check, rme9652))) < 0)
1526 if (rme9652->hw_rev >= 15)
1527 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_rme9652_adat1_input, rme9652))) < 0)
1533 /*------------------------------------------------------------
1535 ------------------------------------------------------------*/
1538 snd_rme9652_proc_read(struct snd_info_entry *entry, struct snd_info_buffer *buffer)
1540 struct snd_rme9652 *rme9652 = (struct snd_rme9652 *) entry->private_data;
1541 u32 thru_bits = rme9652->thru_bits;
1542 int show_auto_sync_source = 0;
1544 unsigned int status;
1547 status = rme9652_read(rme9652, RME9652_status_register);
1549 snd_iprintf(buffer, "%s (Card #%d)\n", rme9652->card_name, rme9652->card->number + 1);
1550 snd_iprintf(buffer, "Buffers: capture %p playback %p\n",
1551 rme9652->capture_buffer, rme9652->playback_buffer);
1552 snd_iprintf(buffer, "IRQ: %d Registers bus: 0x%lx VM: 0x%lx\n",
1553 rme9652->irq, rme9652->port, (unsigned long)rme9652->iobase);
1554 snd_iprintf(buffer, "Control register: %x\n", rme9652->control_register);
1556 snd_iprintf(buffer, "\n");
1558 x = 1 << (6 + rme9652_decode_latency(rme9652->control_register &
1561 snd_iprintf(buffer, "Latency: %d samples (2 periods of %lu bytes)\n",
1562 x, (unsigned long) rme9652->period_bytes);
1563 snd_iprintf(buffer, "Hardware pointer (frames): %ld\n",
1564 rme9652_hw_pointer(rme9652));
1565 snd_iprintf(buffer, "Passthru: %s\n",
1566 rme9652->passthru ? "yes" : "no");
1568 if ((rme9652->control_register & (RME9652_Master | RME9652_wsel)) == 0) {
1569 snd_iprintf(buffer, "Clock mode: autosync\n");
1570 show_auto_sync_source = 1;
1571 } else if (rme9652->control_register & RME9652_wsel) {
1572 if (status & RME9652_wsel_rd) {
1573 snd_iprintf(buffer, "Clock mode: word clock\n");
1575 snd_iprintf(buffer, "Clock mode: word clock (no signal)\n");
1578 snd_iprintf(buffer, "Clock mode: master\n");
1581 if (show_auto_sync_source) {
1582 switch (rme9652->control_register & RME9652_SyncPref_Mask) {
1583 case RME9652_SyncPref_ADAT1:
1584 snd_iprintf(buffer, "Pref. sync source: ADAT1\n");
1586 case RME9652_SyncPref_ADAT2:
1587 snd_iprintf(buffer, "Pref. sync source: ADAT2\n");
1589 case RME9652_SyncPref_ADAT3:
1590 snd_iprintf(buffer, "Pref. sync source: ADAT3\n");
1592 case RME9652_SyncPref_SPDIF:
1593 snd_iprintf(buffer, "Pref. sync source: IEC958\n");
1596 snd_iprintf(buffer, "Pref. sync source: ???\n");
1600 if (rme9652->hw_rev >= 15)
1601 snd_iprintf(buffer, "\nADAT1 Input source: %s\n",
1602 (rme9652->control_register & RME9652_ADAT1_INTERNAL) ?
1603 "Internal" : "ADAT1 optical");
1605 snd_iprintf(buffer, "\n");
1607 switch (rme9652_decode_spdif_in(rme9652->control_register &
1609 case RME9652_SPDIFIN_OPTICAL:
1610 snd_iprintf(buffer, "IEC958 input: ADAT1\n");
1612 case RME9652_SPDIFIN_COAXIAL:
1613 snd_iprintf(buffer, "IEC958 input: Coaxial\n");
1615 case RME9652_SPDIFIN_INTERN:
1616 snd_iprintf(buffer, "IEC958 input: Internal\n");
1619 snd_iprintf(buffer, "IEC958 input: ???\n");
1623 if (rme9652->control_register & RME9652_opt_out) {
1624 snd_iprintf(buffer, "IEC958 output: Coaxial & ADAT1\n");
1626 snd_iprintf(buffer, "IEC958 output: Coaxial only\n");
1629 if (rme9652->control_register & RME9652_PRO) {
1630 snd_iprintf(buffer, "IEC958 quality: Professional\n");
1632 snd_iprintf(buffer, "IEC958 quality: Consumer\n");
1635 if (rme9652->control_register & RME9652_EMP) {
1636 snd_iprintf(buffer, "IEC958 emphasis: on\n");
1638 snd_iprintf(buffer, "IEC958 emphasis: off\n");
1641 if (rme9652->control_register & RME9652_Dolby) {
1642 snd_iprintf(buffer, "IEC958 Dolby: on\n");
1644 snd_iprintf(buffer, "IEC958 Dolby: off\n");
1647 i = rme9652_spdif_sample_rate(rme9652);
1651 "IEC958 sample rate: error flag set\n");
1652 } else if (i == 0) {
1653 snd_iprintf(buffer, "IEC958 sample rate: undetermined\n");
1655 snd_iprintf(buffer, "IEC958 sample rate: %d\n", i);
1658 snd_iprintf(buffer, "\n");
1660 snd_iprintf(buffer, "ADAT Sample rate: %dHz\n",
1661 rme9652_adat_sample_rate(rme9652));
1665 x = status & RME9652_sync_0;
1666 if (status & RME9652_lock_0) {
1667 snd_iprintf(buffer, "ADAT1: %s\n", x ? "Sync" : "Lock");
1669 snd_iprintf(buffer, "ADAT1: No Lock\n");
1672 x = status & RME9652_sync_1;
1673 if (status & RME9652_lock_1) {
1674 snd_iprintf(buffer, "ADAT2: %s\n", x ? "Sync" : "Lock");
1676 snd_iprintf(buffer, "ADAT2: No Lock\n");
1679 x = status & RME9652_sync_2;
1680 if (status & RME9652_lock_2) {
1681 snd_iprintf(buffer, "ADAT3: %s\n", x ? "Sync" : "Lock");
1683 snd_iprintf(buffer, "ADAT3: No Lock\n");
1686 snd_iprintf(buffer, "\n");
1688 snd_iprintf(buffer, "Timecode signal: %s\n",
1689 (status & RME9652_tc_valid) ? "yes" : "no");
1693 snd_iprintf(buffer, "Punch Status:\n\n");
1695 for (i = 0; i < rme9652->ss_channels; i++) {
1696 if (thru_bits & (1 << i)) {
1697 snd_iprintf(buffer, "%2d: on ", i + 1);
1699 snd_iprintf(buffer, "%2d: off ", i + 1);
1702 if (((i + 1) % 8) == 0) {
1703 snd_iprintf(buffer, "\n");
1707 snd_iprintf(buffer, "\n");
1710 static void snd_rme9652_proc_init(struct snd_rme9652 *rme9652)
1712 snd_card_ro_proc_new(rme9652->card, "rme9652", rme9652,
1713 snd_rme9652_proc_read);
1716 static void snd_rme9652_free_buffers(struct snd_rme9652 *rme9652)
1718 snd_hammerfall_free_buffer(&rme9652->capture_dma_buf, rme9652->pci);
1719 snd_hammerfall_free_buffer(&rme9652->playback_dma_buf, rme9652->pci);
1722 static int snd_rme9652_free(struct snd_rme9652 *rme9652)
1724 if (rme9652->irq >= 0)
1725 rme9652_stop(rme9652);
1726 snd_rme9652_free_buffers(rme9652);
1728 if (rme9652->irq >= 0)
1729 free_irq(rme9652->irq, (void *)rme9652);
1730 iounmap(rme9652->iobase);
1732 pci_release_regions(rme9652->pci);
1734 pci_disable_device(rme9652->pci);
1738 static int snd_rme9652_initialize_memory(struct snd_rme9652 *rme9652)
1740 unsigned long pb_bus, cb_bus;
1742 if (snd_hammerfall_get_buffer(rme9652->pci, &rme9652->capture_dma_buf, RME9652_DMA_AREA_BYTES) < 0 ||
1743 snd_hammerfall_get_buffer(rme9652->pci, &rme9652->playback_dma_buf, RME9652_DMA_AREA_BYTES) < 0) {
1744 if (rme9652->capture_dma_buf.area)
1745 snd_dma_free_pages(&rme9652->capture_dma_buf);
1746 dev_err(rme9652->card->dev,
1747 "%s: no buffers available\n", rme9652->card_name);
1751 /* Align to bus-space 64K boundary */
1753 cb_bus = ALIGN(rme9652->capture_dma_buf.addr, 0x10000ul);
1754 pb_bus = ALIGN(rme9652->playback_dma_buf.addr, 0x10000ul);
1756 /* Tell the card where it is */
1758 rme9652_write(rme9652, RME9652_rec_buffer, cb_bus);
1759 rme9652_write(rme9652, RME9652_play_buffer, pb_bus);
1761 rme9652->capture_buffer = rme9652->capture_dma_buf.area + (cb_bus - rme9652->capture_dma_buf.addr);
1762 rme9652->playback_buffer = rme9652->playback_dma_buf.area + (pb_bus - rme9652->playback_dma_buf.addr);
1767 static void snd_rme9652_set_defaults(struct snd_rme9652 *rme9652)
1771 /* ASSUMPTION: rme9652->lock is either held, or
1772 there is no need to hold it (e.g. during module
1778 SPDIF Input via Coax
1780 maximum latency (7 = 8192 samples, 64Kbyte buffer,
1781 which implies 2 4096 sample, 32Kbyte periods).
1783 if rev 1.5, initialize the S/PDIF receiver.
1787 rme9652->control_register =
1788 RME9652_inp_0 | rme9652_encode_latency(7);
1790 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1792 rme9652_reset_hw_pointer(rme9652);
1793 rme9652_compute_period_size(rme9652);
1795 /* default: thru off for all channels */
1797 for (k = 0; k < RME9652_NCHANNELS; ++k)
1798 rme9652_write(rme9652, RME9652_thru_base + k * 4, 0);
1800 rme9652->thru_bits = 0;
1801 rme9652->passthru = 0;
1803 /* set a default rate so that the channel map is set up */
1805 rme9652_set_rate(rme9652, 48000);
1808 static irqreturn_t snd_rme9652_interrupt(int irq, void *dev_id)
1810 struct snd_rme9652 *rme9652 = (struct snd_rme9652 *) dev_id;
1812 if (!(rme9652_read(rme9652, RME9652_status_register) & RME9652_IRQ)) {
1816 rme9652_write(rme9652, RME9652_irq_clear, 0);
1818 if (rme9652->capture_substream) {
1819 snd_pcm_period_elapsed(rme9652->pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream);
1822 if (rme9652->playback_substream) {
1823 snd_pcm_period_elapsed(rme9652->pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream);
1828 static snd_pcm_uframes_t snd_rme9652_hw_pointer(struct snd_pcm_substream *substream)
1830 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1831 return rme9652_hw_pointer(rme9652);
1834 static char *rme9652_channel_buffer_location(struct snd_rme9652 *rme9652,
1841 if (snd_BUG_ON(channel < 0 || channel >= RME9652_NCHANNELS))
1844 if ((mapped_channel = rme9652->channel_map[channel]) < 0) {
1848 if (stream == SNDRV_PCM_STREAM_CAPTURE) {
1849 return rme9652->capture_buffer +
1850 (mapped_channel * RME9652_CHANNEL_BUFFER_BYTES);
1852 return rme9652->playback_buffer +
1853 (mapped_channel * RME9652_CHANNEL_BUFFER_BYTES);
1857 static int snd_rme9652_playback_copy(struct snd_pcm_substream *substream,
1858 int channel, unsigned long pos,
1859 void __user *src, unsigned long count)
1861 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1864 if (snd_BUG_ON(pos + count > RME9652_CHANNEL_BUFFER_BYTES))
1867 channel_buf = rme9652_channel_buffer_location (rme9652,
1868 substream->pstr->stream,
1870 if (snd_BUG_ON(!channel_buf))
1872 if (copy_from_user(channel_buf + pos, src, count))
1877 static int snd_rme9652_playback_copy_kernel(struct snd_pcm_substream *substream,
1878 int channel, unsigned long pos,
1879 void *src, unsigned long count)
1881 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1884 channel_buf = rme9652_channel_buffer_location(rme9652,
1885 substream->pstr->stream,
1887 if (snd_BUG_ON(!channel_buf))
1889 memcpy(channel_buf + pos, src, count);
1893 static int snd_rme9652_capture_copy(struct snd_pcm_substream *substream,
1894 int channel, unsigned long pos,
1895 void __user *dst, unsigned long count)
1897 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1900 if (snd_BUG_ON(pos + count > RME9652_CHANNEL_BUFFER_BYTES))
1903 channel_buf = rme9652_channel_buffer_location (rme9652,
1904 substream->pstr->stream,
1906 if (snd_BUG_ON(!channel_buf))
1908 if (copy_to_user(dst, channel_buf + pos, count))
1913 static int snd_rme9652_capture_copy_kernel(struct snd_pcm_substream *substream,
1914 int channel, unsigned long pos,
1915 void *dst, unsigned long count)
1917 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1920 channel_buf = rme9652_channel_buffer_location(rme9652,
1921 substream->pstr->stream,
1923 if (snd_BUG_ON(!channel_buf))
1925 memcpy(dst, channel_buf + pos, count);
1929 static int snd_rme9652_hw_silence(struct snd_pcm_substream *substream,
1930 int channel, unsigned long pos,
1931 unsigned long count)
1933 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1936 channel_buf = rme9652_channel_buffer_location (rme9652,
1937 substream->pstr->stream,
1939 if (snd_BUG_ON(!channel_buf))
1941 memset(channel_buf + pos, 0, count);
1945 static int snd_rme9652_reset(struct snd_pcm_substream *substream)
1947 struct snd_pcm_runtime *runtime = substream->runtime;
1948 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1949 struct snd_pcm_substream *other;
1950 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
1951 other = rme9652->capture_substream;
1953 other = rme9652->playback_substream;
1954 if (rme9652->running)
1955 runtime->status->hw_ptr = rme9652_hw_pointer(rme9652);
1957 runtime->status->hw_ptr = 0;
1959 struct snd_pcm_substream *s;
1960 struct snd_pcm_runtime *oruntime = other->runtime;
1961 snd_pcm_group_for_each_entry(s, substream) {
1963 oruntime->status->hw_ptr = runtime->status->hw_ptr;
1971 static int snd_rme9652_hw_params(struct snd_pcm_substream *substream,
1972 struct snd_pcm_hw_params *params)
1974 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1979 spin_lock_irq(&rme9652->lock);
1981 if (substream->pstr->stream == SNDRV_PCM_STREAM_PLAYBACK) {
1982 rme9652->control_register &= ~(RME9652_PRO | RME9652_Dolby | RME9652_EMP);
1983 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register |= rme9652->creg_spdif_stream);
1984 this_pid = rme9652->playback_pid;
1985 other_pid = rme9652->capture_pid;
1987 this_pid = rme9652->capture_pid;
1988 other_pid = rme9652->playback_pid;
1991 if ((other_pid > 0) && (this_pid != other_pid)) {
1993 /* The other stream is open, and not by the same
1994 task as this one. Make sure that the parameters
1995 that matter are the same.
1998 if ((int)params_rate(params) !=
1999 rme9652_adat_sample_rate(rme9652)) {
2000 spin_unlock_irq(&rme9652->lock);
2001 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_RATE);
2005 if (params_period_size(params) != rme9652->period_bytes / 4) {
2006 spin_unlock_irq(&rme9652->lock);
2007 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_PERIOD_SIZE);
2013 spin_unlock_irq(&rme9652->lock);
2017 spin_unlock_irq(&rme9652->lock);
2020 /* how to make sure that the rate matches an externally-set one ?
2023 if ((err = rme9652_set_rate(rme9652, params_rate(params))) < 0) {
2024 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_RATE);
2028 if ((err = rme9652_set_interrupt_interval(rme9652, params_period_size(params))) < 0) {
2029 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_PERIOD_SIZE);
2036 static int snd_rme9652_channel_info(struct snd_pcm_substream *substream,
2037 struct snd_pcm_channel_info *info)
2039 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2042 if (snd_BUG_ON(info->channel >= RME9652_NCHANNELS))
2045 chn = rme9652->channel_map[array_index_nospec(info->channel,
2046 RME9652_NCHANNELS)];
2050 info->offset = chn * RME9652_CHANNEL_BUFFER_BYTES;
2056 static int snd_rme9652_ioctl(struct snd_pcm_substream *substream,
2057 unsigned int cmd, void *arg)
2060 case SNDRV_PCM_IOCTL1_RESET:
2062 return snd_rme9652_reset(substream);
2064 case SNDRV_PCM_IOCTL1_CHANNEL_INFO:
2066 struct snd_pcm_channel_info *info = arg;
2067 return snd_rme9652_channel_info(substream, info);
2073 return snd_pcm_lib_ioctl(substream, cmd, arg);
2076 static void rme9652_silence_playback(struct snd_rme9652 *rme9652)
2078 memset(rme9652->playback_buffer, 0, RME9652_DMA_AREA_BYTES);
2081 static int snd_rme9652_trigger(struct snd_pcm_substream *substream,
2084 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2085 struct snd_pcm_substream *other;
2087 spin_lock(&rme9652->lock);
2088 running = rme9652->running;
2090 case SNDRV_PCM_TRIGGER_START:
2091 running |= 1 << substream->stream;
2093 case SNDRV_PCM_TRIGGER_STOP:
2094 running &= ~(1 << substream->stream);
2098 spin_unlock(&rme9652->lock);
2101 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
2102 other = rme9652->capture_substream;
2104 other = rme9652->playback_substream;
2107 struct snd_pcm_substream *s;
2108 snd_pcm_group_for_each_entry(s, substream) {
2110 snd_pcm_trigger_done(s, substream);
2111 if (cmd == SNDRV_PCM_TRIGGER_START)
2112 running |= 1 << s->stream;
2114 running &= ~(1 << s->stream);
2118 if (cmd == SNDRV_PCM_TRIGGER_START) {
2119 if (!(running & (1 << SNDRV_PCM_STREAM_PLAYBACK)) &&
2120 substream->stream == SNDRV_PCM_STREAM_CAPTURE)
2121 rme9652_silence_playback(rme9652);
2124 substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
2125 rme9652_silence_playback(rme9652);
2128 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
2129 rme9652_silence_playback(rme9652);
2132 snd_pcm_trigger_done(substream, substream);
2133 if (!rme9652->running && running)
2134 rme9652_start(rme9652);
2135 else if (rme9652->running && !running)
2136 rme9652_stop(rme9652);
2137 rme9652->running = running;
2138 spin_unlock(&rme9652->lock);
2143 static int snd_rme9652_prepare(struct snd_pcm_substream *substream)
2145 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2146 unsigned long flags;
2148 spin_lock_irqsave(&rme9652->lock, flags);
2149 if (!rme9652->running)
2150 rme9652_reset_hw_pointer(rme9652);
2151 spin_unlock_irqrestore(&rme9652->lock, flags);
2155 static const struct snd_pcm_hardware snd_rme9652_playback_subinfo =
2157 .info = (SNDRV_PCM_INFO_MMAP |
2158 SNDRV_PCM_INFO_MMAP_VALID |
2159 SNDRV_PCM_INFO_NONINTERLEAVED |
2160 SNDRV_PCM_INFO_SYNC_START |
2161 SNDRV_PCM_INFO_DOUBLE),
2162 .formats = SNDRV_PCM_FMTBIT_S32_LE,
2163 .rates = (SNDRV_PCM_RATE_44100 |
2164 SNDRV_PCM_RATE_48000 |
2165 SNDRV_PCM_RATE_88200 |
2166 SNDRV_PCM_RATE_96000),
2171 .buffer_bytes_max = RME9652_CHANNEL_BUFFER_BYTES * 26,
2172 .period_bytes_min = (64 * 4) * 10,
2173 .period_bytes_max = (8192 * 4) * 26,
2179 static const struct snd_pcm_hardware snd_rme9652_capture_subinfo =
2181 .info = (SNDRV_PCM_INFO_MMAP |
2182 SNDRV_PCM_INFO_MMAP_VALID |
2183 SNDRV_PCM_INFO_NONINTERLEAVED |
2184 SNDRV_PCM_INFO_SYNC_START),
2185 .formats = SNDRV_PCM_FMTBIT_S32_LE,
2186 .rates = (SNDRV_PCM_RATE_44100 |
2187 SNDRV_PCM_RATE_48000 |
2188 SNDRV_PCM_RATE_88200 |
2189 SNDRV_PCM_RATE_96000),
2194 .buffer_bytes_max = RME9652_CHANNEL_BUFFER_BYTES *26,
2195 .period_bytes_min = (64 * 4) * 10,
2196 .period_bytes_max = (8192 * 4) * 26,
2202 static const unsigned int period_sizes[] = { 64, 128, 256, 512, 1024, 2048, 4096, 8192 };
2204 static const struct snd_pcm_hw_constraint_list hw_constraints_period_sizes = {
2205 .count = ARRAY_SIZE(period_sizes),
2206 .list = period_sizes,
2210 static int snd_rme9652_hw_rule_channels(struct snd_pcm_hw_params *params,
2211 struct snd_pcm_hw_rule *rule)
2213 struct snd_rme9652 *rme9652 = rule->private;
2214 struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
2215 unsigned int list[2] = { rme9652->ds_channels, rme9652->ss_channels };
2216 return snd_interval_list(c, 2, list, 0);
2219 static int snd_rme9652_hw_rule_channels_rate(struct snd_pcm_hw_params *params,
2220 struct snd_pcm_hw_rule *rule)
2222 struct snd_rme9652 *rme9652 = rule->private;
2223 struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
2224 struct snd_interval *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
2225 if (r->min > 48000) {
2226 struct snd_interval t = {
2227 .min = rme9652->ds_channels,
2228 .max = rme9652->ds_channels,
2231 return snd_interval_refine(c, &t);
2232 } else if (r->max < 88200) {
2233 struct snd_interval t = {
2234 .min = rme9652->ss_channels,
2235 .max = rme9652->ss_channels,
2238 return snd_interval_refine(c, &t);
2243 static int snd_rme9652_hw_rule_rate_channels(struct snd_pcm_hw_params *params,
2244 struct snd_pcm_hw_rule *rule)
2246 struct snd_rme9652 *rme9652 = rule->private;
2247 struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
2248 struct snd_interval *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
2249 if (c->min >= rme9652->ss_channels) {
2250 struct snd_interval t = {
2255 return snd_interval_refine(r, &t);
2256 } else if (c->max <= rme9652->ds_channels) {
2257 struct snd_interval t = {
2262 return snd_interval_refine(r, &t);
2267 static int snd_rme9652_playback_open(struct snd_pcm_substream *substream)
2269 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2270 struct snd_pcm_runtime *runtime = substream->runtime;
2272 spin_lock_irq(&rme9652->lock);
2274 snd_pcm_set_sync(substream);
2276 runtime->hw = snd_rme9652_playback_subinfo;
2277 runtime->dma_area = rme9652->playback_buffer;
2278 runtime->dma_bytes = RME9652_DMA_AREA_BYTES;
2280 if (rme9652->capture_substream == NULL) {
2281 rme9652_stop(rme9652);
2282 rme9652_set_thru(rme9652, -1, 0);
2285 rme9652->playback_pid = current->pid;
2286 rme9652->playback_substream = substream;
2288 spin_unlock_irq(&rme9652->lock);
2290 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
2291 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, &hw_constraints_period_sizes);
2292 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
2293 snd_rme9652_hw_rule_channels, rme9652,
2294 SNDRV_PCM_HW_PARAM_CHANNELS, -1);
2295 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
2296 snd_rme9652_hw_rule_channels_rate, rme9652,
2297 SNDRV_PCM_HW_PARAM_RATE, -1);
2298 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
2299 snd_rme9652_hw_rule_rate_channels, rme9652,
2300 SNDRV_PCM_HW_PARAM_CHANNELS, -1);
2302 rme9652->creg_spdif_stream = rme9652->creg_spdif;
2303 rme9652->spdif_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
2304 snd_ctl_notify(rme9652->card, SNDRV_CTL_EVENT_MASK_VALUE |
2305 SNDRV_CTL_EVENT_MASK_INFO, &rme9652->spdif_ctl->id);
2309 static int snd_rme9652_playback_release(struct snd_pcm_substream *substream)
2311 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2313 spin_lock_irq(&rme9652->lock);
2315 rme9652->playback_pid = -1;
2316 rme9652->playback_substream = NULL;
2318 spin_unlock_irq(&rme9652->lock);
2320 rme9652->spdif_ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
2321 snd_ctl_notify(rme9652->card, SNDRV_CTL_EVENT_MASK_VALUE |
2322 SNDRV_CTL_EVENT_MASK_INFO, &rme9652->spdif_ctl->id);
2327 static int snd_rme9652_capture_open(struct snd_pcm_substream *substream)
2329 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2330 struct snd_pcm_runtime *runtime = substream->runtime;
2332 spin_lock_irq(&rme9652->lock);
2334 snd_pcm_set_sync(substream);
2336 runtime->hw = snd_rme9652_capture_subinfo;
2337 runtime->dma_area = rme9652->capture_buffer;
2338 runtime->dma_bytes = RME9652_DMA_AREA_BYTES;
2340 if (rme9652->playback_substream == NULL) {
2341 rme9652_stop(rme9652);
2342 rme9652_set_thru(rme9652, -1, 0);
2345 rme9652->capture_pid = current->pid;
2346 rme9652->capture_substream = substream;
2348 spin_unlock_irq(&rme9652->lock);
2350 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
2351 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, &hw_constraints_period_sizes);
2352 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
2353 snd_rme9652_hw_rule_channels, rme9652,
2354 SNDRV_PCM_HW_PARAM_CHANNELS, -1);
2355 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
2356 snd_rme9652_hw_rule_channels_rate, rme9652,
2357 SNDRV_PCM_HW_PARAM_RATE, -1);
2358 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
2359 snd_rme9652_hw_rule_rate_channels, rme9652,
2360 SNDRV_PCM_HW_PARAM_CHANNELS, -1);
2364 static int snd_rme9652_capture_release(struct snd_pcm_substream *substream)
2366 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2368 spin_lock_irq(&rme9652->lock);
2370 rme9652->capture_pid = -1;
2371 rme9652->capture_substream = NULL;
2373 spin_unlock_irq(&rme9652->lock);
2377 static const struct snd_pcm_ops snd_rme9652_playback_ops = {
2378 .open = snd_rme9652_playback_open,
2379 .close = snd_rme9652_playback_release,
2380 .ioctl = snd_rme9652_ioctl,
2381 .hw_params = snd_rme9652_hw_params,
2382 .prepare = snd_rme9652_prepare,
2383 .trigger = snd_rme9652_trigger,
2384 .pointer = snd_rme9652_hw_pointer,
2385 .copy_user = snd_rme9652_playback_copy,
2386 .copy_kernel = snd_rme9652_playback_copy_kernel,
2387 .fill_silence = snd_rme9652_hw_silence,
2390 static const struct snd_pcm_ops snd_rme9652_capture_ops = {
2391 .open = snd_rme9652_capture_open,
2392 .close = snd_rme9652_capture_release,
2393 .ioctl = snd_rme9652_ioctl,
2394 .hw_params = snd_rme9652_hw_params,
2395 .prepare = snd_rme9652_prepare,
2396 .trigger = snd_rme9652_trigger,
2397 .pointer = snd_rme9652_hw_pointer,
2398 .copy_user = snd_rme9652_capture_copy,
2399 .copy_kernel = snd_rme9652_capture_copy_kernel,
2402 static int snd_rme9652_create_pcm(struct snd_card *card,
2403 struct snd_rme9652 *rme9652)
2405 struct snd_pcm *pcm;
2408 if ((err = snd_pcm_new(card,
2410 0, 1, 1, &pcm)) < 0) {
2415 pcm->private_data = rme9652;
2416 strcpy(pcm->name, rme9652->card_name);
2418 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_rme9652_playback_ops);
2419 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_rme9652_capture_ops);
2421 pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX;
2426 static int snd_rme9652_create(struct snd_card *card,
2427 struct snd_rme9652 *rme9652,
2430 struct pci_dev *pci = rme9652->pci;
2436 rme9652->card = card;
2438 pci_read_config_word(rme9652->pci, PCI_CLASS_REVISION, &rev);
2440 switch (rev & 0xff) {
2452 if ((err = pci_enable_device(pci)) < 0)
2455 spin_lock_init(&rme9652->lock);
2457 if ((err = pci_request_regions(pci, "rme9652")) < 0)
2459 rme9652->port = pci_resource_start(pci, 0);
2460 rme9652->iobase = ioremap(rme9652->port, RME9652_IO_EXTENT);
2461 if (rme9652->iobase == NULL) {
2462 dev_err(card->dev, "unable to remap region 0x%lx-0x%lx\n",
2463 rme9652->port, rme9652->port + RME9652_IO_EXTENT - 1);
2467 if (request_irq(pci->irq, snd_rme9652_interrupt, IRQF_SHARED,
2468 KBUILD_MODNAME, rme9652)) {
2469 dev_err(card->dev, "unable to request IRQ %d\n", pci->irq);
2472 rme9652->irq = pci->irq;
2473 card->sync_irq = rme9652->irq;
2474 rme9652->precise_ptr = precise_ptr;
2476 /* Determine the h/w rev level of the card. This seems like
2477 a particularly kludgy way to encode it, but its what RME
2478 chose to do, so we follow them ...
2481 status = rme9652_read(rme9652, RME9652_status_register);
2482 if (rme9652_decode_spdif_rate(status&RME9652_F) == 1) {
2483 rme9652->hw_rev = 15;
2485 rme9652->hw_rev = 11;
2488 /* Differentiate between the standard Hammerfall, and the
2489 "Light", which does not have the expansion board. This
2490 method comes from information received from Mathhias
2491 Clausen at RME. Display the EEPROM and h/w revID where
2496 case 8: /* original eprom */
2497 strcpy(card->driver, "RME9636");
2498 if (rme9652->hw_rev == 15) {
2499 rme9652->card_name = "RME Digi9636 (Rev 1.5)";
2501 rme9652->card_name = "RME Digi9636";
2503 rme9652->ss_channels = RME9636_NCHANNELS;
2505 case 9: /* W36_G EPROM */
2506 strcpy(card->driver, "RME9636");
2507 rme9652->card_name = "RME Digi9636 (Rev G)";
2508 rme9652->ss_channels = RME9636_NCHANNELS;
2510 case 4: /* W52_G EPROM */
2511 strcpy(card->driver, "RME9652");
2512 rme9652->card_name = "RME Digi9652 (Rev G)";
2513 rme9652->ss_channels = RME9652_NCHANNELS;
2515 case 3: /* original eprom */
2516 strcpy(card->driver, "RME9652");
2517 if (rme9652->hw_rev == 15) {
2518 rme9652->card_name = "RME Digi9652 (Rev 1.5)";
2520 rme9652->card_name = "RME Digi9652";
2522 rme9652->ss_channels = RME9652_NCHANNELS;
2526 rme9652->ds_channels = (rme9652->ss_channels - 2) / 2 + 2;
2528 pci_set_master(rme9652->pci);
2530 if ((err = snd_rme9652_initialize_memory(rme9652)) < 0) {
2534 if ((err = snd_rme9652_create_pcm(card, rme9652)) < 0) {
2538 if ((err = snd_rme9652_create_controls(card, rme9652)) < 0) {
2542 snd_rme9652_proc_init(rme9652);
2544 rme9652->last_spdif_sample_rate = -1;
2545 rme9652->last_adat_sample_rate = -1;
2546 rme9652->playback_pid = -1;
2547 rme9652->capture_pid = -1;
2548 rme9652->capture_substream = NULL;
2549 rme9652->playback_substream = NULL;
2551 snd_rme9652_set_defaults(rme9652);
2553 if (rme9652->hw_rev == 15) {
2554 rme9652_initialize_spdif_receiver (rme9652);
2560 static void snd_rme9652_card_free(struct snd_card *card)
2562 struct snd_rme9652 *rme9652 = (struct snd_rme9652 *) card->private_data;
2565 snd_rme9652_free(rme9652);
2568 static int snd_rme9652_probe(struct pci_dev *pci,
2569 const struct pci_device_id *pci_id)
2572 struct snd_rme9652 *rme9652;
2573 struct snd_card *card;
2576 if (dev >= SNDRV_CARDS)
2583 err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
2584 sizeof(struct snd_rme9652), &card);
2589 rme9652 = (struct snd_rme9652 *) card->private_data;
2590 card->private_free = snd_rme9652_card_free;
2593 err = snd_rme9652_create(card, rme9652, precise_ptr[dev]);
2597 strcpy(card->shortname, rme9652->card_name);
2599 sprintf(card->longname, "%s at 0x%lx, irq %d",
2600 card->shortname, rme9652->port, rme9652->irq);
2601 err = snd_card_register(card);
2604 snd_card_free(card);
2607 pci_set_drvdata(pci, card);
2612 static void snd_rme9652_remove(struct pci_dev *pci)
2614 snd_card_free(pci_get_drvdata(pci));
2617 static struct pci_driver rme9652_driver = {
2618 .name = KBUILD_MODNAME,
2619 .id_table = snd_rme9652_ids,
2620 .probe = snd_rme9652_probe,
2621 .remove = snd_rme9652_remove,
2624 module_pci_driver(rme9652_driver);