1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * ALSA driver for RME Digi9652 audio interfaces
5 * Copyright (c) 1999 IEM - Winfried Ritsch
6 * Copyright (c) 1999-2001 Paul Davis
9 #include <linux/delay.h>
10 #include <linux/init.h>
11 #include <linux/interrupt.h>
12 #include <linux/pci.h>
13 #include <linux/module.h>
15 #include <linux/nospec.h>
17 #include <sound/core.h>
18 #include <sound/control.h>
19 #include <sound/pcm.h>
20 #include <sound/info.h>
21 #include <sound/asoundef.h>
22 #include <sound/initval.h>
24 #include <asm/current.h>
26 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
27 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
28 static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
29 static bool precise_ptr[SNDRV_CARDS]; /* Enable precise pointer */
31 module_param_array(index, int, NULL, 0444);
32 MODULE_PARM_DESC(index, "Index value for RME Digi9652 (Hammerfall) soundcard.");
33 module_param_array(id, charp, NULL, 0444);
34 MODULE_PARM_DESC(id, "ID string for RME Digi9652 (Hammerfall) soundcard.");
35 module_param_array(enable, bool, NULL, 0444);
36 MODULE_PARM_DESC(enable, "Enable/disable specific RME96{52,36} soundcards.");
37 module_param_array(precise_ptr, bool, NULL, 0444);
38 MODULE_PARM_DESC(precise_ptr, "Enable precise pointer (doesn't work reliably).");
39 MODULE_AUTHOR("Paul Davis <pbd@op.net>, Winfried Ritsch");
40 MODULE_DESCRIPTION("RME Digi9652/Digi9636");
41 MODULE_LICENSE("GPL");
42 MODULE_SUPPORTED_DEVICE("{{RME,Hammerfall},"
43 "{RME,Hammerfall-Light}}");
45 /* The Hammerfall has two sets of 24 ADAT + 2 S/PDIF channels, one for
46 capture, one for playback. Both the ADAT and S/PDIF channels appear
47 to the host CPU in the same block of memory. There is no functional
48 difference between them in terms of access.
50 The Hammerfall Light is identical to the Hammerfall, except that it
51 has 2 sets 18 channels (16 ADAT + 2 S/PDIF) for capture and playback.
54 #define RME9652_NCHANNELS 26
55 #define RME9636_NCHANNELS 18
57 /* Preferred sync source choices - used by "sync_pref" control switch */
59 #define RME9652_SYNC_FROM_SPDIF 0
60 #define RME9652_SYNC_FROM_ADAT1 1
61 #define RME9652_SYNC_FROM_ADAT2 2
62 #define RME9652_SYNC_FROM_ADAT3 3
64 /* Possible sources of S/PDIF input */
66 #define RME9652_SPDIFIN_OPTICAL 0 /* optical (ADAT1) */
67 #define RME9652_SPDIFIN_COAXIAL 1 /* coaxial (RCA) */
68 #define RME9652_SPDIFIN_INTERN 2 /* internal (CDROM) */
70 /* ------------- Status-Register bits --------------------- */
72 #define RME9652_IRQ (1<<0) /* IRQ is High if not reset by irq_clear */
73 #define RME9652_lock_2 (1<<1) /* ADAT 3-PLL: 1=locked, 0=unlocked */
74 #define RME9652_lock_1 (1<<2) /* ADAT 2-PLL: 1=locked, 0=unlocked */
75 #define RME9652_lock_0 (1<<3) /* ADAT 1-PLL: 1=locked, 0=unlocked */
76 #define RME9652_fs48 (1<<4) /* sample rate is 0=44.1/88.2,1=48/96 Khz */
77 #define RME9652_wsel_rd (1<<5) /* if Word-Clock is used and valid then 1 */
78 /* bits 6-15 encode h/w buffer pointer position */
79 #define RME9652_sync_2 (1<<16) /* if ADAT-IN 3 in sync to system clock */
80 #define RME9652_sync_1 (1<<17) /* if ADAT-IN 2 in sync to system clock */
81 #define RME9652_sync_0 (1<<18) /* if ADAT-IN 1 in sync to system clock */
82 #define RME9652_DS_rd (1<<19) /* 1=Double Speed Mode, 0=Normal Speed */
83 #define RME9652_tc_busy (1<<20) /* 1=time-code copy in progress (960ms) */
84 #define RME9652_tc_out (1<<21) /* time-code out bit */
85 #define RME9652_F_0 (1<<22) /* 000=64kHz, 100=88.2kHz, 011=96kHz */
86 #define RME9652_F_1 (1<<23) /* 111=32kHz, 110=44.1kHz, 101=48kHz, */
87 #define RME9652_F_2 (1<<24) /* external Crystal Chip if ERF=1 */
88 #define RME9652_ERF (1<<25) /* Error-Flag of SDPIF Receiver (1=No Lock) */
89 #define RME9652_buffer_id (1<<26) /* toggles by each interrupt on rec/play */
90 #define RME9652_tc_valid (1<<27) /* 1 = a signal is detected on time-code input */
91 #define RME9652_SPDIF_READ (1<<28) /* byte available from Rev 1.5+ S/PDIF interface */
93 #define RME9652_sync (RME9652_sync_0|RME9652_sync_1|RME9652_sync_2)
94 #define RME9652_lock (RME9652_lock_0|RME9652_lock_1|RME9652_lock_2)
95 #define RME9652_F (RME9652_F_0|RME9652_F_1|RME9652_F_2)
96 #define rme9652_decode_spdif_rate(x) ((x)>>22)
98 /* Bit 6..15 : h/w buffer pointer */
100 #define RME9652_buf_pos 0x000FFC0
102 /* Bits 31,30,29 are bits 5,4,3 of h/w pointer position on later
103 Rev G EEPROMS and Rev 1.5 cards or later.
106 #define RME9652_REV15_buf_pos(x) ((((x)&0xE0000000)>>26)|((x)&RME9652_buf_pos))
108 /* amount of io space we remap for register access. i'm not sure we
109 even need this much, but 1K is nice round number :)
112 #define RME9652_IO_EXTENT 1024
114 #define RME9652_init_buffer 0
115 #define RME9652_play_buffer 32 /* holds ptr to 26x64kBit host RAM */
116 #define RME9652_rec_buffer 36 /* holds ptr to 26x64kBit host RAM */
117 #define RME9652_control_register 64
118 #define RME9652_irq_clear 96
119 #define RME9652_time_code 100 /* useful if used with alesis adat */
120 #define RME9652_thru_base 128 /* 132...228 Thru for 26 channels */
122 /* Read-only registers */
124 /* Writing to any of the register locations writes to the status
125 register. We'll use the first location as our point of access.
128 #define RME9652_status_register 0
130 /* --------- Control-Register Bits ---------------- */
133 #define RME9652_start_bit (1<<0) /* start record/play */
134 /* bits 1-3 encode buffersize/latency */
135 #define RME9652_Master (1<<4) /* Clock Mode Master=1,Slave/Auto=0 */
136 #define RME9652_IE (1<<5) /* Interrupt Enable */
137 #define RME9652_freq (1<<6) /* samplerate 0=44.1/88.2, 1=48/96 kHz */
138 #define RME9652_freq1 (1<<7) /* if 0, 32kHz, else always 1 */
139 #define RME9652_DS (1<<8) /* Doule Speed 0=44.1/48, 1=88.2/96 Khz */
140 #define RME9652_PRO (1<<9) /* S/PDIF out: 0=consumer, 1=professional */
141 #define RME9652_EMP (1<<10) /* Emphasis 0=None, 1=ON */
142 #define RME9652_Dolby (1<<11) /* Non-audio bit 1=set, 0=unset */
143 #define RME9652_opt_out (1<<12) /* Use 1st optical OUT as SPDIF: 1=yes,0=no */
144 #define RME9652_wsel (1<<13) /* use Wordclock as sync (overwrites master) */
145 #define RME9652_inp_0 (1<<14) /* SPDIF-IN: 00=optical (ADAT1), */
146 #define RME9652_inp_1 (1<<15) /* 01=koaxial (Cinch), 10=Internal CDROM */
147 #define RME9652_SyncPref_ADAT2 (1<<16)
148 #define RME9652_SyncPref_ADAT3 (1<<17)
149 #define RME9652_SPDIF_RESET (1<<18) /* Rev 1.5+: h/w S/PDIF receiver */
150 #define RME9652_SPDIF_SELECT (1<<19)
151 #define RME9652_SPDIF_CLOCK (1<<20)
152 #define RME9652_SPDIF_WRITE (1<<21)
153 #define RME9652_ADAT1_INTERNAL (1<<22) /* Rev 1.5+: if set, internal CD connector carries ADAT */
155 /* buffersize = 512Bytes * 2^n, where n is made from Bit2 ... Bit0 */
157 #define RME9652_latency 0x0e
158 #define rme9652_encode_latency(x) (((x)&0x7)<<1)
159 #define rme9652_decode_latency(x) (((x)>>1)&0x7)
160 #define rme9652_running_double_speed(s) ((s)->control_register & RME9652_DS)
161 #define RME9652_inp (RME9652_inp_0|RME9652_inp_1)
162 #define rme9652_encode_spdif_in(x) (((x)&0x3)<<14)
163 #define rme9652_decode_spdif_in(x) (((x)>>14)&0x3)
165 #define RME9652_SyncPref_Mask (RME9652_SyncPref_ADAT2|RME9652_SyncPref_ADAT3)
166 #define RME9652_SyncPref_ADAT1 0
167 #define RME9652_SyncPref_SPDIF (RME9652_SyncPref_ADAT2|RME9652_SyncPref_ADAT3)
169 /* the size of a substream (1 mono data stream) */
171 #define RME9652_CHANNEL_BUFFER_SAMPLES (16*1024)
172 #define RME9652_CHANNEL_BUFFER_BYTES (4*RME9652_CHANNEL_BUFFER_SAMPLES)
174 /* the size of the area we need to allocate for DMA transfers. the
175 size is the same regardless of the number of channels - the
176 9636 still uses the same memory area.
178 Note that we allocate 1 more channel than is apparently needed
179 because the h/w seems to write 1 byte beyond the end of the last
183 #define RME9652_DMA_AREA_BYTES ((RME9652_NCHANNELS+1) * RME9652_CHANNEL_BUFFER_BYTES)
184 #define RME9652_DMA_AREA_KILOBYTES (RME9652_DMA_AREA_BYTES/1024)
192 void __iomem *iobase;
196 u32 control_register; /* cached value */
197 u32 thru_bits; /* thru 1=on, 0=off channel 1=Bit1... channel 26= Bit26 */
200 u32 creg_spdif_stream;
202 char *card_name; /* hammerfall or hammerfall light names */
204 size_t hw_offsetmask; /* &-with status register to get real hw_offset */
205 size_t prev_hw_offset; /* previous hw offset */
206 size_t max_jitter; /* maximum jitter in frames for
208 size_t period_bytes; /* guess what this is */
210 unsigned char ds_channels;
211 unsigned char ss_channels; /* different for hammerfall/hammerfall-light */
213 struct snd_dma_buffer playback_dma_buf;
214 struct snd_dma_buffer capture_dma_buf;
216 unsigned char *capture_buffer; /* suitably aligned address */
217 unsigned char *playback_buffer; /* suitably aligned address */
222 struct snd_pcm_substream *capture_substream;
223 struct snd_pcm_substream *playback_substream;
226 int passthru; /* non-zero if doing pass-thru */
227 int hw_rev; /* h/w rev * 10 (i.e. 1.5 has hw_rev = 15) */
229 int last_spdif_sample_rate; /* so that we can catch externally ... */
230 int last_adat_sample_rate; /* ... induced rate changes */
232 const char *channel_map;
234 struct snd_card *card;
237 struct snd_kcontrol *spdif_ctl;
241 /* These tables map the ALSA channels 1..N to the channels that we
242 need to use in order to find the relevant channel buffer. RME
243 refer to this kind of mapping as between "the ADAT channel and
244 the DMA channel." We index it using the logical audio channel,
245 and the value is the DMA channel (i.e. channel buffer number)
246 where the data for that channel can be read/written from/to.
249 static const char channel_map_9652_ss[26] = {
250 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17,
251 18, 19, 20, 21, 22, 23, 24, 25
254 static const char channel_map_9636_ss[26] = {
255 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
256 /* channels 16 and 17 are S/PDIF */
258 /* channels 18-25 don't exist */
259 -1, -1, -1, -1, -1, -1, -1, -1
262 static const char channel_map_9652_ds[26] = {
263 /* ADAT channels are remapped */
264 1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23,
265 /* channels 12 and 13 are S/PDIF */
267 /* others don't exist */
268 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1
271 static const char channel_map_9636_ds[26] = {
272 /* ADAT channels are remapped */
273 1, 3, 5, 7, 9, 11, 13, 15,
274 /* channels 8 and 9 are S/PDIF */
276 /* others don't exist */
277 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1
280 static int snd_hammerfall_get_buffer(struct pci_dev *pci, struct snd_dma_buffer *dmab, size_t size)
282 return snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, &pci->dev, size, dmab);
285 static void snd_hammerfall_free_buffer(struct snd_dma_buffer *dmab, struct pci_dev *pci)
288 snd_dma_free_pages(dmab);
292 static const struct pci_device_id snd_rme9652_ids[] = {
296 .subvendor = PCI_ANY_ID,
297 .subdevice = PCI_ANY_ID,
298 }, /* RME Digi9652 */
302 MODULE_DEVICE_TABLE(pci, snd_rme9652_ids);
304 static inline void rme9652_write(struct snd_rme9652 *rme9652, int reg, int val)
306 writel(val, rme9652->iobase + reg);
309 static inline unsigned int rme9652_read(struct snd_rme9652 *rme9652, int reg)
311 return readl(rme9652->iobase + reg);
314 static inline int snd_rme9652_use_is_exclusive(struct snd_rme9652 *rme9652)
319 spin_lock_irqsave(&rme9652->lock, flags);
320 if ((rme9652->playback_pid != rme9652->capture_pid) &&
321 (rme9652->playback_pid >= 0) && (rme9652->capture_pid >= 0)) {
324 spin_unlock_irqrestore(&rme9652->lock, flags);
328 static inline int rme9652_adat_sample_rate(struct snd_rme9652 *rme9652)
330 if (rme9652_running_double_speed(rme9652)) {
331 return (rme9652_read(rme9652, RME9652_status_register) &
332 RME9652_fs48) ? 96000 : 88200;
334 return (rme9652_read(rme9652, RME9652_status_register) &
335 RME9652_fs48) ? 48000 : 44100;
339 static inline void rme9652_compute_period_size(struct snd_rme9652 *rme9652)
343 i = rme9652->control_register & RME9652_latency;
344 rme9652->period_bytes = 1 << ((rme9652_decode_latency(i) + 8));
345 rme9652->hw_offsetmask =
346 (rme9652->period_bytes * 2 - 1) & RME9652_buf_pos;
347 rme9652->max_jitter = 80;
350 static snd_pcm_uframes_t rme9652_hw_pointer(struct snd_rme9652 *rme9652)
353 unsigned int offset, frag;
354 snd_pcm_uframes_t period_size = rme9652->period_bytes / 4;
355 snd_pcm_sframes_t delta;
357 status = rme9652_read(rme9652, RME9652_status_register);
358 if (!rme9652->precise_ptr)
359 return (status & RME9652_buffer_id) ? period_size : 0;
360 offset = status & RME9652_buf_pos;
362 /* The hardware may give a backward movement for up to 80 frames
363 Martin Kirst <martin.kirst@freenet.de> knows the details.
366 delta = rme9652->prev_hw_offset - offset;
368 if (delta <= (snd_pcm_sframes_t)rme9652->max_jitter * 4)
369 offset = rme9652->prev_hw_offset;
371 rme9652->prev_hw_offset = offset;
372 offset &= rme9652->hw_offsetmask;
374 frag = status & RME9652_buffer_id;
376 if (offset < period_size) {
377 if (offset > rme9652->max_jitter) {
379 dev_err(rme9652->card->dev,
380 "Unexpected hw_pointer position (bufid == 0): status: %x offset: %d\n",
384 offset -= rme9652->max_jitter;
386 offset += period_size * 2;
388 if (offset > period_size + rme9652->max_jitter) {
390 dev_err(rme9652->card->dev,
391 "Unexpected hw_pointer position (bufid == 1): status: %x offset: %d\n",
395 offset -= rme9652->max_jitter;
401 static inline void rme9652_reset_hw_pointer(struct snd_rme9652 *rme9652)
405 /* reset the FIFO pointer to zero. We do this by writing to 8
406 registers, each of which is a 32bit wide register, and set
407 them all to zero. Note that s->iobase is a pointer to
408 int32, not pointer to char.
411 for (i = 0; i < 8; i++) {
412 rme9652_write(rme9652, i * 4, 0);
415 rme9652->prev_hw_offset = 0;
418 static inline void rme9652_start(struct snd_rme9652 *s)
420 s->control_register |= (RME9652_IE | RME9652_start_bit);
421 rme9652_write(s, RME9652_control_register, s->control_register);
424 static inline void rme9652_stop(struct snd_rme9652 *s)
426 s->control_register &= ~(RME9652_start_bit | RME9652_IE);
427 rme9652_write(s, RME9652_control_register, s->control_register);
430 static int rme9652_set_interrupt_interval(struct snd_rme9652 *s,
436 spin_lock_irq(&s->lock);
438 if ((restart = s->running)) {
449 s->control_register &= ~RME9652_latency;
450 s->control_register |= rme9652_encode_latency(n);
452 rme9652_write(s, RME9652_control_register, s->control_register);
454 rme9652_compute_period_size(s);
459 spin_unlock_irq(&s->lock);
464 static int rme9652_set_rate(struct snd_rme9652 *rme9652, int rate)
467 int reject_if_open = 0;
470 if (!snd_rme9652_use_is_exclusive (rme9652)) {
474 /* Changing from a "single speed" to a "double speed" rate is
475 not allowed if any substreams are open. This is because
476 such a change causes a shift in the location of
477 the DMA buffers and a reduction in the number of available
480 Note that a similar but essentially insoluble problem
481 exists for externally-driven rate changes. All we can do
482 is to flag rate changes in the read/write routines.
485 spin_lock_irq(&rme9652->lock);
486 xrate = rme9652_adat_sample_rate(rme9652);
511 rate = RME9652_DS | RME9652_freq;
514 spin_unlock_irq(&rme9652->lock);
518 if (reject_if_open && (rme9652->capture_pid >= 0 || rme9652->playback_pid >= 0)) {
519 spin_unlock_irq(&rme9652->lock);
523 if ((restart = rme9652->running)) {
524 rme9652_stop(rme9652);
526 rme9652->control_register &= ~(RME9652_freq | RME9652_DS);
527 rme9652->control_register |= rate;
528 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
531 rme9652_start(rme9652);
534 if (rate & RME9652_DS) {
535 if (rme9652->ss_channels == RME9652_NCHANNELS) {
536 rme9652->channel_map = channel_map_9652_ds;
538 rme9652->channel_map = channel_map_9636_ds;
541 if (rme9652->ss_channels == RME9652_NCHANNELS) {
542 rme9652->channel_map = channel_map_9652_ss;
544 rme9652->channel_map = channel_map_9636_ss;
548 spin_unlock_irq(&rme9652->lock);
552 static void rme9652_set_thru(struct snd_rme9652 *rme9652, int channel, int enable)
556 rme9652->passthru = 0;
560 /* set thru for all channels */
563 for (i = 0; i < RME9652_NCHANNELS; i++) {
564 rme9652->thru_bits |= (1 << i);
565 rme9652_write(rme9652, RME9652_thru_base + i * 4, 1);
568 for (i = 0; i < RME9652_NCHANNELS; i++) {
569 rme9652->thru_bits &= ~(1 << i);
570 rme9652_write(rme9652, RME9652_thru_base + i * 4, 0);
577 mapped_channel = rme9652->channel_map[channel];
580 rme9652->thru_bits |= (1 << mapped_channel);
582 rme9652->thru_bits &= ~(1 << mapped_channel);
585 rme9652_write(rme9652,
586 RME9652_thru_base + mapped_channel * 4,
591 static int rme9652_set_passthru(struct snd_rme9652 *rme9652, int onoff)
594 rme9652_set_thru(rme9652, -1, 1);
596 /* we don't want interrupts, so do a
597 custom version of rme9652_start().
600 rme9652->control_register =
602 rme9652_encode_latency(7) |
605 rme9652_reset_hw_pointer(rme9652);
607 rme9652_write(rme9652, RME9652_control_register,
608 rme9652->control_register);
609 rme9652->passthru = 1;
611 rme9652_set_thru(rme9652, -1, 0);
612 rme9652_stop(rme9652);
613 rme9652->passthru = 0;
619 static void rme9652_spdif_set_bit (struct snd_rme9652 *rme9652, int mask, int onoff)
622 rme9652->control_register |= mask;
624 rme9652->control_register &= ~mask;
626 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
629 static void rme9652_spdif_write_byte (struct snd_rme9652 *rme9652, const int val)
634 for (i = 0, mask = 0x80; i < 8; i++, mask >>= 1) {
636 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_WRITE, 1);
638 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_WRITE, 0);
640 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 1);
641 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 0);
645 static int rme9652_spdif_read_byte (struct snd_rme9652 *rme9652)
653 for (i = 0, mask = 0x80; i < 8; i++, mask >>= 1) {
654 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 1);
655 if (rme9652_read (rme9652, RME9652_status_register) & RME9652_SPDIF_READ)
657 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 0);
663 static void rme9652_write_spdif_codec (struct snd_rme9652 *rme9652, const int address, const int data)
665 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 1);
666 rme9652_spdif_write_byte (rme9652, 0x20);
667 rme9652_spdif_write_byte (rme9652, address);
668 rme9652_spdif_write_byte (rme9652, data);
669 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 0);
673 static int rme9652_spdif_read_codec (struct snd_rme9652 *rme9652, const int address)
677 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 1);
678 rme9652_spdif_write_byte (rme9652, 0x20);
679 rme9652_spdif_write_byte (rme9652, address);
680 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 0);
681 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 1);
683 rme9652_spdif_write_byte (rme9652, 0x21);
684 ret = rme9652_spdif_read_byte (rme9652);
685 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 0);
690 static void rme9652_initialize_spdif_receiver (struct snd_rme9652 *rme9652)
692 /* XXX what unsets this ? */
694 rme9652->control_register |= RME9652_SPDIF_RESET;
696 rme9652_write_spdif_codec (rme9652, 4, 0x40);
697 rme9652_write_spdif_codec (rme9652, 17, 0x13);
698 rme9652_write_spdif_codec (rme9652, 6, 0x02);
701 static inline int rme9652_spdif_sample_rate(struct snd_rme9652 *s)
703 unsigned int rate_bits;
705 if (rme9652_read(s, RME9652_status_register) & RME9652_ERF) {
706 return -1; /* error condition */
709 if (s->hw_rev == 15) {
713 x = rme9652_spdif_read_codec (s, 30);
720 if (y > 30400 && y < 33600) ret = 32000;
721 else if (y > 41900 && y < 46000) ret = 44100;
722 else if (y > 46000 && y < 50400) ret = 48000;
723 else if (y > 60800 && y < 67200) ret = 64000;
724 else if (y > 83700 && y < 92000) ret = 88200;
725 else if (y > 92000 && y < 100000) ret = 96000;
730 rate_bits = rme9652_read(s, RME9652_status_register) & RME9652_F;
732 switch (rme9652_decode_spdif_rate(rate_bits)) {
752 dev_err(s->card->dev,
753 "%s: unknown S/PDIF input rate (bits = 0x%x)\n",
754 s->card_name, rate_bits);
759 /*-----------------------------------------------------------------------------
761 ----------------------------------------------------------------------------*/
763 static u32 snd_rme9652_convert_from_aes(struct snd_aes_iec958 *aes)
766 val |= (aes->status[0] & IEC958_AES0_PROFESSIONAL) ? RME9652_PRO : 0;
767 val |= (aes->status[0] & IEC958_AES0_NONAUDIO) ? RME9652_Dolby : 0;
768 if (val & RME9652_PRO)
769 val |= (aes->status[0] & IEC958_AES0_PRO_EMPHASIS_5015) ? RME9652_EMP : 0;
771 val |= (aes->status[0] & IEC958_AES0_CON_EMPHASIS_5015) ? RME9652_EMP : 0;
775 static void snd_rme9652_convert_to_aes(struct snd_aes_iec958 *aes, u32 val)
777 aes->status[0] = ((val & RME9652_PRO) ? IEC958_AES0_PROFESSIONAL : 0) |
778 ((val & RME9652_Dolby) ? IEC958_AES0_NONAUDIO : 0);
779 if (val & RME9652_PRO)
780 aes->status[0] |= (val & RME9652_EMP) ? IEC958_AES0_PRO_EMPHASIS_5015 : 0;
782 aes->status[0] |= (val & RME9652_EMP) ? IEC958_AES0_CON_EMPHASIS_5015 : 0;
785 static int snd_rme9652_control_spdif_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
787 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
792 static int snd_rme9652_control_spdif_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
794 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
796 snd_rme9652_convert_to_aes(&ucontrol->value.iec958, rme9652->creg_spdif);
800 static int snd_rme9652_control_spdif_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
802 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
806 val = snd_rme9652_convert_from_aes(&ucontrol->value.iec958);
807 spin_lock_irq(&rme9652->lock);
808 change = val != rme9652->creg_spdif;
809 rme9652->creg_spdif = val;
810 spin_unlock_irq(&rme9652->lock);
814 static int snd_rme9652_control_spdif_stream_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
816 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
821 static int snd_rme9652_control_spdif_stream_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
823 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
825 snd_rme9652_convert_to_aes(&ucontrol->value.iec958, rme9652->creg_spdif_stream);
829 static int snd_rme9652_control_spdif_stream_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
831 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
835 val = snd_rme9652_convert_from_aes(&ucontrol->value.iec958);
836 spin_lock_irq(&rme9652->lock);
837 change = val != rme9652->creg_spdif_stream;
838 rme9652->creg_spdif_stream = val;
839 rme9652->control_register &= ~(RME9652_PRO | RME9652_Dolby | RME9652_EMP);
840 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register |= val);
841 spin_unlock_irq(&rme9652->lock);
845 static int snd_rme9652_control_spdif_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
847 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
852 static int snd_rme9652_control_spdif_mask_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
854 ucontrol->value.iec958.status[0] = kcontrol->private_value;
858 #define RME9652_ADAT1_IN(xname, xindex) \
859 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
860 .info = snd_rme9652_info_adat1_in, \
861 .get = snd_rme9652_get_adat1_in, \
862 .put = snd_rme9652_put_adat1_in }
864 static unsigned int rme9652_adat1_in(struct snd_rme9652 *rme9652)
866 if (rme9652->control_register & RME9652_ADAT1_INTERNAL)
871 static int rme9652_set_adat1_input(struct snd_rme9652 *rme9652, int internal)
876 rme9652->control_register |= RME9652_ADAT1_INTERNAL;
878 rme9652->control_register &= ~RME9652_ADAT1_INTERNAL;
881 /* XXX do we actually need to stop the card when we do this ? */
883 if ((restart = rme9652->running)) {
884 rme9652_stop(rme9652);
887 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
890 rme9652_start(rme9652);
896 static int snd_rme9652_info_adat1_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
898 static const char * const texts[2] = {"ADAT1", "Internal"};
900 return snd_ctl_enum_info(uinfo, 1, 2, texts);
903 static int snd_rme9652_get_adat1_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
905 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
907 spin_lock_irq(&rme9652->lock);
908 ucontrol->value.enumerated.item[0] = rme9652_adat1_in(rme9652);
909 spin_unlock_irq(&rme9652->lock);
913 static int snd_rme9652_put_adat1_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
915 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
919 if (!snd_rme9652_use_is_exclusive(rme9652))
921 val = ucontrol->value.enumerated.item[0] % 2;
922 spin_lock_irq(&rme9652->lock);
923 change = val != rme9652_adat1_in(rme9652);
925 rme9652_set_adat1_input(rme9652, val);
926 spin_unlock_irq(&rme9652->lock);
930 #define RME9652_SPDIF_IN(xname, xindex) \
931 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
932 .info = snd_rme9652_info_spdif_in, \
933 .get = snd_rme9652_get_spdif_in, .put = snd_rme9652_put_spdif_in }
935 static unsigned int rme9652_spdif_in(struct snd_rme9652 *rme9652)
937 return rme9652_decode_spdif_in(rme9652->control_register &
941 static int rme9652_set_spdif_input(struct snd_rme9652 *rme9652, int in)
945 rme9652->control_register &= ~RME9652_inp;
946 rme9652->control_register |= rme9652_encode_spdif_in(in);
948 if ((restart = rme9652->running)) {
949 rme9652_stop(rme9652);
952 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
955 rme9652_start(rme9652);
961 static int snd_rme9652_info_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
963 static const char * const texts[3] = {"ADAT1", "Coaxial", "Internal"};
965 return snd_ctl_enum_info(uinfo, 1, 3, texts);
968 static int snd_rme9652_get_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
970 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
972 spin_lock_irq(&rme9652->lock);
973 ucontrol->value.enumerated.item[0] = rme9652_spdif_in(rme9652);
974 spin_unlock_irq(&rme9652->lock);
978 static int snd_rme9652_put_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
980 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
984 if (!snd_rme9652_use_is_exclusive(rme9652))
986 val = ucontrol->value.enumerated.item[0] % 3;
987 spin_lock_irq(&rme9652->lock);
988 change = val != rme9652_spdif_in(rme9652);
990 rme9652_set_spdif_input(rme9652, val);
991 spin_unlock_irq(&rme9652->lock);
995 #define RME9652_SPDIF_OUT(xname, xindex) \
996 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
997 .info = snd_rme9652_info_spdif_out, \
998 .get = snd_rme9652_get_spdif_out, .put = snd_rme9652_put_spdif_out }
1000 static int rme9652_spdif_out(struct snd_rme9652 *rme9652)
1002 return (rme9652->control_register & RME9652_opt_out) ? 1 : 0;
1005 static int rme9652_set_spdif_output(struct snd_rme9652 *rme9652, int out)
1010 rme9652->control_register |= RME9652_opt_out;
1012 rme9652->control_register &= ~RME9652_opt_out;
1015 if ((restart = rme9652->running)) {
1016 rme9652_stop(rme9652);
1019 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1022 rme9652_start(rme9652);
1028 #define snd_rme9652_info_spdif_out snd_ctl_boolean_mono_info
1030 static int snd_rme9652_get_spdif_out(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1032 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1034 spin_lock_irq(&rme9652->lock);
1035 ucontrol->value.integer.value[0] = rme9652_spdif_out(rme9652);
1036 spin_unlock_irq(&rme9652->lock);
1040 static int snd_rme9652_put_spdif_out(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1042 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1046 if (!snd_rme9652_use_is_exclusive(rme9652))
1048 val = ucontrol->value.integer.value[0] & 1;
1049 spin_lock_irq(&rme9652->lock);
1050 change = (int)val != rme9652_spdif_out(rme9652);
1051 rme9652_set_spdif_output(rme9652, val);
1052 spin_unlock_irq(&rme9652->lock);
1056 #define RME9652_SYNC_MODE(xname, xindex) \
1057 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1058 .info = snd_rme9652_info_sync_mode, \
1059 .get = snd_rme9652_get_sync_mode, .put = snd_rme9652_put_sync_mode }
1061 static int rme9652_sync_mode(struct snd_rme9652 *rme9652)
1063 if (rme9652->control_register & RME9652_wsel) {
1065 } else if (rme9652->control_register & RME9652_Master) {
1072 static int rme9652_set_sync_mode(struct snd_rme9652 *rme9652, int mode)
1078 rme9652->control_register &=
1079 ~(RME9652_Master | RME9652_wsel);
1082 rme9652->control_register =
1083 (rme9652->control_register & ~RME9652_wsel) | RME9652_Master;
1086 rme9652->control_register |=
1087 (RME9652_Master | RME9652_wsel);
1091 if ((restart = rme9652->running)) {
1092 rme9652_stop(rme9652);
1095 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1098 rme9652_start(rme9652);
1104 static int snd_rme9652_info_sync_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1106 static const char * const texts[3] = {
1107 "AutoSync", "Master", "Word Clock"
1110 return snd_ctl_enum_info(uinfo, 1, 3, texts);
1113 static int snd_rme9652_get_sync_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1115 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1117 spin_lock_irq(&rme9652->lock);
1118 ucontrol->value.enumerated.item[0] = rme9652_sync_mode(rme9652);
1119 spin_unlock_irq(&rme9652->lock);
1123 static int snd_rme9652_put_sync_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1125 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1129 val = ucontrol->value.enumerated.item[0] % 3;
1130 spin_lock_irq(&rme9652->lock);
1131 change = (int)val != rme9652_sync_mode(rme9652);
1132 rme9652_set_sync_mode(rme9652, val);
1133 spin_unlock_irq(&rme9652->lock);
1137 #define RME9652_SYNC_PREF(xname, xindex) \
1138 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1139 .info = snd_rme9652_info_sync_pref, \
1140 .get = snd_rme9652_get_sync_pref, .put = snd_rme9652_put_sync_pref }
1142 static int rme9652_sync_pref(struct snd_rme9652 *rme9652)
1144 switch (rme9652->control_register & RME9652_SyncPref_Mask) {
1145 case RME9652_SyncPref_ADAT1:
1146 return RME9652_SYNC_FROM_ADAT1;
1147 case RME9652_SyncPref_ADAT2:
1148 return RME9652_SYNC_FROM_ADAT2;
1149 case RME9652_SyncPref_ADAT3:
1150 return RME9652_SYNC_FROM_ADAT3;
1151 case RME9652_SyncPref_SPDIF:
1152 return RME9652_SYNC_FROM_SPDIF;
1158 static int rme9652_set_sync_pref(struct snd_rme9652 *rme9652, int pref)
1162 rme9652->control_register &= ~RME9652_SyncPref_Mask;
1164 case RME9652_SYNC_FROM_ADAT1:
1165 rme9652->control_register |= RME9652_SyncPref_ADAT1;
1167 case RME9652_SYNC_FROM_ADAT2:
1168 rme9652->control_register |= RME9652_SyncPref_ADAT2;
1170 case RME9652_SYNC_FROM_ADAT3:
1171 rme9652->control_register |= RME9652_SyncPref_ADAT3;
1173 case RME9652_SYNC_FROM_SPDIF:
1174 rme9652->control_register |= RME9652_SyncPref_SPDIF;
1178 if ((restart = rme9652->running)) {
1179 rme9652_stop(rme9652);
1182 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1185 rme9652_start(rme9652);
1191 static int snd_rme9652_info_sync_pref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1193 static const char * const texts[4] = {
1194 "IEC958 In", "ADAT1 In", "ADAT2 In", "ADAT3 In"
1196 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1198 return snd_ctl_enum_info(uinfo, 1,
1199 rme9652->ss_channels == RME9652_NCHANNELS ? 4 : 3,
1203 static int snd_rme9652_get_sync_pref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1205 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1207 spin_lock_irq(&rme9652->lock);
1208 ucontrol->value.enumerated.item[0] = rme9652_sync_pref(rme9652);
1209 spin_unlock_irq(&rme9652->lock);
1213 static int snd_rme9652_put_sync_pref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1215 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1219 if (!snd_rme9652_use_is_exclusive(rme9652))
1221 max = rme9652->ss_channels == RME9652_NCHANNELS ? 4 : 3;
1222 val = ucontrol->value.enumerated.item[0] % max;
1223 spin_lock_irq(&rme9652->lock);
1224 change = (int)val != rme9652_sync_pref(rme9652);
1225 rme9652_set_sync_pref(rme9652, val);
1226 spin_unlock_irq(&rme9652->lock);
1230 static int snd_rme9652_info_thru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1232 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1233 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1234 uinfo->count = rme9652->ss_channels;
1235 uinfo->value.integer.min = 0;
1236 uinfo->value.integer.max = 1;
1240 static int snd_rme9652_get_thru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1242 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1244 u32 thru_bits = rme9652->thru_bits;
1246 for (k = 0; k < rme9652->ss_channels; ++k) {
1247 ucontrol->value.integer.value[k] = !!(thru_bits & (1 << k));
1252 static int snd_rme9652_put_thru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1254 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1259 if (!snd_rme9652_use_is_exclusive(rme9652))
1262 for (chn = 0; chn < rme9652->ss_channels; ++chn) {
1263 if (ucontrol->value.integer.value[chn])
1264 thru_bits |= 1 << chn;
1267 spin_lock_irq(&rme9652->lock);
1268 change = thru_bits ^ rme9652->thru_bits;
1270 for (chn = 0; chn < rme9652->ss_channels; ++chn) {
1271 if (!(change & (1 << chn)))
1273 rme9652_set_thru(rme9652,chn,thru_bits&(1<<chn));
1276 spin_unlock_irq(&rme9652->lock);
1280 #define RME9652_PASSTHRU(xname, xindex) \
1281 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1282 .info = snd_rme9652_info_passthru, \
1283 .put = snd_rme9652_put_passthru, \
1284 .get = snd_rme9652_get_passthru }
1286 #define snd_rme9652_info_passthru snd_ctl_boolean_mono_info
1288 static int snd_rme9652_get_passthru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1290 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1292 spin_lock_irq(&rme9652->lock);
1293 ucontrol->value.integer.value[0] = rme9652->passthru;
1294 spin_unlock_irq(&rme9652->lock);
1298 static int snd_rme9652_put_passthru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1300 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1305 if (!snd_rme9652_use_is_exclusive(rme9652))
1308 val = ucontrol->value.integer.value[0] & 1;
1309 spin_lock_irq(&rme9652->lock);
1310 change = (ucontrol->value.integer.value[0] != rme9652->passthru);
1312 err = rme9652_set_passthru(rme9652, val);
1313 spin_unlock_irq(&rme9652->lock);
1314 return err ? err : change;
1317 /* Read-only switches */
1319 #define RME9652_SPDIF_RATE(xname, xindex) \
1320 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1321 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
1322 .info = snd_rme9652_info_spdif_rate, \
1323 .get = snd_rme9652_get_spdif_rate }
1325 static int snd_rme9652_info_spdif_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1327 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1329 uinfo->value.integer.min = 0;
1330 uinfo->value.integer.max = 96000;
1334 static int snd_rme9652_get_spdif_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1336 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1338 spin_lock_irq(&rme9652->lock);
1339 ucontrol->value.integer.value[0] = rme9652_spdif_sample_rate(rme9652);
1340 spin_unlock_irq(&rme9652->lock);
1344 #define RME9652_ADAT_SYNC(xname, xindex, xidx) \
1345 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1346 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
1347 .info = snd_rme9652_info_adat_sync, \
1348 .get = snd_rme9652_get_adat_sync, .private_value = xidx }
1350 static int snd_rme9652_info_adat_sync(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1352 static const char * const texts[4] = {
1353 "No Lock", "Lock", "No Lock Sync", "Lock Sync"
1356 return snd_ctl_enum_info(uinfo, 1, 4, texts);
1359 static int snd_rme9652_get_adat_sync(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1361 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1362 unsigned int mask1, mask2, val;
1364 switch (kcontrol->private_value) {
1365 case 0: mask1 = RME9652_lock_0; mask2 = RME9652_sync_0; break;
1366 case 1: mask1 = RME9652_lock_1; mask2 = RME9652_sync_1; break;
1367 case 2: mask1 = RME9652_lock_2; mask2 = RME9652_sync_2; break;
1368 default: return -EINVAL;
1370 val = rme9652_read(rme9652, RME9652_status_register);
1371 ucontrol->value.enumerated.item[0] = (val & mask1) ? 1 : 0;
1372 ucontrol->value.enumerated.item[0] |= (val & mask2) ? 2 : 0;
1376 #define RME9652_TC_VALID(xname, xindex) \
1377 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1378 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
1379 .info = snd_rme9652_info_tc_valid, \
1380 .get = snd_rme9652_get_tc_valid }
1382 #define snd_rme9652_info_tc_valid snd_ctl_boolean_mono_info
1384 static int snd_rme9652_get_tc_valid(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1386 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1388 ucontrol->value.integer.value[0] =
1389 (rme9652_read(rme9652, RME9652_status_register) & RME9652_tc_valid) ? 1 : 0;
1393 #ifdef ALSA_HAS_STANDARD_WAY_OF_RETURNING_TIMECODE
1395 /* FIXME: this routine needs a port to the new control API --jk */
1397 static int snd_rme9652_get_tc_value(void *private_data,
1398 snd_kswitch_t *kswitch,
1399 snd_switch_t *uswitch)
1401 struct snd_rme9652 *s = (struct snd_rme9652 *) private_data;
1405 uswitch->type = SNDRV_SW_TYPE_DWORD;
1407 if ((rme9652_read(s, RME9652_status_register) &
1408 RME9652_tc_valid) == 0) {
1409 uswitch->value.data32[0] = 0;
1413 /* timecode request */
1415 rme9652_write(s, RME9652_time_code, 0);
1417 /* XXX bug alert: loop-based timing !!!! */
1419 for (i = 0; i < 50; i++) {
1420 if (!(rme9652_read(s, i * 4) & RME9652_tc_busy))
1424 if (!(rme9652_read(s, i * 4) & RME9652_tc_busy)) {
1430 for (i = 0; i < 32; i++) {
1433 if (rme9652_read(s, i * 4) & RME9652_tc_out)
1434 value |= 0x80000000;
1437 if (value > 2 * 60 * 48000) {
1438 value -= 2 * 60 * 48000;
1443 uswitch->value.data32[0] = value;
1448 #endif /* ALSA_HAS_STANDARD_WAY_OF_RETURNING_TIMECODE */
1450 static const struct snd_kcontrol_new snd_rme9652_controls[] = {
1452 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1453 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
1454 .info = snd_rme9652_control_spdif_info,
1455 .get = snd_rme9652_control_spdif_get,
1456 .put = snd_rme9652_control_spdif_put,
1459 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE,
1460 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1461 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM),
1462 .info = snd_rme9652_control_spdif_stream_info,
1463 .get = snd_rme9652_control_spdif_stream_get,
1464 .put = snd_rme9652_control_spdif_stream_put,
1467 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1468 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1469 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK),
1470 .info = snd_rme9652_control_spdif_mask_info,
1471 .get = snd_rme9652_control_spdif_mask_get,
1472 .private_value = IEC958_AES0_NONAUDIO |
1473 IEC958_AES0_PROFESSIONAL |
1474 IEC958_AES0_CON_EMPHASIS,
1477 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1478 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1479 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PRO_MASK),
1480 .info = snd_rme9652_control_spdif_mask_info,
1481 .get = snd_rme9652_control_spdif_mask_get,
1482 .private_value = IEC958_AES0_NONAUDIO |
1483 IEC958_AES0_PROFESSIONAL |
1484 IEC958_AES0_PRO_EMPHASIS,
1486 RME9652_SPDIF_IN("IEC958 Input Connector", 0),
1487 RME9652_SPDIF_OUT("IEC958 Output also on ADAT1", 0),
1488 RME9652_SYNC_MODE("Sync Mode", 0),
1489 RME9652_SYNC_PREF("Preferred Sync Source", 0),
1491 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1492 .name = "Channels Thru",
1494 .info = snd_rme9652_info_thru,
1495 .get = snd_rme9652_get_thru,
1496 .put = snd_rme9652_put_thru,
1498 RME9652_SPDIF_RATE("IEC958 Sample Rate", 0),
1499 RME9652_ADAT_SYNC("ADAT1 Sync Check", 0, 0),
1500 RME9652_ADAT_SYNC("ADAT2 Sync Check", 0, 1),
1501 RME9652_TC_VALID("Timecode Valid", 0),
1502 RME9652_PASSTHRU("Passthru", 0)
1505 static const struct snd_kcontrol_new snd_rme9652_adat3_check =
1506 RME9652_ADAT_SYNC("ADAT3 Sync Check", 0, 2);
1508 static const struct snd_kcontrol_new snd_rme9652_adat1_input =
1509 RME9652_ADAT1_IN("ADAT1 Input Source", 0);
1511 static int snd_rme9652_create_controls(struct snd_card *card, struct snd_rme9652 *rme9652)
1515 struct snd_kcontrol *kctl;
1517 for (idx = 0; idx < ARRAY_SIZE(snd_rme9652_controls); idx++) {
1518 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_rme9652_controls[idx], rme9652))) < 0)
1520 if (idx == 1) /* IEC958 (S/PDIF) Stream */
1521 rme9652->spdif_ctl = kctl;
1524 if (rme9652->ss_channels == RME9652_NCHANNELS)
1525 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_rme9652_adat3_check, rme9652))) < 0)
1528 if (rme9652->hw_rev >= 15)
1529 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_rme9652_adat1_input, rme9652))) < 0)
1535 /*------------------------------------------------------------
1537 ------------------------------------------------------------*/
1540 snd_rme9652_proc_read(struct snd_info_entry *entry, struct snd_info_buffer *buffer)
1542 struct snd_rme9652 *rme9652 = (struct snd_rme9652 *) entry->private_data;
1543 u32 thru_bits = rme9652->thru_bits;
1544 int show_auto_sync_source = 0;
1546 unsigned int status;
1549 status = rme9652_read(rme9652, RME9652_status_register);
1551 snd_iprintf(buffer, "%s (Card #%d)\n", rme9652->card_name, rme9652->card->number + 1);
1552 snd_iprintf(buffer, "Buffers: capture %p playback %p\n",
1553 rme9652->capture_buffer, rme9652->playback_buffer);
1554 snd_iprintf(buffer, "IRQ: %d Registers bus: 0x%lx VM: 0x%lx\n",
1555 rme9652->irq, rme9652->port, (unsigned long)rme9652->iobase);
1556 snd_iprintf(buffer, "Control register: %x\n", rme9652->control_register);
1558 snd_iprintf(buffer, "\n");
1560 x = 1 << (6 + rme9652_decode_latency(rme9652->control_register &
1563 snd_iprintf(buffer, "Latency: %d samples (2 periods of %lu bytes)\n",
1564 x, (unsigned long) rme9652->period_bytes);
1565 snd_iprintf(buffer, "Hardware pointer (frames): %ld\n",
1566 rme9652_hw_pointer(rme9652));
1567 snd_iprintf(buffer, "Passthru: %s\n",
1568 rme9652->passthru ? "yes" : "no");
1570 if ((rme9652->control_register & (RME9652_Master | RME9652_wsel)) == 0) {
1571 snd_iprintf(buffer, "Clock mode: autosync\n");
1572 show_auto_sync_source = 1;
1573 } else if (rme9652->control_register & RME9652_wsel) {
1574 if (status & RME9652_wsel_rd) {
1575 snd_iprintf(buffer, "Clock mode: word clock\n");
1577 snd_iprintf(buffer, "Clock mode: word clock (no signal)\n");
1580 snd_iprintf(buffer, "Clock mode: master\n");
1583 if (show_auto_sync_source) {
1584 switch (rme9652->control_register & RME9652_SyncPref_Mask) {
1585 case RME9652_SyncPref_ADAT1:
1586 snd_iprintf(buffer, "Pref. sync source: ADAT1\n");
1588 case RME9652_SyncPref_ADAT2:
1589 snd_iprintf(buffer, "Pref. sync source: ADAT2\n");
1591 case RME9652_SyncPref_ADAT3:
1592 snd_iprintf(buffer, "Pref. sync source: ADAT3\n");
1594 case RME9652_SyncPref_SPDIF:
1595 snd_iprintf(buffer, "Pref. sync source: IEC958\n");
1598 snd_iprintf(buffer, "Pref. sync source: ???\n");
1602 if (rme9652->hw_rev >= 15)
1603 snd_iprintf(buffer, "\nADAT1 Input source: %s\n",
1604 (rme9652->control_register & RME9652_ADAT1_INTERNAL) ?
1605 "Internal" : "ADAT1 optical");
1607 snd_iprintf(buffer, "\n");
1609 switch (rme9652_decode_spdif_in(rme9652->control_register &
1611 case RME9652_SPDIFIN_OPTICAL:
1612 snd_iprintf(buffer, "IEC958 input: ADAT1\n");
1614 case RME9652_SPDIFIN_COAXIAL:
1615 snd_iprintf(buffer, "IEC958 input: Coaxial\n");
1617 case RME9652_SPDIFIN_INTERN:
1618 snd_iprintf(buffer, "IEC958 input: Internal\n");
1621 snd_iprintf(buffer, "IEC958 input: ???\n");
1625 if (rme9652->control_register & RME9652_opt_out) {
1626 snd_iprintf(buffer, "IEC958 output: Coaxial & ADAT1\n");
1628 snd_iprintf(buffer, "IEC958 output: Coaxial only\n");
1631 if (rme9652->control_register & RME9652_PRO) {
1632 snd_iprintf(buffer, "IEC958 quality: Professional\n");
1634 snd_iprintf(buffer, "IEC958 quality: Consumer\n");
1637 if (rme9652->control_register & RME9652_EMP) {
1638 snd_iprintf(buffer, "IEC958 emphasis: on\n");
1640 snd_iprintf(buffer, "IEC958 emphasis: off\n");
1643 if (rme9652->control_register & RME9652_Dolby) {
1644 snd_iprintf(buffer, "IEC958 Dolby: on\n");
1646 snd_iprintf(buffer, "IEC958 Dolby: off\n");
1649 i = rme9652_spdif_sample_rate(rme9652);
1653 "IEC958 sample rate: error flag set\n");
1654 } else if (i == 0) {
1655 snd_iprintf(buffer, "IEC958 sample rate: undetermined\n");
1657 snd_iprintf(buffer, "IEC958 sample rate: %d\n", i);
1660 snd_iprintf(buffer, "\n");
1662 snd_iprintf(buffer, "ADAT Sample rate: %dHz\n",
1663 rme9652_adat_sample_rate(rme9652));
1667 x = status & RME9652_sync_0;
1668 if (status & RME9652_lock_0) {
1669 snd_iprintf(buffer, "ADAT1: %s\n", x ? "Sync" : "Lock");
1671 snd_iprintf(buffer, "ADAT1: No Lock\n");
1674 x = status & RME9652_sync_1;
1675 if (status & RME9652_lock_1) {
1676 snd_iprintf(buffer, "ADAT2: %s\n", x ? "Sync" : "Lock");
1678 snd_iprintf(buffer, "ADAT2: No Lock\n");
1681 x = status & RME9652_sync_2;
1682 if (status & RME9652_lock_2) {
1683 snd_iprintf(buffer, "ADAT3: %s\n", x ? "Sync" : "Lock");
1685 snd_iprintf(buffer, "ADAT3: No Lock\n");
1688 snd_iprintf(buffer, "\n");
1690 snd_iprintf(buffer, "Timecode signal: %s\n",
1691 (status & RME9652_tc_valid) ? "yes" : "no");
1695 snd_iprintf(buffer, "Punch Status:\n\n");
1697 for (i = 0; i < rme9652->ss_channels; i++) {
1698 if (thru_bits & (1 << i)) {
1699 snd_iprintf(buffer, "%2d: on ", i + 1);
1701 snd_iprintf(buffer, "%2d: off ", i + 1);
1704 if (((i + 1) % 8) == 0) {
1705 snd_iprintf(buffer, "\n");
1709 snd_iprintf(buffer, "\n");
1712 static void snd_rme9652_proc_init(struct snd_rme9652 *rme9652)
1714 snd_card_ro_proc_new(rme9652->card, "rme9652", rme9652,
1715 snd_rme9652_proc_read);
1718 static void snd_rme9652_free_buffers(struct snd_rme9652 *rme9652)
1720 snd_hammerfall_free_buffer(&rme9652->capture_dma_buf, rme9652->pci);
1721 snd_hammerfall_free_buffer(&rme9652->playback_dma_buf, rme9652->pci);
1724 static int snd_rme9652_free(struct snd_rme9652 *rme9652)
1726 if (rme9652->irq >= 0)
1727 rme9652_stop(rme9652);
1728 snd_rme9652_free_buffers(rme9652);
1730 if (rme9652->irq >= 0)
1731 free_irq(rme9652->irq, (void *)rme9652);
1732 iounmap(rme9652->iobase);
1734 pci_release_regions(rme9652->pci);
1736 pci_disable_device(rme9652->pci);
1740 static int snd_rme9652_initialize_memory(struct snd_rme9652 *rme9652)
1742 unsigned long pb_bus, cb_bus;
1744 if (snd_hammerfall_get_buffer(rme9652->pci, &rme9652->capture_dma_buf, RME9652_DMA_AREA_BYTES) < 0 ||
1745 snd_hammerfall_get_buffer(rme9652->pci, &rme9652->playback_dma_buf, RME9652_DMA_AREA_BYTES) < 0) {
1746 if (rme9652->capture_dma_buf.area)
1747 snd_dma_free_pages(&rme9652->capture_dma_buf);
1748 dev_err(rme9652->card->dev,
1749 "%s: no buffers available\n", rme9652->card_name);
1753 /* Align to bus-space 64K boundary */
1755 cb_bus = ALIGN(rme9652->capture_dma_buf.addr, 0x10000ul);
1756 pb_bus = ALIGN(rme9652->playback_dma_buf.addr, 0x10000ul);
1758 /* Tell the card where it is */
1760 rme9652_write(rme9652, RME9652_rec_buffer, cb_bus);
1761 rme9652_write(rme9652, RME9652_play_buffer, pb_bus);
1763 rme9652->capture_buffer = rme9652->capture_dma_buf.area + (cb_bus - rme9652->capture_dma_buf.addr);
1764 rme9652->playback_buffer = rme9652->playback_dma_buf.area + (pb_bus - rme9652->playback_dma_buf.addr);
1769 static void snd_rme9652_set_defaults(struct snd_rme9652 *rme9652)
1773 /* ASSUMPTION: rme9652->lock is either held, or
1774 there is no need to hold it (e.g. during module
1780 SPDIF Input via Coax
1782 maximum latency (7 = 8192 samples, 64Kbyte buffer,
1783 which implies 2 4096 sample, 32Kbyte periods).
1785 if rev 1.5, initialize the S/PDIF receiver.
1789 rme9652->control_register =
1790 RME9652_inp_0 | rme9652_encode_latency(7);
1792 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1794 rme9652_reset_hw_pointer(rme9652);
1795 rme9652_compute_period_size(rme9652);
1797 /* default: thru off for all channels */
1799 for (k = 0; k < RME9652_NCHANNELS; ++k)
1800 rme9652_write(rme9652, RME9652_thru_base + k * 4, 0);
1802 rme9652->thru_bits = 0;
1803 rme9652->passthru = 0;
1805 /* set a default rate so that the channel map is set up */
1807 rme9652_set_rate(rme9652, 48000);
1810 static irqreturn_t snd_rme9652_interrupt(int irq, void *dev_id)
1812 struct snd_rme9652 *rme9652 = (struct snd_rme9652 *) dev_id;
1814 if (!(rme9652_read(rme9652, RME9652_status_register) & RME9652_IRQ)) {
1818 rme9652_write(rme9652, RME9652_irq_clear, 0);
1820 if (rme9652->capture_substream) {
1821 snd_pcm_period_elapsed(rme9652->pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream);
1824 if (rme9652->playback_substream) {
1825 snd_pcm_period_elapsed(rme9652->pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream);
1830 static snd_pcm_uframes_t snd_rme9652_hw_pointer(struct snd_pcm_substream *substream)
1832 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1833 return rme9652_hw_pointer(rme9652);
1836 static char *rme9652_channel_buffer_location(struct snd_rme9652 *rme9652,
1843 if (snd_BUG_ON(channel < 0 || channel >= RME9652_NCHANNELS))
1846 if ((mapped_channel = rme9652->channel_map[channel]) < 0) {
1850 if (stream == SNDRV_PCM_STREAM_CAPTURE) {
1851 return rme9652->capture_buffer +
1852 (mapped_channel * RME9652_CHANNEL_BUFFER_BYTES);
1854 return rme9652->playback_buffer +
1855 (mapped_channel * RME9652_CHANNEL_BUFFER_BYTES);
1859 static int snd_rme9652_playback_copy(struct snd_pcm_substream *substream,
1860 int channel, unsigned long pos,
1861 void __user *src, unsigned long count)
1863 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1866 if (snd_BUG_ON(pos + count > RME9652_CHANNEL_BUFFER_BYTES))
1869 channel_buf = rme9652_channel_buffer_location (rme9652,
1870 substream->pstr->stream,
1872 if (snd_BUG_ON(!channel_buf))
1874 if (copy_from_user(channel_buf + pos, src, count))
1879 static int snd_rme9652_playback_copy_kernel(struct snd_pcm_substream *substream,
1880 int channel, unsigned long pos,
1881 void *src, unsigned long count)
1883 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1886 channel_buf = rme9652_channel_buffer_location(rme9652,
1887 substream->pstr->stream,
1889 if (snd_BUG_ON(!channel_buf))
1891 memcpy(channel_buf + pos, src, count);
1895 static int snd_rme9652_capture_copy(struct snd_pcm_substream *substream,
1896 int channel, unsigned long pos,
1897 void __user *dst, unsigned long count)
1899 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1902 if (snd_BUG_ON(pos + count > RME9652_CHANNEL_BUFFER_BYTES))
1905 channel_buf = rme9652_channel_buffer_location (rme9652,
1906 substream->pstr->stream,
1908 if (snd_BUG_ON(!channel_buf))
1910 if (copy_to_user(dst, channel_buf + pos, count))
1915 static int snd_rme9652_capture_copy_kernel(struct snd_pcm_substream *substream,
1916 int channel, unsigned long pos,
1917 void *dst, unsigned long count)
1919 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1922 channel_buf = rme9652_channel_buffer_location(rme9652,
1923 substream->pstr->stream,
1925 if (snd_BUG_ON(!channel_buf))
1927 memcpy(dst, channel_buf + pos, count);
1931 static int snd_rme9652_hw_silence(struct snd_pcm_substream *substream,
1932 int channel, unsigned long pos,
1933 unsigned long count)
1935 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1938 channel_buf = rme9652_channel_buffer_location (rme9652,
1939 substream->pstr->stream,
1941 if (snd_BUG_ON(!channel_buf))
1943 memset(channel_buf + pos, 0, count);
1947 static int snd_rme9652_reset(struct snd_pcm_substream *substream)
1949 struct snd_pcm_runtime *runtime = substream->runtime;
1950 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1951 struct snd_pcm_substream *other;
1952 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
1953 other = rme9652->capture_substream;
1955 other = rme9652->playback_substream;
1956 if (rme9652->running)
1957 runtime->status->hw_ptr = rme9652_hw_pointer(rme9652);
1959 runtime->status->hw_ptr = 0;
1961 struct snd_pcm_substream *s;
1962 struct snd_pcm_runtime *oruntime = other->runtime;
1963 snd_pcm_group_for_each_entry(s, substream) {
1965 oruntime->status->hw_ptr = runtime->status->hw_ptr;
1973 static int snd_rme9652_hw_params(struct snd_pcm_substream *substream,
1974 struct snd_pcm_hw_params *params)
1976 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1981 spin_lock_irq(&rme9652->lock);
1983 if (substream->pstr->stream == SNDRV_PCM_STREAM_PLAYBACK) {
1984 rme9652->control_register &= ~(RME9652_PRO | RME9652_Dolby | RME9652_EMP);
1985 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register |= rme9652->creg_spdif_stream);
1986 this_pid = rme9652->playback_pid;
1987 other_pid = rme9652->capture_pid;
1989 this_pid = rme9652->capture_pid;
1990 other_pid = rme9652->playback_pid;
1993 if ((other_pid > 0) && (this_pid != other_pid)) {
1995 /* The other stream is open, and not by the same
1996 task as this one. Make sure that the parameters
1997 that matter are the same.
2000 if ((int)params_rate(params) !=
2001 rme9652_adat_sample_rate(rme9652)) {
2002 spin_unlock_irq(&rme9652->lock);
2003 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_RATE);
2007 if (params_period_size(params) != rme9652->period_bytes / 4) {
2008 spin_unlock_irq(&rme9652->lock);
2009 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_PERIOD_SIZE);
2015 spin_unlock_irq(&rme9652->lock);
2019 spin_unlock_irq(&rme9652->lock);
2022 /* how to make sure that the rate matches an externally-set one ?
2025 if ((err = rme9652_set_rate(rme9652, params_rate(params))) < 0) {
2026 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_RATE);
2030 if ((err = rme9652_set_interrupt_interval(rme9652, params_period_size(params))) < 0) {
2031 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_PERIOD_SIZE);
2038 static int snd_rme9652_channel_info(struct snd_pcm_substream *substream,
2039 struct snd_pcm_channel_info *info)
2041 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2044 if (snd_BUG_ON(info->channel >= RME9652_NCHANNELS))
2047 chn = rme9652->channel_map[array_index_nospec(info->channel,
2048 RME9652_NCHANNELS)];
2052 info->offset = chn * RME9652_CHANNEL_BUFFER_BYTES;
2058 static int snd_rme9652_ioctl(struct snd_pcm_substream *substream,
2059 unsigned int cmd, void *arg)
2062 case SNDRV_PCM_IOCTL1_RESET:
2064 return snd_rme9652_reset(substream);
2066 case SNDRV_PCM_IOCTL1_CHANNEL_INFO:
2068 struct snd_pcm_channel_info *info = arg;
2069 return snd_rme9652_channel_info(substream, info);
2075 return snd_pcm_lib_ioctl(substream, cmd, arg);
2078 static void rme9652_silence_playback(struct snd_rme9652 *rme9652)
2080 memset(rme9652->playback_buffer, 0, RME9652_DMA_AREA_BYTES);
2083 static int snd_rme9652_trigger(struct snd_pcm_substream *substream,
2086 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2087 struct snd_pcm_substream *other;
2089 spin_lock(&rme9652->lock);
2090 running = rme9652->running;
2092 case SNDRV_PCM_TRIGGER_START:
2093 running |= 1 << substream->stream;
2095 case SNDRV_PCM_TRIGGER_STOP:
2096 running &= ~(1 << substream->stream);
2100 spin_unlock(&rme9652->lock);
2103 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
2104 other = rme9652->capture_substream;
2106 other = rme9652->playback_substream;
2109 struct snd_pcm_substream *s;
2110 snd_pcm_group_for_each_entry(s, substream) {
2112 snd_pcm_trigger_done(s, substream);
2113 if (cmd == SNDRV_PCM_TRIGGER_START)
2114 running |= 1 << s->stream;
2116 running &= ~(1 << s->stream);
2120 if (cmd == SNDRV_PCM_TRIGGER_START) {
2121 if (!(running & (1 << SNDRV_PCM_STREAM_PLAYBACK)) &&
2122 substream->stream == SNDRV_PCM_STREAM_CAPTURE)
2123 rme9652_silence_playback(rme9652);
2126 substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
2127 rme9652_silence_playback(rme9652);
2130 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
2131 rme9652_silence_playback(rme9652);
2134 snd_pcm_trigger_done(substream, substream);
2135 if (!rme9652->running && running)
2136 rme9652_start(rme9652);
2137 else if (rme9652->running && !running)
2138 rme9652_stop(rme9652);
2139 rme9652->running = running;
2140 spin_unlock(&rme9652->lock);
2145 static int snd_rme9652_prepare(struct snd_pcm_substream *substream)
2147 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2148 unsigned long flags;
2150 spin_lock_irqsave(&rme9652->lock, flags);
2151 if (!rme9652->running)
2152 rme9652_reset_hw_pointer(rme9652);
2153 spin_unlock_irqrestore(&rme9652->lock, flags);
2157 static const struct snd_pcm_hardware snd_rme9652_playback_subinfo =
2159 .info = (SNDRV_PCM_INFO_MMAP |
2160 SNDRV_PCM_INFO_MMAP_VALID |
2161 SNDRV_PCM_INFO_NONINTERLEAVED |
2162 SNDRV_PCM_INFO_SYNC_START |
2163 SNDRV_PCM_INFO_DOUBLE),
2164 .formats = SNDRV_PCM_FMTBIT_S32_LE,
2165 .rates = (SNDRV_PCM_RATE_44100 |
2166 SNDRV_PCM_RATE_48000 |
2167 SNDRV_PCM_RATE_88200 |
2168 SNDRV_PCM_RATE_96000),
2173 .buffer_bytes_max = RME9652_CHANNEL_BUFFER_BYTES * 26,
2174 .period_bytes_min = (64 * 4) * 10,
2175 .period_bytes_max = (8192 * 4) * 26,
2181 static const struct snd_pcm_hardware snd_rme9652_capture_subinfo =
2183 .info = (SNDRV_PCM_INFO_MMAP |
2184 SNDRV_PCM_INFO_MMAP_VALID |
2185 SNDRV_PCM_INFO_NONINTERLEAVED |
2186 SNDRV_PCM_INFO_SYNC_START),
2187 .formats = SNDRV_PCM_FMTBIT_S32_LE,
2188 .rates = (SNDRV_PCM_RATE_44100 |
2189 SNDRV_PCM_RATE_48000 |
2190 SNDRV_PCM_RATE_88200 |
2191 SNDRV_PCM_RATE_96000),
2196 .buffer_bytes_max = RME9652_CHANNEL_BUFFER_BYTES *26,
2197 .period_bytes_min = (64 * 4) * 10,
2198 .period_bytes_max = (8192 * 4) * 26,
2204 static const unsigned int period_sizes[] = { 64, 128, 256, 512, 1024, 2048, 4096, 8192 };
2206 static const struct snd_pcm_hw_constraint_list hw_constraints_period_sizes = {
2207 .count = ARRAY_SIZE(period_sizes),
2208 .list = period_sizes,
2212 static int snd_rme9652_hw_rule_channels(struct snd_pcm_hw_params *params,
2213 struct snd_pcm_hw_rule *rule)
2215 struct snd_rme9652 *rme9652 = rule->private;
2216 struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
2217 unsigned int list[2] = { rme9652->ds_channels, rme9652->ss_channels };
2218 return snd_interval_list(c, 2, list, 0);
2221 static int snd_rme9652_hw_rule_channels_rate(struct snd_pcm_hw_params *params,
2222 struct snd_pcm_hw_rule *rule)
2224 struct snd_rme9652 *rme9652 = rule->private;
2225 struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
2226 struct snd_interval *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
2227 if (r->min > 48000) {
2228 struct snd_interval t = {
2229 .min = rme9652->ds_channels,
2230 .max = rme9652->ds_channels,
2233 return snd_interval_refine(c, &t);
2234 } else if (r->max < 88200) {
2235 struct snd_interval t = {
2236 .min = rme9652->ss_channels,
2237 .max = rme9652->ss_channels,
2240 return snd_interval_refine(c, &t);
2245 static int snd_rme9652_hw_rule_rate_channels(struct snd_pcm_hw_params *params,
2246 struct snd_pcm_hw_rule *rule)
2248 struct snd_rme9652 *rme9652 = rule->private;
2249 struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
2250 struct snd_interval *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
2251 if (c->min >= rme9652->ss_channels) {
2252 struct snd_interval t = {
2257 return snd_interval_refine(r, &t);
2258 } else if (c->max <= rme9652->ds_channels) {
2259 struct snd_interval t = {
2264 return snd_interval_refine(r, &t);
2269 static int snd_rme9652_playback_open(struct snd_pcm_substream *substream)
2271 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2272 struct snd_pcm_runtime *runtime = substream->runtime;
2274 spin_lock_irq(&rme9652->lock);
2276 snd_pcm_set_sync(substream);
2278 runtime->hw = snd_rme9652_playback_subinfo;
2279 runtime->dma_area = rme9652->playback_buffer;
2280 runtime->dma_bytes = RME9652_DMA_AREA_BYTES;
2282 if (rme9652->capture_substream == NULL) {
2283 rme9652_stop(rme9652);
2284 rme9652_set_thru(rme9652, -1, 0);
2287 rme9652->playback_pid = current->pid;
2288 rme9652->playback_substream = substream;
2290 spin_unlock_irq(&rme9652->lock);
2292 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
2293 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, &hw_constraints_period_sizes);
2294 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
2295 snd_rme9652_hw_rule_channels, rme9652,
2296 SNDRV_PCM_HW_PARAM_CHANNELS, -1);
2297 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
2298 snd_rme9652_hw_rule_channels_rate, rme9652,
2299 SNDRV_PCM_HW_PARAM_RATE, -1);
2300 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
2301 snd_rme9652_hw_rule_rate_channels, rme9652,
2302 SNDRV_PCM_HW_PARAM_CHANNELS, -1);
2304 rme9652->creg_spdif_stream = rme9652->creg_spdif;
2305 rme9652->spdif_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
2306 snd_ctl_notify(rme9652->card, SNDRV_CTL_EVENT_MASK_VALUE |
2307 SNDRV_CTL_EVENT_MASK_INFO, &rme9652->spdif_ctl->id);
2311 static int snd_rme9652_playback_release(struct snd_pcm_substream *substream)
2313 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2315 spin_lock_irq(&rme9652->lock);
2317 rme9652->playback_pid = -1;
2318 rme9652->playback_substream = NULL;
2320 spin_unlock_irq(&rme9652->lock);
2322 rme9652->spdif_ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
2323 snd_ctl_notify(rme9652->card, SNDRV_CTL_EVENT_MASK_VALUE |
2324 SNDRV_CTL_EVENT_MASK_INFO, &rme9652->spdif_ctl->id);
2329 static int snd_rme9652_capture_open(struct snd_pcm_substream *substream)
2331 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2332 struct snd_pcm_runtime *runtime = substream->runtime;
2334 spin_lock_irq(&rme9652->lock);
2336 snd_pcm_set_sync(substream);
2338 runtime->hw = snd_rme9652_capture_subinfo;
2339 runtime->dma_area = rme9652->capture_buffer;
2340 runtime->dma_bytes = RME9652_DMA_AREA_BYTES;
2342 if (rme9652->playback_substream == NULL) {
2343 rme9652_stop(rme9652);
2344 rme9652_set_thru(rme9652, -1, 0);
2347 rme9652->capture_pid = current->pid;
2348 rme9652->capture_substream = substream;
2350 spin_unlock_irq(&rme9652->lock);
2352 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
2353 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, &hw_constraints_period_sizes);
2354 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
2355 snd_rme9652_hw_rule_channels, rme9652,
2356 SNDRV_PCM_HW_PARAM_CHANNELS, -1);
2357 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
2358 snd_rme9652_hw_rule_channels_rate, rme9652,
2359 SNDRV_PCM_HW_PARAM_RATE, -1);
2360 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
2361 snd_rme9652_hw_rule_rate_channels, rme9652,
2362 SNDRV_PCM_HW_PARAM_CHANNELS, -1);
2366 static int snd_rme9652_capture_release(struct snd_pcm_substream *substream)
2368 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2370 spin_lock_irq(&rme9652->lock);
2372 rme9652->capture_pid = -1;
2373 rme9652->capture_substream = NULL;
2375 spin_unlock_irq(&rme9652->lock);
2379 static const struct snd_pcm_ops snd_rme9652_playback_ops = {
2380 .open = snd_rme9652_playback_open,
2381 .close = snd_rme9652_playback_release,
2382 .ioctl = snd_rme9652_ioctl,
2383 .hw_params = snd_rme9652_hw_params,
2384 .prepare = snd_rme9652_prepare,
2385 .trigger = snd_rme9652_trigger,
2386 .pointer = snd_rme9652_hw_pointer,
2387 .copy_user = snd_rme9652_playback_copy,
2388 .copy_kernel = snd_rme9652_playback_copy_kernel,
2389 .fill_silence = snd_rme9652_hw_silence,
2392 static const struct snd_pcm_ops snd_rme9652_capture_ops = {
2393 .open = snd_rme9652_capture_open,
2394 .close = snd_rme9652_capture_release,
2395 .ioctl = snd_rme9652_ioctl,
2396 .hw_params = snd_rme9652_hw_params,
2397 .prepare = snd_rme9652_prepare,
2398 .trigger = snd_rme9652_trigger,
2399 .pointer = snd_rme9652_hw_pointer,
2400 .copy_user = snd_rme9652_capture_copy,
2401 .copy_kernel = snd_rme9652_capture_copy_kernel,
2404 static int snd_rme9652_create_pcm(struct snd_card *card,
2405 struct snd_rme9652 *rme9652)
2407 struct snd_pcm *pcm;
2410 if ((err = snd_pcm_new(card,
2412 0, 1, 1, &pcm)) < 0) {
2417 pcm->private_data = rme9652;
2418 strcpy(pcm->name, rme9652->card_name);
2420 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_rme9652_playback_ops);
2421 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_rme9652_capture_ops);
2423 pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX;
2428 static int snd_rme9652_create(struct snd_card *card,
2429 struct snd_rme9652 *rme9652,
2432 struct pci_dev *pci = rme9652->pci;
2438 rme9652->card = card;
2440 pci_read_config_word(rme9652->pci, PCI_CLASS_REVISION, &rev);
2442 switch (rev & 0xff) {
2454 if ((err = pci_enable_device(pci)) < 0)
2457 spin_lock_init(&rme9652->lock);
2459 if ((err = pci_request_regions(pci, "rme9652")) < 0)
2461 rme9652->port = pci_resource_start(pci, 0);
2462 rme9652->iobase = ioremap(rme9652->port, RME9652_IO_EXTENT);
2463 if (rme9652->iobase == NULL) {
2464 dev_err(card->dev, "unable to remap region 0x%lx-0x%lx\n",
2465 rme9652->port, rme9652->port + RME9652_IO_EXTENT - 1);
2469 if (request_irq(pci->irq, snd_rme9652_interrupt, IRQF_SHARED,
2470 KBUILD_MODNAME, rme9652)) {
2471 dev_err(card->dev, "unable to request IRQ %d\n", pci->irq);
2474 rme9652->irq = pci->irq;
2475 card->sync_irq = rme9652->irq;
2476 rme9652->precise_ptr = precise_ptr;
2478 /* Determine the h/w rev level of the card. This seems like
2479 a particularly kludgy way to encode it, but its what RME
2480 chose to do, so we follow them ...
2483 status = rme9652_read(rme9652, RME9652_status_register);
2484 if (rme9652_decode_spdif_rate(status&RME9652_F) == 1) {
2485 rme9652->hw_rev = 15;
2487 rme9652->hw_rev = 11;
2490 /* Differentiate between the standard Hammerfall, and the
2491 "Light", which does not have the expansion board. This
2492 method comes from information received from Mathhias
2493 Clausen at RME. Display the EEPROM and h/w revID where
2498 case 8: /* original eprom */
2499 strcpy(card->driver, "RME9636");
2500 if (rme9652->hw_rev == 15) {
2501 rme9652->card_name = "RME Digi9636 (Rev 1.5)";
2503 rme9652->card_name = "RME Digi9636";
2505 rme9652->ss_channels = RME9636_NCHANNELS;
2507 case 9: /* W36_G EPROM */
2508 strcpy(card->driver, "RME9636");
2509 rme9652->card_name = "RME Digi9636 (Rev G)";
2510 rme9652->ss_channels = RME9636_NCHANNELS;
2512 case 4: /* W52_G EPROM */
2513 strcpy(card->driver, "RME9652");
2514 rme9652->card_name = "RME Digi9652 (Rev G)";
2515 rme9652->ss_channels = RME9652_NCHANNELS;
2517 case 3: /* original eprom */
2518 strcpy(card->driver, "RME9652");
2519 if (rme9652->hw_rev == 15) {
2520 rme9652->card_name = "RME Digi9652 (Rev 1.5)";
2522 rme9652->card_name = "RME Digi9652";
2524 rme9652->ss_channels = RME9652_NCHANNELS;
2528 rme9652->ds_channels = (rme9652->ss_channels - 2) / 2 + 2;
2530 pci_set_master(rme9652->pci);
2532 if ((err = snd_rme9652_initialize_memory(rme9652)) < 0) {
2536 if ((err = snd_rme9652_create_pcm(card, rme9652)) < 0) {
2540 if ((err = snd_rme9652_create_controls(card, rme9652)) < 0) {
2544 snd_rme9652_proc_init(rme9652);
2546 rme9652->last_spdif_sample_rate = -1;
2547 rme9652->last_adat_sample_rate = -1;
2548 rme9652->playback_pid = -1;
2549 rme9652->capture_pid = -1;
2550 rme9652->capture_substream = NULL;
2551 rme9652->playback_substream = NULL;
2553 snd_rme9652_set_defaults(rme9652);
2555 if (rme9652->hw_rev == 15) {
2556 rme9652_initialize_spdif_receiver (rme9652);
2562 static void snd_rme9652_card_free(struct snd_card *card)
2564 struct snd_rme9652 *rme9652 = (struct snd_rme9652 *) card->private_data;
2567 snd_rme9652_free(rme9652);
2570 static int snd_rme9652_probe(struct pci_dev *pci,
2571 const struct pci_device_id *pci_id)
2574 struct snd_rme9652 *rme9652;
2575 struct snd_card *card;
2578 if (dev >= SNDRV_CARDS)
2585 err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
2586 sizeof(struct snd_rme9652), &card);
2591 rme9652 = (struct snd_rme9652 *) card->private_data;
2592 card->private_free = snd_rme9652_card_free;
2595 err = snd_rme9652_create(card, rme9652, precise_ptr[dev]);
2599 strcpy(card->shortname, rme9652->card_name);
2601 sprintf(card->longname, "%s at 0x%lx, irq %d",
2602 card->shortname, rme9652->port, rme9652->irq);
2603 err = snd_card_register(card);
2606 snd_card_free(card);
2609 pci_set_drvdata(pci, card);
2614 static void snd_rme9652_remove(struct pci_dev *pci)
2616 snd_card_free(pci_get_drvdata(pci));
2619 static struct pci_driver rme9652_driver = {
2620 .name = KBUILD_MODNAME,
2621 .id_table = snd_rme9652_ids,
2622 .probe = snd_rme9652_probe,
2623 .remove = snd_rme9652_remove,
2626 module_pci_driver(rme9652_driver);