sound/pci/hda/patch_hdmi.c

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  *
   4  *  patch_hdmi.c - routines for HDMI/DisplayPort codecs
   5  *
   6  *  Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
   7  *  Copyright (c) 2006 ATI Technologies Inc.
   8  *  Copyright (c) 2008 NVIDIA Corp.  All rights reserved.
   9  *  Copyright (c) 2008 Wei Ni <wni@nvidia.com>
  10  *  Copyright (c) 2013 Anssi Hannula <anssi.hannula@iki.fi>
  11  *
  12  *  Authors:
  13  *                      Wu Fengguang <wfg@linux.intel.com>
  14  *
  15  *  Maintained by:
  16  *                      Wu Fengguang <wfg@linux.intel.com>
  17  */
  18
  19 #include <linux/init.h>
  20 #include <linux/delay.h>
  21 #include <linux/pci.h>
  22 #include <linux/slab.h>
  23 #include <linux/module.h>
  24 #include <linux/pm_runtime.h>
  25 #include <sound/core.h>
  26 #include <sound/jack.h>
  27 #include <sound/asoundef.h>
  28 #include <sound/tlv.h>
  29 #include <sound/hdaudio.h>
  30 #include <sound/hda_i915.h>
  31 #include <sound/hda_chmap.h>
  32 #include <sound/hda_codec.h>
  33 #include "hda_local.h"
  34 #include "hda_jack.h"
  35
  36 static bool static_hdmi_pcm;
  37 module_param(static_hdmi_pcm, bool, 0644);
  38 MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info");
  39
  40 struct hdmi_spec_per_cvt {
  41         hda_nid_t cvt_nid;
  42         int assigned;
  43         unsigned int channels_min;
  44         unsigned int channels_max;
  45         u32 rates;
  46         u64 formats;
  47         unsigned int maxbps;
  48 };
  49
  50 /* max. connections to a widget */
  51 #define HDA_MAX_CONNECTIONS     32
  52
  53 struct hdmi_spec_per_pin {
  54         hda_nid_t pin_nid;
  55         int dev_id;
  56         /* pin idx, different device entries on the same pin use the same idx */
  57         int pin_nid_idx;
  58         int num_mux_nids;
  59         hda_nid_t mux_nids[HDA_MAX_CONNECTIONS];
  60         int mux_idx;
  61         hda_nid_t cvt_nid;
  62
  63         struct hda_codec *codec;
  64         struct hdmi_eld sink_eld;
  65         struct mutex lock;
  66         struct delayed_work work;
  67         struct hdmi_pcm *pcm; /* pointer to spec->pcm_rec[n] dynamically*/
  68         int pcm_idx; /* which pcm is attached. -1 means no pcm is attached */
  69         int repoll_count;
  70         bool setup; /* the stream has been set up by prepare callback */
  71         int channels; /* current number of channels */
  72         bool non_pcm;
  73         bool chmap_set;         /* channel-map override by ALSA API? */
  74         unsigned char chmap[8]; /* ALSA API channel-map */
  75 #ifdef CONFIG_SND_PROC_FS
  76         struct snd_info_entry *proc_entry;
  77 #endif
  78 };
  79
  80 /* operations used by generic code that can be overridden by patches */
  81 struct hdmi_ops {
  82         int (*pin_get_eld)(struct hda_codec *codec, hda_nid_t pin_nid,
  83                            int dev_id, unsigned char *buf, int *eld_size);
  84
  85         void (*pin_setup_infoframe)(struct hda_codec *codec, hda_nid_t pin_nid,
  86                                     int dev_id,
  87                                     int ca, int active_channels, int conn_type);
  88
  89         /* enable/disable HBR (HD passthrough) */
  90         int (*pin_hbr_setup)(struct hda_codec *codec, hda_nid_t pin_nid,
  91                              int dev_id, bool hbr);
  92
  93         int (*setup_stream)(struct hda_codec *codec, hda_nid_t cvt_nid,
  94                             hda_nid_t pin_nid, int dev_id, u32 stream_tag,
  95                             int format);
  96
  97         void (*pin_cvt_fixup)(struct hda_codec *codec,
  98                               struct hdmi_spec_per_pin *per_pin,
  99                               hda_nid_t cvt_nid);
 100 };
 101
 102 struct hdmi_pcm {
 103         struct hda_pcm *pcm;
 104         struct snd_jack *jack;
 105         struct snd_kcontrol *eld_ctl;
 106 };
 107
 108 struct hdmi_spec {
 109         struct hda_codec *codec;
 110         int num_cvts;
 111         struct snd_array cvts; /* struct hdmi_spec_per_cvt */
 112         hda_nid_t cvt_nids[4]; /* only for haswell fix */
 113
 114         /*
 115          * num_pins is the number of virtual pins
 116          * for example, there are 3 pins, and each pin
 117          * has 4 device entries, then the num_pins is 12
 118          */
 119         int num_pins;
 120         /*
 121          * num_nids is the number of real pins
 122          * In the above example, num_nids is 3
 123          */
 124         int num_nids;
 125         /*
 126          * dev_num is the number of device entries
 127          * on each pin.
 128          * In the above example, dev_num is 4
 129          */
 130         int dev_num;
 131         struct snd_array pins; /* struct hdmi_spec_per_pin */
 132         struct hdmi_pcm pcm_rec[16];
 133         struct mutex pcm_lock;
 134         struct mutex bind_lock; /* for audio component binding */
 135         /* pcm_bitmap means which pcms have been assigned to pins*/
 136         unsigned long pcm_bitmap;
 137         int pcm_used;   /* counter of pcm_rec[] */
 138         /* bitmap shows whether the pcm is opened in user space
 139          * bit 0 means the first playback PCM (PCM3);
 140          * bit 1 means the second playback PCM, and so on.
 141          */
 142         unsigned long pcm_in_use;
 143
 144         struct hdmi_eld temp_eld;
 145         struct hdmi_ops ops;
 146
 147         bool dyn_pin_out;
 148         bool dyn_pcm_assign;
 149         bool intel_hsw_fixup;   /* apply Intel platform-specific fixups */
 150         /*
 151          * Non-generic VIA/NVIDIA specific
 152          */
 153         struct hda_multi_out multiout;
 154         struct hda_pcm_stream pcm_playback;
 155
 156         bool use_jack_detect; /* jack detection enabled */
 157         bool use_acomp_notifier; /* use eld_notify callback for hotplug */
 158         bool acomp_registered; /* audio component registered in this driver */
 159         struct drm_audio_component_audio_ops drm_audio_ops;
 160         int (*port2pin)(struct hda_codec *, int); /* reverse port/pin mapping */
 161
 162         struct hdac_chmap chmap;
 163         hda_nid_t vendor_nid;
 164         const int *port_map;
 165         int port_num;
 166 };
 167
 168 #ifdef CONFIG_SND_HDA_COMPONENT
 169 static inline bool codec_has_acomp(struct hda_codec *codec)
 170 {
 171         struct hdmi_spec *spec = codec->spec;
 172         return spec->use_acomp_notifier;
 173 }
 174 #else
 175 #define codec_has_acomp(codec)  false
 176 #endif
 177
 178 struct hdmi_audio_infoframe {
 179         u8 type; /* 0x84 */
 180         u8 ver;  /* 0x01 */
 181         u8 len;  /* 0x0a */
 182
 183         u8 checksum;
 184
 185         u8 CC02_CT47;   /* CC in bits 0:2, CT in 4:7 */
 186         u8 SS01_SF24;
 187         u8 CXT04;
 188         u8 CA;
 189         u8 LFEPBL01_LSV36_DM_INH7;
 190 };
 191
 192 struct dp_audio_infoframe {
 193         u8 type; /* 0x84 */
 194         u8 len;  /* 0x1b */
 195         u8 ver;  /* 0x11 << 2 */
 196
 197         u8 CC02_CT47;   /* match with HDMI infoframe from this on */
 198         u8 SS01_SF24;
 199         u8 CXT04;
 200         u8 CA;
 201         u8 LFEPBL01_LSV36_DM_INH7;
 202 };
 203
 204 union audio_infoframe {
 205         struct hdmi_audio_infoframe hdmi;
 206         struct dp_audio_infoframe dp;
 207         u8 bytes[0];
 208 };
 209
 210 /*
 211  * HDMI routines
 212  */
 213
 214 #define get_pin(spec, idx) \
 215         ((struct hdmi_spec_per_pin *)snd_array_elem(&spec->pins, idx))
 216 #define get_cvt(spec, idx) \
 217         ((struct hdmi_spec_per_cvt  *)snd_array_elem(&spec->cvts, idx))
 218 /* obtain hdmi_pcm object assigned to idx */
 219 #define get_hdmi_pcm(spec, idx) (&(spec)->pcm_rec[idx])
 220 /* obtain hda_pcm object assigned to idx */
 221 #define get_pcm_rec(spec, idx)  (get_hdmi_pcm(spec, idx)->pcm)
 222
 223 static int pin_id_to_pin_index(struct hda_codec *codec,
 224                                hda_nid_t pin_nid, int dev_id)
 225 {
 226         struct hdmi_spec *spec = codec->spec;
 227         int pin_idx;
 228         struct hdmi_spec_per_pin *per_pin;
 229
 230         /*
 231          * (dev_id == -1) means it is NON-MST pin
 232          * return the first virtual pin on this port
 233          */
 234         if (dev_id == -1)
 235                 dev_id = 0;
 236
 237         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
 238                 per_pin = get_pin(spec, pin_idx);
 239                 if ((per_pin->pin_nid == pin_nid) &&
 240                         (per_pin->dev_id == dev_id))
 241                         return pin_idx;
 242         }
 243
 244         codec_warn(codec, "HDMI: pin nid %d not registered\n", pin_nid);
 245         return -EINVAL;
 246 }
 247
 248 static int hinfo_to_pcm_index(struct hda_codec *codec,
 249                         struct hda_pcm_stream *hinfo)
 250 {
 251         struct hdmi_spec *spec = codec->spec;
 252         int pcm_idx;
 253
 254         for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++)
 255                 if (get_pcm_rec(spec, pcm_idx)->stream == hinfo)
 256                         return pcm_idx;
 257
 258         codec_warn(codec, "HDMI: hinfo %p not registered\n", hinfo);
 259         return -EINVAL;
 260 }
 261
 262 static int hinfo_to_pin_index(struct hda_codec *codec,
 263                               struct hda_pcm_stream *hinfo)
 264 {
 265         struct hdmi_spec *spec = codec->spec;
 266         struct hdmi_spec_per_pin *per_pin;
 267         int pin_idx;
 268
 269         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
 270                 per_pin = get_pin(spec, pin_idx);
 271                 if (per_pin->pcm &&
 272                         per_pin->pcm->pcm->stream == hinfo)
 273                         return pin_idx;
 274         }
 275
 276         codec_dbg(codec, "HDMI: hinfo %p not registered\n", hinfo);
 277         return -EINVAL;
 278 }
 279
 280 static struct hdmi_spec_per_pin *pcm_idx_to_pin(struct hdmi_spec *spec,
 281                                                 int pcm_idx)
 282 {
 283         int i;
 284         struct hdmi_spec_per_pin *per_pin;
 285
 286         for (i = 0; i < spec->num_pins; i++) {
 287                 per_pin = get_pin(spec, i);
 288                 if (per_pin->pcm_idx == pcm_idx)
 289                         return per_pin;
 290         }
 291         return NULL;
 292 }
 293
 294 static int cvt_nid_to_cvt_index(struct hda_codec *codec, hda_nid_t cvt_nid)
 295 {
 296         struct hdmi_spec *spec = codec->spec;
 297         int cvt_idx;
 298
 299         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++)
 300                 if (get_cvt(spec, cvt_idx)->cvt_nid == cvt_nid)
 301                         return cvt_idx;
 302
 303         codec_warn(codec, "HDMI: cvt nid %d not registered\n", cvt_nid);
 304         return -EINVAL;
 305 }
 306
 307 static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol,
 308                         struct snd_ctl_elem_info *uinfo)
 309 {
 310         struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
 311         struct hdmi_spec *spec = codec->spec;
 312         struct hdmi_spec_per_pin *per_pin;
 313         struct hdmi_eld *eld;
 314         int pcm_idx;
 315
 316         uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
 317
 318         pcm_idx = kcontrol->private_value;
 319         mutex_lock(&spec->pcm_lock);
 320         per_pin = pcm_idx_to_pin(spec, pcm_idx);
 321         if (!per_pin) {
 322                 /* no pin is bound to the pcm */
 323                 uinfo->count = 0;
 324                 goto unlock;
 325         }
 326         eld = &per_pin->sink_eld;
 327         uinfo->count = eld->eld_valid ? eld->eld_size : 0;
 328
 329  unlock:
 330         mutex_unlock(&spec->pcm_lock);
 331         return 0;
 332 }
 333
 334 static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol,
 335                         struct snd_ctl_elem_value *ucontrol)
 336 {
 337         struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
 338         struct hdmi_spec *spec = codec->spec;
 339         struct hdmi_spec_per_pin *per_pin;
 340         struct hdmi_eld *eld;
 341         int pcm_idx;
 342         int err = 0;
 343
 344         pcm_idx = kcontrol->private_value;
 345         mutex_lock(&spec->pcm_lock);
 346         per_pin = pcm_idx_to_pin(spec, pcm_idx);
 347         if (!per_pin) {
 348                 /* no pin is bound to the pcm */
 349                 memset(ucontrol->value.bytes.data, 0,
 350                        ARRAY_SIZE(ucontrol->value.bytes.data));
 351                 goto unlock;
 352         }
 353
 354         eld = &per_pin->sink_eld;
 355         if (eld->eld_size > ARRAY_SIZE(ucontrol->value.bytes.data) ||
 356             eld->eld_size > ELD_MAX_SIZE) {
 357                 snd_BUG();
 358                 err = -EINVAL;
 359                 goto unlock;
 360         }
 361
 362         memset(ucontrol->value.bytes.data, 0,
 363                ARRAY_SIZE(ucontrol->value.bytes.data));
 364         if (eld->eld_valid)
 365                 memcpy(ucontrol->value.bytes.data, eld->eld_buffer,
 366                        eld->eld_size);
 367
 368  unlock:
 369         mutex_unlock(&spec->pcm_lock);
 370         return err;
 371 }
 372
 373 static const struct snd_kcontrol_new eld_bytes_ctl = {
 374         .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
 375         .iface = SNDRV_CTL_ELEM_IFACE_PCM,
 376         .name = "ELD",
 377         .info = hdmi_eld_ctl_info,
 378         .get = hdmi_eld_ctl_get,
 379 };
 380
 381 static int hdmi_create_eld_ctl(struct hda_codec *codec, int pcm_idx,
 382                         int device)
 383 {
 384         struct snd_kcontrol *kctl;
 385         struct hdmi_spec *spec = codec->spec;
 386         int err;
 387
 388         kctl = snd_ctl_new1(&eld_bytes_ctl, codec);
 389         if (!kctl)
 390                 return -ENOMEM;
 391         kctl->private_value = pcm_idx;
 392         kctl->id.device = device;
 393
 394         /* no pin nid is associated with the kctl now
 395          * tbd: associate pin nid to eld ctl later
 396          */
 397         err = snd_hda_ctl_add(codec, 0, kctl);
 398         if (err < 0)
 399                 return err;
 400
 401         get_hdmi_pcm(spec, pcm_idx)->eld_ctl = kctl;
 402         return 0;
 403 }
 404
 405 #ifdef BE_PARANOID
 406 static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
 407                                 int *packet_index, int *byte_index)
 408 {
 409         int val;
 410
 411         val = snd_hda_codec_read(codec, pin_nid, 0,
 412                                  AC_VERB_GET_HDMI_DIP_INDEX, 0);
 413
 414         *packet_index = val >> 5;
 415         *byte_index = val & 0x1f;
 416 }
 417 #endif
 418
 419 static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
 420                                 int packet_index, int byte_index)
 421 {
 422         int val;
 423
 424         val = (packet_index << 5) | (byte_index & 0x1f);
 425
 426         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
 427 }
 428
 429 static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
 430                                 unsigned char val)
 431 {
 432         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
 433 }
 434
 435 static void hdmi_init_pin(struct hda_codec *codec, hda_nid_t pin_nid)
 436 {
 437         struct hdmi_spec *spec = codec->spec;
 438         int pin_out;
 439
 440         /* Unmute */
 441         if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
 442                 snd_hda_codec_write(codec, pin_nid, 0,
 443                                 AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
 444
 445         if (spec->dyn_pin_out)
 446                 /* Disable pin out until stream is active */
 447                 pin_out = 0;
 448         else
 449                 /* Enable pin out: some machines with GM965 gets broken output
 450                  * when the pin is disabled or changed while using with HDMI
 451                  */
 452                 pin_out = PIN_OUT;
 453
 454         snd_hda_codec_write(codec, pin_nid, 0,
 455                             AC_VERB_SET_PIN_WIDGET_CONTROL, pin_out);
 456 }
 457
 458 /*
 459  * ELD proc files
 460  */
 461
 462 #ifdef CONFIG_SND_PROC_FS
 463 static void print_eld_info(struct snd_info_entry *entry,
 464                            struct snd_info_buffer *buffer)
 465 {
 466         struct hdmi_spec_per_pin *per_pin = entry->private_data;
 467
 468         mutex_lock(&per_pin->lock);
 469         snd_hdmi_print_eld_info(&per_pin->sink_eld, buffer);
 470         mutex_unlock(&per_pin->lock);
 471 }
 472
 473 static void write_eld_info(struct snd_info_entry *entry,
 474                            struct snd_info_buffer *buffer)
 475 {
 476         struct hdmi_spec_per_pin *per_pin = entry->private_data;
 477
 478         mutex_lock(&per_pin->lock);
 479         snd_hdmi_write_eld_info(&per_pin->sink_eld, buffer);
 480         mutex_unlock(&per_pin->lock);
 481 }
 482
 483 static int eld_proc_new(struct hdmi_spec_per_pin *per_pin, int index)
 484 {
 485         char name[32];
 486         struct hda_codec *codec = per_pin->codec;
 487         struct snd_info_entry *entry;
 488         int err;
 489
 490         snprintf(name, sizeof(name), "eld#%d.%d", codec->addr, index);
 491         err = snd_card_proc_new(codec->card, name, &entry);
 492         if (err < 0)
 493                 return err;
 494
 495         snd_info_set_text_ops(entry, per_pin, print_eld_info);
 496         entry->c.text.write = write_eld_info;
 497         entry->mode |= 0200;
 498         per_pin->proc_entry = entry;
 499
 500         return 0;
 501 }
 502
 503 static void eld_proc_free(struct hdmi_spec_per_pin *per_pin)
 504 {
 505         if (!per_pin->codec->bus->shutdown) {
 506                 snd_info_free_entry(per_pin->proc_entry);
 507                 per_pin->proc_entry = NULL;
 508         }
 509 }
 510 #else
 511 static inline int eld_proc_new(struct hdmi_spec_per_pin *per_pin,
 512                                int index)
 513 {
 514         return 0;
 515 }
 516 static inline void eld_proc_free(struct hdmi_spec_per_pin *per_pin)
 517 {
 518 }
 519 #endif
 520
 521 /*
 522  * Audio InfoFrame routines
 523  */
 524
 525 /*
 526  * Enable Audio InfoFrame Transmission
 527  */
 528 static void hdmi_start_infoframe_trans(struct hda_codec *codec,
 529                                        hda_nid_t pin_nid)
 530 {
 531         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 532         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
 533                                                 AC_DIPXMIT_BEST);
 534 }
 535
 536 /*
 537  * Disable Audio InfoFrame Transmission
 538  */
 539 static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
 540                                       hda_nid_t pin_nid)
 541 {
 542         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 543         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
 544                                                 AC_DIPXMIT_DISABLE);
 545 }
 546
 547 static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
 548 {
 549 #ifdef CONFIG_SND_DEBUG_VERBOSE
 550         int i;
 551         int size;
 552
 553         size = snd_hdmi_get_eld_size(codec, pin_nid);
 554         codec_dbg(codec, "HDMI: ELD buf size is %d\n", size);
 555
 556         for (i = 0; i < 8; i++) {
 557                 size = snd_hda_codec_read(codec, pin_nid, 0,
 558                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
 559                 codec_dbg(codec, "HDMI: DIP GP[%d] buf size is %d\n", i, size);
 560         }
 561 #endif
 562 }
 563
 564 static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
 565 {
 566 #ifdef BE_PARANOID
 567         int i, j;
 568         int size;
 569         int pi, bi;
 570         for (i = 0; i < 8; i++) {
 571                 size = snd_hda_codec_read(codec, pin_nid, 0,
 572                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
 573                 if (size == 0)
 574                         continue;
 575
 576                 hdmi_set_dip_index(codec, pin_nid, i, 0x0);
 577                 for (j = 1; j < 1000; j++) {
 578                         hdmi_write_dip_byte(codec, pin_nid, 0x0);
 579                         hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
 580                         if (pi != i)
 581                                 codec_dbg(codec, "dip index %d: %d != %d\n",
 582                                                 bi, pi, i);
 583                         if (bi == 0) /* byte index wrapped around */
 584                                 break;
 585                 }
 586                 codec_dbg(codec,
 587                         "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
 588                         i, size, j);
 589         }
 590 #endif
 591 }
 592
 593 static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *hdmi_ai)
 594 {
 595         u8 *bytes = (u8 *)hdmi_ai;
 596         u8 sum = 0;
 597         int i;
 598
 599         hdmi_ai->checksum = 0;
 600
 601         for (i = 0; i < sizeof(*hdmi_ai); i++)
 602                 sum += bytes[i];
 603
 604         hdmi_ai->checksum = -sum;
 605 }
 606
 607 static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
 608                                       hda_nid_t pin_nid,
 609                                       u8 *dip, int size)
 610 {
 611         int i;
 612
 613         hdmi_debug_dip_size(codec, pin_nid);
 614         hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */
 615
 616         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 617         for (i = 0; i < size; i++)
 618                 hdmi_write_dip_byte(codec, pin_nid, dip[i]);
 619 }
 620
 621 static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid,
 622                                     u8 *dip, int size)
 623 {
 624         u8 val;
 625         int i;
 626
 627         if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
 628                                                             != AC_DIPXMIT_BEST)
 629                 return false;
 630
 631         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 632         for (i = 0; i < size; i++) {
 633                 val = snd_hda_codec_read(codec, pin_nid, 0,
 634                                          AC_VERB_GET_HDMI_DIP_DATA, 0);
 635                 if (val != dip[i])
 636                         return false;
 637         }
 638
 639         return true;
 640 }
 641
 642 static int hdmi_pin_get_eld(struct hda_codec *codec, hda_nid_t nid,
 643                             int dev_id, unsigned char *buf, int *eld_size)
 644 {
 645         snd_hda_set_dev_select(codec, nid, dev_id);
 646
 647         return snd_hdmi_get_eld(codec, nid, buf, eld_size);
 648 }
 649
 650 static void hdmi_pin_setup_infoframe(struct hda_codec *codec,
 651                                      hda_nid_t pin_nid, int dev_id,
 652                                      int ca, int active_channels,
 653                                      int conn_type)
 654 {
 655         union audio_infoframe ai;
 656
 657         memset(&ai, 0, sizeof(ai));
 658         if (conn_type == 0) { /* HDMI */
 659                 struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi;
 660
 661                 hdmi_ai->type           = 0x84;
 662                 hdmi_ai->ver            = 0x01;
 663                 hdmi_ai->len            = 0x0a;
 664                 hdmi_ai->CC02_CT47      = active_channels - 1;
 665                 hdmi_ai->CA             = ca;
 666                 hdmi_checksum_audio_infoframe(hdmi_ai);
 667         } else if (conn_type == 1) { /* DisplayPort */
 668                 struct dp_audio_infoframe *dp_ai = &ai.dp;
 669
 670                 dp_ai->type             = 0x84;
 671                 dp_ai->len              = 0x1b;
 672                 dp_ai->ver              = 0x11 << 2;
 673                 dp_ai->CC02_CT47        = active_channels - 1;
 674                 dp_ai->CA               = ca;
 675         } else {
 676                 codec_dbg(codec, "HDMI: unknown connection type at pin %d\n",
 677                             pin_nid);
 678                 return;
 679         }
 680
 681         snd_hda_set_dev_select(codec, pin_nid, dev_id);
 682
 683         /*
 684          * sizeof(ai) is used instead of sizeof(*hdmi_ai) or
 685          * sizeof(*dp_ai) to avoid partial match/update problems when
 686          * the user switches between HDMI/DP monitors.
 687          */
 688         if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes,
 689                                         sizeof(ai))) {
 690                 codec_dbg(codec,
 691                           "hdmi_pin_setup_infoframe: pin=%d channels=%d ca=0x%02x\n",
 692                             pin_nid,
 693                             active_channels, ca);
 694                 hdmi_stop_infoframe_trans(codec, pin_nid);
 695                 hdmi_fill_audio_infoframe(codec, pin_nid,
 696                                             ai.bytes, sizeof(ai));
 697                 hdmi_start_infoframe_trans(codec, pin_nid);
 698         }
 699 }
 700
 701 static void hdmi_setup_audio_infoframe(struct hda_codec *codec,
 702                                        struct hdmi_spec_per_pin *per_pin,
 703                                        bool non_pcm)
 704 {
 705         struct hdmi_spec *spec = codec->spec;
 706         struct hdac_chmap *chmap = &spec->chmap;
 707         hda_nid_t pin_nid = per_pin->pin_nid;
 708         int dev_id = per_pin->dev_id;
 709         int channels = per_pin->channels;
 710         int active_channels;
 711         struct hdmi_eld *eld;
 712         int ca;
 713
 714         if (!channels)
 715                 return;
 716
 717         snd_hda_set_dev_select(codec, pin_nid, dev_id);
 718
 719         /* some HW (e.g. HSW+) needs reprogramming the amp at each time */
 720         if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
 721                 snd_hda_codec_write(codec, pin_nid, 0,
 722                                             AC_VERB_SET_AMP_GAIN_MUTE,
 723                                             AMP_OUT_UNMUTE);
 724
 725         eld = &per_pin->sink_eld;
 726
 727         ca = snd_hdac_channel_allocation(&codec->core,
 728                         eld->info.spk_alloc, channels,
 729                         per_pin->chmap_set, non_pcm, per_pin->chmap);
 730
 731         active_channels = snd_hdac_get_active_channels(ca);
 732
 733         chmap->ops.set_channel_count(&codec->core, per_pin->cvt_nid,
 734                                                 active_channels);
 735
 736         /*
 737          * always configure channel mapping, it may have been changed by the
 738          * user in the meantime
 739          */
 740         snd_hdac_setup_channel_mapping(&spec->chmap,
 741                                 pin_nid, non_pcm, ca, channels,
 742                                 per_pin->chmap, per_pin->chmap_set);
 743
 744         spec->ops.pin_setup_infoframe(codec, pin_nid, dev_id,
 745                                       ca, active_channels, eld->info.conn_type);
 746
 747         per_pin->non_pcm = non_pcm;
 748 }
 749
 750 /*
 751  * Unsolicited events
 752  */
 753
 754 static bool hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll);
 755
 756 static void check_presence_and_report(struct hda_codec *codec, hda_nid_t nid,
 757                                       int dev_id)
 758 {
 759         struct hdmi_spec *spec = codec->spec;
 760         int pin_idx = pin_id_to_pin_index(codec, nid, dev_id);
 761
 762         if (pin_idx < 0)
 763                 return;
 764         mutex_lock(&spec->pcm_lock);
 765         if (hdmi_present_sense(get_pin(spec, pin_idx), 1))
 766                 snd_hda_jack_report_sync(codec);
 767         mutex_unlock(&spec->pcm_lock);
 768 }
 769
 770 static void jack_callback(struct hda_codec *codec,
 771                           struct hda_jack_callback *jack)
 772 {
 773         /* stop polling when notification is enabled */
 774         if (codec_has_acomp(codec))
 775                 return;
 776
 777         check_presence_and_report(codec, jack->nid, jack->dev_id);
 778 }
 779
 780 static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res)
 781 {
 782         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
 783         struct hda_jack_tbl *jack;
 784
 785         if (codec->dp_mst) {
 786                 int dev_entry =
 787                         (res & AC_UNSOL_RES_DE) >> AC_UNSOL_RES_DE_SHIFT;
 788
 789                 jack = snd_hda_jack_tbl_get_from_tag(codec, tag, dev_entry);
 790         } else {
 791                 jack = snd_hda_jack_tbl_get_from_tag(codec, tag, 0);
 792         }
 793         if (!jack)
 794                 return;
 795         jack->jack_dirty = 1;
 796
 797         codec_dbg(codec,
 798                 "HDMI hot plug event: Codec=%d Pin=%d Device=%d Inactive=%d Presence_Detect=%d ELD_Valid=%d\n",
 799                 codec->addr, jack->nid, jack->dev_id, !!(res & AC_UNSOL_RES_IA),
 800                 !!(res & AC_UNSOL_RES_PD), !!(res & AC_UNSOL_RES_ELDV));
 801
 802         check_presence_and_report(codec, jack->nid, jack->dev_id);
 803 }
 804
 805 static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
 806 {
 807         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
 808         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
 809         int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
 810         int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
 811
 812         codec_info(codec,
 813                 "HDMI CP event: CODEC=%d TAG=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
 814                 codec->addr,
 815                 tag,
 816                 subtag,
 817                 cp_state,
 818                 cp_ready);
 819
 820         /* TODO */
 821         if (cp_state)
 822                 ;
 823         if (cp_ready)
 824                 ;
 825 }
 826
 827
 828 static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
 829 {
 830         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
 831         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
 832         struct hda_jack_tbl *jack;
 833
 834         if (codec_has_acomp(codec))
 835                 return;
 836
 837         if (codec->dp_mst) {
 838                 int dev_entry =
 839                         (res & AC_UNSOL_RES_DE) >> AC_UNSOL_RES_DE_SHIFT;
 840
 841                 jack = snd_hda_jack_tbl_get_from_tag(codec, tag, dev_entry);
 842         } else {
 843                 jack = snd_hda_jack_tbl_get_from_tag(codec, tag, 0);
 844         }
 845
 846         if (!jack) {
 847                 codec_dbg(codec, "Unexpected HDMI event tag 0x%x\n", tag);
 848                 return;
 849         }
 850
 851         if (subtag == 0)
 852                 hdmi_intrinsic_event(codec, res);
 853         else
 854                 hdmi_non_intrinsic_event(codec, res);
 855 }
 856
 857 static void haswell_verify_D0(struct hda_codec *codec,
 858                 hda_nid_t cvt_nid, hda_nid_t nid)
 859 {
 860         int pwr;
 861
 862         /* For Haswell, the converter 1/2 may keep in D3 state after bootup,
 863          * thus pins could only choose converter 0 for use. Make sure the
 864          * converters are in correct power state */
 865         if (!snd_hda_check_power_state(codec, cvt_nid, AC_PWRST_D0))
 866                 snd_hda_codec_write(codec, cvt_nid, 0, AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
 867
 868         if (!snd_hda_check_power_state(codec, nid, AC_PWRST_D0)) {
 869                 snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_POWER_STATE,
 870                                     AC_PWRST_D0);
 871                 msleep(40);
 872                 pwr = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_POWER_STATE, 0);
 873                 pwr = (pwr & AC_PWRST_ACTUAL) >> AC_PWRST_ACTUAL_SHIFT;
 874                 codec_dbg(codec, "Haswell HDMI audio: Power for pin 0x%x is now D%d\n", nid, pwr);
 875         }
 876 }
 877
 878 /*
 879  * Callbacks
 880  */
 881
 882 /* HBR should be Non-PCM, 8 channels */
 883 #define is_hbr_format(format) \
 884         ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
 885
 886 static int hdmi_pin_hbr_setup(struct hda_codec *codec, hda_nid_t pin_nid,
 887                               int dev_id, bool hbr)
 888 {
 889         int pinctl, new_pinctl;
 890
 891         if (snd_hda_query_pin_caps(codec, pin_nid) & AC_PINCAP_HBR) {
 892                 snd_hda_set_dev_select(codec, pin_nid, dev_id);
 893                 pinctl = snd_hda_codec_read(codec, pin_nid, 0,
 894                                             AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
 895
 896                 if (pinctl < 0)
 897                         return hbr ? -EINVAL : 0;
 898
 899                 new_pinctl = pinctl & ~AC_PINCTL_EPT;
 900                 if (hbr)
 901                         new_pinctl |= AC_PINCTL_EPT_HBR;
 902                 else
 903                         new_pinctl |= AC_PINCTL_EPT_NATIVE;
 904
 905                 codec_dbg(codec,
 906                           "hdmi_pin_hbr_setup: NID=0x%x, %spinctl=0x%x\n",
 907                             pin_nid,
 908                             pinctl == new_pinctl ? "" : "new-",
 909                             new_pinctl);
 910
 911                 if (pinctl != new_pinctl)
 912                         snd_hda_codec_write(codec, pin_nid, 0,
 913                                             AC_VERB_SET_PIN_WIDGET_CONTROL,
 914                                             new_pinctl);
 915         } else if (hbr)
 916                 return -EINVAL;
 917
 918         return 0;
 919 }
 920
 921 static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
 922                               hda_nid_t pin_nid, int dev_id,
 923                               u32 stream_tag, int format)
 924 {
 925         struct hdmi_spec *spec = codec->spec;
 926         unsigned int param;
 927         int err;
 928
 929         err = spec->ops.pin_hbr_setup(codec, pin_nid, dev_id,
 930                                       is_hbr_format(format));
 931
 932         if (err) {
 933                 codec_dbg(codec, "hdmi_setup_stream: HBR is not supported\n");
 934                 return err;
 935         }
 936
 937         if (spec->intel_hsw_fixup) {
 938
 939                 /*
 940                  * on recent platforms IEC Coding Type is required for HBR
 941                  * support, read current Digital Converter settings and set
 942                  * ICT bitfield if needed.
 943                  */
 944                 param = snd_hda_codec_read(codec, cvt_nid, 0,
 945                                            AC_VERB_GET_DIGI_CONVERT_1, 0);
 946
 947                 param = (param >> 16) & ~(AC_DIG3_ICT);
 948
 949                 /* on recent platforms ICT mode is required for HBR support */
 950                 if (is_hbr_format(format))
 951                         param |= 0x1;
 952
 953                 snd_hda_codec_write(codec, cvt_nid, 0,
 954                                     AC_VERB_SET_DIGI_CONVERT_3, param);
 955         }
 956
 957         snd_hda_codec_setup_stream(codec, cvt_nid, stream_tag, 0, format);
 958         return 0;
 959 }
 960
 961 /* Try to find an available converter
 962  * If pin_idx is less then zero, just try to find an available converter.
 963  * Otherwise, try to find an available converter and get the cvt mux index
 964  * of the pin.
 965  */
 966 static int hdmi_choose_cvt(struct hda_codec *codec,
 967                            int pin_idx, int *cvt_id)
 968 {
 969         struct hdmi_spec *spec = codec->spec;
 970         struct hdmi_spec_per_pin *per_pin;
 971         struct hdmi_spec_per_cvt *per_cvt = NULL;
 972         int cvt_idx, mux_idx = 0;
 973
 974         /* pin_idx < 0 means no pin will be bound to the converter */
 975         if (pin_idx < 0)
 976                 per_pin = NULL;
 977         else
 978                 per_pin = get_pin(spec, pin_idx);
 979
 980         /* Dynamically assign converter to stream */
 981         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
 982                 per_cvt = get_cvt(spec, cvt_idx);
 983
 984                 /* Must not already be assigned */
 985                 if (per_cvt->assigned)
 986                         continue;
 987                 if (per_pin == NULL)
 988                         break;
 989                 /* Must be in pin's mux's list of converters */
 990                 for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
 991                         if (per_pin->mux_nids[mux_idx] == per_cvt->cvt_nid)
 992                                 break;
 993                 /* Not in mux list */
 994                 if (mux_idx == per_pin->num_mux_nids)
 995                         continue;
 996                 break;
 997         }
 998
 999         /* No free converters */
1000         if (cvt_idx == spec->num_cvts)
1001                 return -EBUSY;
1002
1003         if (per_pin != NULL)
1004                 per_pin->mux_idx = mux_idx;
1005
1006         if (cvt_id)
1007                 *cvt_id = cvt_idx;
1008
1009         return 0;
1010 }
1011
1012 /* Assure the pin select the right convetor */
1013 static void intel_verify_pin_cvt_connect(struct hda_codec *codec,
1014                         struct hdmi_spec_per_pin *per_pin)
1015 {
1016         hda_nid_t pin_nid = per_pin->pin_nid;
1017         int mux_idx, curr;
1018
1019         mux_idx = per_pin->mux_idx;
1020         curr = snd_hda_codec_read(codec, pin_nid, 0,
1021                                           AC_VERB_GET_CONNECT_SEL, 0);
1022         if (curr != mux_idx)
1023                 snd_hda_codec_write_cache(codec, pin_nid, 0,
1024                                             AC_VERB_SET_CONNECT_SEL,
1025                                             mux_idx);
1026 }
1027
1028 /* get the mux index for the converter of the pins
1029  * converter's mux index is the same for all pins on Intel platform
1030  */
1031 static int intel_cvt_id_to_mux_idx(struct hdmi_spec *spec,
1032                         hda_nid_t cvt_nid)
1033 {
1034         int i;
1035
1036         for (i = 0; i < spec->num_cvts; i++)
1037                 if (spec->cvt_nids[i] == cvt_nid)
1038                         return i;
1039         return -EINVAL;
1040 }
1041
1042 /* Intel HDMI workaround to fix audio routing issue:
1043  * For some Intel display codecs, pins share the same connection list.
1044  * So a conveter can be selected by multiple pins and playback on any of these
1045  * pins will generate sound on the external display, because audio flows from
1046  * the same converter to the display pipeline. Also muting one pin may make
1047  * other pins have no sound output.
1048  * So this function assures that an assigned converter for a pin is not selected
1049  * by any other pins.
1050  */
1051 static void intel_not_share_assigned_cvt(struct hda_codec *codec,
1052                                          hda_nid_t pin_nid,
1053                                          int dev_id, int mux_idx)
1054 {
1055         struct hdmi_spec *spec = codec->spec;
1056         hda_nid_t nid;
1057         int cvt_idx, curr;
1058         struct hdmi_spec_per_cvt *per_cvt;
1059         struct hdmi_spec_per_pin *per_pin;
1060         int pin_idx;
1061
1062         /* configure the pins connections */
1063         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1064                 int dev_id_saved;
1065                 int dev_num;
1066
1067                 per_pin = get_pin(spec, pin_idx);
1068                 /*
1069                  * pin not connected to monitor
1070                  * no need to operate on it
1071                  */
1072                 if (!per_pin->pcm)
1073                         continue;
1074
1075                 if ((per_pin->pin_nid == pin_nid) &&
1076                         (per_pin->dev_id == dev_id))
1077                         continue;
1078
1079                 /*
1080                  * if per_pin->dev_id >= dev_num,
1081                  * snd_hda_get_dev_select() will fail,
1082                  * and the following operation is unpredictable.
1083                  * So skip this situation.
1084                  */
1085                 dev_num = snd_hda_get_num_devices(codec, per_pin->pin_nid) + 1;
1086                 if (per_pin->dev_id >= dev_num)
1087                         continue;
1088
1089                 nid = per_pin->pin_nid;
1090
1091                 /*
1092                  * Calling this function should not impact
1093                  * on the device entry selection
1094                  * So let's save the dev id for each pin,
1095                  * and restore it when return
1096                  */
1097                 dev_id_saved = snd_hda_get_dev_select(codec, nid);
1098                 snd_hda_set_dev_select(codec, nid, per_pin->dev_id);
1099                 curr = snd_hda_codec_read(codec, nid, 0,
1100                                           AC_VERB_GET_CONNECT_SEL, 0);
1101                 if (curr != mux_idx) {
1102                         snd_hda_set_dev_select(codec, nid, dev_id_saved);
1103                         continue;
1104                 }
1105
1106
1107                 /* choose an unassigned converter. The conveters in the
1108                  * connection list are in the same order as in the codec.
1109                  */
1110                 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
1111                         per_cvt = get_cvt(spec, cvt_idx);
1112                         if (!per_cvt->assigned) {
1113                                 codec_dbg(codec,
1114                                           "choose cvt %d for pin nid %d\n",
1115                                         cvt_idx, nid);
1116                                 snd_hda_codec_write_cache(codec, nid, 0,
1117                                             AC_VERB_SET_CONNECT_SEL,
1118                                             cvt_idx);
1119                                 break;
1120                         }
1121                 }
1122                 snd_hda_set_dev_select(codec, nid, dev_id_saved);
1123         }
1124 }
1125
1126 /* A wrapper of intel_not_share_asigned_cvt() */
1127 static void intel_not_share_assigned_cvt_nid(struct hda_codec *codec,
1128                         hda_nid_t pin_nid, int dev_id, hda_nid_t cvt_nid)
1129 {
1130         int mux_idx;
1131         struct hdmi_spec *spec = codec->spec;
1132
1133         /* On Intel platform, the mapping of converter nid to
1134          * mux index of the pins are always the same.
1135          * The pin nid may be 0, this means all pins will not
1136          * share the converter.
1137          */
1138         mux_idx = intel_cvt_id_to_mux_idx(spec, cvt_nid);
1139         if (mux_idx >= 0)
1140                 intel_not_share_assigned_cvt(codec, pin_nid, dev_id, mux_idx);
1141 }
1142
1143 /* skeleton caller of pin_cvt_fixup ops */
1144 static void pin_cvt_fixup(struct hda_codec *codec,
1145                           struct hdmi_spec_per_pin *per_pin,
1146                           hda_nid_t cvt_nid)
1147 {
1148         struct hdmi_spec *spec = codec->spec;
1149
1150         if (spec->ops.pin_cvt_fixup)
1151                 spec->ops.pin_cvt_fixup(codec, per_pin, cvt_nid);
1152 }
1153
1154 /* called in hdmi_pcm_open when no pin is assigned to the PCM
1155  * in dyn_pcm_assign mode.
1156  */
1157 static int hdmi_pcm_open_no_pin(struct hda_pcm_stream *hinfo,
1158                          struct hda_codec *codec,
1159                          struct snd_pcm_substream *substream)
1160 {
1161         struct hdmi_spec *spec = codec->spec;
1162         struct snd_pcm_runtime *runtime = substream->runtime;
1163         int cvt_idx, pcm_idx;
1164         struct hdmi_spec_per_cvt *per_cvt = NULL;
1165         int err;
1166
1167         pcm_idx = hinfo_to_pcm_index(codec, hinfo);
1168         if (pcm_idx < 0)
1169                 return -EINVAL;
1170
1171         err = hdmi_choose_cvt(codec, -1, &cvt_idx);
1172         if (err)
1173                 return err;
1174
1175         per_cvt = get_cvt(spec, cvt_idx);
1176         per_cvt->assigned = 1;
1177         hinfo->nid = per_cvt->cvt_nid;
1178
1179         pin_cvt_fixup(codec, NULL, per_cvt->cvt_nid);
1180
1181         set_bit(pcm_idx, &spec->pcm_in_use);
1182         /* todo: setup spdif ctls assign */
1183
1184         /* Initially set the converter's capabilities */
1185         hinfo->channels_min = per_cvt->channels_min;
1186         hinfo->channels_max = per_cvt->channels_max;
1187         hinfo->rates = per_cvt->rates;
1188         hinfo->formats = per_cvt->formats;
1189         hinfo->maxbps = per_cvt->maxbps;
1190
1191         /* Store the updated parameters */
1192         runtime->hw.channels_min = hinfo->channels_min;
1193         runtime->hw.channels_max = hinfo->channels_max;
1194         runtime->hw.formats = hinfo->formats;
1195         runtime->hw.rates = hinfo->rates;
1196
1197         snd_pcm_hw_constraint_step(substream->runtime, 0,
1198                                    SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1199         return 0;
1200 }
1201
1202 /*
1203  * HDA PCM callbacks
1204  */
1205 static int hdmi_pcm_open(struct hda_pcm_stream *hinfo,
1206                          struct hda_codec *codec,
1207                          struct snd_pcm_substream *substream)
1208 {
1209         struct hdmi_spec *spec = codec->spec;
1210         struct snd_pcm_runtime *runtime = substream->runtime;
1211         int pin_idx, cvt_idx, pcm_idx;
1212         struct hdmi_spec_per_pin *per_pin;
1213         struct hdmi_eld *eld;
1214         struct hdmi_spec_per_cvt *per_cvt = NULL;
1215         int err;
1216
1217         /* Validate hinfo */
1218         pcm_idx = hinfo_to_pcm_index(codec, hinfo);
1219         if (pcm_idx < 0)
1220                 return -EINVAL;
1221
1222         mutex_lock(&spec->pcm_lock);
1223         pin_idx = hinfo_to_pin_index(codec, hinfo);
1224         if (!spec->dyn_pcm_assign) {
1225                 if (snd_BUG_ON(pin_idx < 0)) {
1226                         err = -EINVAL;
1227                         goto unlock;
1228                 }
1229         } else {
1230                 /* no pin is assigned to the PCM
1231                  * PA need pcm open successfully when probe
1232                  */
1233                 if (pin_idx < 0) {
1234                         err = hdmi_pcm_open_no_pin(hinfo, codec, substream);
1235                         goto unlock;
1236                 }
1237         }
1238
1239         err = hdmi_choose_cvt(codec, pin_idx, &cvt_idx);
1240         if (err < 0)
1241                 goto unlock;
1242
1243         per_cvt = get_cvt(spec, cvt_idx);
1244         /* Claim converter */
1245         per_cvt->assigned = 1;
1246
1247         set_bit(pcm_idx, &spec->pcm_in_use);
1248         per_pin = get_pin(spec, pin_idx);
1249         per_pin->cvt_nid = per_cvt->cvt_nid;
1250         hinfo->nid = per_cvt->cvt_nid;
1251
1252         snd_hda_set_dev_select(codec, per_pin->pin_nid, per_pin->dev_id);
1253         snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
1254                             AC_VERB_SET_CONNECT_SEL,
1255                             per_pin->mux_idx);
1256
1257         /* configure unused pins to choose other converters */
1258         pin_cvt_fixup(codec, per_pin, 0);
1259
1260         snd_hda_spdif_ctls_assign(codec, pcm_idx, per_cvt->cvt_nid);
1261
1262         /* Initially set the converter's capabilities */
1263         hinfo->channels_min = per_cvt->channels_min;
1264         hinfo->channels_max = per_cvt->channels_max;
1265         hinfo->rates = per_cvt->rates;
1266         hinfo->formats = per_cvt->formats;
1267         hinfo->maxbps = per_cvt->maxbps;
1268
1269         eld = &per_pin->sink_eld;
1270         /* Restrict capabilities by ELD if this isn't disabled */
1271         if (!static_hdmi_pcm && eld->eld_valid) {
1272                 snd_hdmi_eld_update_pcm_info(&eld->info, hinfo);
1273                 if (hinfo->channels_min > hinfo->channels_max ||
1274                     !hinfo->rates || !hinfo->formats) {
1275                         per_cvt->assigned = 0;
1276                         hinfo->nid = 0;
1277                         snd_hda_spdif_ctls_unassign(codec, pcm_idx);
1278                         err = -ENODEV;
1279                         goto unlock;
1280                 }
1281         }
1282
1283         /* Store the updated parameters */
1284         runtime->hw.channels_min = hinfo->channels_min;
1285         runtime->hw.channels_max = hinfo->channels_max;
1286         runtime->hw.formats = hinfo->formats;
1287         runtime->hw.rates = hinfo->rates;
1288
1289         snd_pcm_hw_constraint_step(substream->runtime, 0,
1290                                    SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1291  unlock:
1292         mutex_unlock(&spec->pcm_lock);
1293         return err;
1294 }
1295
1296 /*
1297  * HDA/HDMI auto parsing
1298  */
1299 static int hdmi_read_pin_conn(struct hda_codec *codec, int pin_idx)
1300 {
1301         struct hdmi_spec *spec = codec->spec;
1302         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1303         hda_nid_t pin_nid = per_pin->pin_nid;
1304         int dev_id = per_pin->dev_id;
1305
1306         if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
1307                 codec_warn(codec,
1308                            "HDMI: pin %d wcaps %#x does not support connection list\n",
1309                            pin_nid, get_wcaps(codec, pin_nid));
1310                 return -EINVAL;
1311         }
1312
1313         snd_hda_set_dev_select(codec, pin_nid, dev_id);
1314
1315         /* all the device entries on the same pin have the same conn list */
1316         per_pin->num_mux_nids =
1317                 snd_hda_get_raw_connections(codec, pin_nid, per_pin->mux_nids,
1318                                             HDA_MAX_CONNECTIONS);
1319
1320         return 0;
1321 }
1322
1323 static int hdmi_find_pcm_slot(struct hdmi_spec *spec,
1324                               struct hdmi_spec_per_pin *per_pin)
1325 {
1326         int i;
1327
1328         /*
1329          * generic_hdmi_build_pcms() allocates (num_nids + dev_num - 1)
1330          * number of pcms.
1331          *
1332          * The per_pin of pin_nid_idx=n and dev_id=m prefers to get pcm-n
1333          * if m==0. This guarantees that dynamic pcm assignments are compatible
1334          * with the legacy static per_pin-pmc assignment that existed in the
1335          * days before DP-MST.
1336          *
1337          * per_pin of m!=0 prefers to get pcm=(num_nids + (m - 1)).
1338          */
1339         if (per_pin->dev_id == 0 &&
1340             !test_bit(per_pin->pin_nid_idx, &spec->pcm_bitmap))
1341                 return per_pin->pin_nid_idx;
1342
1343         if (per_pin->dev_id != 0 &&
1344             !(test_bit(spec->num_nids + (per_pin->dev_id - 1),
1345                 &spec->pcm_bitmap))) {
1346                 return spec->num_nids + (per_pin->dev_id - 1);
1347         }
1348
1349         /* have a second try; check the area over num_nids */
1350         for (i = spec->num_nids; i < spec->pcm_used; i++) {
1351                 if (!test_bit(i, &spec->pcm_bitmap))
1352                         return i;
1353         }
1354
1355         /* the last try; check the empty slots in pins */
1356         for (i = 0; i < spec->num_nids; i++) {
1357                 if (!test_bit(i, &spec->pcm_bitmap))
1358                         return i;
1359         }
1360         return -EBUSY;
1361 }
1362
1363 static void hdmi_attach_hda_pcm(struct hdmi_spec *spec,
1364                                 struct hdmi_spec_per_pin *per_pin)
1365 {
1366         int idx;
1367
1368         /* pcm already be attached to the pin */
1369         if (per_pin->pcm)
1370                 return;
1371         idx = hdmi_find_pcm_slot(spec, per_pin);
1372         if (idx == -EBUSY)
1373                 return;
1374         per_pin->pcm_idx = idx;
1375         per_pin->pcm = get_hdmi_pcm(spec, idx);
1376         set_bit(idx, &spec->pcm_bitmap);
1377 }
1378
1379 static void hdmi_detach_hda_pcm(struct hdmi_spec *spec,
1380                                 struct hdmi_spec_per_pin *per_pin)
1381 {
1382         int idx;
1383
1384         /* pcm already be detached from the pin */
1385         if (!per_pin->pcm)
1386                 return;
1387         idx = per_pin->pcm_idx;
1388         per_pin->pcm_idx = -1;
1389         per_pin->pcm = NULL;
1390         if (idx >= 0 && idx < spec->pcm_used)
1391                 clear_bit(idx, &spec->pcm_bitmap);
1392 }
1393
1394 static int hdmi_get_pin_cvt_mux(struct hdmi_spec *spec,
1395                 struct hdmi_spec_per_pin *per_pin, hda_nid_t cvt_nid)
1396 {
1397         int mux_idx;
1398
1399         for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
1400                 if (per_pin->mux_nids[mux_idx] == cvt_nid)
1401                         break;
1402         return mux_idx;
1403 }
1404
1405 static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid);
1406
1407 static void hdmi_pcm_setup_pin(struct hdmi_spec *spec,
1408                            struct hdmi_spec_per_pin *per_pin)
1409 {
1410         struct hda_codec *codec = per_pin->codec;
1411         struct hda_pcm *pcm;
1412         struct hda_pcm_stream *hinfo;
1413         struct snd_pcm_substream *substream;
1414         int mux_idx;
1415         bool non_pcm;
1416
1417         if (per_pin->pcm_idx >= 0 && per_pin->pcm_idx < spec->pcm_used)
1418                 pcm = get_pcm_rec(spec, per_pin->pcm_idx);
1419         else
1420                 return;
1421         if (!pcm->pcm)
1422                 return;
1423         if (!test_bit(per_pin->pcm_idx, &spec->pcm_in_use))
1424                 return;
1425
1426         /* hdmi audio only uses playback and one substream */
1427         hinfo = pcm->stream;
1428         substream = pcm->pcm->streams[0].substream;
1429
1430         per_pin->cvt_nid = hinfo->nid;
1431
1432         mux_idx = hdmi_get_pin_cvt_mux(spec, per_pin, hinfo->nid);
1433         if (mux_idx < per_pin->num_mux_nids) {
1434                 snd_hda_set_dev_select(codec, per_pin->pin_nid,
1435                                    per_pin->dev_id);
1436                 snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
1437                                 AC_VERB_SET_CONNECT_SEL,
1438                                 mux_idx);
1439         }
1440         snd_hda_spdif_ctls_assign(codec, per_pin->pcm_idx, hinfo->nid);
1441
1442         non_pcm = check_non_pcm_per_cvt(codec, hinfo->nid);
1443         if (substream->runtime)
1444                 per_pin->channels = substream->runtime->channels;
1445         per_pin->setup = true;
1446         per_pin->mux_idx = mux_idx;
1447
1448         hdmi_setup_audio_infoframe(codec, per_pin, non_pcm);
1449 }
1450
1451 static void hdmi_pcm_reset_pin(struct hdmi_spec *spec,
1452                            struct hdmi_spec_per_pin *per_pin)
1453 {
1454         if (per_pin->pcm_idx >= 0 && per_pin->pcm_idx < spec->pcm_used)
1455                 snd_hda_spdif_ctls_unassign(per_pin->codec, per_pin->pcm_idx);
1456
1457         per_pin->chmap_set = false;
1458         memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
1459
1460         per_pin->setup = false;
1461         per_pin->channels = 0;
1462 }
1463
1464 /* update per_pin ELD from the given new ELD;
1465  * setup info frame and notification accordingly
1466  */
1467 static bool update_eld(struct hda_codec *codec,
1468                        struct hdmi_spec_per_pin *per_pin,
1469                        struct hdmi_eld *eld)
1470 {
1471         struct hdmi_eld *pin_eld = &per_pin->sink_eld;
1472         struct hdmi_spec *spec = codec->spec;
1473         bool old_eld_valid = pin_eld->eld_valid;
1474         bool eld_changed;
1475         int pcm_idx;
1476
1477         /* for monitor disconnection, save pcm_idx firstly */
1478         pcm_idx = per_pin->pcm_idx;
1479         if (spec->dyn_pcm_assign) {
1480                 if (eld->eld_valid) {
1481                         hdmi_attach_hda_pcm(spec, per_pin);
1482                         hdmi_pcm_setup_pin(spec, per_pin);
1483                 } else {
1484                         hdmi_pcm_reset_pin(spec, per_pin);
1485                         hdmi_detach_hda_pcm(spec, per_pin);
1486                 }
1487         }
1488         /* if pcm_idx == -1, it means this is in monitor connection event
1489          * we can get the correct pcm_idx now.
1490          */
1491         if (pcm_idx == -1)
1492                 pcm_idx = per_pin->pcm_idx;
1493
1494         if (eld->eld_valid)
1495                 snd_hdmi_show_eld(codec, &eld->info);
1496
1497         eld_changed = (pin_eld->eld_valid != eld->eld_valid);
1498         eld_changed |= (pin_eld->monitor_present != eld->monitor_present);
1499         if (!eld_changed && eld->eld_valid && pin_eld->eld_valid)
1500                 if (pin_eld->eld_size != eld->eld_size ||
1501                     memcmp(pin_eld->eld_buffer, eld->eld_buffer,
1502                            eld->eld_size) != 0)
1503                         eld_changed = true;
1504
1505         if (eld_changed) {
1506                 pin_eld->monitor_present = eld->monitor_present;
1507                 pin_eld->eld_valid = eld->eld_valid;
1508                 pin_eld->eld_size = eld->eld_size;
1509                 if (eld->eld_valid)
1510                         memcpy(pin_eld->eld_buffer, eld->eld_buffer,
1511                                eld->eld_size);
1512                 pin_eld->info = eld->info;
1513         }
1514
1515         /*
1516          * Re-setup pin and infoframe. This is needed e.g. when
1517          * - sink is first plugged-in
1518          * - transcoder can change during stream playback on Haswell
1519          *   and this can make HW reset converter selection on a pin.
1520          */
1521         if (eld->eld_valid && !old_eld_valid && per_pin->setup) {
1522                 pin_cvt_fixup(codec, per_pin, 0);
1523                 hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm);
1524         }
1525
1526         if (eld_changed && pcm_idx >= 0)
1527                 snd_ctl_notify(codec->card,
1528                                SNDRV_CTL_EVENT_MASK_VALUE |
1529                                SNDRV_CTL_EVENT_MASK_INFO,
1530                                &get_hdmi_pcm(spec, pcm_idx)->eld_ctl->id);
1531         return eld_changed;
1532 }
1533
1534 /* update ELD and jack state via HD-audio verbs */
1535 static bool hdmi_present_sense_via_verbs(struct hdmi_spec_per_pin *per_pin,
1536                                          int repoll)
1537 {
1538         struct hda_jack_tbl *jack;
1539         struct hda_codec *codec = per_pin->codec;
1540         struct hdmi_spec *spec = codec->spec;
1541         struct hdmi_eld *eld = &spec->temp_eld;
1542         hda_nid_t pin_nid = per_pin->pin_nid;
1543         int dev_id = per_pin->dev_id;
1544         /*
1545          * Always execute a GetPinSense verb here, even when called from
1546          * hdmi_intrinsic_event; for some NVIDIA HW, the unsolicited
1547          * response's PD bit is not the real PD value, but indicates that
1548          * the real PD value changed. An older version of the HD-audio
1549          * specification worked this way. Hence, we just ignore the data in
1550          * the unsolicited response to avoid custom WARs.
1551          */
1552         int present;
1553         bool ret;
1554         bool do_repoll = false;
1555
1556         present = snd_hda_jack_pin_sense(codec, pin_nid, dev_id);
1557
1558         mutex_lock(&per_pin->lock);
1559         eld->monitor_present = !!(present & AC_PINSENSE_PRESENCE);
1560         if (eld->monitor_present)
1561                 eld->eld_valid  = !!(present & AC_PINSENSE_ELDV);
1562         else
1563                 eld->eld_valid = false;
1564
1565         codec_dbg(codec,
1566                 "HDMI status: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
1567                 codec->addr, pin_nid, eld->monitor_present, eld->eld_valid);
1568
1569         if (eld->eld_valid) {
1570                 if (spec->ops.pin_get_eld(codec, pin_nid, dev_id,
1571                                           eld->eld_buffer, &eld->eld_size) < 0)
1572                         eld->eld_valid = false;
1573                 else {
1574                         if (snd_hdmi_parse_eld(codec, &eld->info, eld->eld_buffer,
1575                                                     eld->eld_size) < 0)
1576                                 eld->eld_valid = false;
1577                 }
1578                 if (!eld->eld_valid && repoll)
1579                         do_repoll = true;
1580         }
1581
1582         if (do_repoll)
1583                 schedule_delayed_work(&per_pin->work, msecs_to_jiffies(300));
1584         else
1585                 update_eld(codec, per_pin, eld);
1586
1587         ret = !repoll || !eld->monitor_present || eld->eld_valid;
1588
1589         jack = snd_hda_jack_tbl_get_mst(codec, pin_nid, per_pin->dev_id);
1590         if (jack) {
1591                 jack->block_report = !ret;
1592                 jack->pin_sense = (eld->monitor_present && eld->eld_valid) ?
1593                         AC_PINSENSE_PRESENCE : 0;
1594         }
1595         mutex_unlock(&per_pin->lock);
1596         return ret;
1597 }
1598
1599 static struct snd_jack *pin_idx_to_jack(struct hda_codec *codec,
1600                                  struct hdmi_spec_per_pin *per_pin)
1601 {
1602         struct hdmi_spec *spec = codec->spec;
1603         struct snd_jack *jack = NULL;
1604         struct hda_jack_tbl *jack_tbl;
1605
1606         /* if !dyn_pcm_assign, get jack from hda_jack_tbl
1607          * in !dyn_pcm_assign case, spec->pcm_rec[].jack is not
1608          * NULL even after snd_hda_jack_tbl_clear() is called to
1609          * free snd_jack. This may cause access invalid memory
1610          * when calling snd_jack_report
1611          */
1612         if (per_pin->pcm_idx >= 0 && spec->dyn_pcm_assign)
1613                 jack = spec->pcm_rec[per_pin->pcm_idx].jack;
1614         else if (!spec->dyn_pcm_assign) {
1615                 /*
1616                  * jack tbl doesn't support DP MST
1617                  * DP MST will use dyn_pcm_assign,
1618                  * so DP MST will never come here
1619                  */
1620                 jack_tbl = snd_hda_jack_tbl_get_mst(codec, per_pin->pin_nid,
1621                                                     per_pin->dev_id);
1622                 if (jack_tbl)
1623                         jack = jack_tbl->jack;
1624         }
1625         return jack;
1626 }
1627
1628 /* update ELD and jack state via audio component */
1629 static void sync_eld_via_acomp(struct hda_codec *codec,
1630                                struct hdmi_spec_per_pin *per_pin)
1631 {
1632         struct hdmi_spec *spec = codec->spec;
1633         struct hdmi_eld *eld = &spec->temp_eld;
1634         struct snd_jack *jack = NULL;
1635         bool changed;
1636         int size;
1637
1638         mutex_lock(&per_pin->lock);
1639         eld->monitor_present = false;
1640         size = snd_hdac_acomp_get_eld(&codec->core, per_pin->pin_nid,
1641                                       per_pin->dev_id, &eld->monitor_present,
1642                                       eld->eld_buffer, ELD_MAX_SIZE);
1643         if (size > 0) {
1644                 size = min(size, ELD_MAX_SIZE);
1645                 if (snd_hdmi_parse_eld(codec, &eld->info,
1646                                        eld->eld_buffer, size) < 0)
1647                         size = -EINVAL;
1648         }
1649
1650         if (size > 0) {
1651                 eld->eld_valid = true;
1652                 eld->eld_size = size;
1653         } else {
1654                 eld->eld_valid = false;
1655                 eld->eld_size = 0;
1656         }
1657
1658         /* pcm_idx >=0 before update_eld() means it is in monitor
1659          * disconnected event. Jack must be fetched before update_eld()
1660          */
1661         jack = pin_idx_to_jack(codec, per_pin);
1662         changed = update_eld(codec, per_pin, eld);
1663         if (jack == NULL)
1664                 jack = pin_idx_to_jack(codec, per_pin);
1665         if (changed && jack)
1666                 snd_jack_report(jack,
1667                                 (eld->monitor_present && eld->eld_valid) ?
1668                                 SND_JACK_AVOUT : 0);
1669         mutex_unlock(&per_pin->lock);
1670 }
1671
1672 static bool hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll)
1673 {
1674         struct hda_codec *codec = per_pin->codec;
1675         int ret;
1676
1677         /* no temporary power up/down needed for component notifier */
1678         if (!codec_has_acomp(codec)) {
1679                 ret = snd_hda_power_up_pm(codec);
1680                 if (ret < 0 && pm_runtime_suspended(hda_codec_dev(codec))) {
1681                         snd_hda_power_down_pm(codec);
1682                         return false;
1683                 }
1684                 ret = hdmi_present_sense_via_verbs(per_pin, repoll);
1685                 snd_hda_power_down_pm(codec);
1686         } else {
1687                 sync_eld_via_acomp(codec, per_pin);
1688                 ret = false; /* don't call snd_hda_jack_report_sync() */
1689         }
1690
1691         return ret;
1692 }
1693
1694 static void hdmi_repoll_eld(struct work_struct *work)
1695 {
1696         struct hdmi_spec_per_pin *per_pin =
1697         container_of(to_delayed_work(work), struct hdmi_spec_per_pin, work);
1698         struct hda_codec *codec = per_pin->codec;
1699         struct hdmi_spec *spec = codec->spec;
1700         struct hda_jack_tbl *jack;
1701
1702         jack = snd_hda_jack_tbl_get_mst(codec, per_pin->pin_nid,
1703                                         per_pin->dev_id);
1704         if (jack)
1705                 jack->jack_dirty = 1;
1706
1707         if (per_pin->repoll_count++ > 6)
1708                 per_pin->repoll_count = 0;
1709
1710         mutex_lock(&spec->pcm_lock);
1711         if (hdmi_present_sense(per_pin, per_pin->repoll_count))
1712                 snd_hda_jack_report_sync(per_pin->codec);
1713         mutex_unlock(&spec->pcm_lock);
1714 }
1715
1716 static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
1717                                              hda_nid_t nid);
1718
1719 static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
1720 {
1721         struct hdmi_spec *spec = codec->spec;
1722         unsigned int caps, config;
1723         int pin_idx;
1724         struct hdmi_spec_per_pin *per_pin;
1725         int err;
1726         int dev_num, i;
1727
1728         caps = snd_hda_query_pin_caps(codec, pin_nid);
1729         if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP)))
1730                 return 0;
1731
1732         /*
1733          * For DP MST audio, Configuration Default is the same for
1734          * all device entries on the same pin
1735          */
1736         config = snd_hda_codec_get_pincfg(codec, pin_nid);
1737         if (get_defcfg_connect(config) == AC_JACK_PORT_NONE)
1738                 return 0;
1739
1740         /*
1741          * To simplify the implementation, malloc all
1742          * the virtual pins in the initialization statically
1743          */
1744         if (spec->intel_hsw_fixup) {
1745                 /*
1746                  * On Intel platforms, device entries number is
1747                  * changed dynamically. If there is a DP MST
1748                  * hub connected, the device entries number is 3.
1749                  * Otherwise, it is 1.
1750                  * Here we manually set dev_num to 3, so that
1751                  * we can initialize all the device entries when
1752                  * bootup statically.
1753                  */
1754                 dev_num = 3;
1755                 spec->dev_num = 3;
1756         } else if (spec->dyn_pcm_assign && codec->dp_mst) {
1757                 dev_num = snd_hda_get_num_devices(codec, pin_nid) + 1;
1758                 /*
1759                  * spec->dev_num is the maxinum number of device entries
1760                  * among all the pins
1761                  */
1762                 spec->dev_num = (spec->dev_num > dev_num) ?
1763                         spec->dev_num : dev_num;
1764         } else {
1765                 /*
1766                  * If the platform doesn't support DP MST,
1767                  * manually set dev_num to 1. This means
1768                  * the pin has only one device entry.
1769                  */
1770                 dev_num = 1;
1771                 spec->dev_num = 1;
1772         }
1773
1774         for (i = 0; i < dev_num; i++) {
1775                 pin_idx = spec->num_pins;
1776                 per_pin = snd_array_new(&spec->pins);
1777
1778                 if (!per_pin)
1779                         return -ENOMEM;
1780
1781                 if (spec->dyn_pcm_assign) {
1782                         per_pin->pcm = NULL;
1783                         per_pin->pcm_idx = -1;
1784                 } else {
1785                         per_pin->pcm = get_hdmi_pcm(spec, pin_idx);
1786                         per_pin->pcm_idx = pin_idx;
1787                 }
1788                 per_pin->pin_nid = pin_nid;
1789                 per_pin->pin_nid_idx = spec->num_nids;
1790                 per_pin->dev_id = i;
1791                 per_pin->non_pcm = false;
1792                 snd_hda_set_dev_select(codec, pin_nid, i);
1793                 if (spec->intel_hsw_fixup)
1794                         intel_haswell_fixup_connect_list(codec, pin_nid);
1795                 err = hdmi_read_pin_conn(codec, pin_idx);
1796                 if (err < 0)
1797                         return err;
1798                 spec->num_pins++;
1799         }
1800         spec->num_nids++;
1801
1802         return 0;
1803 }
1804
1805 static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1806 {
1807         struct hdmi_spec *spec = codec->spec;
1808         struct hdmi_spec_per_cvt *per_cvt;
1809         unsigned int chans;
1810         int err;
1811
1812         chans = get_wcaps(codec, cvt_nid);
1813         chans = get_wcaps_channels(chans);
1814
1815         per_cvt = snd_array_new(&spec->cvts);
1816         if (!per_cvt)
1817                 return -ENOMEM;
1818
1819         per_cvt->cvt_nid = cvt_nid;
1820         per_cvt->channels_min = 2;
1821         if (chans <= 16) {
1822                 per_cvt->channels_max = chans;
1823                 if (chans > spec->chmap.channels_max)
1824                         spec->chmap.channels_max = chans;
1825         }
1826
1827         err = snd_hda_query_supported_pcm(codec, cvt_nid,
1828                                           &per_cvt->rates,
1829                                           &per_cvt->formats,
1830                                           &per_cvt->maxbps);
1831         if (err < 0)
1832                 return err;
1833
1834         if (spec->num_cvts < ARRAY_SIZE(spec->cvt_nids))
1835                 spec->cvt_nids[spec->num_cvts] = cvt_nid;
1836         spec->num_cvts++;
1837
1838         return 0;
1839 }
1840
1841 static int hdmi_parse_codec(struct hda_codec *codec)
1842 {
1843         hda_nid_t nid;
1844         int i, nodes;
1845
1846         nodes = snd_hda_get_sub_nodes(codec, codec->core.afg, &nid);
1847         if (!nid || nodes < 0) {
1848                 codec_warn(codec, "HDMI: failed to get afg sub nodes\n");
1849                 return -EINVAL;
1850         }
1851
1852         for (i = 0; i < nodes; i++, nid++) {
1853                 unsigned int caps;
1854                 unsigned int type;
1855
1856                 caps = get_wcaps(codec, nid);
1857                 type = get_wcaps_type(caps);
1858
1859                 if (!(caps & AC_WCAP_DIGITAL))
1860                         continue;
1861
1862                 switch (type) {
1863                 case AC_WID_AUD_OUT:
1864                         hdmi_add_cvt(codec, nid);
1865                         break;
1866                 case AC_WID_PIN:
1867                         hdmi_add_pin(codec, nid);
1868                         break;
1869                 }
1870         }
1871
1872         return 0;
1873 }
1874
1875 /*
1876  */
1877 static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1878 {
1879         struct hda_spdif_out *spdif;
1880         bool non_pcm;
1881
1882         mutex_lock(&codec->spdif_mutex);
1883         spdif = snd_hda_spdif_out_of_nid(codec, cvt_nid);
1884         /* Add sanity check to pass klockwork check.
1885          * This should never happen.
1886          */
1887         if (WARN_ON(spdif == NULL))
1888                 return true;
1889         non_pcm = !!(spdif->status & IEC958_AES0_NONAUDIO);
1890         mutex_unlock(&codec->spdif_mutex);
1891         return non_pcm;
1892 }
1893
1894 /*
1895  * HDMI callbacks
1896  */
1897
1898 static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1899                                            struct hda_codec *codec,
1900                                            unsigned int stream_tag,
1901                                            unsigned int format,
1902                                            struct snd_pcm_substream *substream)
1903 {
1904         hda_nid_t cvt_nid = hinfo->nid;
1905         struct hdmi_spec *spec = codec->spec;
1906         int pin_idx;
1907         struct hdmi_spec_per_pin *per_pin;
1908         struct snd_pcm_runtime *runtime = substream->runtime;
1909         bool non_pcm;
1910         int pinctl, stripe;
1911         int err = 0;
1912
1913         mutex_lock(&spec->pcm_lock);
1914         pin_idx = hinfo_to_pin_index(codec, hinfo);
1915         if (spec->dyn_pcm_assign && pin_idx < 0) {
1916                 /* when dyn_pcm_assign and pcm is not bound to a pin
1917                  * skip pin setup and return 0 to make audio playback
1918                  * be ongoing
1919                  */
1920                 pin_cvt_fixup(codec, NULL, cvt_nid);
1921                 snd_hda_codec_setup_stream(codec, cvt_nid,
1922                                         stream_tag, 0, format);
1923                 goto unlock;
1924         }
1925
1926         if (snd_BUG_ON(pin_idx < 0)) {
1927                 err = -EINVAL;
1928                 goto unlock;
1929         }
1930         per_pin = get_pin(spec, pin_idx);
1931
1932         /* Verify pin:cvt selections to avoid silent audio after S3.
1933          * After S3, the audio driver restores pin:cvt selections
1934          * but this can happen before gfx is ready and such selection
1935          * is overlooked by HW. Thus multiple pins can share a same
1936          * default convertor and mute control will affect each other,
1937          * which can cause a resumed audio playback become silent
1938          * after S3.
1939          */
1940         pin_cvt_fixup(codec, per_pin, 0);
1941
1942         /* Call sync_audio_rate to set the N/CTS/M manually if necessary */
1943         /* Todo: add DP1.2 MST audio support later */
1944         if (codec_has_acomp(codec))
1945                 snd_hdac_sync_audio_rate(&codec->core, per_pin->pin_nid,
1946                                          per_pin->dev_id, runtime->rate);
1947
1948         non_pcm = check_non_pcm_per_cvt(codec, cvt_nid);
1949         mutex_lock(&per_pin->lock);
1950         per_pin->channels = substream->runtime->channels;
1951         per_pin->setup = true;
1952
1953         if (get_wcaps(codec, cvt_nid) & AC_WCAP_STRIPE) {
1954                 stripe = snd_hdac_get_stream_stripe_ctl(&codec->bus->core,
1955                                                         substream);
1956                 snd_hda_codec_write(codec, cvt_nid, 0,
1957                                     AC_VERB_SET_STRIPE_CONTROL,
1958                                     stripe);
1959         }
1960
1961         hdmi_setup_audio_infoframe(codec, per_pin, non_pcm);
1962         mutex_unlock(&per_pin->lock);
1963         if (spec->dyn_pin_out) {
1964                 snd_hda_set_dev_select(codec, per_pin->pin_nid,
1965                                        per_pin->dev_id);
1966                 pinctl = snd_hda_codec_read(codec, per_pin->pin_nid, 0,
1967                                             AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
1968                 snd_hda_codec_write(codec, per_pin->pin_nid, 0,
1969                                     AC_VERB_SET_PIN_WIDGET_CONTROL,
1970                                     pinctl | PIN_OUT);
1971         }
1972
1973         /* snd_hda_set_dev_select() has been called before */
1974         err = spec->ops.setup_stream(codec, cvt_nid, per_pin->pin_nid,
1975                                      per_pin->dev_id, stream_tag, format);
1976  unlock:
1977         mutex_unlock(&spec->pcm_lock);
1978         return err;
1979 }
1980
1981 static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
1982                                              struct hda_codec *codec,
1983                                              struct snd_pcm_substream *substream)
1984 {
1985         snd_hda_codec_cleanup_stream(codec, hinfo->nid);
1986         return 0;
1987 }
1988
1989 static int hdmi_pcm_close(struct hda_pcm_stream *hinfo,
1990                           struct hda_codec *codec,
1991                           struct snd_pcm_substream *substream)
1992 {
1993         struct hdmi_spec *spec = codec->spec;
1994         int cvt_idx, pin_idx, pcm_idx;
1995         struct hdmi_spec_per_cvt *per_cvt;
1996         struct hdmi_spec_per_pin *per_pin;
1997         int pinctl;
1998         int err = 0;
1999
2000         if (hinfo->nid) {
2001                 pcm_idx = hinfo_to_pcm_index(codec, hinfo);
2002                 if (snd_BUG_ON(pcm_idx < 0))
2003                         return -EINVAL;
2004                 cvt_idx = cvt_nid_to_cvt_index(codec, hinfo->nid);
2005                 if (snd_BUG_ON(cvt_idx < 0))
2006                         return -EINVAL;
2007                 per_cvt = get_cvt(spec, cvt_idx);
2008
2009                 snd_BUG_ON(!per_cvt->assigned);
2010                 per_cvt->assigned = 0;
2011                 hinfo->nid = 0;
2012
2013                 mutex_lock(&spec->pcm_lock);
2014                 snd_hda_spdif_ctls_unassign(codec, pcm_idx);
2015                 clear_bit(pcm_idx, &spec->pcm_in_use);
2016                 pin_idx = hinfo_to_pin_index(codec, hinfo);
2017                 if (spec->dyn_pcm_assign && pin_idx < 0)
2018                         goto unlock;
2019
2020                 if (snd_BUG_ON(pin_idx < 0)) {
2021                         err = -EINVAL;
2022                         goto unlock;
2023                 }
2024                 per_pin = get_pin(spec, pin_idx);
2025
2026                 if (spec->dyn_pin_out) {
2027                         snd_hda_set_dev_select(codec, per_pin->pin_nid,
2028                                                per_pin->dev_id);
2029                         pinctl = snd_hda_codec_read(codec, per_pin->pin_nid, 0,
2030                                         AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
2031                         snd_hda_codec_write(codec, per_pin->pin_nid, 0,
2032                                             AC_VERB_SET_PIN_WIDGET_CONTROL,
2033                                             pinctl & ~PIN_OUT);
2034                 }
2035
2036                 mutex_lock(&per_pin->lock);
2037                 per_pin->chmap_set = false;
2038                 memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
2039
2040                 per_pin->setup = false;
2041                 per_pin->channels = 0;
2042                 mutex_unlock(&per_pin->lock);
2043         unlock:
2044                 mutex_unlock(&spec->pcm_lock);
2045         }
2046
2047         return err;
2048 }
2049
2050 static const struct hda_pcm_ops generic_ops = {
2051         .open = hdmi_pcm_open,
2052         .close = hdmi_pcm_close,
2053         .prepare = generic_hdmi_playback_pcm_prepare,
2054         .cleanup = generic_hdmi_playback_pcm_cleanup,
2055 };
2056
2057 static int hdmi_get_spk_alloc(struct hdac_device *hdac, int pcm_idx)
2058 {
2059         struct hda_codec *codec = container_of(hdac, struct hda_codec, core);
2060         struct hdmi_spec *spec = codec->spec;
2061         struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
2062
2063         if (!per_pin)
2064                 return 0;
2065
2066         return per_pin->sink_eld.info.spk_alloc;
2067 }
2068
2069 static void hdmi_get_chmap(struct hdac_device *hdac, int pcm_idx,
2070                                         unsigned char *chmap)
2071 {
2072         struct hda_codec *codec = container_of(hdac, struct hda_codec, core);
2073         struct hdmi_spec *spec = codec->spec;
2074         struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
2075
2076         /* chmap is already set to 0 in caller */
2077         if (!per_pin)
2078                 return;
2079
2080         memcpy(chmap, per_pin->chmap, ARRAY_SIZE(per_pin->chmap));
2081 }
2082
2083 static void hdmi_set_chmap(struct hdac_device *hdac, int pcm_idx,
2084                                 unsigned char *chmap, int prepared)
2085 {
2086         struct hda_codec *codec = container_of(hdac, struct hda_codec, core);
2087         struct hdmi_spec *spec = codec->spec;
2088         struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
2089
2090         if (!per_pin)
2091                 return;
2092         mutex_lock(&per_pin->lock);
2093         per_pin->chmap_set = true;
2094         memcpy(per_pin->chmap, chmap, ARRAY_SIZE(per_pin->chmap));
2095         if (prepared)
2096                 hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm);
2097         mutex_unlock(&per_pin->lock);
2098 }
2099
2100 static bool is_hdmi_pcm_attached(struct hdac_device *hdac, int pcm_idx)
2101 {
2102         struct hda_codec *codec = container_of(hdac, struct hda_codec, core);
2103         struct hdmi_spec *spec = codec->spec;
2104         struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
2105
2106         return per_pin ? true:false;
2107 }
2108
2109 static int generic_hdmi_build_pcms(struct hda_codec *codec)
2110 {
2111         struct hdmi_spec *spec = codec->spec;
2112         int idx, pcm_num;
2113
2114         /*
2115          * for non-mst mode, pcm number is the same as before
2116          * for DP MST mode without extra PCM, pcm number is same
2117          * for DP MST mode with extra PCMs, pcm number is
2118          *  (nid number + dev_num - 1)
2119          * dev_num is the device entry number in a pin
2120          */
2121
2122         if (codec->mst_no_extra_pcms)
2123                 pcm_num = spec->num_nids;
2124         else
2125                 pcm_num = spec->num_nids + spec->dev_num - 1;
2126
2127         codec_dbg(codec, "hdmi: pcm_num set to %d\n", pcm_num);
2128
2129         for (idx = 0; idx < pcm_num; idx++) {
2130                 struct hda_pcm *info;
2131                 struct hda_pcm_stream *pstr;
2132
2133                 info = snd_hda_codec_pcm_new(codec, "HDMI %d", idx);
2134                 if (!info)
2135                         return -ENOMEM;
2136
2137                 spec->pcm_rec[idx].pcm = info;
2138                 spec->pcm_used++;
2139                 info->pcm_type = HDA_PCM_TYPE_HDMI;
2140                 info->own_chmap = true;
2141
2142                 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
2143                 pstr->substreams = 1;
2144                 pstr->ops = generic_ops;
2145                 /* pcm number is less than 16 */
2146                 if (spec->pcm_used >= 16)
2147                         break;
2148                 /* other pstr fields are set in open */
2149         }
2150
2151         return 0;
2152 }
2153
2154 static void free_hdmi_jack_priv(struct snd_jack *jack)
2155 {
2156         struct hdmi_pcm *pcm = jack->private_data;
2157
2158         pcm->jack = NULL;
2159 }
2160
2161 static int add_hdmi_jack_kctl(struct hda_codec *codec,
2162                                struct hdmi_spec *spec,
2163                                int pcm_idx,
2164                                const char *name)
2165 {
2166         struct snd_jack *jack;
2167         int err;
2168
2169         err = snd_jack_new(codec->card, name, SND_JACK_AVOUT, &jack,
2170                            true, false);
2171         if (err < 0)
2172                 return err;
2173
2174         spec->pcm_rec[pcm_idx].jack = jack;
2175         jack->private_data = &spec->pcm_rec[pcm_idx];
2176         jack->private_free = free_hdmi_jack_priv;
2177         return 0;
2178 }
2179
2180 static int generic_hdmi_build_jack(struct hda_codec *codec, int pcm_idx)
2181 {
2182         char hdmi_str[32] = "HDMI/DP";
2183         struct hdmi_spec *spec = codec->spec;
2184         struct hdmi_spec_per_pin *per_pin;
2185         struct hda_jack_tbl *jack;
2186         int pcmdev = get_pcm_rec(spec, pcm_idx)->device;
2187         bool phantom_jack;
2188         int ret;
2189
2190         if (pcmdev > 0)
2191                 sprintf(hdmi_str + strlen(hdmi_str), ",pcm=%d", pcmdev);
2192
2193         if (spec->dyn_pcm_assign)
2194                 return add_hdmi_jack_kctl(codec, spec, pcm_idx, hdmi_str);
2195
2196         /* for !dyn_pcm_assign, we still use hda_jack for compatibility */
2197         /* if !dyn_pcm_assign, it must be non-MST mode.
2198          * This means pcms and pins are statically mapped.
2199          * And pcm_idx is pin_idx.
2200          */
2201         per_pin = get_pin(spec, pcm_idx);
2202         phantom_jack = !is_jack_detectable(codec, per_pin->pin_nid);
2203         if (phantom_jack)
2204                 strncat(hdmi_str, " Phantom",
2205                         sizeof(hdmi_str) - strlen(hdmi_str) - 1);
2206         ret = snd_hda_jack_add_kctl_mst(codec, per_pin->pin_nid,
2207                                         per_pin->dev_id, hdmi_str, phantom_jack,
2208                                         0, NULL);
2209         if (ret < 0)
2210                 return ret;
2211         jack = snd_hda_jack_tbl_get_mst(codec, per_pin->pin_nid,
2212                                         per_pin->dev_id);
2213         if (jack == NULL)
2214                 return 0;
2215         /* assign jack->jack to pcm_rec[].jack to
2216          * align with dyn_pcm_assign mode
2217          */
2218         spec->pcm_rec[pcm_idx].jack = jack->jack;
2219         return 0;
2220 }
2221
2222 static int generic_hdmi_build_controls(struct hda_codec *codec)
2223 {
2224         struct hdmi_spec *spec = codec->spec;
2225         int dev, err;
2226         int pin_idx, pcm_idx;
2227
2228         for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++) {
2229                 if (!get_pcm_rec(spec, pcm_idx)->pcm) {
2230                         /* no PCM: mark this for skipping permanently */
2231                         set_bit(pcm_idx, &spec->pcm_bitmap);
2232                         continue;
2233                 }
2234
2235                 err = generic_hdmi_build_jack(codec, pcm_idx);
2236                 if (err < 0)
2237                         return err;
2238
2239                 /* create the spdif for each pcm
2240                  * pin will be bound when monitor is connected
2241                  */
2242                 if (spec->dyn_pcm_assign)
2243                         err = snd_hda_create_dig_out_ctls(codec,
2244                                           0, spec->cvt_nids[0],
2245                                           HDA_PCM_TYPE_HDMI);
2246                 else {
2247                         struct hdmi_spec_per_pin *per_pin =
2248                                 get_pin(spec, pcm_idx);
2249                         err = snd_hda_create_dig_out_ctls(codec,
2250                                                   per_pin->pin_nid,
2251                                                   per_pin->mux_nids[0],
2252                                                   HDA_PCM_TYPE_HDMI);
2253                 }
2254                 if (err < 0)
2255                         return err;
2256                 snd_hda_spdif_ctls_unassign(codec, pcm_idx);
2257
2258                 dev = get_pcm_rec(spec, pcm_idx)->device;
2259                 if (dev != SNDRV_PCM_INVALID_DEVICE) {
2260                         /* add control for ELD Bytes */
2261                         err = hdmi_create_eld_ctl(codec, pcm_idx, dev);
2262                         if (err < 0)
2263                                 return err;
2264                 }
2265         }
2266
2267         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2268                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2269
2270                 hdmi_present_sense(per_pin, 0);
2271         }
2272
2273         /* add channel maps */
2274         for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++) {
2275                 struct hda_pcm *pcm;
2276
2277                 pcm = get_pcm_rec(spec, pcm_idx);
2278                 if (!pcm || !pcm->pcm)
2279                         break;
2280                 err = snd_hdac_add_chmap_ctls(pcm->pcm, pcm_idx, &spec->chmap);
2281                 if (err < 0)
2282                         return err;
2283         }
2284
2285         return 0;
2286 }
2287
2288 static int generic_hdmi_init_per_pins(struct hda_codec *codec)
2289 {
2290         struct hdmi_spec *spec = codec->spec;
2291         int pin_idx;
2292
2293         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2294                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2295
2296                 per_pin->codec = codec;
2297                 mutex_init(&per_pin->lock);
2298                 INIT_DELAYED_WORK(&per_pin->work, hdmi_repoll_eld);
2299                 eld_proc_new(per_pin, pin_idx);
2300         }
2301         return 0;
2302 }
2303
2304 static int generic_hdmi_init(struct hda_codec *codec)
2305 {
2306         struct hdmi_spec *spec = codec->spec;
2307         int pin_idx;
2308
2309         mutex_lock(&spec->bind_lock);
2310         spec->use_jack_detect = !codec->jackpoll_interval;
2311         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2312                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2313                 hda_nid_t pin_nid = per_pin->pin_nid;
2314                 int dev_id = per_pin->dev_id;
2315
2316                 snd_hda_set_dev_select(codec, pin_nid, dev_id);
2317                 hdmi_init_pin(codec, pin_nid);
2318                 if (codec_has_acomp(codec))
2319                         continue;
2320                 if (spec->use_jack_detect)
2321                         snd_hda_jack_detect_enable(codec, pin_nid, dev_id);
2322                 else
2323                         snd_hda_jack_detect_enable_callback_mst(codec, pin_nid,
2324                                                                 dev_id,
2325                                                                 jack_callback);
2326         }
2327         mutex_unlock(&spec->bind_lock);
2328         return 0;
2329 }
2330
2331 static void hdmi_array_init(struct hdmi_spec *spec, int nums)
2332 {
2333         snd_array_init(&spec->pins, sizeof(struct hdmi_spec_per_pin), nums);
2334         snd_array_init(&spec->cvts, sizeof(struct hdmi_spec_per_cvt), nums);
2335 }
2336
2337 static void hdmi_array_free(struct hdmi_spec *spec)
2338 {
2339         snd_array_free(&spec->pins);
2340         snd_array_free(&spec->cvts);
2341 }
2342
2343 static void generic_spec_free(struct hda_codec *codec)
2344 {
2345         struct hdmi_spec *spec = codec->spec;
2346
2347         if (spec) {
2348                 hdmi_array_free(spec);
2349                 kfree(spec);
2350                 codec->spec = NULL;
2351         }
2352         codec->dp_mst = false;
2353 }
2354
2355 static void generic_hdmi_free(struct hda_codec *codec)
2356 {
2357         struct hdmi_spec *spec = codec->spec;
2358         int pin_idx, pcm_idx;
2359
2360         if (spec->acomp_registered) {
2361                 snd_hdac_acomp_exit(&codec->bus->core);
2362         } else if (codec_has_acomp(codec)) {
2363                 snd_hdac_acomp_register_notifier(&codec->bus->core, NULL);
2364                 codec->relaxed_resume = 0;
2365         }
2366
2367         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2368                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2369                 cancel_delayed_work_sync(&per_pin->work);
2370                 eld_proc_free(per_pin);
2371         }
2372
2373         for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++) {
2374                 if (spec->pcm_rec[pcm_idx].jack == NULL)
2375                         continue;
2376                 if (spec->dyn_pcm_assign)
2377                         snd_device_free(codec->card,
2378                                         spec->pcm_rec[pcm_idx].jack);
2379                 else
2380                         spec->pcm_rec[pcm_idx].jack = NULL;
2381         }
2382
2383         generic_spec_free(codec);
2384 }
2385
2386 #ifdef CONFIG_PM
2387 static int generic_hdmi_resume(struct hda_codec *codec)
2388 {
2389         struct hdmi_spec *spec = codec->spec;
2390         int pin_idx;
2391
2392         codec->patch_ops.init(codec);
2393         regcache_sync(codec->core.regmap);
2394
2395         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2396                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2397                 hdmi_present_sense(per_pin, 1);
2398         }
2399         return 0;
2400 }
2401 #endif
2402
2403 static const struct hda_codec_ops generic_hdmi_patch_ops = {
2404         .init                   = generic_hdmi_init,
2405         .free                   = generic_hdmi_free,
2406         .build_pcms             = generic_hdmi_build_pcms,
2407         .build_controls         = generic_hdmi_build_controls,
2408         .unsol_event            = hdmi_unsol_event,
2409 #ifdef CONFIG_PM
2410         .resume                 = generic_hdmi_resume,
2411 #endif
2412 };
2413
2414 static const struct hdmi_ops generic_standard_hdmi_ops = {
2415         .pin_get_eld                            = hdmi_pin_get_eld,
2416         .pin_setup_infoframe                    = hdmi_pin_setup_infoframe,
2417         .pin_hbr_setup                          = hdmi_pin_hbr_setup,
2418         .setup_stream                           = hdmi_setup_stream,
2419 };
2420
2421 /* allocate codec->spec and assign/initialize generic parser ops */
2422 static int alloc_generic_hdmi(struct hda_codec *codec)
2423 {
2424         struct hdmi_spec *spec;
2425
2426         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2427         if (!spec)
2428                 return -ENOMEM;
2429
2430         spec->codec = codec;
2431         spec->ops = generic_standard_hdmi_ops;
2432         spec->dev_num = 1;      /* initialize to 1 */
2433         mutex_init(&spec->pcm_lock);
2434         mutex_init(&spec->bind_lock);
2435         snd_hdac_register_chmap_ops(&codec->core, &spec->chmap);
2436
2437         spec->chmap.ops.get_chmap = hdmi_get_chmap;
2438         spec->chmap.ops.set_chmap = hdmi_set_chmap;
2439         spec->chmap.ops.is_pcm_attached = is_hdmi_pcm_attached;
2440         spec->chmap.ops.get_spk_alloc = hdmi_get_spk_alloc,
2441
2442         codec->spec = spec;
2443         hdmi_array_init(spec, 4);
2444
2445         codec->patch_ops = generic_hdmi_patch_ops;
2446
2447         return 0;
2448 }
2449
2450 /* generic HDMI parser */
2451 static int patch_generic_hdmi(struct hda_codec *codec)
2452 {
2453         int err;
2454
2455         err = alloc_generic_hdmi(codec);
2456         if (err < 0)
2457                 return err;
2458
2459         err = hdmi_parse_codec(codec);
2460         if (err < 0) {
2461                 generic_spec_free(codec);
2462                 return err;
2463         }
2464
2465         generic_hdmi_init_per_pins(codec);
2466         return 0;
2467 }
2468
2469 /*
2470  * generic audio component binding
2471  */
2472
2473 /* turn on / off the unsol event jack detection dynamically */
2474 static void reprogram_jack_detect(struct hda_codec *codec, hda_nid_t nid,
2475                                   int dev_id, bool use_acomp)
2476 {
2477         struct hda_jack_tbl *tbl;
2478
2479         tbl = snd_hda_jack_tbl_get_mst(codec, nid, dev_id);
2480         if (tbl) {
2481                 /* clear unsol even if component notifier is used, or re-enable
2482                  * if notifier is cleared
2483                  */
2484                 unsigned int val = use_acomp ? 0 : (AC_USRSP_EN | tbl->tag);
2485                 snd_hda_codec_write_cache(codec, nid, 0,
2486                                           AC_VERB_SET_UNSOLICITED_ENABLE, val);
2487         } else {
2488                 /* if no jack entry was defined beforehand, create a new one
2489                  * at need (i.e. only when notifier is cleared)
2490                  */
2491                 if (!use_acomp)
2492                         snd_hda_jack_detect_enable(codec, nid, dev_id);
2493         }
2494 }
2495
2496 /* set up / clear component notifier dynamically */
2497 static void generic_acomp_notifier_set(struct drm_audio_component *acomp,
2498                                        bool use_acomp)
2499 {
2500         struct hdmi_spec *spec;
2501         int i;
2502
2503         spec = container_of(acomp->audio_ops, struct hdmi_spec, drm_audio_ops);
2504         mutex_lock(&spec->bind_lock);
2505         spec->use_acomp_notifier = use_acomp;
2506         spec->codec->relaxed_resume = use_acomp;
2507         /* reprogram each jack detection logic depending on the notifier */
2508         if (spec->use_jack_detect) {
2509                 for (i = 0; i < spec->num_pins; i++)
2510                         reprogram_jack_detect(spec->codec,
2511                                               get_pin(spec, i)->pin_nid,
2512                                               get_pin(spec, i)->dev_id,
2513                                               use_acomp);
2514         }
2515         mutex_unlock(&spec->bind_lock);
2516 }
2517
2518 /* enable / disable the notifier via master bind / unbind */
2519 static int generic_acomp_master_bind(struct device *dev,
2520                                      struct drm_audio_component *acomp)
2521 {
2522         generic_acomp_notifier_set(acomp, true);
2523         return 0;
2524 }
2525
2526 static void generic_acomp_master_unbind(struct device *dev,
2527                                         struct drm_audio_component *acomp)
2528 {
2529         generic_acomp_notifier_set(acomp, false);
2530 }
2531
2532 /* check whether both HD-audio and DRM PCI devices belong to the same bus */
2533 static int match_bound_vga(struct device *dev, int subtype, void *data)
2534 {
2535         struct hdac_bus *bus = data;
2536         struct pci_dev *pci, *master;
2537
2538         if (!dev_is_pci(dev) || !dev_is_pci(bus->dev))
2539                 return 0;
2540         master = to_pci_dev(bus->dev);
2541         pci = to_pci_dev(dev);
2542         return master->bus == pci->bus;
2543 }
2544
2545 /* audio component notifier for AMD/Nvidia HDMI codecs */
2546 static void generic_acomp_pin_eld_notify(void *audio_ptr, int port, int dev_id)
2547 {
2548         struct hda_codec *codec = audio_ptr;
2549         struct hdmi_spec *spec = codec->spec;
2550         hda_nid_t pin_nid = spec->port2pin(codec, port);
2551
2552         if (!pin_nid)
2553                 return;
2554         if (get_wcaps_type(get_wcaps(codec, pin_nid)) != AC_WID_PIN)
2555                 return;
2556         /* skip notification during system suspend (but not in runtime PM);
2557          * the state will be updated at resume
2558          */
2559         if (snd_power_get_state(codec->card) != SNDRV_CTL_POWER_D0)
2560                 return;
2561         /* ditto during suspend/resume process itself */
2562         if (snd_hdac_is_in_pm(&codec->core))
2563                 return;
2564
2565         check_presence_and_report(codec, pin_nid, dev_id);
2566 }
2567
2568 /* set up the private drm_audio_ops from the template */
2569 static void setup_drm_audio_ops(struct hda_codec *codec,
2570                                 const struct drm_audio_component_audio_ops *ops)
2571 {
2572         struct hdmi_spec *spec = codec->spec;
2573
2574         spec->drm_audio_ops.audio_ptr = codec;
2575         /* intel_audio_codec_enable() or intel_audio_codec_disable()
2576          * will call pin_eld_notify with using audio_ptr pointer
2577          * We need make sure audio_ptr is really setup
2578          */
2579         wmb();
2580         spec->drm_audio_ops.pin2port = ops->pin2port;
2581         spec->drm_audio_ops.pin_eld_notify = ops->pin_eld_notify;
2582         spec->drm_audio_ops.master_bind = ops->master_bind;
2583         spec->drm_audio_ops.master_unbind = ops->master_unbind;
2584 }
2585
2586 /* initialize the generic HDMI audio component */
2587 static void generic_acomp_init(struct hda_codec *codec,
2588                                const struct drm_audio_component_audio_ops *ops,
2589                                int (*port2pin)(struct hda_codec *, int))
2590 {
2591         struct hdmi_spec *spec = codec->spec;
2592
2593         spec->port2pin = port2pin;
2594         setup_drm_audio_ops(codec, ops);
2595         if (!snd_hdac_acomp_init(&codec->bus->core, &spec->drm_audio_ops,
2596                                  match_bound_vga, 0)) {
2597                 spec->acomp_registered = true;
2598                 codec->bus->keep_power = 0;
2599         }
2600 }
2601
2602 /*
2603  * Intel codec parsers and helpers
2604  */
2605
2606 static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
2607                                              hda_nid_t nid)
2608 {
2609         struct hdmi_spec *spec = codec->spec;
2610         hda_nid_t conns[4];
2611         int nconns;
2612
2613         nconns = snd_hda_get_raw_connections(codec, nid, conns,
2614                                              ARRAY_SIZE(conns));
2615         if (nconns == spec->num_cvts &&
2616             !memcmp(conns, spec->cvt_nids, spec->num_cvts * sizeof(hda_nid_t)))
2617                 return;
2618
2619         /* override pins connection list */
2620         codec_dbg(codec, "hdmi: haswell: override pin connection 0x%x\n", nid);
2621         snd_hda_override_conn_list(codec, nid, spec->num_cvts, spec->cvt_nids);
2622 }
2623
2624 #define INTEL_GET_VENDOR_VERB   0xf81
2625 #define INTEL_SET_VENDOR_VERB   0x781
2626 #define INTEL_EN_DP12           0x02    /* enable DP 1.2 features */
2627 #define INTEL_EN_ALL_PIN_CVTS   0x01    /* enable 2nd & 3rd pins and convertors */
2628
2629 static void intel_haswell_enable_all_pins(struct hda_codec *codec,
2630                                           bool update_tree)
2631 {
2632         unsigned int vendor_param;
2633         struct hdmi_spec *spec = codec->spec;
2634
2635         vendor_param = snd_hda_codec_read(codec, spec->vendor_nid, 0,
2636                                 INTEL_GET_VENDOR_VERB, 0);
2637         if (vendor_param == -1 || vendor_param & INTEL_EN_ALL_PIN_CVTS)
2638                 return;
2639
2640         vendor_param |= INTEL_EN_ALL_PIN_CVTS;
2641         vendor_param = snd_hda_codec_read(codec, spec->vendor_nid, 0,
2642                                 INTEL_SET_VENDOR_VERB, vendor_param);
2643         if (vendor_param == -1)
2644                 return;
2645
2646         if (update_tree)
2647                 snd_hda_codec_update_widgets(codec);
2648 }
2649
2650 static void intel_haswell_fixup_enable_dp12(struct hda_codec *codec)
2651 {
2652         unsigned int vendor_param;
2653         struct hdmi_spec *spec = codec->spec;
2654
2655         vendor_param = snd_hda_codec_read(codec, spec->vendor_nid, 0,
2656                                 INTEL_GET_VENDOR_VERB, 0);
2657         if (vendor_param == -1 || vendor_param & INTEL_EN_DP12)
2658                 return;
2659
2660         /* enable DP1.2 mode */
2661         vendor_param |= INTEL_EN_DP12;
2662         snd_hdac_regmap_add_vendor_verb(&codec->core, INTEL_SET_VENDOR_VERB);
2663         snd_hda_codec_write_cache(codec, spec->vendor_nid, 0,
2664                                 INTEL_SET_VENDOR_VERB, vendor_param);
2665 }
2666
2667 /* Haswell needs to re-issue the vendor-specific verbs before turning to D0.
2668  * Otherwise you may get severe h/w communication errors.
2669  */
2670 static void haswell_set_power_state(struct hda_codec *codec, hda_nid_t fg,
2671                                 unsigned int power_state)
2672 {
2673         if (power_state == AC_PWRST_D0) {
2674                 intel_haswell_enable_all_pins(codec, false);
2675                 intel_haswell_fixup_enable_dp12(codec);
2676         }
2677
2678         snd_hda_codec_read(codec, fg, 0, AC_VERB_SET_POWER_STATE, power_state);
2679         snd_hda_codec_set_power_to_all(codec, fg, power_state);
2680 }
2681
2682 /* There is a fixed mapping between audio pin node and display port.
2683  * on SNB, IVY, HSW, BSW, SKL, BXT, KBL:
2684  * Pin Widget 5 - PORT B (port = 1 in i915 driver)
2685  * Pin Widget 6 - PORT C (port = 2 in i915 driver)
2686  * Pin Widget 7 - PORT D (port = 3 in i915 driver)
2687  *
2688  * on VLV, ILK:
2689  * Pin Widget 4 - PORT B (port = 1 in i915 driver)
2690  * Pin Widget 5 - PORT C (port = 2 in i915 driver)
2691  * Pin Widget 6 - PORT D (port = 3 in i915 driver)
2692  */
2693 static int intel_base_nid(struct hda_codec *codec)
2694 {
2695         switch (codec->core.vendor_id) {
2696         case 0x80860054: /* ILK */
2697         case 0x80862804: /* ILK */
2698         case 0x80862882: /* VLV */
2699                 return 4;
2700         default:
2701                 return 5;
2702         }
2703 }
2704
2705 static int intel_pin2port(void *audio_ptr, int pin_nid)
2706 {
2707         struct hda_codec *codec = audio_ptr;
2708         struct hdmi_spec *spec = codec->spec;
2709         int base_nid, i;
2710
2711         if (!spec->port_num) {
2712                 base_nid = intel_base_nid(codec);
2713                 if (WARN_ON(pin_nid < base_nid || pin_nid >= base_nid + 3))
2714                         return -1;
2715                 return pin_nid - base_nid + 1;
2716         }
2717
2718         /*
2719          * looking for the pin number in the mapping table and return
2720          * the index which indicate the port number
2721          */
2722         for (i = 0; i < spec->port_num; i++) {
2723                 if (pin_nid == spec->port_map[i])
2724                         return i;
2725         }
2726
2727         codec_info(codec, "Can't find the HDMI/DP port for pin %d\n", pin_nid);
2728         return -1;
2729 }
2730
2731 static int intel_port2pin(struct hda_codec *codec, int port)
2732 {
2733         struct hdmi_spec *spec = codec->spec;
2734
2735         if (!spec->port_num) {
2736                 /* we assume only from port-B to port-D */
2737                 if (port < 1 || port > 3)
2738                         return 0;
2739                 return port + intel_base_nid(codec) - 1;
2740         }
2741
2742         if (port < 0 || port >= spec->port_num)
2743                 return 0;
2744         return spec->port_map[port];
2745 }
2746
2747 static void intel_pin_eld_notify(void *audio_ptr, int port, int pipe)
2748 {
2749         struct hda_codec *codec = audio_ptr;
2750         int pin_nid;
2751         int dev_id = pipe;
2752
2753         pin_nid = intel_port2pin(codec, port);
2754         if (!pin_nid)
2755                 return;
2756         /* skip notification during system suspend (but not in runtime PM);
2757          * the state will be updated at resume
2758          */
2759         if (snd_power_get_state(codec->card) != SNDRV_CTL_POWER_D0)
2760                 return;
2761         /* ditto during suspend/resume process itself */
2762         if (snd_hdac_is_in_pm(&codec->core))
2763                 return;
2764
2765         snd_hdac_i915_set_bclk(&codec->bus->core);
2766         check_presence_and_report(codec, pin_nid, dev_id);
2767 }
2768
2769 static const struct drm_audio_component_audio_ops intel_audio_ops = {
2770         .pin2port = intel_pin2port,
2771         .pin_eld_notify = intel_pin_eld_notify,
2772 };
2773
2774 /* register i915 component pin_eld_notify callback */
2775 static void register_i915_notifier(struct hda_codec *codec)
2776 {
2777         struct hdmi_spec *spec = codec->spec;
2778
2779         spec->use_acomp_notifier = true;
2780         spec->port2pin = intel_port2pin;
2781         setup_drm_audio_ops(codec, &intel_audio_ops);
2782         snd_hdac_acomp_register_notifier(&codec->bus->core,
2783                                         &spec->drm_audio_ops);
2784         /* no need for forcible resume for jack check thanks to notifier */
2785         codec->relaxed_resume = 1;
2786 }
2787
2788 /* setup_stream ops override for HSW+ */
2789 static int i915_hsw_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
2790                                  hda_nid_t pin_nid, int dev_id, u32 stream_tag,
2791                                  int format)
2792 {
2793         haswell_verify_D0(codec, cvt_nid, pin_nid);
2794         return hdmi_setup_stream(codec, cvt_nid, pin_nid, dev_id,
2795                                  stream_tag, format);
2796 }
2797
2798 /* pin_cvt_fixup ops override for HSW+ and VLV+ */
2799 static void i915_pin_cvt_fixup(struct hda_codec *codec,
2800                                struct hdmi_spec_per_pin *per_pin,
2801                                hda_nid_t cvt_nid)
2802 {
2803         if (per_pin) {
2804                 snd_hda_set_dev_select(codec, per_pin->pin_nid,
2805                                per_pin->dev_id);
2806                 intel_verify_pin_cvt_connect(codec, per_pin);
2807                 intel_not_share_assigned_cvt(codec, per_pin->pin_nid,
2808                                      per_pin->dev_id, per_pin->mux_idx);
2809         } else {
2810                 intel_not_share_assigned_cvt_nid(codec, 0, 0, cvt_nid);
2811         }
2812 }
2813
2814 /* precondition and allocation for Intel codecs */
2815 static int alloc_intel_hdmi(struct hda_codec *codec)
2816 {
2817         int err;
2818
2819         /* requires i915 binding */
2820         if (!codec->bus->core.audio_component) {
2821                 codec_info(codec, "No i915 binding for Intel HDMI/DP codec\n");
2822                 /* set probe_id here to prevent generic fallback binding */
2823                 codec->probe_id = HDA_CODEC_ID_SKIP_PROBE;
2824                 return -ENODEV;
2825         }
2826
2827         err = alloc_generic_hdmi(codec);
2828         if (err < 0)
2829                 return err;
2830         /* no need to handle unsol events */
2831         codec->patch_ops.unsol_event = NULL;
2832         return 0;
2833 }
2834
2835 /* parse and post-process for Intel codecs */
2836 static int parse_intel_hdmi(struct hda_codec *codec)
2837 {
2838         int err;
2839
2840         err = hdmi_parse_codec(codec);
2841         if (err < 0) {
2842                 generic_spec_free(codec);
2843                 return err;
2844         }
2845
2846         generic_hdmi_init_per_pins(codec);
2847         register_i915_notifier(codec);
2848         return 0;
2849 }
2850
2851 /* Intel Haswell and onwards; audio component with eld notifier */
2852 static int intel_hsw_common_init(struct hda_codec *codec, hda_nid_t vendor_nid,
2853                                  const int *port_map, int port_num)
2854 {
2855         struct hdmi_spec *spec;
2856         int err;
2857
2858         err = alloc_intel_hdmi(codec);
2859         if (err < 0)
2860                 return err;
2861         spec = codec->spec;
2862         codec->dp_mst = true;
2863         spec->dyn_pcm_assign = true;
2864         spec->vendor_nid = vendor_nid;
2865         spec->port_map = port_map;
2866         spec->port_num = port_num;
2867         spec->intel_hsw_fixup = true;
2868
2869         intel_haswell_enable_all_pins(codec, true);
2870         intel_haswell_fixup_enable_dp12(codec);
2871
2872         codec->display_power_control = 1;
2873
2874         codec->patch_ops.set_power_state = haswell_set_power_state;
2875         codec->depop_delay = 0;
2876         codec->auto_runtime_pm = 1;
2877
2878         spec->ops.setup_stream = i915_hsw_setup_stream;
2879         spec->ops.pin_cvt_fixup = i915_pin_cvt_fixup;
2880
2881         return parse_intel_hdmi(codec);
2882 }
2883
2884 static int patch_i915_hsw_hdmi(struct hda_codec *codec)
2885 {
2886         return intel_hsw_common_init(codec, 0x08, NULL, 0);
2887 }
2888
2889 static int patch_i915_glk_hdmi(struct hda_codec *codec)
2890 {
2891         return intel_hsw_common_init(codec, 0x0b, NULL, 0);
2892 }
2893
2894 static int patch_i915_icl_hdmi(struct hda_codec *codec)
2895 {
2896         /*
2897          * pin to port mapping table where the value indicate the pin number and
2898          * the index indicate the port number.
2899          */
2900         static const int map[] = {0x0, 0x4, 0x6, 0x8, 0xa, 0xb};
2901
2902         return intel_hsw_common_init(codec, 0x02, map, ARRAY_SIZE(map));
2903 }
2904
2905 static int patch_i915_tgl_hdmi(struct hda_codec *codec)
2906 {
2907         /*
2908          * pin to port mapping table where the value indicate the pin number and
2909          * the index indicate the port number.
2910          */
2911         static const int map[] = {0x4, 0x6, 0x8, 0xa, 0xb, 0xc, 0xd, 0xe, 0xf};
2912
2913         return intel_hsw_common_init(codec, 0x02, map, ARRAY_SIZE(map));
2914 }
2915
2916 /* Intel Baytrail and Braswell; with eld notifier */
2917 static int patch_i915_byt_hdmi(struct hda_codec *codec)
2918 {
2919         struct hdmi_spec *spec;
2920         int err;
2921
2922         err = alloc_intel_hdmi(codec);
2923         if (err < 0)
2924                 return err;
2925         spec = codec->spec;
2926
2927         /* For Valleyview/Cherryview, only the display codec is in the display
2928          * power well and can use link_power ops to request/release the power.
2929          */
2930         codec->display_power_control = 1;
2931
2932         codec->depop_delay = 0;
2933         codec->auto_runtime_pm = 1;
2934
2935         spec->ops.pin_cvt_fixup = i915_pin_cvt_fixup;
2936
2937         return parse_intel_hdmi(codec);
2938 }
2939
2940 /* Intel IronLake, SandyBridge and IvyBridge; with eld notifier */
2941 static int patch_i915_cpt_hdmi(struct hda_codec *codec)
2942 {
2943         int err;
2944
2945         err = alloc_intel_hdmi(codec);
2946         if (err < 0)
2947                 return err;
2948         return parse_intel_hdmi(codec);
2949 }
2950
2951 /*
2952  * Shared non-generic implementations
2953  */
2954
2955 static int simple_playback_build_pcms(struct hda_codec *codec)
2956 {
2957         struct hdmi_spec *spec = codec->spec;
2958         struct hda_pcm *info;
2959         unsigned int chans;
2960         struct hda_pcm_stream *pstr;
2961         struct hdmi_spec_per_cvt *per_cvt;
2962
2963         per_cvt = get_cvt(spec, 0);
2964         chans = get_wcaps(codec, per_cvt->cvt_nid);
2965         chans = get_wcaps_channels(chans);
2966
2967         info = snd_hda_codec_pcm_new(codec, "HDMI 0");
2968         if (!info)
2969                 return -ENOMEM;
2970         spec->pcm_rec[0].pcm = info;
2971         info->pcm_type = HDA_PCM_TYPE_HDMI;
2972         pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
2973         *pstr = spec->pcm_playback;
2974         pstr->nid = per_cvt->cvt_nid;
2975         if (pstr->channels_max <= 2 && chans && chans <= 16)
2976                 pstr->channels_max = chans;
2977
2978         return 0;
2979 }
2980
2981 /* unsolicited event for jack sensing */
2982 static void simple_hdmi_unsol_event(struct hda_codec *codec,
2983                                     unsigned int res)
2984 {
2985         snd_hda_jack_set_dirty_all(codec);
2986         snd_hda_jack_report_sync(codec);
2987 }
2988
2989 /* generic_hdmi_build_jack can be used for simple_hdmi, too,
2990  * as long as spec->pins[] is set correctly
2991  */
2992 #define simple_hdmi_build_jack  generic_hdmi_build_jack
2993
2994 static int simple_playback_build_controls(struct hda_codec *codec)
2995 {
2996         struct hdmi_spec *spec = codec->spec;
2997         struct hdmi_spec_per_cvt *per_cvt;
2998         int err;
2999
3000         per_cvt = get_cvt(spec, 0);
3001         err = snd_hda_create_dig_out_ctls(codec, per_cvt->cvt_nid,
3002                                           per_cvt->cvt_nid,
3003                                           HDA_PCM_TYPE_HDMI);
3004         if (err < 0)
3005                 return err;
3006         return simple_hdmi_build_jack(codec, 0);
3007 }
3008
3009 static int simple_playback_init(struct hda_codec *codec)
3010 {
3011         struct hdmi_spec *spec = codec->spec;
3012         struct hdmi_spec_per_pin *per_pin = get_pin(spec, 0);
3013         hda_nid_t pin = per_pin->pin_nid;
3014
3015         snd_hda_codec_write(codec, pin, 0,
3016                             AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
3017         /* some codecs require to unmute the pin */
3018         if (get_wcaps(codec, pin) & AC_WCAP_OUT_AMP)
3019                 snd_hda_codec_write(codec, pin, 0, AC_VERB_SET_AMP_GAIN_MUTE,
3020                                     AMP_OUT_UNMUTE);
3021         snd_hda_jack_detect_enable(codec, pin, per_pin->dev_id);
3022         return 0;
3023 }
3024
3025 static void simple_playback_free(struct hda_codec *codec)
3026 {
3027         struct hdmi_spec *spec = codec->spec;
3028
3029         hdmi_array_free(spec);
3030         kfree(spec);
3031 }
3032
3033 /*
3034  * Nvidia specific implementations
3035  */
3036
3037 #define Nv_VERB_SET_Channel_Allocation          0xF79
3038 #define Nv_VERB_SET_Info_Frame_Checksum         0xF7A
3039 #define Nv_VERB_SET_Audio_Protection_On         0xF98
3040 #define Nv_VERB_SET_Audio_Protection_Off        0xF99
3041
3042 #define nvhdmi_master_con_nid_7x        0x04
3043 #define nvhdmi_master_pin_nid_7x        0x05
3044
3045 static const hda_nid_t nvhdmi_con_nids_7x[4] = {
3046         /*front, rear, clfe, rear_surr */
3047         0x6, 0x8, 0xa, 0xc,
3048 };
3049
3050 static const struct hda_verb nvhdmi_basic_init_7x_2ch[] = {
3051         /* set audio protect on */
3052         { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
3053         /* enable digital output on pin widget */
3054         { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3055         {} /* terminator */
3056 };
3057
3058 static const struct hda_verb nvhdmi_basic_init_7x_8ch[] = {
3059         /* set audio protect on */
3060         { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
3061         /* enable digital output on pin widget */
3062         { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3063         { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3064         { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3065         { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3066         { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3067         {} /* terminator */
3068 };
3069
3070 #ifdef LIMITED_RATE_FMT_SUPPORT
3071 /* support only the safe format and rate */
3072 #define SUPPORTED_RATES         SNDRV_PCM_RATE_48000
3073 #define SUPPORTED_MAXBPS        16
3074 #define SUPPORTED_FORMATS       SNDRV_PCM_FMTBIT_S16_LE
3075 #else
3076 /* support all rates and formats */
3077 #define SUPPORTED_RATES \
3078         (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
3079         SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
3080          SNDRV_PCM_RATE_192000)
3081 #define SUPPORTED_MAXBPS        24
3082 #define SUPPORTED_FORMATS \
3083         (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
3084 #endif
3085
3086 static int nvhdmi_7x_init_2ch(struct hda_codec *codec)
3087 {
3088         snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_2ch);
3089         return 0;
3090 }
3091
3092 static int nvhdmi_7x_init_8ch(struct hda_codec *codec)
3093 {
3094         snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_8ch);
3095         return 0;
3096 }
3097
3098 static const unsigned int channels_2_6_8[] = {
3099         2, 6, 8
3100 };
3101
3102 static const unsigned int channels_2_8[] = {
3103         2, 8
3104 };
3105
3106 static const struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels = {
3107         .count = ARRAY_SIZE(channels_2_6_8),
3108         .list = channels_2_6_8,
3109         .mask = 0,
3110 };
3111
3112 static const struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels = {
3113         .count = ARRAY_SIZE(channels_2_8),
3114         .list = channels_2_8,
3115         .mask = 0,
3116 };
3117
3118 static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo,
3119                                     struct hda_codec *codec,
3120                                     struct snd_pcm_substream *substream)
3121 {
3122         struct hdmi_spec *spec = codec->spec;
3123         const struct snd_pcm_hw_constraint_list *hw_constraints_channels = NULL;
3124
3125         switch (codec->preset->vendor_id) {
3126         case 0x10de0002:
3127         case 0x10de0003:
3128         case 0x10de0005:
3129         case 0x10de0006:
3130                 hw_constraints_channels = &hw_constraints_2_8_channels;
3131                 break;
3132         case 0x10de0007:
3133                 hw_constraints_channels = &hw_constraints_2_6_8_channels;
3134                 break;
3135         default:
3136                 break;
3137         }
3138
3139         if (hw_constraints_channels != NULL) {
3140                 snd_pcm_hw_constraint_list(substream->runtime, 0,
3141                                 SNDRV_PCM_HW_PARAM_CHANNELS,
3142                                 hw_constraints_channels);
3143         } else {
3144                 snd_pcm_hw_constraint_step(substream->runtime, 0,
3145                                            SNDRV_PCM_HW_PARAM_CHANNELS, 2);
3146         }
3147
3148         return snd_hda_multi_out_dig_open(codec, &spec->multiout);
3149 }
3150
3151 static int simple_playback_pcm_close(struct hda_pcm_stream *hinfo,
3152                                      struct hda_codec *codec,
3153                                      struct snd_pcm_substream *substream)
3154 {
3155         struct hdmi_spec *spec = codec->spec;
3156         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
3157 }
3158
3159 static int simple_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
3160                                        struct hda_codec *codec,
3161                                        unsigned int stream_tag,
3162                                        unsigned int format,
3163                                        struct snd_pcm_substream *substream)
3164 {
3165         struct hdmi_spec *spec = codec->spec;
3166         return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
3167                                              stream_tag, format, substream);
3168 }
3169
3170 static const struct hda_pcm_stream simple_pcm_playback = {
3171         .substreams = 1,
3172         .channels_min = 2,
3173         .channels_max = 2,
3174         .ops = {
3175                 .open = simple_playback_pcm_open,
3176                 .close = simple_playback_pcm_close,
3177                 .prepare = simple_playback_pcm_prepare
3178         },
3179 };
3180
3181 static const struct hda_codec_ops simple_hdmi_patch_ops = {
3182         .build_controls = simple_playback_build_controls,
3183         .build_pcms = simple_playback_build_pcms,
3184         .init = simple_playback_init,
3185         .free = simple_playback_free,
3186         .unsol_event = simple_hdmi_unsol_event,
3187 };
3188
3189 static int patch_simple_hdmi(struct hda_codec *codec,
3190                              hda_nid_t cvt_nid, hda_nid_t pin_nid)
3191 {
3192         struct hdmi_spec *spec;
3193         struct hdmi_spec_per_cvt *per_cvt;
3194         struct hdmi_spec_per_pin *per_pin;
3195
3196         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3197         if (!spec)
3198                 return -ENOMEM;
3199
3200         spec->codec = codec;
3201         codec->spec = spec;
3202         hdmi_array_init(spec, 1);
3203
3204         spec->multiout.num_dacs = 0;  /* no analog */
3205         spec->multiout.max_channels = 2;
3206         spec->multiout.dig_out_nid = cvt_nid;
3207         spec->num_cvts = 1;
3208         spec->num_pins = 1;
3209         per_pin = snd_array_new(&spec->pins);
3210         per_cvt = snd_array_new(&spec->cvts);
3211         if (!per_pin || !per_cvt) {
3212                 simple_playback_free(codec);
3213                 return -ENOMEM;
3214         }
3215         per_cvt->cvt_nid = cvt_nid;
3216         per_pin->pin_nid = pin_nid;
3217         spec->pcm_playback = simple_pcm_playback;
3218
3219         codec->patch_ops = simple_hdmi_patch_ops;
3220
3221         return 0;
3222 }
3223
3224 static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec *codec,
3225                                                     int channels)
3226 {
3227         unsigned int chanmask;
3228         int chan = channels ? (channels - 1) : 1;
3229
3230         switch (channels) {
3231         default:
3232         case 0:
3233         case 2:
3234                 chanmask = 0x00;
3235                 break;
3236         case 4:
3237                 chanmask = 0x08;
3238                 break;
3239         case 6:
3240                 chanmask = 0x0b;
3241                 break;
3242         case 8:
3243                 chanmask = 0x13;
3244                 break;
3245         }
3246
3247         /* Set the audio infoframe channel allocation and checksum fields.  The
3248          * channel count is computed implicitly by the hardware. */
3249         snd_hda_codec_write(codec, 0x1, 0,
3250                         Nv_VERB_SET_Channel_Allocation, chanmask);
3251
3252         snd_hda_codec_write(codec, 0x1, 0,
3253                         Nv_VERB_SET_Info_Frame_Checksum,
3254                         (0x71 - chan - chanmask));
3255 }
3256
3257 static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream *hinfo,
3258                                    struct hda_codec *codec,
3259                                    struct snd_pcm_substream *substream)
3260 {
3261         struct hdmi_spec *spec = codec->spec;
3262         int i;
3263
3264         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x,
3265                         0, AC_VERB_SET_CHANNEL_STREAMID, 0);
3266         for (i = 0; i < 4; i++) {
3267                 /* set the stream id */
3268                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
3269                                 AC_VERB_SET_CHANNEL_STREAMID, 0);
3270                 /* set the stream format */
3271                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
3272                                 AC_VERB_SET_STREAM_FORMAT, 0);
3273         }
3274
3275         /* The audio hardware sends a channel count of 0x7 (8ch) when all the
3276          * streams are disabled. */
3277         nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
3278
3279         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
3280 }
3281
3282 static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream *hinfo,
3283                                      struct hda_codec *codec,
3284                                      unsigned int stream_tag,
3285                                      unsigned int format,
3286                                      struct snd_pcm_substream *substream)
3287 {
3288         int chs;
3289         unsigned int dataDCC2, channel_id;
3290         int i;
3291         struct hdmi_spec *spec = codec->spec;
3292         struct hda_spdif_out *spdif;
3293         struct hdmi_spec_per_cvt *per_cvt;
3294
3295         mutex_lock(&codec->spdif_mutex);
3296         per_cvt = get_cvt(spec, 0);
3297         spdif = snd_hda_spdif_out_of_nid(codec, per_cvt->cvt_nid);
3298
3299         chs = substream->runtime->channels;
3300
3301         dataDCC2 = 0x2;
3302
3303         /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
3304         if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE))
3305                 snd_hda_codec_write(codec,
3306                                 nvhdmi_master_con_nid_7x,
3307                                 0,
3308                                 AC_VERB_SET_DIGI_CONVERT_1,
3309                                 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
3310
3311         /* set the stream id */
3312         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
3313                         AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0);
3314
3315         /* set the stream format */
3316         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
3317                         AC_VERB_SET_STREAM_FORMAT, format);
3318
3319         /* turn on again (if needed) */
3320         /* enable and set the channel status audio/data flag */
3321         if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) {
3322                 snd_hda_codec_write(codec,
3323                                 nvhdmi_master_con_nid_7x,
3324                                 0,
3325                                 AC_VERB_SET_DIGI_CONVERT_1,
3326                                 spdif->ctls & 0xff);
3327                 snd_hda_codec_write(codec,
3328                                 nvhdmi_master_con_nid_7x,
3329                                 0,
3330                                 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
3331         }
3332
3333         for (i = 0; i < 4; i++) {
3334                 if (chs == 2)
3335                         channel_id = 0;
3336                 else
3337                         channel_id = i * 2;
3338
3339                 /* turn off SPDIF once;
3340                  *otherwise the IEC958 bits won't be updated
3341                  */
3342                 if (codec->spdif_status_reset &&
3343                 (spdif->ctls & AC_DIG1_ENABLE))
3344                         snd_hda_codec_write(codec,
3345                                 nvhdmi_con_nids_7x[i],
3346                                 0,
3347                                 AC_VERB_SET_DIGI_CONVERT_1,
3348                                 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
3349                 /* set the stream id */
3350                 snd_hda_codec_write(codec,
3351                                 nvhdmi_con_nids_7x[i],
3352                                 0,
3353                                 AC_VERB_SET_CHANNEL_STREAMID,
3354                                 (stream_tag << 4) | channel_id);
3355                 /* set the stream format */
3356                 snd_hda_codec_write(codec,
3357                                 nvhdmi_con_nids_7x[i],
3358                                 0,
3359                                 AC_VERB_SET_STREAM_FORMAT,
3360                                 format);
3361                 /* turn on again (if needed) */
3362                 /* enable and set the channel status audio/data flag */
3363                 if (codec->spdif_status_reset &&
3364                 (spdif->ctls & AC_DIG1_ENABLE)) {
3365                         snd_hda_codec_write(codec,
3366                                         nvhdmi_con_nids_7x[i],
3367                                         0,
3368                                         AC_VERB_SET_DIGI_CONVERT_1,
3369                                         spdif->ctls & 0xff);
3370                         snd_hda_codec_write(codec,
3371                                         nvhdmi_con_nids_7x[i],
3372                                         0,
3373                                         AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
3374                 }
3375         }
3376
3377         nvhdmi_8ch_7x_set_info_frame_parameters(codec, chs);
3378
3379         mutex_unlock(&codec->spdif_mutex);
3380         return 0;
3381 }
3382
3383 static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x = {
3384         .substreams = 1,
3385         .channels_min = 2,
3386         .channels_max = 8,
3387         .nid = nvhdmi_master_con_nid_7x,
3388         .rates = SUPPORTED_RATES,
3389         .maxbps = SUPPORTED_MAXBPS,
3390         .formats = SUPPORTED_FORMATS,
3391         .ops = {
3392                 .open = simple_playback_pcm_open,
3393                 .close = nvhdmi_8ch_7x_pcm_close,
3394                 .prepare = nvhdmi_8ch_7x_pcm_prepare
3395         },
3396 };
3397
3398 static int patch_nvhdmi_2ch(struct hda_codec *codec)
3399 {
3400         struct hdmi_spec *spec;
3401         int err = patch_simple_hdmi(codec, nvhdmi_master_con_nid_7x,
3402                                     nvhdmi_master_pin_nid_7x);
3403         if (err < 0)
3404                 return err;
3405
3406         codec->patch_ops.init = nvhdmi_7x_init_2ch;
3407         /* override the PCM rates, etc, as the codec doesn't give full list */
3408         spec = codec->spec;
3409         spec->pcm_playback.rates = SUPPORTED_RATES;
3410         spec->pcm_playback.maxbps = SUPPORTED_MAXBPS;
3411         spec->pcm_playback.formats = SUPPORTED_FORMATS;
3412         return 0;
3413 }
3414
3415 static int nvhdmi_7x_8ch_build_pcms(struct hda_codec *codec)
3416 {
3417         struct hdmi_spec *spec = codec->spec;
3418         int err = simple_playback_build_pcms(codec);
3419         if (!err) {
3420                 struct hda_pcm *info = get_pcm_rec(spec, 0);
3421                 info->own_chmap = true;
3422         }
3423         return err;
3424 }
3425
3426 static int nvhdmi_7x_8ch_build_controls(struct hda_codec *codec)
3427 {
3428         struct hdmi_spec *spec = codec->spec;
3429         struct hda_pcm *info;
3430         struct snd_pcm_chmap *chmap;
3431         int err;
3432
3433         err = simple_playback_build_controls(codec);
3434         if (err < 0)
3435                 return err;
3436
3437         /* add channel maps */
3438         info = get_pcm_rec(spec, 0);
3439         err = snd_pcm_add_chmap_ctls(info->pcm,
3440                                      SNDRV_PCM_STREAM_PLAYBACK,
3441                                      snd_pcm_alt_chmaps, 8, 0, &chmap);
3442         if (err < 0)
3443                 return err;
3444         switch (codec->preset->vendor_id) {
3445         case 0x10de0002:
3446         case 0x10de0003:
3447         case 0x10de0005:
3448         case 0x10de0006:
3449                 chmap->channel_mask = (1U << 2) | (1U << 8);
3450                 break;
3451         case 0x10de0007:
3452                 chmap->channel_mask = (1U << 2) | (1U << 6) | (1U << 8);
3453         }
3454         return 0;
3455 }
3456
3457 static int patch_nvhdmi_8ch_7x(struct hda_codec *codec)
3458 {
3459         struct hdmi_spec *spec;
3460         int err = patch_nvhdmi_2ch(codec);
3461         if (err < 0)
3462                 return err;
3463         spec = codec->spec;
3464         spec->multiout.max_channels = 8;
3465         spec->pcm_playback = nvhdmi_pcm_playback_8ch_7x;
3466         codec->patch_ops.init = nvhdmi_7x_init_8ch;
3467         codec->patch_ops.build_pcms = nvhdmi_7x_8ch_build_pcms;
3468         codec->patch_ops.build_controls = nvhdmi_7x_8ch_build_controls;
3469
3470         /* Initialize the audio infoframe channel mask and checksum to something
3471          * valid */
3472         nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
3473
3474         return 0;
3475 }
3476
3477 /*
3478  * NVIDIA codecs ignore ASP mapping for 2ch - confirmed on:
3479  * - 0x10de0015
3480  * - 0x10de0040
3481  */
3482 static int nvhdmi_chmap_cea_alloc_validate_get_type(struct hdac_chmap *chmap,
3483                 struct hdac_cea_channel_speaker_allocation *cap, int channels)
3484 {
3485         if (cap->ca_index == 0x00 && channels == 2)
3486                 return SNDRV_CTL_TLVT_CHMAP_FIXED;
3487
3488         /* If the speaker allocation matches the channel count, it is OK. */
3489         if (cap->channels != channels)
3490                 return -1;
3491
3492         /* all channels are remappable freely */
3493         return SNDRV_CTL_TLVT_CHMAP_VAR;
3494 }
3495
3496 static int nvhdmi_chmap_validate(struct hdac_chmap *chmap,
3497                 int ca, int chs, unsigned char *map)
3498 {
3499         if (ca == 0x00 && (map[0] != SNDRV_CHMAP_FL || map[1] != SNDRV_CHMAP_FR))
3500                 return -EINVAL;
3501
3502         return 0;
3503 }
3504
3505 /* map from pin NID to port; port is 0-based */
3506 /* for Nvidia: assume widget NID starting from 4, with step 1 (4, 5, 6, ...) */
3507 static int nvhdmi_pin2port(void *audio_ptr, int pin_nid)
3508 {
3509         return pin_nid - 4;
3510 }
3511
3512 /* reverse-map from port to pin NID: see above */
3513 static int nvhdmi_port2pin(struct hda_codec *codec, int port)
3514 {
3515         return port + 4;
3516 }
3517
3518 static const struct drm_audio_component_audio_ops nvhdmi_audio_ops = {
3519         .pin2port = nvhdmi_pin2port,
3520         .pin_eld_notify = generic_acomp_pin_eld_notify,
3521         .master_bind = generic_acomp_master_bind,
3522         .master_unbind = generic_acomp_master_unbind,
3523 };
3524
3525 static int patch_nvhdmi(struct hda_codec *codec)
3526 {
3527         struct hdmi_spec *spec;
3528         int err;
3529
3530         err = alloc_generic_hdmi(codec);
3531         if (err < 0)
3532                 return err;
3533         codec->dp_mst = true;
3534
3535         spec = codec->spec;
3536         spec->dyn_pcm_assign = true;
3537
3538         err = hdmi_parse_codec(codec);
3539         if (err < 0) {
3540                 generic_spec_free(codec);
3541                 return err;
3542         }
3543
3544         generic_hdmi_init_per_pins(codec);
3545
3546         spec->dyn_pin_out = true;
3547
3548         spec->chmap.ops.chmap_cea_alloc_validate_get_type =
3549                 nvhdmi_chmap_cea_alloc_validate_get_type;
3550         spec->chmap.ops.chmap_validate = nvhdmi_chmap_validate;
3551
3552         codec->link_down_at_suspend = 1;
3553
3554         generic_acomp_init(codec, &nvhdmi_audio_ops, nvhdmi_port2pin);
3555
3556         return 0;
3557 }
3558
3559 static int patch_nvhdmi_legacy(struct hda_codec *codec)
3560 {
3561         struct hdmi_spec *spec;
3562         int err;
3563
3564         err = patch_generic_hdmi(codec);
3565         if (err)
3566                 return err;
3567
3568         spec = codec->spec;
3569         spec->dyn_pin_out = true;
3570
3571         spec->chmap.ops.chmap_cea_alloc_validate_get_type =
3572                 nvhdmi_chmap_cea_alloc_validate_get_type;
3573         spec->chmap.ops.chmap_validate = nvhdmi_chmap_validate;
3574
3575         codec->link_down_at_suspend = 1;
3576
3577         generic_acomp_init(codec, &nvhdmi_audio_ops, nvhdmi_port2pin);
3578
3579         return 0;
3580 }
3581
3582 /*
3583  * The HDA codec on NVIDIA Tegra contains two scratch registers that are
3584  * accessed using vendor-defined verbs. These registers can be used for
3585  * interoperability between the HDA and HDMI drivers.
3586  */
3587
3588 /* Audio Function Group node */
3589 #define NVIDIA_AFG_NID 0x01
3590
3591 /*
3592  * The SCRATCH0 register is used to notify the HDMI codec of changes in audio
3593  * format. On Tegra, bit 31 is used as a trigger that causes an interrupt to
3594  * be raised in the HDMI codec. The remainder of the bits is arbitrary. This
3595  * implementation stores the HDA format (see AC_FMT_*) in bits [15:0] and an
3596  * additional bit (at position 30) to signal the validity of the format.
3597  *
3598  * | 31      | 30    | 29  16 | 15   0 |
3599  * +---------+-------+--------+--------+
3600  * | TRIGGER | VALID | UNUSED | FORMAT |
3601  * +-----------------------------------|
3602  *
3603  * Note that for the trigger bit to take effect it needs to change value
3604  * (i.e. it needs to be toggled).
3605  */
3606 #define NVIDIA_GET_SCRATCH0             0xfa6
3607 #define NVIDIA_SET_SCRATCH0_BYTE0       0xfa7
3608 #define NVIDIA_SET_SCRATCH0_BYTE1       0xfa8
3609 #define NVIDIA_SET_SCRATCH0_BYTE2       0xfa9
3610 #define NVIDIA_SET_SCRATCH0_BYTE3       0xfaa
3611 #define NVIDIA_SCRATCH_TRIGGER (1 << 7)
3612 #define NVIDIA_SCRATCH_VALID   (1 << 6)
3613
3614 #define NVIDIA_GET_SCRATCH1             0xfab
3615 #define NVIDIA_SET_SCRATCH1_BYTE0       0xfac
3616 #define NVIDIA_SET_SCRATCH1_BYTE1       0xfad
3617 #define NVIDIA_SET_SCRATCH1_BYTE2       0xfae
3618 #define NVIDIA_SET_SCRATCH1_BYTE3       0xfaf
3619
3620 /*
3621  * The format parameter is the HDA audio format (see AC_FMT_*). If set to 0,
3622  * the format is invalidated so that the HDMI codec can be disabled.
3623  */
3624 static void tegra_hdmi_set_format(struct hda_codec *codec, unsigned int format)
3625 {
3626         unsigned int value;
3627
3628         /* bits [31:30] contain the trigger and valid bits */
3629         value = snd_hda_codec_read(codec, NVIDIA_AFG_NID, 0,
3630                                    NVIDIA_GET_SCRATCH0, 0);
3631         value = (value >> 24) & 0xff;
3632
3633         /* bits [15:0] are used to store the HDA format */
3634         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3635                             NVIDIA_SET_SCRATCH0_BYTE0,
3636                             (format >> 0) & 0xff);
3637         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3638                             NVIDIA_SET_SCRATCH0_BYTE1,
3639                             (format >> 8) & 0xff);
3640
3641         /* bits [16:24] are unused */
3642         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3643                             NVIDIA_SET_SCRATCH0_BYTE2, 0);
3644
3645         /*
3646          * Bit 30 signals that the data is valid and hence that HDMI audio can
3647          * be enabled.
3648          */
3649         if (format == 0)
3650                 value &= ~NVIDIA_SCRATCH_VALID;
3651         else
3652                 value |= NVIDIA_SCRATCH_VALID;
3653
3654         /*
3655          * Whenever the trigger bit is toggled, an interrupt is raised in the
3656          * HDMI codec. The HDMI driver will use that as trigger to update its
3657          * configuration.
3658          */
3659         value ^= NVIDIA_SCRATCH_TRIGGER;
3660
3661         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3662                             NVIDIA_SET_SCRATCH0_BYTE3, value);
3663 }
3664
3665 static int tegra_hdmi_pcm_prepare(struct hda_pcm_stream *hinfo,
3666                                   struct hda_codec *codec,
3667                                   unsigned int stream_tag,
3668                                   unsigned int format,
3669                                   struct snd_pcm_substream *substream)
3670 {
3671         int err;
3672
3673         err = generic_hdmi_playback_pcm_prepare(hinfo, codec, stream_tag,
3674                                                 format, substream);
3675         if (err < 0)
3676                 return err;
3677
3678         /* notify the HDMI codec of the format change */
3679         tegra_hdmi_set_format(codec, format);
3680
3681         return 0;
3682 }
3683
3684 static int tegra_hdmi_pcm_cleanup(struct hda_pcm_stream *hinfo,
3685                                   struct hda_codec *codec,
3686                                   struct snd_pcm_substream *substream)
3687 {
3688         /* invalidate the format in the HDMI codec */
3689         tegra_hdmi_set_format(codec, 0);
3690
3691         return generic_hdmi_playback_pcm_cleanup(hinfo, codec, substream);
3692 }
3693
3694 static struct hda_pcm *hda_find_pcm_by_type(struct hda_codec *codec, int type)
3695 {
3696         struct hdmi_spec *spec = codec->spec;
3697         unsigned int i;
3698
3699         for (i = 0; i < spec->num_pins; i++) {
3700                 struct hda_pcm *pcm = get_pcm_rec(spec, i);
3701
3702                 if (pcm->pcm_type == type)
3703                         return pcm;
3704         }
3705
3706         return NULL;
3707 }
3708
3709 static int tegra_hdmi_build_pcms(struct hda_codec *codec)
3710 {
3711         struct hda_pcm_stream *stream;
3712         struct hda_pcm *pcm;
3713         int err;
3714
3715         err = generic_hdmi_build_pcms(codec);
3716         if (err < 0)
3717                 return err;
3718
3719         pcm = hda_find_pcm_by_type(codec, HDA_PCM_TYPE_HDMI);
3720         if (!pcm)
3721                 return -ENODEV;
3722
3723         /*
3724          * Override ->prepare() and ->cleanup() operations to notify the HDMI
3725          * codec about format changes.
3726          */
3727         stream = &pcm->stream[SNDRV_PCM_STREAM_PLAYBACK];
3728         stream->ops.prepare = tegra_hdmi_pcm_prepare;
3729         stream->ops.cleanup = tegra_hdmi_pcm_cleanup;
3730
3731         return 0;
3732 }
3733
3734 static int patch_tegra_hdmi(struct hda_codec *codec)
3735 {
3736         int err;
3737
3738         err = patch_generic_hdmi(codec);
3739         if (err)
3740                 return err;
3741
3742         codec->patch_ops.build_pcms = tegra_hdmi_build_pcms;
3743
3744         return 0;
3745 }
3746
3747 /*
3748  * ATI/AMD-specific implementations
3749  */
3750
3751 #define is_amdhdmi_rev3_or_later(codec) \
3752         ((codec)->core.vendor_id == 0x1002aa01 && \
3753          ((codec)->core.revision_id & 0xff00) >= 0x0300)
3754 #define has_amd_full_remap_support(codec) is_amdhdmi_rev3_or_later(codec)
3755
3756 /* ATI/AMD specific HDA pin verbs, see the AMD HDA Verbs specification */
3757 #define ATI_VERB_SET_CHANNEL_ALLOCATION 0x771
3758 #define ATI_VERB_SET_DOWNMIX_INFO       0x772
3759 #define ATI_VERB_SET_MULTICHANNEL_01    0x777
3760 #define ATI_VERB_SET_MULTICHANNEL_23    0x778
3761 #define ATI_VERB_SET_MULTICHANNEL_45    0x779
3762 #define ATI_VERB_SET_MULTICHANNEL_67    0x77a
3763 #define ATI_VERB_SET_HBR_CONTROL        0x77c
3764 #define ATI_VERB_SET_MULTICHANNEL_1     0x785
3765 #define ATI_VERB_SET_MULTICHANNEL_3     0x786
3766 #define ATI_VERB_SET_MULTICHANNEL_5     0x787
3767 #define ATI_VERB_SET_MULTICHANNEL_7     0x788
3768 #define ATI_VERB_SET_MULTICHANNEL_MODE  0x789
3769 #define ATI_VERB_GET_CHANNEL_ALLOCATION 0xf71
3770 #define ATI_VERB_GET_DOWNMIX_INFO       0xf72
3771 #define ATI_VERB_GET_MULTICHANNEL_01    0xf77
3772 #define ATI_VERB_GET_MULTICHANNEL_23    0xf78
3773 #define ATI_VERB_GET_MULTICHANNEL_45    0xf79
3774 #define ATI_VERB_GET_MULTICHANNEL_67    0xf7a
3775 #define ATI_VERB_GET_HBR_CONTROL        0xf7c
3776 #define ATI_VERB_GET_MULTICHANNEL_1     0xf85
3777 #define ATI_VERB_GET_MULTICHANNEL_3     0xf86
3778 #define ATI_VERB_GET_MULTICHANNEL_5     0xf87
3779 #define ATI_VERB_GET_MULTICHANNEL_7     0xf88
3780 #define ATI_VERB_GET_MULTICHANNEL_MODE  0xf89
3781
3782 /* AMD specific HDA cvt verbs */
3783 #define ATI_VERB_SET_RAMP_RATE          0x770
3784 #define ATI_VERB_GET_RAMP_RATE          0xf70
3785
3786 #define ATI_OUT_ENABLE 0x1
3787
3788 #define ATI_MULTICHANNEL_MODE_PAIRED    0
3789 #define ATI_MULTICHANNEL_MODE_SINGLE    1
3790
3791 #define ATI_HBR_CAPABLE 0x01
3792 #define ATI_HBR_ENABLE 0x10
3793
3794 static int atihdmi_pin_get_eld(struct hda_codec *codec, hda_nid_t nid,
3795                                int dev_id, unsigned char *buf, int *eld_size)
3796 {
3797         WARN_ON(dev_id != 0);
3798         /* call hda_eld.c ATI/AMD-specific function */
3799         return snd_hdmi_get_eld_ati(codec, nid, buf, eld_size,
3800                                     is_amdhdmi_rev3_or_later(codec));
3801 }
3802
3803 static void atihdmi_pin_setup_infoframe(struct hda_codec *codec,
3804                                         hda_nid_t pin_nid, int dev_id, int ca,
3805                                         int active_channels, int conn_type)
3806 {
3807         WARN_ON(dev_id != 0);
3808         snd_hda_codec_write(codec, pin_nid, 0, ATI_VERB_SET_CHANNEL_ALLOCATION, ca);
3809 }
3810
3811 static int atihdmi_paired_swap_fc_lfe(int pos)
3812 {
3813         /*
3814          * ATI/AMD have automatic FC/LFE swap built-in
3815          * when in pairwise mapping mode.
3816          */
3817
3818         switch (pos) {
3819                 /* see channel_allocations[].speakers[] */
3820                 case 2: return 3;
3821                 case 3: return 2;
3822                 default: break;
3823         }
3824
3825         return pos;
3826 }
3827
3828 static int atihdmi_paired_chmap_validate(struct hdac_chmap *chmap,
3829                         int ca, int chs, unsigned char *map)
3830 {
3831         struct hdac_cea_channel_speaker_allocation *cap;
3832         int i, j;
3833
3834         /* check that only channel pairs need to be remapped on old pre-rev3 ATI/AMD */
3835
3836         cap = snd_hdac_get_ch_alloc_from_ca(ca);
3837         for (i = 0; i < chs; ++i) {
3838                 int mask = snd_hdac_chmap_to_spk_mask(map[i]);
3839                 bool ok = false;
3840                 bool companion_ok = false;
3841
3842                 if (!mask)
3843                         continue;
3844
3845                 for (j = 0 + i % 2; j < 8; j += 2) {
3846                         int chan_idx = 7 - atihdmi_paired_swap_fc_lfe(j);
3847                         if (cap->speakers[chan_idx] == mask) {
3848                                 /* channel is in a supported position */
3849                                 ok = true;
3850
3851                                 if (i % 2 == 0 && i + 1 < chs) {
3852                                         /* even channel, check the odd companion */
3853                                         int comp_chan_idx = 7 - atihdmi_paired_swap_fc_lfe(j + 1);
3854                                         int comp_mask_req = snd_hdac_chmap_to_spk_mask(map[i+1]);
3855                                         int comp_mask_act = cap->speakers[comp_chan_idx];
3856
3857                                         if (comp_mask_req == comp_mask_act)
3858                                                 companion_ok = true;
3859                                         else
3860                                                 return -EINVAL;
3861                                 }
3862                                 break;
3863                         }
3864                 }
3865
3866                 if (!ok)
3867                         return -EINVAL;
3868
3869                 if (companion_ok)
3870                         i++; /* companion channel already checked */
3871         }
3872
3873         return 0;
3874 }
3875
3876 static int atihdmi_pin_set_slot_channel(struct hdac_device *hdac,
3877                 hda_nid_t pin_nid, int hdmi_slot, int stream_channel)
3878 {
3879         struct hda_codec *codec = container_of(hdac, struct hda_codec, core);
3880         int verb;
3881         int ati_channel_setup = 0;
3882
3883         if (hdmi_slot > 7)
3884                 return -EINVAL;
3885
3886         if (!has_amd_full_remap_support(codec)) {
3887                 hdmi_slot = atihdmi_paired_swap_fc_lfe(hdmi_slot);
3888
3889                 /* In case this is an odd slot but without stream channel, do not
3890                  * disable the slot since the corresponding even slot could have a
3891                  * channel. In case neither have a channel, the slot pair will be
3892                  * disabled when this function is called for the even slot. */
3893                 if (hdmi_slot % 2 != 0 && stream_channel == 0xf)
3894                         return 0;
3895
3896                 hdmi_slot -= hdmi_slot % 2;
3897
3898                 if (stream_channel != 0xf)
3899                         stream_channel -= stream_channel % 2;
3900         }
3901
3902         verb = ATI_VERB_SET_MULTICHANNEL_01 + hdmi_slot/2 + (hdmi_slot % 2) * 0x00e;
3903
3904         /* ati_channel_setup format: [7..4] = stream_channel_id, [1] = mute, [0] = enable */
3905
3906         if (stream_channel != 0xf)
3907                 ati_channel_setup = (stream_channel << 4) | ATI_OUT_ENABLE;
3908
3909         return snd_hda_codec_write(codec, pin_nid, 0, verb, ati_channel_setup);
3910 }
3911
3912 static int atihdmi_pin_get_slot_channel(struct hdac_device *hdac,
3913                                 hda_nid_t pin_nid, int asp_slot)
3914 {
3915         struct hda_codec *codec = container_of(hdac, struct hda_codec, core);
3916         bool was_odd = false;
3917         int ati_asp_slot = asp_slot;
3918         int verb;
3919         int ati_channel_setup;
3920
3921         if (asp_slot > 7)
3922                 return -EINVAL;
3923
3924         if (!has_amd_full_remap_support(codec)) {
3925                 ati_asp_slot = atihdmi_paired_swap_fc_lfe(asp_slot);
3926                 if (ati_asp_slot % 2 != 0) {
3927                         ati_asp_slot -= 1;
3928                         was_odd = true;
3929                 }
3930         }
3931
3932         verb = ATI_VERB_GET_MULTICHANNEL_01 + ati_asp_slot/2 + (ati_asp_slot % 2) * 0x00e;
3933
3934         ati_channel_setup = snd_hda_codec_read(codec, pin_nid, 0, verb, 0);
3935
3936         if (!(ati_channel_setup & ATI_OUT_ENABLE))
3937                 return 0xf;
3938
3939         return ((ati_channel_setup & 0xf0) >> 4) + !!was_odd;
3940 }
3941
3942 static int atihdmi_paired_chmap_cea_alloc_validate_get_type(
3943                 struct hdac_chmap *chmap,
3944                 struct hdac_cea_channel_speaker_allocation *cap,
3945                 int channels)
3946 {
3947         int c;
3948
3949         /*
3950          * Pre-rev3 ATI/AMD codecs operate in a paired channel mode, so
3951          * we need to take that into account (a single channel may take 2
3952          * channel slots if we need to carry a silent channel next to it).
3953          * On Rev3+ AMD codecs this function is not used.
3954          */
3955         int chanpairs = 0;
3956
3957         /* We only produce even-numbered channel count TLVs */
3958         if ((channels % 2) != 0)
3959                 return -1;
3960
3961         for (c = 0; c < 7; c += 2) {
3962                 if (cap->speakers[c] || cap->speakers[c+1])
3963                         chanpairs++;
3964         }
3965
3966         if (chanpairs * 2 != channels)
3967                 return -1;
3968
3969         return SNDRV_CTL_TLVT_CHMAP_PAIRED;
3970 }
3971
3972 static void atihdmi_paired_cea_alloc_to_tlv_chmap(struct hdac_chmap *hchmap,
3973                 struct hdac_cea_channel_speaker_allocation *cap,
3974                 unsigned int *chmap, int channels)
3975 {
3976         /* produce paired maps for pre-rev3 ATI/AMD codecs */
3977         int count = 0;
3978         int c;
3979
3980         for (c = 7; c >= 0; c--) {
3981                 int chan = 7 - atihdmi_paired_swap_fc_lfe(7 - c);
3982                 int spk = cap->speakers[chan];
3983                 if (!spk) {
3984                         /* add N/A channel if the companion channel is occupied */
3985                         if (cap->speakers[chan + (chan % 2 ? -1 : 1)])
3986                                 chmap[count++] = SNDRV_CHMAP_NA;
3987
3988                         continue;
3989                 }
3990
3991                 chmap[count++] = snd_hdac_spk_to_chmap(spk);
3992         }
3993
3994         WARN_ON(count != channels);
3995 }
3996
3997 static int atihdmi_pin_hbr_setup(struct hda_codec *codec, hda_nid_t pin_nid,
3998                                  int dev_id, bool hbr)
3999 {
4000         int hbr_ctl, hbr_ctl_new;
4001
4002         WARN_ON(dev_id != 0);
4003
4004         hbr_ctl = snd_hda_codec_read(codec, pin_nid, 0, ATI_VERB_GET_HBR_CONTROL, 0);
4005         if (hbr_ctl >= 0 && (hbr_ctl & ATI_HBR_CAPABLE)) {
4006                 if (hbr)
4007                         hbr_ctl_new = hbr_ctl | ATI_HBR_ENABLE;
4008                 else
4009                         hbr_ctl_new = hbr_ctl & ~ATI_HBR_ENABLE;
4010
4011                 codec_dbg(codec,
4012                           "atihdmi_pin_hbr_setup: NID=0x%x, %shbr-ctl=0x%x\n",
4013                                 pin_nid,
4014                                 hbr_ctl == hbr_ctl_new ? "" : "new-",
4015                                 hbr_ctl_new);
4016
4017                 if (hbr_ctl != hbr_ctl_new)
4018                         snd_hda_codec_write(codec, pin_nid, 0,
4019                                                 ATI_VERB_SET_HBR_CONTROL,
4020                                                 hbr_ctl_new);
4021
4022         } else if (hbr)
4023                 return -EINVAL;
4024
4025         return 0;
4026 }
4027
4028 static int atihdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
4029                                 hda_nid_t pin_nid, int dev_id,
4030                                 u32 stream_tag, int format)
4031 {
4032         if (is_amdhdmi_rev3_or_later(codec)) {
4033                 int ramp_rate = 180; /* default as per AMD spec */
4034                 /* disable ramp-up/down for non-pcm as per AMD spec */
4035                 if (format & AC_FMT_TYPE_NON_PCM)
4036                         ramp_rate = 0;
4037
4038                 snd_hda_codec_write(codec, cvt_nid, 0, ATI_VERB_SET_RAMP_RATE, ramp_rate);
4039         }
4040
4041         return hdmi_setup_stream(codec, cvt_nid, pin_nid, dev_id,
4042                                  stream_tag, format);
4043 }
4044
4045
4046 static int atihdmi_init(struct hda_codec *codec)
4047 {
4048         struct hdmi_spec *spec = codec->spec;
4049         int pin_idx, err;
4050
4051         err = generic_hdmi_init(codec);
4052
4053         if (err)
4054                 return err;
4055
4056         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
4057                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
4058
4059                 /* make sure downmix information in infoframe is zero */
4060                 snd_hda_codec_write(codec, per_pin->pin_nid, 0, ATI_VERB_SET_DOWNMIX_INFO, 0);
4061
4062                 /* enable channel-wise remap mode if supported */
4063                 if (has_amd_full_remap_support(codec))
4064                         snd_hda_codec_write(codec, per_pin->pin_nid, 0,
4065                                             ATI_VERB_SET_MULTICHANNEL_MODE,
4066                                             ATI_MULTICHANNEL_MODE_SINGLE);
4067         }
4068
4069         return 0;
4070 }
4071
4072 /* map from pin NID to port; port is 0-based */
4073 /* for AMD: assume widget NID starting from 3, with step 2 (3, 5, 7, ...) */
4074 static int atihdmi_pin2port(void *audio_ptr, int pin_nid)
4075 {
4076         return pin_nid / 2 - 1;
4077 }
4078
4079 /* reverse-map from port to pin NID: see above */
4080 static int atihdmi_port2pin(struct hda_codec *codec, int port)
4081 {
4082         return port * 2 + 3;
4083 }
4084
4085 static const struct drm_audio_component_audio_ops atihdmi_audio_ops = {
4086         .pin2port = atihdmi_pin2port,
4087         .pin_eld_notify = generic_acomp_pin_eld_notify,
4088         .master_bind = generic_acomp_master_bind,
4089         .master_unbind = generic_acomp_master_unbind,
4090 };
4091
4092 static int patch_atihdmi(struct hda_codec *codec)
4093 {
4094         struct hdmi_spec *spec;
4095         struct hdmi_spec_per_cvt *per_cvt;
4096         int err, cvt_idx;
4097
4098         err = patch_generic_hdmi(codec);
4099
4100         if (err)
4101                 return err;
4102
4103         codec->patch_ops.init = atihdmi_init;
4104
4105         spec = codec->spec;
4106
4107         spec->ops.pin_get_eld = atihdmi_pin_get_eld;
4108         spec->ops.pin_setup_infoframe = atihdmi_pin_setup_infoframe;
4109         spec->ops.pin_hbr_setup = atihdmi_pin_hbr_setup;
4110         spec->ops.setup_stream = atihdmi_setup_stream;
4111
4112         spec->chmap.ops.pin_get_slot_channel = atihdmi_pin_get_slot_channel;
4113         spec->chmap.ops.pin_set_slot_channel = atihdmi_pin_set_slot_channel;
4114
4115         if (!has_amd_full_remap_support(codec)) {
4116                 /* override to ATI/AMD-specific versions with pairwise mapping */
4117                 spec->chmap.ops.chmap_cea_alloc_validate_get_type =
4118                         atihdmi_paired_chmap_cea_alloc_validate_get_type;
4119                 spec->chmap.ops.cea_alloc_to_tlv_chmap =
4120                                 atihdmi_paired_cea_alloc_to_tlv_chmap;
4121                 spec->chmap.ops.chmap_validate = atihdmi_paired_chmap_validate;
4122         }
4123
4124         /* ATI/AMD converters do not advertise all of their capabilities */
4125         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
4126                 per_cvt = get_cvt(spec, cvt_idx);
4127                 per_cvt->channels_max = max(per_cvt->channels_max, 8u);
4128                 per_cvt->rates |= SUPPORTED_RATES;
4129                 per_cvt->formats |= SUPPORTED_FORMATS;
4130                 per_cvt->maxbps = max(per_cvt->maxbps, 24u);
4131         }
4132
4133         spec->chmap.channels_max = max(spec->chmap.channels_max, 8u);
4134
4135         /* AMD GPUs have neither EPSS nor CLKSTOP bits, hence preventing
4136          * the link-down as is.  Tell the core to allow it.
4137          */
4138         codec->link_down_at_suspend = 1;
4139
4140         generic_acomp_init(codec, &atihdmi_audio_ops, atihdmi_port2pin);
4141
4142         return 0;
4143 }
4144
4145 /* VIA HDMI Implementation */
4146 #define VIAHDMI_CVT_NID 0x02    /* audio converter1 */
4147 #define VIAHDMI_PIN_NID 0x03    /* HDMI output pin1 */
4148
4149 static int patch_via_hdmi(struct hda_codec *codec)
4150 {
4151         return patch_simple_hdmi(codec, VIAHDMI_CVT_NID, VIAHDMI_PIN_NID);
4152 }
4153
4154 /*
4155  * patch entries
4156  */
4157 static const struct hda_device_id snd_hda_id_hdmi[] = {
4158 HDA_CODEC_ENTRY(0x1002793c, "RS600 HDMI",       patch_atihdmi),
4159 HDA_CODEC_ENTRY(0x10027919, "RS600 HDMI",       patch_atihdmi),
4160 HDA_CODEC_ENTRY(0x1002791a, "RS690/780 HDMI",   patch_atihdmi),
4161 HDA_CODEC_ENTRY(0x1002aa01, "R6xx HDMI",        patch_atihdmi),
4162 HDA_CODEC_ENTRY(0x10951390, "SiI1390 HDMI",     patch_generic_hdmi),
4163 HDA_CODEC_ENTRY(0x10951392, "SiI1392 HDMI",     patch_generic_hdmi),
4164 HDA_CODEC_ENTRY(0x17e80047, "Chrontel HDMI",    patch_generic_hdmi),
4165 HDA_CODEC_ENTRY(0x10de0001, "MCP73 HDMI",       patch_nvhdmi_2ch),
4166 HDA_CODEC_ENTRY(0x10de0002, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
4167 HDA_CODEC_ENTRY(0x10de0003, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
4168 HDA_CODEC_ENTRY(0x10de0004, "GPU 04 HDMI",      patch_nvhdmi_8ch_7x),
4169 HDA_CODEC_ENTRY(0x10de0005, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
4170 HDA_CODEC_ENTRY(0x10de0006, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
4171 HDA_CODEC_ENTRY(0x10de0007, "MCP79/7A HDMI",    patch_nvhdmi_8ch_7x),
4172 HDA_CODEC_ENTRY(0x10de0008, "GPU 08 HDMI/DP",   patch_nvhdmi_legacy),
4173 HDA_CODEC_ENTRY(0x10de0009, "GPU 09 HDMI/DP",   patch_nvhdmi_legacy),
4174 HDA_CODEC_ENTRY(0x10de000a, "GPU 0a HDMI/DP",   patch_nvhdmi_legacy),
4175 HDA_CODEC_ENTRY(0x10de000b, "GPU 0b HDMI/DP",   patch_nvhdmi_legacy),
4176 HDA_CODEC_ENTRY(0x10de000c, "MCP89 HDMI",       patch_nvhdmi_legacy),
4177 HDA_CODEC_ENTRY(0x10de000d, "GPU 0d HDMI/DP",   patch_nvhdmi_legacy),
4178 HDA_CODEC_ENTRY(0x10de0010, "GPU 10 HDMI/DP",   patch_nvhdmi_legacy),
4179 HDA_CODEC_ENTRY(0x10de0011, "GPU 11 HDMI/DP",   patch_nvhdmi_legacy),
4180 HDA_CODEC_ENTRY(0x10de0012, "GPU 12 HDMI/DP",   patch_nvhdmi_legacy),
4181 HDA_CODEC_ENTRY(0x10de0013, "GPU 13 HDMI/DP",   patch_nvhdmi_legacy),
4182 HDA_CODEC_ENTRY(0x10de0014, "GPU 14 HDMI/DP",   patch_nvhdmi_legacy),
4183 HDA_CODEC_ENTRY(0x10de0015, "GPU 15 HDMI/DP",   patch_nvhdmi_legacy),
4184 HDA_CODEC_ENTRY(0x10de0016, "GPU 16 HDMI/DP",   patch_nvhdmi_legacy),
4185 /* 17 is known to be absent */
4186 HDA_CODEC_ENTRY(0x10de0018, "GPU 18 HDMI/DP",   patch_nvhdmi_legacy),
4187 HDA_CODEC_ENTRY(0x10de0019, "GPU 19 HDMI/DP",   patch_nvhdmi_legacy),
4188 HDA_CODEC_ENTRY(0x10de001a, "GPU 1a HDMI/DP",   patch_nvhdmi_legacy),
4189 HDA_CODEC_ENTRY(0x10de001b, "GPU 1b HDMI/DP",   patch_nvhdmi_legacy),
4190 HDA_CODEC_ENTRY(0x10de001c, "GPU 1c HDMI/DP",   patch_nvhdmi_legacy),
4191 HDA_CODEC_ENTRY(0x10de0020, "Tegra30 HDMI",     patch_tegra_hdmi),
4192 HDA_CODEC_ENTRY(0x10de0022, "Tegra114 HDMI",    patch_tegra_hdmi),
4193 HDA_CODEC_ENTRY(0x10de0028, "Tegra124 HDMI",    patch_tegra_hdmi),
4194 HDA_CODEC_ENTRY(0x10de0029, "Tegra210 HDMI/DP", patch_tegra_hdmi),
4195 HDA_CODEC_ENTRY(0x10de002d, "Tegra186 HDMI/DP0", patch_tegra_hdmi),
4196 HDA_CODEC_ENTRY(0x10de002e, "Tegra186 HDMI/DP1", patch_tegra_hdmi),
4197 HDA_CODEC_ENTRY(0x10de002f, "Tegra194 HDMI/DP2", patch_tegra_hdmi),
4198 HDA_CODEC_ENTRY(0x10de0030, "Tegra194 HDMI/DP3", patch_tegra_hdmi),
4199 HDA_CODEC_ENTRY(0x10de0040, "GPU 40 HDMI/DP",   patch_nvhdmi),
4200 HDA_CODEC_ENTRY(0x10de0041, "GPU 41 HDMI/DP",   patch_nvhdmi),
4201 HDA_CODEC_ENTRY(0x10de0042, "GPU 42 HDMI/DP",   patch_nvhdmi),
4202 HDA_CODEC_ENTRY(0x10de0043, "GPU 43 HDMI/DP",   patch_nvhdmi),
4203 HDA_CODEC_ENTRY(0x10de0044, "GPU 44 HDMI/DP",   patch_nvhdmi),
4204 HDA_CODEC_ENTRY(0x10de0045, "GPU 45 HDMI/DP",   patch_nvhdmi),
4205 HDA_CODEC_ENTRY(0x10de0050, "GPU 50 HDMI/DP",   patch_nvhdmi),
4206 HDA_CODEC_ENTRY(0x10de0051, "GPU 51 HDMI/DP",   patch_nvhdmi),
4207 HDA_CODEC_ENTRY(0x10de0052, "GPU 52 HDMI/DP",   patch_nvhdmi),
4208 HDA_CODEC_ENTRY(0x10de0060, "GPU 60 HDMI/DP",   patch_nvhdmi),
4209 HDA_CODEC_ENTRY(0x10de0061, "GPU 61 HDMI/DP",   patch_nvhdmi),
4210 HDA_CODEC_ENTRY(0x10de0062, "GPU 62 HDMI/DP",   patch_nvhdmi),
4211 HDA_CODEC_ENTRY(0x10de0067, "MCP67 HDMI",       patch_nvhdmi_2ch),
4212 HDA_CODEC_ENTRY(0x10de0070, "GPU 70 HDMI/DP",   patch_nvhdmi),
4213 HDA_CODEC_ENTRY(0x10de0071, "GPU 71 HDMI/DP",   patch_nvhdmi),
4214 HDA_CODEC_ENTRY(0x10de0072, "GPU 72 HDMI/DP",   patch_nvhdmi),
4215 HDA_CODEC_ENTRY(0x10de0073, "GPU 73 HDMI/DP",   patch_nvhdmi),
4216 HDA_CODEC_ENTRY(0x10de0074, "GPU 74 HDMI/DP",   patch_nvhdmi),
4217 HDA_CODEC_ENTRY(0x10de0076, "GPU 76 HDMI/DP",   patch_nvhdmi),
4218 HDA_CODEC_ENTRY(0x10de007b, "GPU 7b HDMI/DP",   patch_nvhdmi),
4219 HDA_CODEC_ENTRY(0x10de007c, "GPU 7c HDMI/DP",   patch_nvhdmi),
4220 HDA_CODEC_ENTRY(0x10de007d, "GPU 7d HDMI/DP",   patch_nvhdmi),
4221 HDA_CODEC_ENTRY(0x10de007e, "GPU 7e HDMI/DP",   patch_nvhdmi),
4222 HDA_CODEC_ENTRY(0x10de0080, "GPU 80 HDMI/DP",   patch_nvhdmi),
4223 HDA_CODEC_ENTRY(0x10de0081, "GPU 81 HDMI/DP",   patch_nvhdmi),
4224 HDA_CODEC_ENTRY(0x10de0082, "GPU 82 HDMI/DP",   patch_nvhdmi),
4225 HDA_CODEC_ENTRY(0x10de0083, "GPU 83 HDMI/DP",   patch_nvhdmi),
4226 HDA_CODEC_ENTRY(0x10de0084, "GPU 84 HDMI/DP",   patch_nvhdmi),
4227 HDA_CODEC_ENTRY(0x10de0090, "GPU 90 HDMI/DP",   patch_nvhdmi),
4228 HDA_CODEC_ENTRY(0x10de0091, "GPU 91 HDMI/DP",   patch_nvhdmi),
4229 HDA_CODEC_ENTRY(0x10de0092, "GPU 92 HDMI/DP",   patch_nvhdmi),
4230 HDA_CODEC_ENTRY(0x10de0093, "GPU 93 HDMI/DP",   patch_nvhdmi),
4231 HDA_CODEC_ENTRY(0x10de0094, "GPU 94 HDMI/DP",   patch_nvhdmi),
4232 HDA_CODEC_ENTRY(0x10de0095, "GPU 95 HDMI/DP",   patch_nvhdmi),
4233 HDA_CODEC_ENTRY(0x10de0097, "GPU 97 HDMI/DP",   patch_nvhdmi),
4234 HDA_CODEC_ENTRY(0x10de0098, "GPU 98 HDMI/DP",   patch_nvhdmi),
4235 HDA_CODEC_ENTRY(0x10de0099, "GPU 99 HDMI/DP",   patch_nvhdmi),
4236 HDA_CODEC_ENTRY(0x10de8001, "MCP73 HDMI",       patch_nvhdmi_2ch),
4237 HDA_CODEC_ENTRY(0x10de8067, "MCP67/68 HDMI",    patch_nvhdmi_2ch),
4238 HDA_CODEC_ENTRY(0x11069f80, "VX900 HDMI/DP",    patch_via_hdmi),
4239 HDA_CODEC_ENTRY(0x11069f81, "VX900 HDMI/DP",    patch_via_hdmi),
4240 HDA_CODEC_ENTRY(0x11069f84, "VX11 HDMI/DP",     patch_generic_hdmi),
4241 HDA_CODEC_ENTRY(0x11069f85, "VX11 HDMI/DP",     patch_generic_hdmi),
4242 HDA_CODEC_ENTRY(0x80860054, "IbexPeak HDMI",    patch_i915_cpt_hdmi),
4243 HDA_CODEC_ENTRY(0x80862800, "Geminilake HDMI",  patch_i915_glk_hdmi),
4244 HDA_CODEC_ENTRY(0x80862801, "Bearlake HDMI",    patch_generic_hdmi),
4245 HDA_CODEC_ENTRY(0x80862802, "Cantiga HDMI",     patch_generic_hdmi),
4246 HDA_CODEC_ENTRY(0x80862803, "Eaglelake HDMI",   patch_generic_hdmi),
4247 HDA_CODEC_ENTRY(0x80862804, "IbexPeak HDMI",    patch_i915_cpt_hdmi),
4248 HDA_CODEC_ENTRY(0x80862805, "CougarPoint HDMI", patch_i915_cpt_hdmi),
4249 HDA_CODEC_ENTRY(0x80862806, "PantherPoint HDMI", patch_i915_cpt_hdmi),
4250 HDA_CODEC_ENTRY(0x80862807, "Haswell HDMI",     patch_i915_hsw_hdmi),
4251 HDA_CODEC_ENTRY(0x80862808, "Broadwell HDMI",   patch_i915_hsw_hdmi),
4252 HDA_CODEC_ENTRY(0x80862809, "Skylake HDMI",     patch_i915_hsw_hdmi),
4253 HDA_CODEC_ENTRY(0x8086280a, "Broxton HDMI",     patch_i915_hsw_hdmi),
4254 HDA_CODEC_ENTRY(0x8086280b, "Kabylake HDMI",    patch_i915_hsw_hdmi),
4255 HDA_CODEC_ENTRY(0x8086280c, "Cannonlake HDMI",  patch_i915_glk_hdmi),
4256 HDA_CODEC_ENTRY(0x8086280d, "Geminilake HDMI",  patch_i915_glk_hdmi),
4257 HDA_CODEC_ENTRY(0x8086280f, "Icelake HDMI",     patch_i915_icl_hdmi),
4258 HDA_CODEC_ENTRY(0x80862812, "Tigerlake HDMI",   patch_i915_tgl_hdmi),
4259 HDA_CODEC_ENTRY(0x80862880, "CedarTrail HDMI",  patch_generic_hdmi),
4260 HDA_CODEC_ENTRY(0x80862882, "Valleyview2 HDMI", patch_i915_byt_hdmi),
4261 HDA_CODEC_ENTRY(0x80862883, "Braswell HDMI",    patch_i915_byt_hdmi),
4262 HDA_CODEC_ENTRY(0x808629fb, "Crestline HDMI",   patch_generic_hdmi),
4263 /* special ID for generic HDMI */
4264 HDA_CODEC_ENTRY(HDA_CODEC_ID_GENERIC_HDMI, "Generic HDMI", patch_generic_hdmi),
4265 {} /* terminator */
4266 };
4267 MODULE_DEVICE_TABLE(hdaudio, snd_hda_id_hdmi);
4268
4269 MODULE_LICENSE("GPL");
4270 MODULE_DESCRIPTION("HDMI HD-audio codec");
4271 MODULE_ALIAS("snd-hda-codec-intelhdmi");
4272 MODULE_ALIAS("snd-hda-codec-nvhdmi");
4273 MODULE_ALIAS("snd-hda-codec-atihdmi");
4274
4275 static struct hda_codec_driver hdmi_driver = {
4276         .id = snd_hda_id_hdmi,
4277 };
4278
4279 module_hda_codec_driver(hdmi_driver);