sound/pci/hda/patch_hdmi.c

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  *
   4  *  patch_hdmi.c - routines for HDMI/DisplayPort codecs
   5  *
   6  *  Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
   7  *  Copyright (c) 2006 ATI Technologies Inc.
   8  *  Copyright (c) 2008 NVIDIA Corp.  All rights reserved.
   9  *  Copyright (c) 2008 Wei Ni <wni@nvidia.com>
  10  *  Copyright (c) 2013 Anssi Hannula <anssi.hannula@iki.fi>
  11  *
  12  *  Authors:
  13  *                      Wu Fengguang <wfg@linux.intel.com>
  14  *
  15  *  Maintained by:
  16  *                      Wu Fengguang <wfg@linux.intel.com>
  17  */
  18
  19 #include <linux/init.h>
  20 #include <linux/delay.h>
  21 #include <linux/pci.h>
  22 #include <linux/slab.h>
  23 #include <linux/module.h>
  24 #include <linux/pm_runtime.h>
  25 #include <sound/core.h>
  26 #include <sound/jack.h>
  27 #include <sound/asoundef.h>
  28 #include <sound/tlv.h>
  29 #include <sound/hdaudio.h>
  30 #include <sound/hda_i915.h>
  31 #include <sound/hda_chmap.h>
  32 #include <sound/hda_codec.h>
  33 #include "hda_local.h"
  34 #include "hda_jack.h"
  35
  36 static bool static_hdmi_pcm;
  37 module_param(static_hdmi_pcm, bool, 0644);
  38 MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info");
  39
  40 struct hdmi_spec_per_cvt {
  41         hda_nid_t cvt_nid;
  42         int assigned;
  43         unsigned int channels_min;
  44         unsigned int channels_max;
  45         u32 rates;
  46         u64 formats;
  47         unsigned int maxbps;
  48 };
  49
  50 /* max. connections to a widget */
  51 #define HDA_MAX_CONNECTIONS     32
  52
  53 struct hdmi_spec_per_pin {
  54         hda_nid_t pin_nid;
  55         int dev_id;
  56         /* pin idx, different device entries on the same pin use the same idx */
  57         int pin_nid_idx;
  58         int num_mux_nids;
  59         hda_nid_t mux_nids[HDA_MAX_CONNECTIONS];
  60         int mux_idx;
  61         hda_nid_t cvt_nid;
  62
  63         struct hda_codec *codec;
  64         struct hdmi_eld sink_eld;
  65         struct mutex lock;
  66         struct delayed_work work;
  67         struct hdmi_pcm *pcm; /* pointer to spec->pcm_rec[n] dynamically*/
  68         int pcm_idx; /* which pcm is attached. -1 means no pcm is attached */
  69         int repoll_count;
  70         bool setup; /* the stream has been set up by prepare callback */
  71         int channels; /* current number of channels */
  72         bool non_pcm;
  73         bool chmap_set;         /* channel-map override by ALSA API? */
  74         unsigned char chmap[8]; /* ALSA API channel-map */
  75 #ifdef CONFIG_SND_PROC_FS
  76         struct snd_info_entry *proc_entry;
  77 #endif
  78 };
  79
  80 /* operations used by generic code that can be overridden by patches */
  81 struct hdmi_ops {
  82         int (*pin_get_eld)(struct hda_codec *codec, hda_nid_t pin_nid,
  83                            unsigned char *buf, int *eld_size);
  84
  85         void (*pin_setup_infoframe)(struct hda_codec *codec, hda_nid_t pin_nid,
  86                                     int ca, int active_channels, int conn_type);
  87
  88         /* enable/disable HBR (HD passthrough) */
  89         int (*pin_hbr_setup)(struct hda_codec *codec, hda_nid_t pin_nid, bool hbr);
  90
  91         int (*setup_stream)(struct hda_codec *codec, hda_nid_t cvt_nid,
  92                             hda_nid_t pin_nid, u32 stream_tag, int format);
  93
  94         void (*pin_cvt_fixup)(struct hda_codec *codec,
  95                               struct hdmi_spec_per_pin *per_pin,
  96                               hda_nid_t cvt_nid);
  97 };
  98
  99 struct hdmi_pcm {
 100         struct hda_pcm *pcm;
 101         struct snd_jack *jack;
 102         struct snd_kcontrol *eld_ctl;
 103 };
 104
 105 struct hdmi_spec {
 106         struct hda_codec *codec;
 107         int num_cvts;
 108         struct snd_array cvts; /* struct hdmi_spec_per_cvt */
 109         hda_nid_t cvt_nids[4]; /* only for haswell fix */
 110
 111         /*
 112          * num_pins is the number of virtual pins
 113          * for example, there are 3 pins, and each pin
 114          * has 4 device entries, then the num_pins is 12
 115          */
 116         int num_pins;
 117         /*
 118          * num_nids is the number of real pins
 119          * In the above example, num_nids is 3
 120          */
 121         int num_nids;
 122         /*
 123          * dev_num is the number of device entries
 124          * on each pin.
 125          * In the above example, dev_num is 4
 126          */
 127         int dev_num;
 128         struct snd_array pins; /* struct hdmi_spec_per_pin */
 129         struct hdmi_pcm pcm_rec[16];
 130         struct mutex pcm_lock;
 131         struct mutex bind_lock; /* for audio component binding */
 132         /* pcm_bitmap means which pcms have been assigned to pins*/
 133         unsigned long pcm_bitmap;
 134         int pcm_used;   /* counter of pcm_rec[] */
 135         /* bitmap shows whether the pcm is opened in user space
 136          * bit 0 means the first playback PCM (PCM3);
 137          * bit 1 means the second playback PCM, and so on.
 138          */
 139         unsigned long pcm_in_use;
 140
 141         struct hdmi_eld temp_eld;
 142         struct hdmi_ops ops;
 143
 144         bool dyn_pin_out;
 145         bool dyn_pcm_assign;
 146         bool intel_hsw_fixup;   /* apply Intel platform-specific fixups */
 147         /*
 148          * Non-generic VIA/NVIDIA specific
 149          */
 150         struct hda_multi_out multiout;
 151         struct hda_pcm_stream pcm_playback;
 152
 153         bool use_jack_detect; /* jack detection enabled */
 154         bool use_acomp_notifier; /* use eld_notify callback for hotplug */
 155         bool acomp_registered; /* audio component registered in this driver */
 156         struct drm_audio_component_audio_ops drm_audio_ops;
 157         int (*port2pin)(struct hda_codec *, int); /* reverse port/pin mapping */
 158
 159         struct hdac_chmap chmap;
 160         hda_nid_t vendor_nid;
 161         const int *port_map;
 162         int port_num;
 163 };
 164
 165 #ifdef CONFIG_SND_HDA_COMPONENT
 166 static inline bool codec_has_acomp(struct hda_codec *codec)
 167 {
 168         struct hdmi_spec *spec = codec->spec;
 169         return spec->use_acomp_notifier;
 170 }
 171 #else
 172 #define codec_has_acomp(codec)  false
 173 #endif
 174
 175 struct hdmi_audio_infoframe {
 176         u8 type; /* 0x84 */
 177         u8 ver;  /* 0x01 */
 178         u8 len;  /* 0x0a */
 179
 180         u8 checksum;
 181
 182         u8 CC02_CT47;   /* CC in bits 0:2, CT in 4:7 */
 183         u8 SS01_SF24;
 184         u8 CXT04;
 185         u8 CA;
 186         u8 LFEPBL01_LSV36_DM_INH7;
 187 };
 188
 189 struct dp_audio_infoframe {
 190         u8 type; /* 0x84 */
 191         u8 len;  /* 0x1b */
 192         u8 ver;  /* 0x11 << 2 */
 193
 194         u8 CC02_CT47;   /* match with HDMI infoframe from this on */
 195         u8 SS01_SF24;
 196         u8 CXT04;
 197         u8 CA;
 198         u8 LFEPBL01_LSV36_DM_INH7;
 199 };
 200
 201 union audio_infoframe {
 202         struct hdmi_audio_infoframe hdmi;
 203         struct dp_audio_infoframe dp;
 204         u8 bytes[0];
 205 };
 206
 207 /*
 208  * HDMI routines
 209  */
 210
 211 #define get_pin(spec, idx) \
 212         ((struct hdmi_spec_per_pin *)snd_array_elem(&spec->pins, idx))
 213 #define get_cvt(spec, idx) \
 214         ((struct hdmi_spec_per_cvt  *)snd_array_elem(&spec->cvts, idx))
 215 /* obtain hdmi_pcm object assigned to idx */
 216 #define get_hdmi_pcm(spec, idx) (&(spec)->pcm_rec[idx])
 217 /* obtain hda_pcm object assigned to idx */
 218 #define get_pcm_rec(spec, idx)  (get_hdmi_pcm(spec, idx)->pcm)
 219
 220 static int pin_id_to_pin_index(struct hda_codec *codec,
 221                                hda_nid_t pin_nid, int dev_id)
 222 {
 223         struct hdmi_spec *spec = codec->spec;
 224         int pin_idx;
 225         struct hdmi_spec_per_pin *per_pin;
 226
 227         /*
 228          * (dev_id == -1) means it is NON-MST pin
 229          * return the first virtual pin on this port
 230          */
 231         if (dev_id == -1)
 232                 dev_id = 0;
 233
 234         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
 235                 per_pin = get_pin(spec, pin_idx);
 236                 if ((per_pin->pin_nid == pin_nid) &&
 237                         (per_pin->dev_id == dev_id))
 238                         return pin_idx;
 239         }
 240
 241         codec_warn(codec, "HDMI: pin nid %d not registered\n", pin_nid);
 242         return -EINVAL;
 243 }
 244
 245 static int hinfo_to_pcm_index(struct hda_codec *codec,
 246                         struct hda_pcm_stream *hinfo)
 247 {
 248         struct hdmi_spec *spec = codec->spec;
 249         int pcm_idx;
 250
 251         for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++)
 252                 if (get_pcm_rec(spec, pcm_idx)->stream == hinfo)
 253                         return pcm_idx;
 254
 255         codec_warn(codec, "HDMI: hinfo %p not registered\n", hinfo);
 256         return -EINVAL;
 257 }
 258
 259 static int hinfo_to_pin_index(struct hda_codec *codec,
 260                               struct hda_pcm_stream *hinfo)
 261 {
 262         struct hdmi_spec *spec = codec->spec;
 263         struct hdmi_spec_per_pin *per_pin;
 264         int pin_idx;
 265
 266         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
 267                 per_pin = get_pin(spec, pin_idx);
 268                 if (per_pin->pcm &&
 269                         per_pin->pcm->pcm->stream == hinfo)
 270                         return pin_idx;
 271         }
 272
 273         codec_dbg(codec, "HDMI: hinfo %p not registered\n", hinfo);
 274         return -EINVAL;
 275 }
 276
 277 static struct hdmi_spec_per_pin *pcm_idx_to_pin(struct hdmi_spec *spec,
 278                                                 int pcm_idx)
 279 {
 280         int i;
 281         struct hdmi_spec_per_pin *per_pin;
 282
 283         for (i = 0; i < spec->num_pins; i++) {
 284                 per_pin = get_pin(spec, i);
 285                 if (per_pin->pcm_idx == pcm_idx)
 286                         return per_pin;
 287         }
 288         return NULL;
 289 }
 290
 291 static int cvt_nid_to_cvt_index(struct hda_codec *codec, hda_nid_t cvt_nid)
 292 {
 293         struct hdmi_spec *spec = codec->spec;
 294         int cvt_idx;
 295
 296         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++)
 297                 if (get_cvt(spec, cvt_idx)->cvt_nid == cvt_nid)
 298                         return cvt_idx;
 299
 300         codec_warn(codec, "HDMI: cvt nid %d not registered\n", cvt_nid);
 301         return -EINVAL;
 302 }
 303
 304 static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol,
 305                         struct snd_ctl_elem_info *uinfo)
 306 {
 307         struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
 308         struct hdmi_spec *spec = codec->spec;
 309         struct hdmi_spec_per_pin *per_pin;
 310         struct hdmi_eld *eld;
 311         int pcm_idx;
 312
 313         uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
 314
 315         pcm_idx = kcontrol->private_value;
 316         mutex_lock(&spec->pcm_lock);
 317         per_pin = pcm_idx_to_pin(spec, pcm_idx);
 318         if (!per_pin) {
 319                 /* no pin is bound to the pcm */
 320                 uinfo->count = 0;
 321                 goto unlock;
 322         }
 323         eld = &per_pin->sink_eld;
 324         uinfo->count = eld->eld_valid ? eld->eld_size : 0;
 325
 326  unlock:
 327         mutex_unlock(&spec->pcm_lock);
 328         return 0;
 329 }
 330
 331 static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol,
 332                         struct snd_ctl_elem_value *ucontrol)
 333 {
 334         struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
 335         struct hdmi_spec *spec = codec->spec;
 336         struct hdmi_spec_per_pin *per_pin;
 337         struct hdmi_eld *eld;
 338         int pcm_idx;
 339         int err = 0;
 340
 341         pcm_idx = kcontrol->private_value;
 342         mutex_lock(&spec->pcm_lock);
 343         per_pin = pcm_idx_to_pin(spec, pcm_idx);
 344         if (!per_pin) {
 345                 /* no pin is bound to the pcm */
 346                 memset(ucontrol->value.bytes.data, 0,
 347                        ARRAY_SIZE(ucontrol->value.bytes.data));
 348                 goto unlock;
 349         }
 350
 351         eld = &per_pin->sink_eld;
 352         if (eld->eld_size > ARRAY_SIZE(ucontrol->value.bytes.data) ||
 353             eld->eld_size > ELD_MAX_SIZE) {
 354                 snd_BUG();
 355                 err = -EINVAL;
 356                 goto unlock;
 357         }
 358
 359         memset(ucontrol->value.bytes.data, 0,
 360                ARRAY_SIZE(ucontrol->value.bytes.data));
 361         if (eld->eld_valid)
 362                 memcpy(ucontrol->value.bytes.data, eld->eld_buffer,
 363                        eld->eld_size);
 364
 365  unlock:
 366         mutex_unlock(&spec->pcm_lock);
 367         return err;
 368 }
 369
 370 static const struct snd_kcontrol_new eld_bytes_ctl = {
 371         .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
 372         .iface = SNDRV_CTL_ELEM_IFACE_PCM,
 373         .name = "ELD",
 374         .info = hdmi_eld_ctl_info,
 375         .get = hdmi_eld_ctl_get,
 376 };
 377
 378 static int hdmi_create_eld_ctl(struct hda_codec *codec, int pcm_idx,
 379                         int device)
 380 {
 381         struct snd_kcontrol *kctl;
 382         struct hdmi_spec *spec = codec->spec;
 383         int err;
 384
 385         kctl = snd_ctl_new1(&eld_bytes_ctl, codec);
 386         if (!kctl)
 387                 return -ENOMEM;
 388         kctl->private_value = pcm_idx;
 389         kctl->id.device = device;
 390
 391         /* no pin nid is associated with the kctl now
 392          * tbd: associate pin nid to eld ctl later
 393          */
 394         err = snd_hda_ctl_add(codec, 0, kctl);
 395         if (err < 0)
 396                 return err;
 397
 398         get_hdmi_pcm(spec, pcm_idx)->eld_ctl = kctl;
 399         return 0;
 400 }
 401
 402 #ifdef BE_PARANOID
 403 static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
 404                                 int *packet_index, int *byte_index)
 405 {
 406         int val;
 407
 408         val = snd_hda_codec_read(codec, pin_nid, 0,
 409                                  AC_VERB_GET_HDMI_DIP_INDEX, 0);
 410
 411         *packet_index = val >> 5;
 412         *byte_index = val & 0x1f;
 413 }
 414 #endif
 415
 416 static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
 417                                 int packet_index, int byte_index)
 418 {
 419         int val;
 420
 421         val = (packet_index << 5) | (byte_index & 0x1f);
 422
 423         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
 424 }
 425
 426 static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
 427                                 unsigned char val)
 428 {
 429         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
 430 }
 431
 432 static void hdmi_init_pin(struct hda_codec *codec, hda_nid_t pin_nid)
 433 {
 434         struct hdmi_spec *spec = codec->spec;
 435         int pin_out;
 436
 437         /* Unmute */
 438         if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
 439                 snd_hda_codec_write(codec, pin_nid, 0,
 440                                 AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
 441
 442         if (spec->dyn_pin_out)
 443                 /* Disable pin out until stream is active */
 444                 pin_out = 0;
 445         else
 446                 /* Enable pin out: some machines with GM965 gets broken output
 447                  * when the pin is disabled or changed while using with HDMI
 448                  */
 449                 pin_out = PIN_OUT;
 450
 451         snd_hda_codec_write(codec, pin_nid, 0,
 452                             AC_VERB_SET_PIN_WIDGET_CONTROL, pin_out);
 453 }
 454
 455 /*
 456  * ELD proc files
 457  */
 458
 459 #ifdef CONFIG_SND_PROC_FS
 460 static void print_eld_info(struct snd_info_entry *entry,
 461                            struct snd_info_buffer *buffer)
 462 {
 463         struct hdmi_spec_per_pin *per_pin = entry->private_data;
 464
 465         mutex_lock(&per_pin->lock);
 466         snd_hdmi_print_eld_info(&per_pin->sink_eld, buffer);
 467         mutex_unlock(&per_pin->lock);
 468 }
 469
 470 static void write_eld_info(struct snd_info_entry *entry,
 471                            struct snd_info_buffer *buffer)
 472 {
 473         struct hdmi_spec_per_pin *per_pin = entry->private_data;
 474
 475         mutex_lock(&per_pin->lock);
 476         snd_hdmi_write_eld_info(&per_pin->sink_eld, buffer);
 477         mutex_unlock(&per_pin->lock);
 478 }
 479
 480 static int eld_proc_new(struct hdmi_spec_per_pin *per_pin, int index)
 481 {
 482         char name[32];
 483         struct hda_codec *codec = per_pin->codec;
 484         struct snd_info_entry *entry;
 485         int err;
 486
 487         snprintf(name, sizeof(name), "eld#%d.%d", codec->addr, index);
 488         err = snd_card_proc_new(codec->card, name, &entry);
 489         if (err < 0)
 490                 return err;
 491
 492         snd_info_set_text_ops(entry, per_pin, print_eld_info);
 493         entry->c.text.write = write_eld_info;
 494         entry->mode |= 0200;
 495         per_pin->proc_entry = entry;
 496
 497         return 0;
 498 }
 499
 500 static void eld_proc_free(struct hdmi_spec_per_pin *per_pin)
 501 {
 502         if (!per_pin->codec->bus->shutdown) {
 503                 snd_info_free_entry(per_pin->proc_entry);
 504                 per_pin->proc_entry = NULL;
 505         }
 506 }
 507 #else
 508 static inline int eld_proc_new(struct hdmi_spec_per_pin *per_pin,
 509                                int index)
 510 {
 511         return 0;
 512 }
 513 static inline void eld_proc_free(struct hdmi_spec_per_pin *per_pin)
 514 {
 515 }
 516 #endif
 517
 518 /*
 519  * Audio InfoFrame routines
 520  */
 521
 522 /*
 523  * Enable Audio InfoFrame Transmission
 524  */
 525 static void hdmi_start_infoframe_trans(struct hda_codec *codec,
 526                                        hda_nid_t pin_nid)
 527 {
 528         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 529         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
 530                                                 AC_DIPXMIT_BEST);
 531 }
 532
 533 /*
 534  * Disable Audio InfoFrame Transmission
 535  */
 536 static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
 537                                       hda_nid_t pin_nid)
 538 {
 539         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 540         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
 541                                                 AC_DIPXMIT_DISABLE);
 542 }
 543
 544 static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
 545 {
 546 #ifdef CONFIG_SND_DEBUG_VERBOSE
 547         int i;
 548         int size;
 549
 550         size = snd_hdmi_get_eld_size(codec, pin_nid);
 551         codec_dbg(codec, "HDMI: ELD buf size is %d\n", size);
 552
 553         for (i = 0; i < 8; i++) {
 554                 size = snd_hda_codec_read(codec, pin_nid, 0,
 555                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
 556                 codec_dbg(codec, "HDMI: DIP GP[%d] buf size is %d\n", i, size);
 557         }
 558 #endif
 559 }
 560
 561 static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
 562 {
 563 #ifdef BE_PARANOID
 564         int i, j;
 565         int size;
 566         int pi, bi;
 567         for (i = 0; i < 8; i++) {
 568                 size = snd_hda_codec_read(codec, pin_nid, 0,
 569                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
 570                 if (size == 0)
 571                         continue;
 572
 573                 hdmi_set_dip_index(codec, pin_nid, i, 0x0);
 574                 for (j = 1; j < 1000; j++) {
 575                         hdmi_write_dip_byte(codec, pin_nid, 0x0);
 576                         hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
 577                         if (pi != i)
 578                                 codec_dbg(codec, "dip index %d: %d != %d\n",
 579                                                 bi, pi, i);
 580                         if (bi == 0) /* byte index wrapped around */
 581                                 break;
 582                 }
 583                 codec_dbg(codec,
 584                         "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
 585                         i, size, j);
 586         }
 587 #endif
 588 }
 589
 590 static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *hdmi_ai)
 591 {
 592         u8 *bytes = (u8 *)hdmi_ai;
 593         u8 sum = 0;
 594         int i;
 595
 596         hdmi_ai->checksum = 0;
 597
 598         for (i = 0; i < sizeof(*hdmi_ai); i++)
 599                 sum += bytes[i];
 600
 601         hdmi_ai->checksum = -sum;
 602 }
 603
 604 static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
 605                                       hda_nid_t pin_nid,
 606                                       u8 *dip, int size)
 607 {
 608         int i;
 609
 610         hdmi_debug_dip_size(codec, pin_nid);
 611         hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */
 612
 613         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 614         for (i = 0; i < size; i++)
 615                 hdmi_write_dip_byte(codec, pin_nid, dip[i]);
 616 }
 617
 618 static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid,
 619                                     u8 *dip, int size)
 620 {
 621         u8 val;
 622         int i;
 623
 624         if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
 625                                                             != AC_DIPXMIT_BEST)
 626                 return false;
 627
 628         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 629         for (i = 0; i < size; i++) {
 630                 val = snd_hda_codec_read(codec, pin_nid, 0,
 631                                          AC_VERB_GET_HDMI_DIP_DATA, 0);
 632                 if (val != dip[i])
 633                         return false;
 634         }
 635
 636         return true;
 637 }
 638
 639 static void hdmi_pin_setup_infoframe(struct hda_codec *codec,
 640                                      hda_nid_t pin_nid,
 641                                      int ca, int active_channels,
 642                                      int conn_type)
 643 {
 644         union audio_infoframe ai;
 645
 646         memset(&ai, 0, sizeof(ai));
 647         if (conn_type == 0) { /* HDMI */
 648                 struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi;
 649
 650                 hdmi_ai->type           = 0x84;
 651                 hdmi_ai->ver            = 0x01;
 652                 hdmi_ai->len            = 0x0a;
 653                 hdmi_ai->CC02_CT47      = active_channels - 1;
 654                 hdmi_ai->CA             = ca;
 655                 hdmi_checksum_audio_infoframe(hdmi_ai);
 656         } else if (conn_type == 1) { /* DisplayPort */
 657                 struct dp_audio_infoframe *dp_ai = &ai.dp;
 658
 659                 dp_ai->type             = 0x84;
 660                 dp_ai->len              = 0x1b;
 661                 dp_ai->ver              = 0x11 << 2;
 662                 dp_ai->CC02_CT47        = active_channels - 1;
 663                 dp_ai->CA               = ca;
 664         } else {
 665                 codec_dbg(codec, "HDMI: unknown connection type at pin %d\n",
 666                             pin_nid);
 667                 return;
 668         }
 669
 670         /*
 671          * sizeof(ai) is used instead of sizeof(*hdmi_ai) or
 672          * sizeof(*dp_ai) to avoid partial match/update problems when
 673          * the user switches between HDMI/DP monitors.
 674          */
 675         if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes,
 676                                         sizeof(ai))) {
 677                 codec_dbg(codec,
 678                           "hdmi_pin_setup_infoframe: pin=%d channels=%d ca=0x%02x\n",
 679                             pin_nid,
 680                             active_channels, ca);
 681                 hdmi_stop_infoframe_trans(codec, pin_nid);
 682                 hdmi_fill_audio_infoframe(codec, pin_nid,
 683                                             ai.bytes, sizeof(ai));
 684                 hdmi_start_infoframe_trans(codec, pin_nid);
 685         }
 686 }
 687
 688 static void hdmi_setup_audio_infoframe(struct hda_codec *codec,
 689                                        struct hdmi_spec_per_pin *per_pin,
 690                                        bool non_pcm)
 691 {
 692         struct hdmi_spec *spec = codec->spec;
 693         struct hdac_chmap *chmap = &spec->chmap;
 694         hda_nid_t pin_nid = per_pin->pin_nid;
 695         int channels = per_pin->channels;
 696         int active_channels;
 697         struct hdmi_eld *eld;
 698         int ca;
 699
 700         if (!channels)
 701                 return;
 702
 703         /* some HW (e.g. HSW+) needs reprogramming the amp at each time */
 704         if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
 705                 snd_hda_codec_write(codec, pin_nid, 0,
 706                                             AC_VERB_SET_AMP_GAIN_MUTE,
 707                                             AMP_OUT_UNMUTE);
 708
 709         eld = &per_pin->sink_eld;
 710
 711         ca = snd_hdac_channel_allocation(&codec->core,
 712                         eld->info.spk_alloc, channels,
 713                         per_pin->chmap_set, non_pcm, per_pin->chmap);
 714
 715         active_channels = snd_hdac_get_active_channels(ca);
 716
 717         chmap->ops.set_channel_count(&codec->core, per_pin->cvt_nid,
 718                                                 active_channels);
 719
 720         /*
 721          * always configure channel mapping, it may have been changed by the
 722          * user in the meantime
 723          */
 724         snd_hdac_setup_channel_mapping(&spec->chmap,
 725                                 pin_nid, non_pcm, ca, channels,
 726                                 per_pin->chmap, per_pin->chmap_set);
 727
 728         spec->ops.pin_setup_infoframe(codec, pin_nid, ca, active_channels,
 729                                       eld->info.conn_type);
 730
 731         per_pin->non_pcm = non_pcm;
 732 }
 733
 734 /*
 735  * Unsolicited events
 736  */
 737
 738 static bool hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll);
 739
 740 static void check_presence_and_report(struct hda_codec *codec, hda_nid_t nid,
 741                                       int dev_id)
 742 {
 743         struct hdmi_spec *spec = codec->spec;
 744         int pin_idx = pin_id_to_pin_index(codec, nid, dev_id);
 745
 746         if (pin_idx < 0)
 747                 return;
 748         mutex_lock(&spec->pcm_lock);
 749         if (hdmi_present_sense(get_pin(spec, pin_idx), 1))
 750                 snd_hda_jack_report_sync(codec);
 751         mutex_unlock(&spec->pcm_lock);
 752 }
 753
 754 static void jack_callback(struct hda_codec *codec,
 755                           struct hda_jack_callback *jack)
 756 {
 757         /* stop polling when notification is enabled */
 758         if (codec_has_acomp(codec))
 759                 return;
 760
 761         check_presence_and_report(codec, jack->nid, jack->dev_id);
 762 }
 763
 764 static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res)
 765 {
 766         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
 767         struct hda_jack_tbl *jack;
 768
 769         if (codec->dp_mst) {
 770                 int dev_entry =
 771                         (res & AC_UNSOL_RES_DE) >> AC_UNSOL_RES_DE_SHIFT;
 772
 773                 jack = snd_hda_jack_tbl_get_from_tag(codec, tag, dev_entry);
 774         } else {
 775                 jack = snd_hda_jack_tbl_get_from_tag(codec, tag, 0);
 776         }
 777         if (!jack)
 778                 return;
 779         jack->jack_dirty = 1;
 780
 781         codec_dbg(codec,
 782                 "HDMI hot plug event: Codec=%d Pin=%d Device=%d Inactive=%d Presence_Detect=%d ELD_Valid=%d\n",
 783                 codec->addr, jack->nid, jack->dev_id, !!(res & AC_UNSOL_RES_IA),
 784                 !!(res & AC_UNSOL_RES_PD), !!(res & AC_UNSOL_RES_ELDV));
 785
 786         check_presence_and_report(codec, jack->nid, jack->dev_id);
 787 }
 788
 789 static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
 790 {
 791         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
 792         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
 793         int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
 794         int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
 795
 796         codec_info(codec,
 797                 "HDMI CP event: CODEC=%d TAG=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
 798                 codec->addr,
 799                 tag,
 800                 subtag,
 801                 cp_state,
 802                 cp_ready);
 803
 804         /* TODO */
 805         if (cp_state)
 806                 ;
 807         if (cp_ready)
 808                 ;
 809 }
 810
 811
 812 static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
 813 {
 814         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
 815         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
 816         struct hda_jack_tbl *jack;
 817
 818         if (codec_has_acomp(codec))
 819                 return;
 820
 821         if (codec->dp_mst) {
 822                 int dev_entry =
 823                         (res & AC_UNSOL_RES_DE) >> AC_UNSOL_RES_DE_SHIFT;
 824
 825                 jack = snd_hda_jack_tbl_get_from_tag(codec, tag, dev_entry);
 826         } else {
 827                 jack = snd_hda_jack_tbl_get_from_tag(codec, tag, 0);
 828         }
 829
 830         if (!jack) {
 831                 codec_dbg(codec, "Unexpected HDMI event tag 0x%x\n", tag);
 832                 return;
 833         }
 834
 835         if (subtag == 0)
 836                 hdmi_intrinsic_event(codec, res);
 837         else
 838                 hdmi_non_intrinsic_event(codec, res);
 839 }
 840
 841 static void haswell_verify_D0(struct hda_codec *codec,
 842                 hda_nid_t cvt_nid, hda_nid_t nid)
 843 {
 844         int pwr;
 845
 846         /* For Haswell, the converter 1/2 may keep in D3 state after bootup,
 847          * thus pins could only choose converter 0 for use. Make sure the
 848          * converters are in correct power state */
 849         if (!snd_hda_check_power_state(codec, cvt_nid, AC_PWRST_D0))
 850                 snd_hda_codec_write(codec, cvt_nid, 0, AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
 851
 852         if (!snd_hda_check_power_state(codec, nid, AC_PWRST_D0)) {
 853                 snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_POWER_STATE,
 854                                     AC_PWRST_D0);
 855                 msleep(40);
 856                 pwr = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_POWER_STATE, 0);
 857                 pwr = (pwr & AC_PWRST_ACTUAL) >> AC_PWRST_ACTUAL_SHIFT;
 858                 codec_dbg(codec, "Haswell HDMI audio: Power for pin 0x%x is now D%d\n", nid, pwr);
 859         }
 860 }
 861
 862 /*
 863  * Callbacks
 864  */
 865
 866 /* HBR should be Non-PCM, 8 channels */
 867 #define is_hbr_format(format) \
 868         ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
 869
 870 static int hdmi_pin_hbr_setup(struct hda_codec *codec, hda_nid_t pin_nid,
 871                               bool hbr)
 872 {
 873         int pinctl, new_pinctl;
 874
 875         if (snd_hda_query_pin_caps(codec, pin_nid) & AC_PINCAP_HBR) {
 876                 pinctl = snd_hda_codec_read(codec, pin_nid, 0,
 877                                             AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
 878
 879                 if (pinctl < 0)
 880                         return hbr ? -EINVAL : 0;
 881
 882                 new_pinctl = pinctl & ~AC_PINCTL_EPT;
 883                 if (hbr)
 884                         new_pinctl |= AC_PINCTL_EPT_HBR;
 885                 else
 886                         new_pinctl |= AC_PINCTL_EPT_NATIVE;
 887
 888                 codec_dbg(codec,
 889                           "hdmi_pin_hbr_setup: NID=0x%x, %spinctl=0x%x\n",
 890                             pin_nid,
 891                             pinctl == new_pinctl ? "" : "new-",
 892                             new_pinctl);
 893
 894                 if (pinctl != new_pinctl)
 895                         snd_hda_codec_write(codec, pin_nid, 0,
 896                                             AC_VERB_SET_PIN_WIDGET_CONTROL,
 897                                             new_pinctl);
 898         } else if (hbr)
 899                 return -EINVAL;
 900
 901         return 0;
 902 }
 903
 904 static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
 905                               hda_nid_t pin_nid, u32 stream_tag, int format)
 906 {
 907         struct hdmi_spec *spec = codec->spec;
 908         unsigned int param;
 909         int err;
 910
 911         err = spec->ops.pin_hbr_setup(codec, pin_nid, is_hbr_format(format));
 912
 913         if (err) {
 914                 codec_dbg(codec, "hdmi_setup_stream: HBR is not supported\n");
 915                 return err;
 916         }
 917
 918         if (spec->intel_hsw_fixup) {
 919
 920                 /*
 921                  * on recent platforms IEC Coding Type is required for HBR
 922                  * support, read current Digital Converter settings and set
 923                  * ICT bitfield if needed.
 924                  */
 925                 param = snd_hda_codec_read(codec, cvt_nid, 0,
 926                                            AC_VERB_GET_DIGI_CONVERT_1, 0);
 927
 928                 param = (param >> 16) & ~(AC_DIG3_ICT);
 929
 930                 /* on recent platforms ICT mode is required for HBR support */
 931                 if (is_hbr_format(format))
 932                         param |= 0x1;
 933
 934                 snd_hda_codec_write(codec, cvt_nid, 0,
 935                                     AC_VERB_SET_DIGI_CONVERT_3, param);
 936         }
 937
 938         snd_hda_codec_setup_stream(codec, cvt_nid, stream_tag, 0, format);
 939         return 0;
 940 }
 941
 942 /* Try to find an available converter
 943  * If pin_idx is less then zero, just try to find an available converter.
 944  * Otherwise, try to find an available converter and get the cvt mux index
 945  * of the pin.
 946  */
 947 static int hdmi_choose_cvt(struct hda_codec *codec,
 948                            int pin_idx, int *cvt_id)
 949 {
 950         struct hdmi_spec *spec = codec->spec;
 951         struct hdmi_spec_per_pin *per_pin;
 952         struct hdmi_spec_per_cvt *per_cvt = NULL;
 953         int cvt_idx, mux_idx = 0;
 954
 955         /* pin_idx < 0 means no pin will be bound to the converter */
 956         if (pin_idx < 0)
 957                 per_pin = NULL;
 958         else
 959                 per_pin = get_pin(spec, pin_idx);
 960
 961         /* Dynamically assign converter to stream */
 962         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
 963                 per_cvt = get_cvt(spec, cvt_idx);
 964
 965                 /* Must not already be assigned */
 966                 if (per_cvt->assigned)
 967                         continue;
 968                 if (per_pin == NULL)
 969                         break;
 970                 /* Must be in pin's mux's list of converters */
 971                 for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
 972                         if (per_pin->mux_nids[mux_idx] == per_cvt->cvt_nid)
 973                                 break;
 974                 /* Not in mux list */
 975                 if (mux_idx == per_pin->num_mux_nids)
 976                         continue;
 977                 break;
 978         }
 979
 980         /* No free converters */
 981         if (cvt_idx == spec->num_cvts)
 982                 return -EBUSY;
 983
 984         if (per_pin != NULL)
 985                 per_pin->mux_idx = mux_idx;
 986
 987         if (cvt_id)
 988                 *cvt_id = cvt_idx;
 989
 990         return 0;
 991 }
 992
 993 /* Assure the pin select the right convetor */
 994 static void intel_verify_pin_cvt_connect(struct hda_codec *codec,
 995                         struct hdmi_spec_per_pin *per_pin)
 996 {
 997         hda_nid_t pin_nid = per_pin->pin_nid;
 998         int mux_idx, curr;
 999
1000         mux_idx = per_pin->mux_idx;
1001         curr = snd_hda_codec_read(codec, pin_nid, 0,
1002                                           AC_VERB_GET_CONNECT_SEL, 0);
1003         if (curr != mux_idx)
1004                 snd_hda_codec_write_cache(codec, pin_nid, 0,
1005                                             AC_VERB_SET_CONNECT_SEL,
1006                                             mux_idx);
1007 }
1008
1009 /* get the mux index for the converter of the pins
1010  * converter's mux index is the same for all pins on Intel platform
1011  */
1012 static int intel_cvt_id_to_mux_idx(struct hdmi_spec *spec,
1013                         hda_nid_t cvt_nid)
1014 {
1015         int i;
1016
1017         for (i = 0; i < spec->num_cvts; i++)
1018                 if (spec->cvt_nids[i] == cvt_nid)
1019                         return i;
1020         return -EINVAL;
1021 }
1022
1023 /* Intel HDMI workaround to fix audio routing issue:
1024  * For some Intel display codecs, pins share the same connection list.
1025  * So a conveter can be selected by multiple pins and playback on any of these
1026  * pins will generate sound on the external display, because audio flows from
1027  * the same converter to the display pipeline. Also muting one pin may make
1028  * other pins have no sound output.
1029  * So this function assures that an assigned converter for a pin is not selected
1030  * by any other pins.
1031  */
1032 static void intel_not_share_assigned_cvt(struct hda_codec *codec,
1033                                          hda_nid_t pin_nid,
1034                                          int dev_id, int mux_idx)
1035 {
1036         struct hdmi_spec *spec = codec->spec;
1037         hda_nid_t nid;
1038         int cvt_idx, curr;
1039         struct hdmi_spec_per_cvt *per_cvt;
1040         struct hdmi_spec_per_pin *per_pin;
1041         int pin_idx;
1042
1043         /* configure the pins connections */
1044         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1045                 int dev_id_saved;
1046                 int dev_num;
1047
1048                 per_pin = get_pin(spec, pin_idx);
1049                 /*
1050                  * pin not connected to monitor
1051                  * no need to operate on it
1052                  */
1053                 if (!per_pin->pcm)
1054                         continue;
1055
1056                 if ((per_pin->pin_nid == pin_nid) &&
1057                         (per_pin->dev_id == dev_id))
1058                         continue;
1059
1060                 /*
1061                  * if per_pin->dev_id >= dev_num,
1062                  * snd_hda_get_dev_select() will fail,
1063                  * and the following operation is unpredictable.
1064                  * So skip this situation.
1065                  */
1066                 dev_num = snd_hda_get_num_devices(codec, per_pin->pin_nid) + 1;
1067                 if (per_pin->dev_id >= dev_num)
1068                         continue;
1069
1070                 nid = per_pin->pin_nid;
1071
1072                 /*
1073                  * Calling this function should not impact
1074                  * on the device entry selection
1075                  * So let's save the dev id for each pin,
1076                  * and restore it when return
1077                  */
1078                 dev_id_saved = snd_hda_get_dev_select(codec, nid);
1079                 snd_hda_set_dev_select(codec, nid, per_pin->dev_id);
1080                 curr = snd_hda_codec_read(codec, nid, 0,
1081                                           AC_VERB_GET_CONNECT_SEL, 0);
1082                 if (curr != mux_idx) {
1083                         snd_hda_set_dev_select(codec, nid, dev_id_saved);
1084                         continue;
1085                 }
1086
1087
1088                 /* choose an unassigned converter. The conveters in the
1089                  * connection list are in the same order as in the codec.
1090                  */
1091                 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
1092                         per_cvt = get_cvt(spec, cvt_idx);
1093                         if (!per_cvt->assigned) {
1094                                 codec_dbg(codec,
1095                                           "choose cvt %d for pin nid %d\n",
1096                                         cvt_idx, nid);
1097                                 snd_hda_codec_write_cache(codec, nid, 0,
1098                                             AC_VERB_SET_CONNECT_SEL,
1099                                             cvt_idx);
1100                                 break;
1101                         }
1102                 }
1103                 snd_hda_set_dev_select(codec, nid, dev_id_saved);
1104         }
1105 }
1106
1107 /* A wrapper of intel_not_share_asigned_cvt() */
1108 static void intel_not_share_assigned_cvt_nid(struct hda_codec *codec,
1109                         hda_nid_t pin_nid, int dev_id, hda_nid_t cvt_nid)
1110 {
1111         int mux_idx;
1112         struct hdmi_spec *spec = codec->spec;
1113
1114         /* On Intel platform, the mapping of converter nid to
1115          * mux index of the pins are always the same.
1116          * The pin nid may be 0, this means all pins will not
1117          * share the converter.
1118          */
1119         mux_idx = intel_cvt_id_to_mux_idx(spec, cvt_nid);
1120         if (mux_idx >= 0)
1121                 intel_not_share_assigned_cvt(codec, pin_nid, dev_id, mux_idx);
1122 }
1123
1124 /* skeleton caller of pin_cvt_fixup ops */
1125 static void pin_cvt_fixup(struct hda_codec *codec,
1126                           struct hdmi_spec_per_pin *per_pin,
1127                           hda_nid_t cvt_nid)
1128 {
1129         struct hdmi_spec *spec = codec->spec;
1130
1131         if (spec->ops.pin_cvt_fixup)
1132                 spec->ops.pin_cvt_fixup(codec, per_pin, cvt_nid);
1133 }
1134
1135 /* called in hdmi_pcm_open when no pin is assigned to the PCM
1136  * in dyn_pcm_assign mode.
1137  */
1138 static int hdmi_pcm_open_no_pin(struct hda_pcm_stream *hinfo,
1139                          struct hda_codec *codec,
1140                          struct snd_pcm_substream *substream)
1141 {
1142         struct hdmi_spec *spec = codec->spec;
1143         struct snd_pcm_runtime *runtime = substream->runtime;
1144         int cvt_idx, pcm_idx;
1145         struct hdmi_spec_per_cvt *per_cvt = NULL;
1146         int err;
1147
1148         pcm_idx = hinfo_to_pcm_index(codec, hinfo);
1149         if (pcm_idx < 0)
1150                 return -EINVAL;
1151
1152         err = hdmi_choose_cvt(codec, -1, &cvt_idx);
1153         if (err)
1154                 return err;
1155
1156         per_cvt = get_cvt(spec, cvt_idx);
1157         per_cvt->assigned = 1;
1158         hinfo->nid = per_cvt->cvt_nid;
1159
1160         pin_cvt_fixup(codec, NULL, per_cvt->cvt_nid);
1161
1162         set_bit(pcm_idx, &spec->pcm_in_use);
1163         /* todo: setup spdif ctls assign */
1164
1165         /* Initially set the converter's capabilities */
1166         hinfo->channels_min = per_cvt->channels_min;
1167         hinfo->channels_max = per_cvt->channels_max;
1168         hinfo->rates = per_cvt->rates;
1169         hinfo->formats = per_cvt->formats;
1170         hinfo->maxbps = per_cvt->maxbps;
1171
1172         /* Store the updated parameters */
1173         runtime->hw.channels_min = hinfo->channels_min;
1174         runtime->hw.channels_max = hinfo->channels_max;
1175         runtime->hw.formats = hinfo->formats;
1176         runtime->hw.rates = hinfo->rates;
1177
1178         snd_pcm_hw_constraint_step(substream->runtime, 0,
1179                                    SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1180         return 0;
1181 }
1182
1183 /*
1184  * HDA PCM callbacks
1185  */
1186 static int hdmi_pcm_open(struct hda_pcm_stream *hinfo,
1187                          struct hda_codec *codec,
1188                          struct snd_pcm_substream *substream)
1189 {
1190         struct hdmi_spec *spec = codec->spec;
1191         struct snd_pcm_runtime *runtime = substream->runtime;
1192         int pin_idx, cvt_idx, pcm_idx;
1193         struct hdmi_spec_per_pin *per_pin;
1194         struct hdmi_eld *eld;
1195         struct hdmi_spec_per_cvt *per_cvt = NULL;
1196         int err;
1197
1198         /* Validate hinfo */
1199         pcm_idx = hinfo_to_pcm_index(codec, hinfo);
1200         if (pcm_idx < 0)
1201                 return -EINVAL;
1202
1203         mutex_lock(&spec->pcm_lock);
1204         pin_idx = hinfo_to_pin_index(codec, hinfo);
1205         if (!spec->dyn_pcm_assign) {
1206                 if (snd_BUG_ON(pin_idx < 0)) {
1207                         err = -EINVAL;
1208                         goto unlock;
1209                 }
1210         } else {
1211                 /* no pin is assigned to the PCM
1212                  * PA need pcm open successfully when probe
1213                  */
1214                 if (pin_idx < 0) {
1215                         err = hdmi_pcm_open_no_pin(hinfo, codec, substream);
1216                         goto unlock;
1217                 }
1218         }
1219
1220         err = hdmi_choose_cvt(codec, pin_idx, &cvt_idx);
1221         if (err < 0)
1222                 goto unlock;
1223
1224         per_cvt = get_cvt(spec, cvt_idx);
1225         /* Claim converter */
1226         per_cvt->assigned = 1;
1227
1228         set_bit(pcm_idx, &spec->pcm_in_use);
1229         per_pin = get_pin(spec, pin_idx);
1230         per_pin->cvt_nid = per_cvt->cvt_nid;
1231         hinfo->nid = per_cvt->cvt_nid;
1232
1233         snd_hda_set_dev_select(codec, per_pin->pin_nid, per_pin->dev_id);
1234         snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
1235                             AC_VERB_SET_CONNECT_SEL,
1236                             per_pin->mux_idx);
1237
1238         /* configure unused pins to choose other converters */
1239         pin_cvt_fixup(codec, per_pin, 0);
1240
1241         snd_hda_spdif_ctls_assign(codec, pcm_idx, per_cvt->cvt_nid);
1242
1243         /* Initially set the converter's capabilities */
1244         hinfo->channels_min = per_cvt->channels_min;
1245         hinfo->channels_max = per_cvt->channels_max;
1246         hinfo->rates = per_cvt->rates;
1247         hinfo->formats = per_cvt->formats;
1248         hinfo->maxbps = per_cvt->maxbps;
1249
1250         eld = &per_pin->sink_eld;
1251         /* Restrict capabilities by ELD if this isn't disabled */
1252         if (!static_hdmi_pcm && eld->eld_valid) {
1253                 snd_hdmi_eld_update_pcm_info(&eld->info, hinfo);
1254                 if (hinfo->channels_min > hinfo->channels_max ||
1255                     !hinfo->rates || !hinfo->formats) {
1256                         per_cvt->assigned = 0;
1257                         hinfo->nid = 0;
1258                         snd_hda_spdif_ctls_unassign(codec, pcm_idx);
1259                         err = -ENODEV;
1260                         goto unlock;
1261                 }
1262         }
1263
1264         /* Store the updated parameters */
1265         runtime->hw.channels_min = hinfo->channels_min;
1266         runtime->hw.channels_max = hinfo->channels_max;
1267         runtime->hw.formats = hinfo->formats;
1268         runtime->hw.rates = hinfo->rates;
1269
1270         snd_pcm_hw_constraint_step(substream->runtime, 0,
1271                                    SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1272  unlock:
1273         mutex_unlock(&spec->pcm_lock);
1274         return err;
1275 }
1276
1277 /*
1278  * HDA/HDMI auto parsing
1279  */
1280 static int hdmi_read_pin_conn(struct hda_codec *codec, int pin_idx)
1281 {
1282         struct hdmi_spec *spec = codec->spec;
1283         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1284         hda_nid_t pin_nid = per_pin->pin_nid;
1285
1286         if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
1287                 codec_warn(codec,
1288                            "HDMI: pin %d wcaps %#x does not support connection list\n",
1289                            pin_nid, get_wcaps(codec, pin_nid));
1290                 return -EINVAL;
1291         }
1292
1293         /* all the device entries on the same pin have the same conn list */
1294         per_pin->num_mux_nids = snd_hda_get_connections(codec, pin_nid,
1295                                                         per_pin->mux_nids,
1296                                                         HDA_MAX_CONNECTIONS);
1297
1298         return 0;
1299 }
1300
1301 static int hdmi_find_pcm_slot(struct hdmi_spec *spec,
1302                                 struct hdmi_spec_per_pin *per_pin)
1303 {
1304         int i;
1305
1306         /* try the prefer PCM */
1307         if (!test_bit(per_pin->pin_nid_idx, &spec->pcm_bitmap))
1308                 return per_pin->pin_nid_idx;
1309
1310         /* have a second try; check the "reserved area" over num_pins */
1311         for (i = spec->num_nids; i < spec->pcm_used; i++) {
1312                 if (!test_bit(i, &spec->pcm_bitmap))
1313                         return i;
1314         }
1315
1316         /* the last try; check the empty slots in pins */
1317         for (i = 0; i < spec->num_nids; i++) {
1318                 if (!test_bit(i, &spec->pcm_bitmap))
1319                         return i;
1320         }
1321         return -EBUSY;
1322 }
1323
1324 static void hdmi_attach_hda_pcm(struct hdmi_spec *spec,
1325                                 struct hdmi_spec_per_pin *per_pin)
1326 {
1327         int idx;
1328
1329         /* pcm already be attached to the pin */
1330         if (per_pin->pcm)
1331                 return;
1332         idx = hdmi_find_pcm_slot(spec, per_pin);
1333         if (idx == -EBUSY)
1334                 return;
1335         per_pin->pcm_idx = idx;
1336         per_pin->pcm = get_hdmi_pcm(spec, idx);
1337         set_bit(idx, &spec->pcm_bitmap);
1338 }
1339
1340 static void hdmi_detach_hda_pcm(struct hdmi_spec *spec,
1341                                 struct hdmi_spec_per_pin *per_pin)
1342 {
1343         int idx;
1344
1345         /* pcm already be detached from the pin */
1346         if (!per_pin->pcm)
1347                 return;
1348         idx = per_pin->pcm_idx;
1349         per_pin->pcm_idx = -1;
1350         per_pin->pcm = NULL;
1351         if (idx >= 0 && idx < spec->pcm_used)
1352                 clear_bit(idx, &spec->pcm_bitmap);
1353 }
1354
1355 static int hdmi_get_pin_cvt_mux(struct hdmi_spec *spec,
1356                 struct hdmi_spec_per_pin *per_pin, hda_nid_t cvt_nid)
1357 {
1358         int mux_idx;
1359
1360         for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
1361                 if (per_pin->mux_nids[mux_idx] == cvt_nid)
1362                         break;
1363         return mux_idx;
1364 }
1365
1366 static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid);
1367
1368 static void hdmi_pcm_setup_pin(struct hdmi_spec *spec,
1369                            struct hdmi_spec_per_pin *per_pin)
1370 {
1371         struct hda_codec *codec = per_pin->codec;
1372         struct hda_pcm *pcm;
1373         struct hda_pcm_stream *hinfo;
1374         struct snd_pcm_substream *substream;
1375         int mux_idx;
1376         bool non_pcm;
1377
1378         if (per_pin->pcm_idx >= 0 && per_pin->pcm_idx < spec->pcm_used)
1379                 pcm = get_pcm_rec(spec, per_pin->pcm_idx);
1380         else
1381                 return;
1382         if (!pcm->pcm)
1383                 return;
1384         if (!test_bit(per_pin->pcm_idx, &spec->pcm_in_use))
1385                 return;
1386
1387         /* hdmi audio only uses playback and one substream */
1388         hinfo = pcm->stream;
1389         substream = pcm->pcm->streams[0].substream;
1390
1391         per_pin->cvt_nid = hinfo->nid;
1392
1393         mux_idx = hdmi_get_pin_cvt_mux(spec, per_pin, hinfo->nid);
1394         if (mux_idx < per_pin->num_mux_nids) {
1395                 snd_hda_set_dev_select(codec, per_pin->pin_nid,
1396                                    per_pin->dev_id);
1397                 snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
1398                                 AC_VERB_SET_CONNECT_SEL,
1399                                 mux_idx);
1400         }
1401         snd_hda_spdif_ctls_assign(codec, per_pin->pcm_idx, hinfo->nid);
1402
1403         non_pcm = check_non_pcm_per_cvt(codec, hinfo->nid);
1404         if (substream->runtime)
1405                 per_pin->channels = substream->runtime->channels;
1406         per_pin->setup = true;
1407         per_pin->mux_idx = mux_idx;
1408
1409         hdmi_setup_audio_infoframe(codec, per_pin, non_pcm);
1410 }
1411
1412 static void hdmi_pcm_reset_pin(struct hdmi_spec *spec,
1413                            struct hdmi_spec_per_pin *per_pin)
1414 {
1415         if (per_pin->pcm_idx >= 0 && per_pin->pcm_idx < spec->pcm_used)
1416                 snd_hda_spdif_ctls_unassign(per_pin->codec, per_pin->pcm_idx);
1417
1418         per_pin->chmap_set = false;
1419         memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
1420
1421         per_pin->setup = false;
1422         per_pin->channels = 0;
1423 }
1424
1425 /* update per_pin ELD from the given new ELD;
1426  * setup info frame and notification accordingly
1427  */
1428 static bool update_eld(struct hda_codec *codec,
1429                        struct hdmi_spec_per_pin *per_pin,
1430                        struct hdmi_eld *eld)
1431 {
1432         struct hdmi_eld *pin_eld = &per_pin->sink_eld;
1433         struct hdmi_spec *spec = codec->spec;
1434         bool old_eld_valid = pin_eld->eld_valid;
1435         bool eld_changed;
1436         int pcm_idx;
1437
1438         /* for monitor disconnection, save pcm_idx firstly */
1439         pcm_idx = per_pin->pcm_idx;
1440         if (spec->dyn_pcm_assign) {
1441                 if (eld->eld_valid) {
1442                         hdmi_attach_hda_pcm(spec, per_pin);
1443                         hdmi_pcm_setup_pin(spec, per_pin);
1444                 } else {
1445                         hdmi_pcm_reset_pin(spec, per_pin);
1446                         hdmi_detach_hda_pcm(spec, per_pin);
1447                 }
1448         }
1449         /* if pcm_idx == -1, it means this is in monitor connection event
1450          * we can get the correct pcm_idx now.
1451          */
1452         if (pcm_idx == -1)
1453                 pcm_idx = per_pin->pcm_idx;
1454
1455         if (eld->eld_valid)
1456                 snd_hdmi_show_eld(codec, &eld->info);
1457
1458         eld_changed = (pin_eld->eld_valid != eld->eld_valid);
1459         eld_changed |= (pin_eld->monitor_present != eld->monitor_present);
1460         if (!eld_changed && eld->eld_valid && pin_eld->eld_valid)
1461                 if (pin_eld->eld_size != eld->eld_size ||
1462                     memcmp(pin_eld->eld_buffer, eld->eld_buffer,
1463                            eld->eld_size) != 0)
1464                         eld_changed = true;
1465
1466         if (eld_changed) {
1467                 pin_eld->monitor_present = eld->monitor_present;
1468                 pin_eld->eld_valid = eld->eld_valid;
1469                 pin_eld->eld_size = eld->eld_size;
1470                 if (eld->eld_valid)
1471                         memcpy(pin_eld->eld_buffer, eld->eld_buffer,
1472                                eld->eld_size);
1473                 pin_eld->info = eld->info;
1474         }
1475
1476         /*
1477          * Re-setup pin and infoframe. This is needed e.g. when
1478          * - sink is first plugged-in
1479          * - transcoder can change during stream playback on Haswell
1480          *   and this can make HW reset converter selection on a pin.
1481          */
1482         if (eld->eld_valid && !old_eld_valid && per_pin->setup) {
1483                 pin_cvt_fixup(codec, per_pin, 0);
1484                 hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm);
1485         }
1486
1487         if (eld_changed && pcm_idx >= 0)
1488                 snd_ctl_notify(codec->card,
1489                                SNDRV_CTL_EVENT_MASK_VALUE |
1490                                SNDRV_CTL_EVENT_MASK_INFO,
1491                                &get_hdmi_pcm(spec, pcm_idx)->eld_ctl->id);
1492         return eld_changed;
1493 }
1494
1495 /* update ELD and jack state via HD-audio verbs */
1496 static bool hdmi_present_sense_via_verbs(struct hdmi_spec_per_pin *per_pin,
1497                                          int repoll)
1498 {
1499         struct hda_jack_tbl *jack;
1500         struct hda_codec *codec = per_pin->codec;
1501         struct hdmi_spec *spec = codec->spec;
1502         struct hdmi_eld *eld = &spec->temp_eld;
1503         hda_nid_t pin_nid = per_pin->pin_nid;
1504         /*
1505          * Always execute a GetPinSense verb here, even when called from
1506          * hdmi_intrinsic_event; for some NVIDIA HW, the unsolicited
1507          * response's PD bit is not the real PD value, but indicates that
1508          * the real PD value changed. An older version of the HD-audio
1509          * specification worked this way. Hence, we just ignore the data in
1510          * the unsolicited response to avoid custom WARs.
1511          */
1512         int present;
1513         bool ret;
1514         bool do_repoll = false;
1515
1516         present = snd_hda_jack_pin_sense(codec, pin_nid, per_pin->dev_id);
1517
1518         mutex_lock(&per_pin->lock);
1519         eld->monitor_present = !!(present & AC_PINSENSE_PRESENCE);
1520         if (eld->monitor_present)
1521                 eld->eld_valid  = !!(present & AC_PINSENSE_ELDV);
1522         else
1523                 eld->eld_valid = false;
1524
1525         codec_dbg(codec,
1526                 "HDMI status: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
1527                 codec->addr, pin_nid, eld->monitor_present, eld->eld_valid);
1528
1529         if (eld->eld_valid) {
1530                 if (spec->ops.pin_get_eld(codec, pin_nid, eld->eld_buffer,
1531                                                      &eld->eld_size) < 0)
1532                         eld->eld_valid = false;
1533                 else {
1534                         if (snd_hdmi_parse_eld(codec, &eld->info, eld->eld_buffer,
1535                                                     eld->eld_size) < 0)
1536                                 eld->eld_valid = false;
1537                 }
1538                 if (!eld->eld_valid && repoll)
1539                         do_repoll = true;
1540         }
1541
1542         if (do_repoll)
1543                 schedule_delayed_work(&per_pin->work, msecs_to_jiffies(300));
1544         else
1545                 update_eld(codec, per_pin, eld);
1546
1547         ret = !repoll || !eld->monitor_present || eld->eld_valid;
1548
1549         jack = snd_hda_jack_tbl_get_mst(codec, pin_nid, per_pin->dev_id);
1550         if (jack) {
1551                 jack->block_report = !ret;
1552                 jack->pin_sense = (eld->monitor_present && eld->eld_valid) ?
1553                         AC_PINSENSE_PRESENCE : 0;
1554         }
1555         mutex_unlock(&per_pin->lock);
1556         return ret;
1557 }
1558
1559 static struct snd_jack *pin_idx_to_jack(struct hda_codec *codec,
1560                                  struct hdmi_spec_per_pin *per_pin)
1561 {
1562         struct hdmi_spec *spec = codec->spec;
1563         struct snd_jack *jack = NULL;
1564         struct hda_jack_tbl *jack_tbl;
1565
1566         /* if !dyn_pcm_assign, get jack from hda_jack_tbl
1567          * in !dyn_pcm_assign case, spec->pcm_rec[].jack is not
1568          * NULL even after snd_hda_jack_tbl_clear() is called to
1569          * free snd_jack. This may cause access invalid memory
1570          * when calling snd_jack_report
1571          */
1572         if (per_pin->pcm_idx >= 0 && spec->dyn_pcm_assign)
1573                 jack = spec->pcm_rec[per_pin->pcm_idx].jack;
1574         else if (!spec->dyn_pcm_assign) {
1575                 /*
1576                  * jack tbl doesn't support DP MST
1577                  * DP MST will use dyn_pcm_assign,
1578                  * so DP MST will never come here
1579                  */
1580                 jack_tbl = snd_hda_jack_tbl_get_mst(codec, per_pin->pin_nid,
1581                                                     per_pin->dev_id);
1582                 if (jack_tbl)
1583                         jack = jack_tbl->jack;
1584         }
1585         return jack;
1586 }
1587
1588 /* update ELD and jack state via audio component */
1589 static void sync_eld_via_acomp(struct hda_codec *codec,
1590                                struct hdmi_spec_per_pin *per_pin)
1591 {
1592         struct hdmi_spec *spec = codec->spec;
1593         struct hdmi_eld *eld = &spec->temp_eld;
1594         struct snd_jack *jack = NULL;
1595         bool changed;
1596         int size;
1597
1598         mutex_lock(&per_pin->lock);
1599         eld->monitor_present = false;
1600         size = snd_hdac_acomp_get_eld(&codec->core, per_pin->pin_nid,
1601                                       per_pin->dev_id, &eld->monitor_present,
1602                                       eld->eld_buffer, ELD_MAX_SIZE);
1603         if (size > 0) {
1604                 size = min(size, ELD_MAX_SIZE);
1605                 if (snd_hdmi_parse_eld(codec, &eld->info,
1606                                        eld->eld_buffer, size) < 0)
1607                         size = -EINVAL;
1608         }
1609
1610         if (size > 0) {
1611                 eld->eld_valid = true;
1612                 eld->eld_size = size;
1613         } else {
1614                 eld->eld_valid = false;
1615                 eld->eld_size = 0;
1616         }
1617
1618         /* pcm_idx >=0 before update_eld() means it is in monitor
1619          * disconnected event. Jack must be fetched before update_eld()
1620          */
1621         jack = pin_idx_to_jack(codec, per_pin);
1622         changed = update_eld(codec, per_pin, eld);
1623         if (jack == NULL)
1624                 jack = pin_idx_to_jack(codec, per_pin);
1625         if (changed && jack)
1626                 snd_jack_report(jack,
1627                                 (eld->monitor_present && eld->eld_valid) ?
1628                                 SND_JACK_AVOUT : 0);
1629         mutex_unlock(&per_pin->lock);
1630 }
1631
1632 static bool hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll)
1633 {
1634         struct hda_codec *codec = per_pin->codec;
1635         int ret;
1636
1637         /* no temporary power up/down needed for component notifier */
1638         if (!codec_has_acomp(codec)) {
1639                 ret = snd_hda_power_up_pm(codec);
1640                 if (ret < 0 && pm_runtime_suspended(hda_codec_dev(codec))) {
1641                         snd_hda_power_down_pm(codec);
1642                         return false;
1643                 }
1644                 ret = hdmi_present_sense_via_verbs(per_pin, repoll);
1645                 snd_hda_power_down_pm(codec);
1646         } else {
1647                 sync_eld_via_acomp(codec, per_pin);
1648                 ret = false; /* don't call snd_hda_jack_report_sync() */
1649         }
1650
1651         return ret;
1652 }
1653
1654 static void hdmi_repoll_eld(struct work_struct *work)
1655 {
1656         struct hdmi_spec_per_pin *per_pin =
1657         container_of(to_delayed_work(work), struct hdmi_spec_per_pin, work);
1658         struct hda_codec *codec = per_pin->codec;
1659         struct hdmi_spec *spec = codec->spec;
1660         struct hda_jack_tbl *jack;
1661
1662         jack = snd_hda_jack_tbl_get_mst(codec, per_pin->pin_nid,
1663                                         per_pin->dev_id);
1664         if (jack)
1665                 jack->jack_dirty = 1;
1666
1667         if (per_pin->repoll_count++ > 6)
1668                 per_pin->repoll_count = 0;
1669
1670         mutex_lock(&spec->pcm_lock);
1671         if (hdmi_present_sense(per_pin, per_pin->repoll_count))
1672                 snd_hda_jack_report_sync(per_pin->codec);
1673         mutex_unlock(&spec->pcm_lock);
1674 }
1675
1676 static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
1677                                              hda_nid_t nid);
1678
1679 static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
1680 {
1681         struct hdmi_spec *spec = codec->spec;
1682         unsigned int caps, config;
1683         int pin_idx;
1684         struct hdmi_spec_per_pin *per_pin;
1685         int err;
1686         int dev_num, i;
1687
1688         caps = snd_hda_query_pin_caps(codec, pin_nid);
1689         if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP)))
1690                 return 0;
1691
1692         /*
1693          * For DP MST audio, Configuration Default is the same for
1694          * all device entries on the same pin
1695          */
1696         config = snd_hda_codec_get_pincfg(codec, pin_nid);
1697         if (get_defcfg_connect(config) == AC_JACK_PORT_NONE)
1698                 return 0;
1699
1700         /*
1701          * To simplify the implementation, malloc all
1702          * the virtual pins in the initialization statically
1703          */
1704         if (spec->intel_hsw_fixup) {
1705                 /*
1706                  * On Intel platforms, device entries number is
1707                  * changed dynamically. If there is a DP MST
1708                  * hub connected, the device entries number is 3.
1709                  * Otherwise, it is 1.
1710                  * Here we manually set dev_num to 3, so that
1711                  * we can initialize all the device entries when
1712                  * bootup statically.
1713                  */
1714                 dev_num = 3;
1715                 spec->dev_num = 3;
1716         } else if (spec->dyn_pcm_assign && codec->dp_mst) {
1717                 dev_num = snd_hda_get_num_devices(codec, pin_nid) + 1;
1718                 /*
1719                  * spec->dev_num is the maxinum number of device entries
1720                  * among all the pins
1721                  */
1722                 spec->dev_num = (spec->dev_num > dev_num) ?
1723                         spec->dev_num : dev_num;
1724         } else {
1725                 /*
1726                  * If the platform doesn't support DP MST,
1727                  * manually set dev_num to 1. This means
1728                  * the pin has only one device entry.
1729                  */
1730                 dev_num = 1;
1731                 spec->dev_num = 1;
1732         }
1733
1734         for (i = 0; i < dev_num; i++) {
1735                 pin_idx = spec->num_pins;
1736                 per_pin = snd_array_new(&spec->pins);
1737
1738                 if (!per_pin)
1739                         return -ENOMEM;
1740
1741                 if (spec->dyn_pcm_assign) {
1742                         per_pin->pcm = NULL;
1743                         per_pin->pcm_idx = -1;
1744                 } else {
1745                         per_pin->pcm = get_hdmi_pcm(spec, pin_idx);
1746                         per_pin->pcm_idx = pin_idx;
1747                 }
1748                 per_pin->pin_nid = pin_nid;
1749                 per_pin->pin_nid_idx = spec->num_nids;
1750                 per_pin->dev_id = i;
1751                 per_pin->non_pcm = false;
1752                 snd_hda_set_dev_select(codec, pin_nid, i);
1753                 if (spec->intel_hsw_fixup)
1754                         intel_haswell_fixup_connect_list(codec, pin_nid);
1755                 err = hdmi_read_pin_conn(codec, pin_idx);
1756                 if (err < 0)
1757                         return err;
1758                 spec->num_pins++;
1759         }
1760         spec->num_nids++;
1761
1762         return 0;
1763 }
1764
1765 static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1766 {
1767         struct hdmi_spec *spec = codec->spec;
1768         struct hdmi_spec_per_cvt *per_cvt;
1769         unsigned int chans;
1770         int err;
1771
1772         chans = get_wcaps(codec, cvt_nid);
1773         chans = get_wcaps_channels(chans);
1774
1775         per_cvt = snd_array_new(&spec->cvts);
1776         if (!per_cvt)
1777                 return -ENOMEM;
1778
1779         per_cvt->cvt_nid = cvt_nid;
1780         per_cvt->channels_min = 2;
1781         if (chans <= 16) {
1782                 per_cvt->channels_max = chans;
1783                 if (chans > spec->chmap.channels_max)
1784                         spec->chmap.channels_max = chans;
1785         }
1786
1787         err = snd_hda_query_supported_pcm(codec, cvt_nid,
1788                                           &per_cvt->rates,
1789                                           &per_cvt->formats,
1790                                           &per_cvt->maxbps);
1791         if (err < 0)
1792                 return err;
1793
1794         if (spec->num_cvts < ARRAY_SIZE(spec->cvt_nids))
1795                 spec->cvt_nids[spec->num_cvts] = cvt_nid;
1796         spec->num_cvts++;
1797
1798         return 0;
1799 }
1800
1801 static int hdmi_parse_codec(struct hda_codec *codec)
1802 {
1803         hda_nid_t nid;
1804         int i, nodes;
1805
1806         nodes = snd_hda_get_sub_nodes(codec, codec->core.afg, &nid);
1807         if (!nid || nodes < 0) {
1808                 codec_warn(codec, "HDMI: failed to get afg sub nodes\n");
1809                 return -EINVAL;
1810         }
1811
1812         for (i = 0; i < nodes; i++, nid++) {
1813                 unsigned int caps;
1814                 unsigned int type;
1815
1816                 caps = get_wcaps(codec, nid);
1817                 type = get_wcaps_type(caps);
1818
1819                 if (!(caps & AC_WCAP_DIGITAL))
1820                         continue;
1821
1822                 switch (type) {
1823                 case AC_WID_AUD_OUT:
1824                         hdmi_add_cvt(codec, nid);
1825                         break;
1826                 case AC_WID_PIN:
1827                         hdmi_add_pin(codec, nid);
1828                         break;
1829                 }
1830         }
1831
1832         return 0;
1833 }
1834
1835 /*
1836  */
1837 static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1838 {
1839         struct hda_spdif_out *spdif;
1840         bool non_pcm;
1841
1842         mutex_lock(&codec->spdif_mutex);
1843         spdif = snd_hda_spdif_out_of_nid(codec, cvt_nid);
1844         /* Add sanity check to pass klockwork check.
1845          * This should never happen.
1846          */
1847         if (WARN_ON(spdif == NULL))
1848                 return true;
1849         non_pcm = !!(spdif->status & IEC958_AES0_NONAUDIO);
1850         mutex_unlock(&codec->spdif_mutex);
1851         return non_pcm;
1852 }
1853
1854 /*
1855  * HDMI callbacks
1856  */
1857
1858 static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1859                                            struct hda_codec *codec,
1860                                            unsigned int stream_tag,
1861                                            unsigned int format,
1862                                            struct snd_pcm_substream *substream)
1863 {
1864         hda_nid_t cvt_nid = hinfo->nid;
1865         struct hdmi_spec *spec = codec->spec;
1866         int pin_idx;
1867         struct hdmi_spec_per_pin *per_pin;
1868         hda_nid_t pin_nid;
1869         struct snd_pcm_runtime *runtime = substream->runtime;
1870         bool non_pcm;
1871         int pinctl, stripe;
1872         int err = 0;
1873
1874         mutex_lock(&spec->pcm_lock);
1875         pin_idx = hinfo_to_pin_index(codec, hinfo);
1876         if (spec->dyn_pcm_assign && pin_idx < 0) {
1877                 /* when dyn_pcm_assign and pcm is not bound to a pin
1878                  * skip pin setup and return 0 to make audio playback
1879                  * be ongoing
1880                  */
1881                 pin_cvt_fixup(codec, NULL, cvt_nid);
1882                 snd_hda_codec_setup_stream(codec, cvt_nid,
1883                                         stream_tag, 0, format);
1884                 goto unlock;
1885         }
1886
1887         if (snd_BUG_ON(pin_idx < 0)) {
1888                 err = -EINVAL;
1889                 goto unlock;
1890         }
1891         per_pin = get_pin(spec, pin_idx);
1892         pin_nid = per_pin->pin_nid;
1893
1894         /* Verify pin:cvt selections to avoid silent audio after S3.
1895          * After S3, the audio driver restores pin:cvt selections
1896          * but this can happen before gfx is ready and such selection
1897          * is overlooked by HW. Thus multiple pins can share a same
1898          * default convertor and mute control will affect each other,
1899          * which can cause a resumed audio playback become silent
1900          * after S3.
1901          */
1902         pin_cvt_fixup(codec, per_pin, 0);
1903
1904         /* Call sync_audio_rate to set the N/CTS/M manually if necessary */
1905         /* Todo: add DP1.2 MST audio support later */
1906         if (codec_has_acomp(codec))
1907                 snd_hdac_sync_audio_rate(&codec->core, pin_nid, per_pin->dev_id,
1908                                          runtime->rate);
1909
1910         non_pcm = check_non_pcm_per_cvt(codec, cvt_nid);
1911         mutex_lock(&per_pin->lock);
1912         per_pin->channels = substream->runtime->channels;
1913         per_pin->setup = true;
1914
1915         if (get_wcaps(codec, cvt_nid) & AC_WCAP_STRIPE) {
1916                 stripe = snd_hdac_get_stream_stripe_ctl(&codec->bus->core,
1917                                                         substream);
1918                 snd_hda_codec_write(codec, cvt_nid, 0,
1919                                     AC_VERB_SET_STRIPE_CONTROL,
1920                                     stripe);
1921         }
1922
1923         hdmi_setup_audio_infoframe(codec, per_pin, non_pcm);
1924         mutex_unlock(&per_pin->lock);
1925         if (spec->dyn_pin_out) {
1926                 pinctl = snd_hda_codec_read(codec, pin_nid, 0,
1927                                             AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
1928                 snd_hda_codec_write(codec, pin_nid, 0,
1929                                     AC_VERB_SET_PIN_WIDGET_CONTROL,
1930                                     pinctl | PIN_OUT);
1931         }
1932
1933         /* snd_hda_set_dev_select() has been called before */
1934         err = spec->ops.setup_stream(codec, cvt_nid, pin_nid,
1935                                  stream_tag, format);
1936  unlock:
1937         mutex_unlock(&spec->pcm_lock);
1938         return err;
1939 }
1940
1941 static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
1942                                              struct hda_codec *codec,
1943                                              struct snd_pcm_substream *substream)
1944 {
1945         snd_hda_codec_cleanup_stream(codec, hinfo->nid);
1946         return 0;
1947 }
1948
1949 static int hdmi_pcm_close(struct hda_pcm_stream *hinfo,
1950                           struct hda_codec *codec,
1951                           struct snd_pcm_substream *substream)
1952 {
1953         struct hdmi_spec *spec = codec->spec;
1954         int cvt_idx, pin_idx, pcm_idx;
1955         struct hdmi_spec_per_cvt *per_cvt;
1956         struct hdmi_spec_per_pin *per_pin;
1957         int pinctl;
1958         int err = 0;
1959
1960         if (hinfo->nid) {
1961                 pcm_idx = hinfo_to_pcm_index(codec, hinfo);
1962                 if (snd_BUG_ON(pcm_idx < 0))
1963                         return -EINVAL;
1964                 cvt_idx = cvt_nid_to_cvt_index(codec, hinfo->nid);
1965                 if (snd_BUG_ON(cvt_idx < 0))
1966                         return -EINVAL;
1967                 per_cvt = get_cvt(spec, cvt_idx);
1968
1969                 snd_BUG_ON(!per_cvt->assigned);
1970                 per_cvt->assigned = 0;
1971                 hinfo->nid = 0;
1972
1973                 mutex_lock(&spec->pcm_lock);
1974                 snd_hda_spdif_ctls_unassign(codec, pcm_idx);
1975                 clear_bit(pcm_idx, &spec->pcm_in_use);
1976                 pin_idx = hinfo_to_pin_index(codec, hinfo);
1977                 if (spec->dyn_pcm_assign && pin_idx < 0)
1978                         goto unlock;
1979
1980                 if (snd_BUG_ON(pin_idx < 0)) {
1981                         err = -EINVAL;
1982                         goto unlock;
1983                 }
1984                 per_pin = get_pin(spec, pin_idx);
1985
1986                 if (spec->dyn_pin_out) {
1987                         pinctl = snd_hda_codec_read(codec, per_pin->pin_nid, 0,
1988                                         AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
1989                         snd_hda_codec_write(codec, per_pin->pin_nid, 0,
1990                                             AC_VERB_SET_PIN_WIDGET_CONTROL,
1991                                             pinctl & ~PIN_OUT);
1992                 }
1993
1994                 mutex_lock(&per_pin->lock);
1995                 per_pin->chmap_set = false;
1996                 memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
1997
1998                 per_pin->setup = false;
1999                 per_pin->channels = 0;
2000                 mutex_unlock(&per_pin->lock);
2001         unlock:
2002                 mutex_unlock(&spec->pcm_lock);
2003         }
2004
2005         return err;
2006 }
2007
2008 static const struct hda_pcm_ops generic_ops = {
2009         .open = hdmi_pcm_open,
2010         .close = hdmi_pcm_close,
2011         .prepare = generic_hdmi_playback_pcm_prepare,
2012         .cleanup = generic_hdmi_playback_pcm_cleanup,
2013 };
2014
2015 static int hdmi_get_spk_alloc(struct hdac_device *hdac, int pcm_idx)
2016 {
2017         struct hda_codec *codec = container_of(hdac, struct hda_codec, core);
2018         struct hdmi_spec *spec = codec->spec;
2019         struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
2020
2021         if (!per_pin)
2022                 return 0;
2023
2024         return per_pin->sink_eld.info.spk_alloc;
2025 }
2026
2027 static void hdmi_get_chmap(struct hdac_device *hdac, int pcm_idx,
2028                                         unsigned char *chmap)
2029 {
2030         struct hda_codec *codec = container_of(hdac, struct hda_codec, core);
2031         struct hdmi_spec *spec = codec->spec;
2032         struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
2033
2034         /* chmap is already set to 0 in caller */
2035         if (!per_pin)
2036                 return;
2037
2038         memcpy(chmap, per_pin->chmap, ARRAY_SIZE(per_pin->chmap));
2039 }
2040
2041 static void hdmi_set_chmap(struct hdac_device *hdac, int pcm_idx,
2042                                 unsigned char *chmap, int prepared)
2043 {
2044         struct hda_codec *codec = container_of(hdac, struct hda_codec, core);
2045         struct hdmi_spec *spec = codec->spec;
2046         struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
2047
2048         if (!per_pin)
2049                 return;
2050         mutex_lock(&per_pin->lock);
2051         per_pin->chmap_set = true;
2052         memcpy(per_pin->chmap, chmap, ARRAY_SIZE(per_pin->chmap));
2053         if (prepared)
2054                 hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm);
2055         mutex_unlock(&per_pin->lock);
2056 }
2057
2058 static bool is_hdmi_pcm_attached(struct hdac_device *hdac, int pcm_idx)
2059 {
2060         struct hda_codec *codec = container_of(hdac, struct hda_codec, core);
2061         struct hdmi_spec *spec = codec->spec;
2062         struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
2063
2064         return per_pin ? true:false;
2065 }
2066
2067 static int generic_hdmi_build_pcms(struct hda_codec *codec)
2068 {
2069         struct hdmi_spec *spec = codec->spec;
2070         int idx, pcm_num;
2071
2072         /*
2073          * for non-mst mode, pcm number is the same as before
2074          * for DP MST mode without extra PCM, pcm number is same
2075          * for DP MST mode with extra PCMs, pcm number is
2076          *  (nid number + dev_num - 1)
2077          * dev_num is the device entry number in a pin
2078          */
2079
2080         if (codec->mst_no_extra_pcms)
2081                 pcm_num = spec->num_nids;
2082         else
2083                 pcm_num = spec->num_nids + spec->dev_num - 1;
2084
2085         codec_dbg(codec, "hdmi: pcm_num set to %d\n", pcm_num);
2086
2087         for (idx = 0; idx < pcm_num; idx++) {
2088                 struct hda_pcm *info;
2089                 struct hda_pcm_stream *pstr;
2090
2091                 info = snd_hda_codec_pcm_new(codec, "HDMI %d", idx);
2092                 if (!info)
2093                         return -ENOMEM;
2094
2095                 spec->pcm_rec[idx].pcm = info;
2096                 spec->pcm_used++;
2097                 info->pcm_type = HDA_PCM_TYPE_HDMI;
2098                 info->own_chmap = true;
2099
2100                 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
2101                 pstr->substreams = 1;
2102                 pstr->ops = generic_ops;
2103                 /* pcm number is less than 16 */
2104                 if (spec->pcm_used >= 16)
2105                         break;
2106                 /* other pstr fields are set in open */
2107         }
2108
2109         return 0;
2110 }
2111
2112 static void free_hdmi_jack_priv(struct snd_jack *jack)
2113 {
2114         struct hdmi_pcm *pcm = jack->private_data;
2115
2116         pcm->jack = NULL;
2117 }
2118
2119 static int add_hdmi_jack_kctl(struct hda_codec *codec,
2120                                struct hdmi_spec *spec,
2121                                int pcm_idx,
2122                                const char *name)
2123 {
2124         struct snd_jack *jack;
2125         int err;
2126
2127         err = snd_jack_new(codec->card, name, SND_JACK_AVOUT, &jack,
2128                            true, false);
2129         if (err < 0)
2130                 return err;
2131
2132         spec->pcm_rec[pcm_idx].jack = jack;
2133         jack->private_data = &spec->pcm_rec[pcm_idx];
2134         jack->private_free = free_hdmi_jack_priv;
2135         return 0;
2136 }
2137
2138 static int generic_hdmi_build_jack(struct hda_codec *codec, int pcm_idx)
2139 {
2140         char hdmi_str[32] = "HDMI/DP";
2141         struct hdmi_spec *spec = codec->spec;
2142         struct hdmi_spec_per_pin *per_pin;
2143         struct hda_jack_tbl *jack;
2144         int pcmdev = get_pcm_rec(spec, pcm_idx)->device;
2145         bool phantom_jack;
2146         int ret;
2147
2148         if (pcmdev > 0)
2149                 sprintf(hdmi_str + strlen(hdmi_str), ",pcm=%d", pcmdev);
2150
2151         if (spec->dyn_pcm_assign)
2152                 return add_hdmi_jack_kctl(codec, spec, pcm_idx, hdmi_str);
2153
2154         /* for !dyn_pcm_assign, we still use hda_jack for compatibility */
2155         /* if !dyn_pcm_assign, it must be non-MST mode.
2156          * This means pcms and pins are statically mapped.
2157          * And pcm_idx is pin_idx.
2158          */
2159         per_pin = get_pin(spec, pcm_idx);
2160         phantom_jack = !is_jack_detectable(codec, per_pin->pin_nid);
2161         if (phantom_jack)
2162                 strncat(hdmi_str, " Phantom",
2163                         sizeof(hdmi_str) - strlen(hdmi_str) - 1);
2164         ret = snd_hda_jack_add_kctl_mst(codec, per_pin->pin_nid,
2165                                         per_pin->dev_id, hdmi_str, phantom_jack,
2166                                         0, NULL);
2167         if (ret < 0)
2168                 return ret;
2169         jack = snd_hda_jack_tbl_get_mst(codec, per_pin->pin_nid,
2170                                         per_pin->dev_id);
2171         if (jack == NULL)
2172                 return 0;
2173         /* assign jack->jack to pcm_rec[].jack to
2174          * align with dyn_pcm_assign mode
2175          */
2176         spec->pcm_rec[pcm_idx].jack = jack->jack;
2177         return 0;
2178 }
2179
2180 static int generic_hdmi_build_controls(struct hda_codec *codec)
2181 {
2182         struct hdmi_spec *spec = codec->spec;
2183         int dev, err;
2184         int pin_idx, pcm_idx;
2185
2186         for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++) {
2187                 if (!get_pcm_rec(spec, pcm_idx)->pcm) {
2188                         /* no PCM: mark this for skipping permanently */
2189                         set_bit(pcm_idx, &spec->pcm_bitmap);
2190                         continue;
2191                 }
2192
2193                 err = generic_hdmi_build_jack(codec, pcm_idx);
2194                 if (err < 0)
2195                         return err;
2196
2197                 /* create the spdif for each pcm
2198                  * pin will be bound when monitor is connected
2199                  */
2200                 if (spec->dyn_pcm_assign)
2201                         err = snd_hda_create_dig_out_ctls(codec,
2202                                           0, spec->cvt_nids[0],
2203                                           HDA_PCM_TYPE_HDMI);
2204                 else {
2205                         struct hdmi_spec_per_pin *per_pin =
2206                                 get_pin(spec, pcm_idx);
2207                         err = snd_hda_create_dig_out_ctls(codec,
2208                                                   per_pin->pin_nid,
2209                                                   per_pin->mux_nids[0],
2210                                                   HDA_PCM_TYPE_HDMI);
2211                 }
2212                 if (err < 0)
2213                         return err;
2214                 snd_hda_spdif_ctls_unassign(codec, pcm_idx);
2215
2216                 dev = get_pcm_rec(spec, pcm_idx)->device;
2217                 if (dev != SNDRV_PCM_INVALID_DEVICE) {
2218                         /* add control for ELD Bytes */
2219                         err = hdmi_create_eld_ctl(codec, pcm_idx, dev);
2220                         if (err < 0)
2221                                 return err;
2222                 }
2223         }
2224
2225         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2226                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2227
2228                 hdmi_present_sense(per_pin, 0);
2229         }
2230
2231         /* add channel maps */
2232         for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++) {
2233                 struct hda_pcm *pcm;
2234
2235                 pcm = get_pcm_rec(spec, pcm_idx);
2236                 if (!pcm || !pcm->pcm)
2237                         break;
2238                 err = snd_hdac_add_chmap_ctls(pcm->pcm, pcm_idx, &spec->chmap);
2239                 if (err < 0)
2240                         return err;
2241         }
2242
2243         return 0;
2244 }
2245
2246 static int generic_hdmi_init_per_pins(struct hda_codec *codec)
2247 {
2248         struct hdmi_spec *spec = codec->spec;
2249         int pin_idx;
2250
2251         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2252                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2253
2254                 per_pin->codec = codec;
2255                 mutex_init(&per_pin->lock);
2256                 INIT_DELAYED_WORK(&per_pin->work, hdmi_repoll_eld);
2257                 eld_proc_new(per_pin, pin_idx);
2258         }
2259         return 0;
2260 }
2261
2262 static int generic_hdmi_init(struct hda_codec *codec)
2263 {
2264         struct hdmi_spec *spec = codec->spec;
2265         int pin_idx;
2266
2267         mutex_lock(&spec->bind_lock);
2268         spec->use_jack_detect = !codec->jackpoll_interval;
2269         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2270                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2271                 hda_nid_t pin_nid = per_pin->pin_nid;
2272                 int dev_id = per_pin->dev_id;
2273
2274                 snd_hda_set_dev_select(codec, pin_nid, dev_id);
2275                 hdmi_init_pin(codec, pin_nid);
2276                 if (codec_has_acomp(codec))
2277                         continue;
2278                 if (spec->use_jack_detect)
2279                         snd_hda_jack_detect_enable(codec, pin_nid, dev_id);
2280                 else
2281                         snd_hda_jack_detect_enable_callback_mst(codec, pin_nid,
2282                                                                 dev_id,
2283                                                                 jack_callback);
2284         }
2285         mutex_unlock(&spec->bind_lock);
2286         return 0;
2287 }
2288
2289 static void hdmi_array_init(struct hdmi_spec *spec, int nums)
2290 {
2291         snd_array_init(&spec->pins, sizeof(struct hdmi_spec_per_pin), nums);
2292         snd_array_init(&spec->cvts, sizeof(struct hdmi_spec_per_cvt), nums);
2293 }
2294
2295 static void hdmi_array_free(struct hdmi_spec *spec)
2296 {
2297         snd_array_free(&spec->pins);
2298         snd_array_free(&spec->cvts);
2299 }
2300
2301 static void generic_spec_free(struct hda_codec *codec)
2302 {
2303         struct hdmi_spec *spec = codec->spec;
2304
2305         if (spec) {
2306                 hdmi_array_free(spec);
2307                 kfree(spec);
2308                 codec->spec = NULL;
2309         }
2310         codec->dp_mst = false;
2311 }
2312
2313 static void generic_hdmi_free(struct hda_codec *codec)
2314 {
2315         struct hdmi_spec *spec = codec->spec;
2316         int pin_idx, pcm_idx;
2317
2318         if (spec->acomp_registered) {
2319                 snd_hdac_acomp_exit(&codec->bus->core);
2320         } else if (codec_has_acomp(codec)) {
2321                 snd_hdac_acomp_register_notifier(&codec->bus->core, NULL);
2322                 codec->relaxed_resume = 0;
2323         }
2324
2325         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2326                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2327                 cancel_delayed_work_sync(&per_pin->work);
2328                 eld_proc_free(per_pin);
2329         }
2330
2331         for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++) {
2332                 if (spec->pcm_rec[pcm_idx].jack == NULL)
2333                         continue;
2334                 if (spec->dyn_pcm_assign)
2335                         snd_device_free(codec->card,
2336                                         spec->pcm_rec[pcm_idx].jack);
2337                 else
2338                         spec->pcm_rec[pcm_idx].jack = NULL;
2339         }
2340
2341         generic_spec_free(codec);
2342 }
2343
2344 #ifdef CONFIG_PM
2345 static int generic_hdmi_resume(struct hda_codec *codec)
2346 {
2347         struct hdmi_spec *spec = codec->spec;
2348         int pin_idx;
2349
2350         codec->patch_ops.init(codec);
2351         regcache_sync(codec->core.regmap);
2352
2353         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2354                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2355                 hdmi_present_sense(per_pin, 1);
2356         }
2357         return 0;
2358 }
2359 #endif
2360
2361 static const struct hda_codec_ops generic_hdmi_patch_ops = {
2362         .init                   = generic_hdmi_init,
2363         .free                   = generic_hdmi_free,
2364         .build_pcms             = generic_hdmi_build_pcms,
2365         .build_controls         = generic_hdmi_build_controls,
2366         .unsol_event            = hdmi_unsol_event,
2367 #ifdef CONFIG_PM
2368         .resume                 = generic_hdmi_resume,
2369 #endif
2370 };
2371
2372 static const struct hdmi_ops generic_standard_hdmi_ops = {
2373         .pin_get_eld                            = snd_hdmi_get_eld,
2374         .pin_setup_infoframe                    = hdmi_pin_setup_infoframe,
2375         .pin_hbr_setup                          = hdmi_pin_hbr_setup,
2376         .setup_stream                           = hdmi_setup_stream,
2377 };
2378
2379 /* allocate codec->spec and assign/initialize generic parser ops */
2380 static int alloc_generic_hdmi(struct hda_codec *codec)
2381 {
2382         struct hdmi_spec *spec;
2383
2384         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2385         if (!spec)
2386                 return -ENOMEM;
2387
2388         spec->codec = codec;
2389         spec->ops = generic_standard_hdmi_ops;
2390         spec->dev_num = 1;      /* initialize to 1 */
2391         mutex_init(&spec->pcm_lock);
2392         mutex_init(&spec->bind_lock);
2393         snd_hdac_register_chmap_ops(&codec->core, &spec->chmap);
2394
2395         spec->chmap.ops.get_chmap = hdmi_get_chmap;
2396         spec->chmap.ops.set_chmap = hdmi_set_chmap;
2397         spec->chmap.ops.is_pcm_attached = is_hdmi_pcm_attached;
2398         spec->chmap.ops.get_spk_alloc = hdmi_get_spk_alloc,
2399
2400         codec->spec = spec;
2401         hdmi_array_init(spec, 4);
2402
2403         codec->patch_ops = generic_hdmi_patch_ops;
2404
2405         return 0;
2406 }
2407
2408 /* generic HDMI parser */
2409 static int patch_generic_hdmi(struct hda_codec *codec)
2410 {
2411         int err;
2412
2413         err = alloc_generic_hdmi(codec);
2414         if (err < 0)
2415                 return err;
2416
2417         err = hdmi_parse_codec(codec);
2418         if (err < 0) {
2419                 generic_spec_free(codec);
2420                 return err;
2421         }
2422
2423         generic_hdmi_init_per_pins(codec);
2424         return 0;
2425 }
2426
2427 /*
2428  * generic audio component binding
2429  */
2430
2431 /* turn on / off the unsol event jack detection dynamically */
2432 static void reprogram_jack_detect(struct hda_codec *codec, hda_nid_t nid,
2433                                   int dev_id, bool use_acomp)
2434 {
2435         struct hda_jack_tbl *tbl;
2436
2437         tbl = snd_hda_jack_tbl_get_mst(codec, nid, dev_id);
2438         if (tbl) {
2439                 /* clear unsol even if component notifier is used, or re-enable
2440                  * if notifier is cleared
2441                  */
2442                 unsigned int val = use_acomp ? 0 : (AC_USRSP_EN | tbl->tag);
2443                 snd_hda_codec_write_cache(codec, nid, 0,
2444                                           AC_VERB_SET_UNSOLICITED_ENABLE, val);
2445         } else {
2446                 /* if no jack entry was defined beforehand, create a new one
2447                  * at need (i.e. only when notifier is cleared)
2448                  */
2449                 if (!use_acomp)
2450                         snd_hda_jack_detect_enable(codec, nid, dev_id);
2451         }
2452 }
2453
2454 /* set up / clear component notifier dynamically */
2455 static void generic_acomp_notifier_set(struct drm_audio_component *acomp,
2456                                        bool use_acomp)
2457 {
2458         struct hdmi_spec *spec;
2459         int i;
2460
2461         spec = container_of(acomp->audio_ops, struct hdmi_spec, drm_audio_ops);
2462         mutex_lock(&spec->bind_lock);
2463         spec->use_acomp_notifier = use_acomp;
2464         spec->codec->relaxed_resume = use_acomp;
2465         /* reprogram each jack detection logic depending on the notifier */
2466         if (spec->use_jack_detect) {
2467                 for (i = 0; i < spec->num_pins; i++)
2468                         reprogram_jack_detect(spec->codec,
2469                                               get_pin(spec, i)->pin_nid,
2470                                               get_pin(spec, i)->dev_id,
2471                                               use_acomp);
2472         }
2473         mutex_unlock(&spec->bind_lock);
2474 }
2475
2476 /* enable / disable the notifier via master bind / unbind */
2477 static int generic_acomp_master_bind(struct device *dev,
2478                                      struct drm_audio_component *acomp)
2479 {
2480         generic_acomp_notifier_set(acomp, true);
2481         return 0;
2482 }
2483
2484 static void generic_acomp_master_unbind(struct device *dev,
2485                                         struct drm_audio_component *acomp)
2486 {
2487         generic_acomp_notifier_set(acomp, false);
2488 }
2489
2490 /* check whether both HD-audio and DRM PCI devices belong to the same bus */
2491 static int match_bound_vga(struct device *dev, int subtype, void *data)
2492 {
2493         struct hdac_bus *bus = data;
2494         struct pci_dev *pci, *master;
2495
2496         if (!dev_is_pci(dev) || !dev_is_pci(bus->dev))
2497                 return 0;
2498         master = to_pci_dev(bus->dev);
2499         pci = to_pci_dev(dev);
2500         return master->bus == pci->bus;
2501 }
2502
2503 /* audio component notifier for AMD/Nvidia HDMI codecs */
2504 static void generic_acomp_pin_eld_notify(void *audio_ptr, int port, int dev_id)
2505 {
2506         struct hda_codec *codec = audio_ptr;
2507         struct hdmi_spec *spec = codec->spec;
2508         hda_nid_t pin_nid = spec->port2pin(codec, port);
2509
2510         if (!pin_nid)
2511                 return;
2512         if (get_wcaps_type(get_wcaps(codec, pin_nid)) != AC_WID_PIN)
2513                 return;
2514         /* skip notification during system suspend (but not in runtime PM);
2515          * the state will be updated at resume
2516          */
2517         if (snd_power_get_state(codec->card) != SNDRV_CTL_POWER_D0)
2518                 return;
2519         /* ditto during suspend/resume process itself */
2520         if (snd_hdac_is_in_pm(&codec->core))
2521                 return;
2522
2523         check_presence_and_report(codec, pin_nid, dev_id);
2524 }
2525
2526 /* set up the private drm_audio_ops from the template */
2527 static void setup_drm_audio_ops(struct hda_codec *codec,
2528                                 const struct drm_audio_component_audio_ops *ops)
2529 {
2530         struct hdmi_spec *spec = codec->spec;
2531
2532         spec->drm_audio_ops.audio_ptr = codec;
2533         /* intel_audio_codec_enable() or intel_audio_codec_disable()
2534          * will call pin_eld_notify with using audio_ptr pointer
2535          * We need make sure audio_ptr is really setup
2536          */
2537         wmb();
2538         spec->drm_audio_ops.pin2port = ops->pin2port;
2539         spec->drm_audio_ops.pin_eld_notify = ops->pin_eld_notify;
2540         spec->drm_audio_ops.master_bind = ops->master_bind;
2541         spec->drm_audio_ops.master_unbind = ops->master_unbind;
2542 }
2543
2544 /* initialize the generic HDMI audio component */
2545 static void generic_acomp_init(struct hda_codec *codec,
2546                                const struct drm_audio_component_audio_ops *ops,
2547                                int (*port2pin)(struct hda_codec *, int))
2548 {
2549         struct hdmi_spec *spec = codec->spec;
2550
2551         spec->port2pin = port2pin;
2552         setup_drm_audio_ops(codec, ops);
2553         if (!snd_hdac_acomp_init(&codec->bus->core, &spec->drm_audio_ops,
2554                                  match_bound_vga, 0)) {
2555                 spec->acomp_registered = true;
2556                 codec->bus->keep_power = 0;
2557         }
2558 }
2559
2560 /*
2561  * Intel codec parsers and helpers
2562  */
2563
2564 static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
2565                                              hda_nid_t nid)
2566 {
2567         struct hdmi_spec *spec = codec->spec;
2568         hda_nid_t conns[4];
2569         int nconns;
2570
2571         nconns = snd_hda_get_connections(codec, nid, conns, ARRAY_SIZE(conns));
2572         if (nconns == spec->num_cvts &&
2573             !memcmp(conns, spec->cvt_nids, spec->num_cvts * sizeof(hda_nid_t)))
2574                 return;
2575
2576         /* override pins connection list */
2577         codec_dbg(codec, "hdmi: haswell: override pin connection 0x%x\n", nid);
2578         snd_hda_override_conn_list(codec, nid, spec->num_cvts, spec->cvt_nids);
2579 }
2580
2581 #define INTEL_GET_VENDOR_VERB   0xf81
2582 #define INTEL_SET_VENDOR_VERB   0x781
2583 #define INTEL_EN_DP12           0x02    /* enable DP 1.2 features */
2584 #define INTEL_EN_ALL_PIN_CVTS   0x01    /* enable 2nd & 3rd pins and convertors */
2585
2586 static void intel_haswell_enable_all_pins(struct hda_codec *codec,
2587                                           bool update_tree)
2588 {
2589         unsigned int vendor_param;
2590         struct hdmi_spec *spec = codec->spec;
2591
2592         vendor_param = snd_hda_codec_read(codec, spec->vendor_nid, 0,
2593                                 INTEL_GET_VENDOR_VERB, 0);
2594         if (vendor_param == -1 || vendor_param & INTEL_EN_ALL_PIN_CVTS)
2595                 return;
2596
2597         vendor_param |= INTEL_EN_ALL_PIN_CVTS;
2598         vendor_param = snd_hda_codec_read(codec, spec->vendor_nid, 0,
2599                                 INTEL_SET_VENDOR_VERB, vendor_param);
2600         if (vendor_param == -1)
2601                 return;
2602
2603         if (update_tree)
2604                 snd_hda_codec_update_widgets(codec);
2605 }
2606
2607 static void intel_haswell_fixup_enable_dp12(struct hda_codec *codec)
2608 {
2609         unsigned int vendor_param;
2610         struct hdmi_spec *spec = codec->spec;
2611
2612         vendor_param = snd_hda_codec_read(codec, spec->vendor_nid, 0,
2613                                 INTEL_GET_VENDOR_VERB, 0);
2614         if (vendor_param == -1 || vendor_param & INTEL_EN_DP12)
2615                 return;
2616
2617         /* enable DP1.2 mode */
2618         vendor_param |= INTEL_EN_DP12;
2619         snd_hdac_regmap_add_vendor_verb(&codec->core, INTEL_SET_VENDOR_VERB);
2620         snd_hda_codec_write_cache(codec, spec->vendor_nid, 0,
2621                                 INTEL_SET_VENDOR_VERB, vendor_param);
2622 }
2623
2624 /* Haswell needs to re-issue the vendor-specific verbs before turning to D0.
2625  * Otherwise you may get severe h/w communication errors.
2626  */
2627 static void haswell_set_power_state(struct hda_codec *codec, hda_nid_t fg,
2628                                 unsigned int power_state)
2629 {
2630         if (power_state == AC_PWRST_D0) {
2631                 intel_haswell_enable_all_pins(codec, false);
2632                 intel_haswell_fixup_enable_dp12(codec);
2633         }
2634
2635         snd_hda_codec_read(codec, fg, 0, AC_VERB_SET_POWER_STATE, power_state);
2636         snd_hda_codec_set_power_to_all(codec, fg, power_state);
2637 }
2638
2639 /* There is a fixed mapping between audio pin node and display port.
2640  * on SNB, IVY, HSW, BSW, SKL, BXT, KBL:
2641  * Pin Widget 5 - PORT B (port = 1 in i915 driver)
2642  * Pin Widget 6 - PORT C (port = 2 in i915 driver)
2643  * Pin Widget 7 - PORT D (port = 3 in i915 driver)
2644  *
2645  * on VLV, ILK:
2646  * Pin Widget 4 - PORT B (port = 1 in i915 driver)
2647  * Pin Widget 5 - PORT C (port = 2 in i915 driver)
2648  * Pin Widget 6 - PORT D (port = 3 in i915 driver)
2649  */
2650 static int intel_base_nid(struct hda_codec *codec)
2651 {
2652         switch (codec->core.vendor_id) {
2653         case 0x80860054: /* ILK */
2654         case 0x80862804: /* ILK */
2655         case 0x80862882: /* VLV */
2656                 return 4;
2657         default:
2658                 return 5;
2659         }
2660 }
2661
2662 static int intel_pin2port(void *audio_ptr, int pin_nid)
2663 {
2664         struct hda_codec *codec = audio_ptr;
2665         struct hdmi_spec *spec = codec->spec;
2666         int base_nid, i;
2667
2668         if (!spec->port_num) {
2669                 base_nid = intel_base_nid(codec);
2670                 if (WARN_ON(pin_nid < base_nid || pin_nid >= base_nid + 3))
2671                         return -1;
2672                 return pin_nid - base_nid + 1;
2673         }
2674
2675         /*
2676          * looking for the pin number in the mapping table and return
2677          * the index which indicate the port number
2678          */
2679         for (i = 0; i < spec->port_num; i++) {
2680                 if (pin_nid == spec->port_map[i])
2681                         return i;
2682         }
2683
2684         codec_info(codec, "Can't find the HDMI/DP port for pin %d\n", pin_nid);
2685         return -1;
2686 }
2687
2688 static int intel_port2pin(struct hda_codec *codec, int port)
2689 {
2690         struct hdmi_spec *spec = codec->spec;
2691
2692         if (!spec->port_num) {
2693                 /* we assume only from port-B to port-D */
2694                 if (port < 1 || port > 3)
2695                         return 0;
2696                 return port + intel_base_nid(codec) - 1;
2697         }
2698
2699         if (port < 0 || port >= spec->port_num)
2700                 return 0;
2701         return spec->port_map[port];
2702 }
2703
2704 static void intel_pin_eld_notify(void *audio_ptr, int port, int pipe)
2705 {
2706         struct hda_codec *codec = audio_ptr;
2707         int pin_nid;
2708         int dev_id = pipe;
2709
2710         pin_nid = intel_port2pin(codec, port);
2711         if (!pin_nid)
2712                 return;
2713         /* skip notification during system suspend (but not in runtime PM);
2714          * the state will be updated at resume
2715          */
2716         if (snd_power_get_state(codec->card) != SNDRV_CTL_POWER_D0)
2717                 return;
2718         /* ditto during suspend/resume process itself */
2719         if (snd_hdac_is_in_pm(&codec->core))
2720                 return;
2721
2722         snd_hdac_i915_set_bclk(&codec->bus->core);
2723         check_presence_and_report(codec, pin_nid, dev_id);
2724 }
2725
2726 static const struct drm_audio_component_audio_ops intel_audio_ops = {
2727         .pin2port = intel_pin2port,
2728         .pin_eld_notify = intel_pin_eld_notify,
2729 };
2730
2731 /* register i915 component pin_eld_notify callback */
2732 static void register_i915_notifier(struct hda_codec *codec)
2733 {
2734         struct hdmi_spec *spec = codec->spec;
2735
2736         spec->use_acomp_notifier = true;
2737         spec->port2pin = intel_port2pin;
2738         setup_drm_audio_ops(codec, &intel_audio_ops);
2739         snd_hdac_acomp_register_notifier(&codec->bus->core,
2740                                         &spec->drm_audio_ops);
2741         /* no need for forcible resume for jack check thanks to notifier */
2742         codec->relaxed_resume = 1;
2743 }
2744
2745 /* setup_stream ops override for HSW+ */
2746 static int i915_hsw_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
2747                                  hda_nid_t pin_nid, u32 stream_tag, int format)
2748 {
2749         haswell_verify_D0(codec, cvt_nid, pin_nid);
2750         return hdmi_setup_stream(codec, cvt_nid, pin_nid, stream_tag, format);
2751 }
2752
2753 /* pin_cvt_fixup ops override for HSW+ and VLV+ */
2754 static void i915_pin_cvt_fixup(struct hda_codec *codec,
2755                                struct hdmi_spec_per_pin *per_pin,
2756                                hda_nid_t cvt_nid)
2757 {
2758         if (per_pin) {
2759                 snd_hda_set_dev_select(codec, per_pin->pin_nid,
2760                                per_pin->dev_id);
2761                 intel_verify_pin_cvt_connect(codec, per_pin);
2762                 intel_not_share_assigned_cvt(codec, per_pin->pin_nid,
2763                                      per_pin->dev_id, per_pin->mux_idx);
2764         } else {
2765                 intel_not_share_assigned_cvt_nid(codec, 0, 0, cvt_nid);
2766         }
2767 }
2768
2769 /* precondition and allocation for Intel codecs */
2770 static int alloc_intel_hdmi(struct hda_codec *codec)
2771 {
2772         int err;
2773
2774         /* requires i915 binding */
2775         if (!codec->bus->core.audio_component) {
2776                 codec_info(codec, "No i915 binding for Intel HDMI/DP codec\n");
2777                 /* set probe_id here to prevent generic fallback binding */
2778                 codec->probe_id = HDA_CODEC_ID_SKIP_PROBE;
2779                 return -ENODEV;
2780         }
2781
2782         err = alloc_generic_hdmi(codec);
2783         if (err < 0)
2784                 return err;
2785         /* no need to handle unsol events */
2786         codec->patch_ops.unsol_event = NULL;
2787         return 0;
2788 }
2789
2790 /* parse and post-process for Intel codecs */
2791 static int parse_intel_hdmi(struct hda_codec *codec)
2792 {
2793         int err;
2794
2795         err = hdmi_parse_codec(codec);
2796         if (err < 0) {
2797                 generic_spec_free(codec);
2798                 return err;
2799         }
2800
2801         generic_hdmi_init_per_pins(codec);
2802         register_i915_notifier(codec);
2803         return 0;
2804 }
2805
2806 /* Intel Haswell and onwards; audio component with eld notifier */
2807 static int intel_hsw_common_init(struct hda_codec *codec, hda_nid_t vendor_nid,
2808                                  const int *port_map, int port_num)
2809 {
2810         struct hdmi_spec *spec;
2811         int err;
2812
2813         err = alloc_intel_hdmi(codec);
2814         if (err < 0)
2815                 return err;
2816         spec = codec->spec;
2817         codec->dp_mst = true;
2818         spec->dyn_pcm_assign = true;
2819         spec->vendor_nid = vendor_nid;
2820         spec->port_map = port_map;
2821         spec->port_num = port_num;
2822         spec->intel_hsw_fixup = true;
2823
2824         intel_haswell_enable_all_pins(codec, true);
2825         intel_haswell_fixup_enable_dp12(codec);
2826
2827         codec->display_power_control = 1;
2828
2829         codec->patch_ops.set_power_state = haswell_set_power_state;
2830         codec->depop_delay = 0;
2831         codec->auto_runtime_pm = 1;
2832
2833         spec->ops.setup_stream = i915_hsw_setup_stream;
2834         spec->ops.pin_cvt_fixup = i915_pin_cvt_fixup;
2835
2836         return parse_intel_hdmi(codec);
2837 }
2838
2839 static int patch_i915_hsw_hdmi(struct hda_codec *codec)
2840 {
2841         return intel_hsw_common_init(codec, 0x08, NULL, 0);
2842 }
2843
2844 static int patch_i915_glk_hdmi(struct hda_codec *codec)
2845 {
2846         return intel_hsw_common_init(codec, 0x0b, NULL, 0);
2847 }
2848
2849 static int patch_i915_icl_hdmi(struct hda_codec *codec)
2850 {
2851         /*
2852          * pin to port mapping table where the value indicate the pin number and
2853          * the index indicate the port number.
2854          */
2855         static const int map[] = {0x0, 0x4, 0x6, 0x8, 0xa, 0xb};
2856
2857         return intel_hsw_common_init(codec, 0x02, map, ARRAY_SIZE(map));
2858 }
2859
2860 static int patch_i915_tgl_hdmi(struct hda_codec *codec)
2861 {
2862         /*
2863          * pin to port mapping table where the value indicate the pin number and
2864          * the index indicate the port number.
2865          */
2866         static const int map[] = {0x4, 0x6, 0x8, 0xa, 0xb, 0xc, 0xd, 0xe, 0xf};
2867
2868         return intel_hsw_common_init(codec, 0x02, map, ARRAY_SIZE(map));
2869 }
2870
2871 /* Intel Baytrail and Braswell; with eld notifier */
2872 static int patch_i915_byt_hdmi(struct hda_codec *codec)
2873 {
2874         struct hdmi_spec *spec;
2875         int err;
2876
2877         err = alloc_intel_hdmi(codec);
2878         if (err < 0)
2879                 return err;
2880         spec = codec->spec;
2881
2882         /* For Valleyview/Cherryview, only the display codec is in the display
2883          * power well and can use link_power ops to request/release the power.
2884          */
2885         codec->display_power_control = 1;
2886
2887         codec->depop_delay = 0;
2888         codec->auto_runtime_pm = 1;
2889
2890         spec->ops.pin_cvt_fixup = i915_pin_cvt_fixup;
2891
2892         return parse_intel_hdmi(codec);
2893 }
2894
2895 /* Intel IronLake, SandyBridge and IvyBridge; with eld notifier */
2896 static int patch_i915_cpt_hdmi(struct hda_codec *codec)
2897 {
2898         int err;
2899
2900         err = alloc_intel_hdmi(codec);
2901         if (err < 0)
2902                 return err;
2903         return parse_intel_hdmi(codec);
2904 }
2905
2906 /*
2907  * Shared non-generic implementations
2908  */
2909
2910 static int simple_playback_build_pcms(struct hda_codec *codec)
2911 {
2912         struct hdmi_spec *spec = codec->spec;
2913         struct hda_pcm *info;
2914         unsigned int chans;
2915         struct hda_pcm_stream *pstr;
2916         struct hdmi_spec_per_cvt *per_cvt;
2917
2918         per_cvt = get_cvt(spec, 0);
2919         chans = get_wcaps(codec, per_cvt->cvt_nid);
2920         chans = get_wcaps_channels(chans);
2921
2922         info = snd_hda_codec_pcm_new(codec, "HDMI 0");
2923         if (!info)
2924                 return -ENOMEM;
2925         spec->pcm_rec[0].pcm = info;
2926         info->pcm_type = HDA_PCM_TYPE_HDMI;
2927         pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
2928         *pstr = spec->pcm_playback;
2929         pstr->nid = per_cvt->cvt_nid;
2930         if (pstr->channels_max <= 2 && chans && chans <= 16)
2931                 pstr->channels_max = chans;
2932
2933         return 0;
2934 }
2935
2936 /* unsolicited event for jack sensing */
2937 static void simple_hdmi_unsol_event(struct hda_codec *codec,
2938                                     unsigned int res)
2939 {
2940         snd_hda_jack_set_dirty_all(codec);
2941         snd_hda_jack_report_sync(codec);
2942 }
2943
2944 /* generic_hdmi_build_jack can be used for simple_hdmi, too,
2945  * as long as spec->pins[] is set correctly
2946  */
2947 #define simple_hdmi_build_jack  generic_hdmi_build_jack
2948
2949 static int simple_playback_build_controls(struct hda_codec *codec)
2950 {
2951         struct hdmi_spec *spec = codec->spec;
2952         struct hdmi_spec_per_cvt *per_cvt;
2953         int err;
2954
2955         per_cvt = get_cvt(spec, 0);
2956         err = snd_hda_create_dig_out_ctls(codec, per_cvt->cvt_nid,
2957                                           per_cvt->cvt_nid,
2958                                           HDA_PCM_TYPE_HDMI);
2959         if (err < 0)
2960                 return err;
2961         return simple_hdmi_build_jack(codec, 0);
2962 }
2963
2964 static int simple_playback_init(struct hda_codec *codec)
2965 {
2966         struct hdmi_spec *spec = codec->spec;
2967         struct hdmi_spec_per_pin *per_pin = get_pin(spec, 0);
2968         hda_nid_t pin = per_pin->pin_nid;
2969
2970         snd_hda_codec_write(codec, pin, 0,
2971                             AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
2972         /* some codecs require to unmute the pin */
2973         if (get_wcaps(codec, pin) & AC_WCAP_OUT_AMP)
2974                 snd_hda_codec_write(codec, pin, 0, AC_VERB_SET_AMP_GAIN_MUTE,
2975                                     AMP_OUT_UNMUTE);
2976         snd_hda_jack_detect_enable(codec, pin, per_pin->dev_id);
2977         return 0;
2978 }
2979
2980 static void simple_playback_free(struct hda_codec *codec)
2981 {
2982         struct hdmi_spec *spec = codec->spec;
2983
2984         hdmi_array_free(spec);
2985         kfree(spec);
2986 }
2987
2988 /*
2989  * Nvidia specific implementations
2990  */
2991
2992 #define Nv_VERB_SET_Channel_Allocation          0xF79
2993 #define Nv_VERB_SET_Info_Frame_Checksum         0xF7A
2994 #define Nv_VERB_SET_Audio_Protection_On         0xF98
2995 #define Nv_VERB_SET_Audio_Protection_Off        0xF99
2996
2997 #define nvhdmi_master_con_nid_7x        0x04
2998 #define nvhdmi_master_pin_nid_7x        0x05
2999
3000 static const hda_nid_t nvhdmi_con_nids_7x[4] = {
3001         /*front, rear, clfe, rear_surr */
3002         0x6, 0x8, 0xa, 0xc,
3003 };
3004
3005 static const struct hda_verb nvhdmi_basic_init_7x_2ch[] = {
3006         /* set audio protect on */
3007         { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
3008         /* enable digital output on pin widget */
3009         { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3010         {} /* terminator */
3011 };
3012
3013 static const struct hda_verb nvhdmi_basic_init_7x_8ch[] = {
3014         /* set audio protect on */
3015         { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
3016         /* enable digital output on pin widget */
3017         { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3018         { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3019         { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3020         { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3021         { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3022         {} /* terminator */
3023 };
3024
3025 #ifdef LIMITED_RATE_FMT_SUPPORT
3026 /* support only the safe format and rate */
3027 #define SUPPORTED_RATES         SNDRV_PCM_RATE_48000
3028 #define SUPPORTED_MAXBPS        16
3029 #define SUPPORTED_FORMATS       SNDRV_PCM_FMTBIT_S16_LE
3030 #else
3031 /* support all rates and formats */
3032 #define SUPPORTED_RATES \
3033         (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
3034         SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
3035          SNDRV_PCM_RATE_192000)
3036 #define SUPPORTED_MAXBPS        24
3037 #define SUPPORTED_FORMATS \
3038         (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
3039 #endif
3040
3041 static int nvhdmi_7x_init_2ch(struct hda_codec *codec)
3042 {
3043         snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_2ch);
3044         return 0;
3045 }
3046
3047 static int nvhdmi_7x_init_8ch(struct hda_codec *codec)
3048 {
3049         snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_8ch);
3050         return 0;
3051 }
3052
3053 static const unsigned int channels_2_6_8[] = {
3054         2, 6, 8
3055 };
3056
3057 static const unsigned int channels_2_8[] = {
3058         2, 8
3059 };
3060
3061 static const struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels = {
3062         .count = ARRAY_SIZE(channels_2_6_8),
3063         .list = channels_2_6_8,
3064         .mask = 0,
3065 };
3066
3067 static const struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels = {
3068         .count = ARRAY_SIZE(channels_2_8),
3069         .list = channels_2_8,
3070         .mask = 0,
3071 };
3072
3073 static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo,
3074                                     struct hda_codec *codec,
3075                                     struct snd_pcm_substream *substream)
3076 {
3077         struct hdmi_spec *spec = codec->spec;
3078         const struct snd_pcm_hw_constraint_list *hw_constraints_channels = NULL;
3079
3080         switch (codec->preset->vendor_id) {
3081         case 0x10de0002:
3082         case 0x10de0003:
3083         case 0x10de0005:
3084         case 0x10de0006:
3085                 hw_constraints_channels = &hw_constraints_2_8_channels;
3086                 break;
3087         case 0x10de0007:
3088                 hw_constraints_channels = &hw_constraints_2_6_8_channels;
3089                 break;
3090         default:
3091                 break;
3092         }
3093
3094         if (hw_constraints_channels != NULL) {
3095                 snd_pcm_hw_constraint_list(substream->runtime, 0,
3096                                 SNDRV_PCM_HW_PARAM_CHANNELS,
3097                                 hw_constraints_channels);
3098         } else {
3099                 snd_pcm_hw_constraint_step(substream->runtime, 0,
3100                                            SNDRV_PCM_HW_PARAM_CHANNELS, 2);
3101         }
3102
3103         return snd_hda_multi_out_dig_open(codec, &spec->multiout);
3104 }
3105
3106 static int simple_playback_pcm_close(struct hda_pcm_stream *hinfo,
3107                                      struct hda_codec *codec,
3108                                      struct snd_pcm_substream *substream)
3109 {
3110         struct hdmi_spec *spec = codec->spec;
3111         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
3112 }
3113
3114 static int simple_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
3115                                        struct hda_codec *codec,
3116                                        unsigned int stream_tag,
3117                                        unsigned int format,
3118                                        struct snd_pcm_substream *substream)
3119 {
3120         struct hdmi_spec *spec = codec->spec;
3121         return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
3122                                              stream_tag, format, substream);
3123 }
3124
3125 static const struct hda_pcm_stream simple_pcm_playback = {
3126         .substreams = 1,
3127         .channels_min = 2,
3128         .channels_max = 2,
3129         .ops = {
3130                 .open = simple_playback_pcm_open,
3131                 .close = simple_playback_pcm_close,
3132                 .prepare = simple_playback_pcm_prepare
3133         },
3134 };
3135
3136 static const struct hda_codec_ops simple_hdmi_patch_ops = {
3137         .build_controls = simple_playback_build_controls,
3138         .build_pcms = simple_playback_build_pcms,
3139         .init = simple_playback_init,
3140         .free = simple_playback_free,
3141         .unsol_event = simple_hdmi_unsol_event,
3142 };
3143
3144 static int patch_simple_hdmi(struct hda_codec *codec,
3145                              hda_nid_t cvt_nid, hda_nid_t pin_nid)
3146 {
3147         struct hdmi_spec *spec;
3148         struct hdmi_spec_per_cvt *per_cvt;
3149         struct hdmi_spec_per_pin *per_pin;
3150
3151         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3152         if (!spec)
3153                 return -ENOMEM;
3154
3155         spec->codec = codec;
3156         codec->spec = spec;
3157         hdmi_array_init(spec, 1);
3158
3159         spec->multiout.num_dacs = 0;  /* no analog */
3160         spec->multiout.max_channels = 2;
3161         spec->multiout.dig_out_nid = cvt_nid;
3162         spec->num_cvts = 1;
3163         spec->num_pins = 1;
3164         per_pin = snd_array_new(&spec->pins);
3165         per_cvt = snd_array_new(&spec->cvts);
3166         if (!per_pin || !per_cvt) {
3167                 simple_playback_free(codec);
3168                 return -ENOMEM;
3169         }
3170         per_cvt->cvt_nid = cvt_nid;
3171         per_pin->pin_nid = pin_nid;
3172         spec->pcm_playback = simple_pcm_playback;
3173
3174         codec->patch_ops = simple_hdmi_patch_ops;
3175
3176         return 0;
3177 }
3178
3179 static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec *codec,
3180                                                     int channels)
3181 {
3182         unsigned int chanmask;
3183         int chan = channels ? (channels - 1) : 1;
3184
3185         switch (channels) {
3186         default:
3187         case 0:
3188         case 2:
3189                 chanmask = 0x00;
3190                 break;
3191         case 4:
3192                 chanmask = 0x08;
3193                 break;
3194         case 6:
3195                 chanmask = 0x0b;
3196                 break;
3197         case 8:
3198                 chanmask = 0x13;
3199                 break;
3200         }
3201
3202         /* Set the audio infoframe channel allocation and checksum fields.  The
3203          * channel count is computed implicitly by the hardware. */
3204         snd_hda_codec_write(codec, 0x1, 0,
3205                         Nv_VERB_SET_Channel_Allocation, chanmask);
3206
3207         snd_hda_codec_write(codec, 0x1, 0,
3208                         Nv_VERB_SET_Info_Frame_Checksum,
3209                         (0x71 - chan - chanmask));
3210 }
3211
3212 static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream *hinfo,
3213                                    struct hda_codec *codec,
3214                                    struct snd_pcm_substream *substream)
3215 {
3216         struct hdmi_spec *spec = codec->spec;
3217         int i;
3218
3219         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x,
3220                         0, AC_VERB_SET_CHANNEL_STREAMID, 0);
3221         for (i = 0; i < 4; i++) {
3222                 /* set the stream id */
3223                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
3224                                 AC_VERB_SET_CHANNEL_STREAMID, 0);
3225                 /* set the stream format */
3226                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
3227                                 AC_VERB_SET_STREAM_FORMAT, 0);
3228         }
3229
3230         /* The audio hardware sends a channel count of 0x7 (8ch) when all the
3231          * streams are disabled. */
3232         nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
3233
3234         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
3235 }
3236
3237 static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream *hinfo,
3238                                      struct hda_codec *codec,
3239                                      unsigned int stream_tag,
3240                                      unsigned int format,
3241                                      struct snd_pcm_substream *substream)
3242 {
3243         int chs;
3244         unsigned int dataDCC2, channel_id;
3245         int i;
3246         struct hdmi_spec *spec = codec->spec;
3247         struct hda_spdif_out *spdif;
3248         struct hdmi_spec_per_cvt *per_cvt;
3249
3250         mutex_lock(&codec->spdif_mutex);
3251         per_cvt = get_cvt(spec, 0);
3252         spdif = snd_hda_spdif_out_of_nid(codec, per_cvt->cvt_nid);
3253
3254         chs = substream->runtime->channels;
3255
3256         dataDCC2 = 0x2;
3257
3258         /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
3259         if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE))
3260                 snd_hda_codec_write(codec,
3261                                 nvhdmi_master_con_nid_7x,
3262                                 0,
3263                                 AC_VERB_SET_DIGI_CONVERT_1,
3264                                 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
3265
3266         /* set the stream id */
3267         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
3268                         AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0);
3269
3270         /* set the stream format */
3271         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
3272                         AC_VERB_SET_STREAM_FORMAT, format);
3273
3274         /* turn on again (if needed) */
3275         /* enable and set the channel status audio/data flag */
3276         if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) {
3277                 snd_hda_codec_write(codec,
3278                                 nvhdmi_master_con_nid_7x,
3279                                 0,
3280                                 AC_VERB_SET_DIGI_CONVERT_1,
3281                                 spdif->ctls & 0xff);
3282                 snd_hda_codec_write(codec,
3283                                 nvhdmi_master_con_nid_7x,
3284                                 0,
3285                                 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
3286         }
3287
3288         for (i = 0; i < 4; i++) {
3289                 if (chs == 2)
3290                         channel_id = 0;
3291                 else
3292                         channel_id = i * 2;
3293
3294                 /* turn off SPDIF once;
3295                  *otherwise the IEC958 bits won't be updated
3296                  */
3297                 if (codec->spdif_status_reset &&
3298                 (spdif->ctls & AC_DIG1_ENABLE))
3299                         snd_hda_codec_write(codec,
3300                                 nvhdmi_con_nids_7x[i],
3301                                 0,
3302                                 AC_VERB_SET_DIGI_CONVERT_1,
3303                                 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
3304                 /* set the stream id */
3305                 snd_hda_codec_write(codec,
3306                                 nvhdmi_con_nids_7x[i],
3307                                 0,
3308                                 AC_VERB_SET_CHANNEL_STREAMID,
3309                                 (stream_tag << 4) | channel_id);
3310                 /* set the stream format */
3311                 snd_hda_codec_write(codec,
3312                                 nvhdmi_con_nids_7x[i],
3313                                 0,
3314                                 AC_VERB_SET_STREAM_FORMAT,
3315                                 format);
3316                 /* turn on again (if needed) */
3317                 /* enable and set the channel status audio/data flag */
3318                 if (codec->spdif_status_reset &&
3319                 (spdif->ctls & AC_DIG1_ENABLE)) {
3320                         snd_hda_codec_write(codec,
3321                                         nvhdmi_con_nids_7x[i],
3322                                         0,
3323                                         AC_VERB_SET_DIGI_CONVERT_1,
3324                                         spdif->ctls & 0xff);
3325                         snd_hda_codec_write(codec,
3326                                         nvhdmi_con_nids_7x[i],
3327                                         0,
3328                                         AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
3329                 }
3330         }
3331
3332         nvhdmi_8ch_7x_set_info_frame_parameters(codec, chs);
3333
3334         mutex_unlock(&codec->spdif_mutex);
3335         return 0;
3336 }
3337
3338 static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x = {
3339         .substreams = 1,
3340         .channels_min = 2,
3341         .channels_max = 8,
3342         .nid = nvhdmi_master_con_nid_7x,
3343         .rates = SUPPORTED_RATES,
3344         .maxbps = SUPPORTED_MAXBPS,
3345         .formats = SUPPORTED_FORMATS,
3346         .ops = {
3347                 .open = simple_playback_pcm_open,
3348                 .close = nvhdmi_8ch_7x_pcm_close,
3349                 .prepare = nvhdmi_8ch_7x_pcm_prepare
3350         },
3351 };
3352
3353 static int patch_nvhdmi_2ch(struct hda_codec *codec)
3354 {
3355         struct hdmi_spec *spec;
3356         int err = patch_simple_hdmi(codec, nvhdmi_master_con_nid_7x,
3357                                     nvhdmi_master_pin_nid_7x);
3358         if (err < 0)
3359                 return err;
3360
3361         codec->patch_ops.init = nvhdmi_7x_init_2ch;
3362         /* override the PCM rates, etc, as the codec doesn't give full list */
3363         spec = codec->spec;
3364         spec->pcm_playback.rates = SUPPORTED_RATES;
3365         spec->pcm_playback.maxbps = SUPPORTED_MAXBPS;
3366         spec->pcm_playback.formats = SUPPORTED_FORMATS;
3367         return 0;
3368 }
3369
3370 static int nvhdmi_7x_8ch_build_pcms(struct hda_codec *codec)
3371 {
3372         struct hdmi_spec *spec = codec->spec;
3373         int err = simple_playback_build_pcms(codec);
3374         if (!err) {
3375                 struct hda_pcm *info = get_pcm_rec(spec, 0);
3376                 info->own_chmap = true;
3377         }
3378         return err;
3379 }
3380
3381 static int nvhdmi_7x_8ch_build_controls(struct hda_codec *codec)
3382 {
3383         struct hdmi_spec *spec = codec->spec;
3384         struct hda_pcm *info;
3385         struct snd_pcm_chmap *chmap;
3386         int err;
3387
3388         err = simple_playback_build_controls(codec);
3389         if (err < 0)
3390                 return err;
3391
3392         /* add channel maps */
3393         info = get_pcm_rec(spec, 0);
3394         err = snd_pcm_add_chmap_ctls(info->pcm,
3395                                      SNDRV_PCM_STREAM_PLAYBACK,
3396                                      snd_pcm_alt_chmaps, 8, 0, &chmap);
3397         if (err < 0)
3398                 return err;
3399         switch (codec->preset->vendor_id) {
3400         case 0x10de0002:
3401         case 0x10de0003:
3402         case 0x10de0005:
3403         case 0x10de0006:
3404                 chmap->channel_mask = (1U << 2) | (1U << 8);
3405                 break;
3406         case 0x10de0007:
3407                 chmap->channel_mask = (1U << 2) | (1U << 6) | (1U << 8);
3408         }
3409         return 0;
3410 }
3411
3412 static int patch_nvhdmi_8ch_7x(struct hda_codec *codec)
3413 {
3414         struct hdmi_spec *spec;
3415         int err = patch_nvhdmi_2ch(codec);
3416         if (err < 0)
3417                 return err;
3418         spec = codec->spec;
3419         spec->multiout.max_channels = 8;
3420         spec->pcm_playback = nvhdmi_pcm_playback_8ch_7x;
3421         codec->patch_ops.init = nvhdmi_7x_init_8ch;
3422         codec->patch_ops.build_pcms = nvhdmi_7x_8ch_build_pcms;
3423         codec->patch_ops.build_controls = nvhdmi_7x_8ch_build_controls;
3424
3425         /* Initialize the audio infoframe channel mask and checksum to something
3426          * valid */
3427         nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
3428
3429         return 0;
3430 }
3431
3432 /*
3433  * NVIDIA codecs ignore ASP mapping for 2ch - confirmed on:
3434  * - 0x10de0015
3435  * - 0x10de0040
3436  */
3437 static int nvhdmi_chmap_cea_alloc_validate_get_type(struct hdac_chmap *chmap,
3438                 struct hdac_cea_channel_speaker_allocation *cap, int channels)
3439 {
3440         if (cap->ca_index == 0x00 && channels == 2)
3441                 return SNDRV_CTL_TLVT_CHMAP_FIXED;
3442
3443         /* If the speaker allocation matches the channel count, it is OK. */
3444         if (cap->channels != channels)
3445                 return -1;
3446
3447         /* all channels are remappable freely */
3448         return SNDRV_CTL_TLVT_CHMAP_VAR;
3449 }
3450
3451 static int nvhdmi_chmap_validate(struct hdac_chmap *chmap,
3452                 int ca, int chs, unsigned char *map)
3453 {
3454         if (ca == 0x00 && (map[0] != SNDRV_CHMAP_FL || map[1] != SNDRV_CHMAP_FR))
3455                 return -EINVAL;
3456
3457         return 0;
3458 }
3459
3460 /* map from pin NID to port; port is 0-based */
3461 /* for Nvidia: assume widget NID starting from 4, with step 1 (4, 5, 6, ...) */
3462 static int nvhdmi_pin2port(void *audio_ptr, int pin_nid)
3463 {
3464         return pin_nid - 4;
3465 }
3466
3467 /* reverse-map from port to pin NID: see above */
3468 static int nvhdmi_port2pin(struct hda_codec *codec, int port)
3469 {
3470         return port + 4;
3471 }
3472
3473 static const struct drm_audio_component_audio_ops nvhdmi_audio_ops = {
3474         .pin2port = nvhdmi_pin2port,
3475         .pin_eld_notify = generic_acomp_pin_eld_notify,
3476         .master_bind = generic_acomp_master_bind,
3477         .master_unbind = generic_acomp_master_unbind,
3478 };
3479
3480 static int patch_nvhdmi(struct hda_codec *codec)
3481 {
3482         struct hdmi_spec *spec;
3483         int err;
3484
3485         err = patch_generic_hdmi(codec);
3486         if (err)
3487                 return err;
3488
3489         spec = codec->spec;
3490         spec->dyn_pin_out = true;
3491
3492         spec->chmap.ops.chmap_cea_alloc_validate_get_type =
3493                 nvhdmi_chmap_cea_alloc_validate_get_type;
3494         spec->chmap.ops.chmap_validate = nvhdmi_chmap_validate;
3495
3496         codec->link_down_at_suspend = 1;
3497
3498         generic_acomp_init(codec, &nvhdmi_audio_ops, nvhdmi_port2pin);
3499
3500         return 0;
3501 }
3502
3503 /*
3504  * The HDA codec on NVIDIA Tegra contains two scratch registers that are
3505  * accessed using vendor-defined verbs. These registers can be used for
3506  * interoperability between the HDA and HDMI drivers.
3507  */
3508
3509 /* Audio Function Group node */
3510 #define NVIDIA_AFG_NID 0x01
3511
3512 /*
3513  * The SCRATCH0 register is used to notify the HDMI codec of changes in audio
3514  * format. On Tegra, bit 31 is used as a trigger that causes an interrupt to
3515  * be raised in the HDMI codec. The remainder of the bits is arbitrary. This
3516  * implementation stores the HDA format (see AC_FMT_*) in bits [15:0] and an
3517  * additional bit (at position 30) to signal the validity of the format.
3518  *
3519  * | 31      | 30    | 29  16 | 15   0 |
3520  * +---------+-------+--------+--------+
3521  * | TRIGGER | VALID | UNUSED | FORMAT |
3522  * +-----------------------------------|
3523  *
3524  * Note that for the trigger bit to take effect it needs to change value
3525  * (i.e. it needs to be toggled).
3526  */
3527 #define NVIDIA_GET_SCRATCH0             0xfa6
3528 #define NVIDIA_SET_SCRATCH0_BYTE0       0xfa7
3529 #define NVIDIA_SET_SCRATCH0_BYTE1       0xfa8
3530 #define NVIDIA_SET_SCRATCH0_BYTE2       0xfa9
3531 #define NVIDIA_SET_SCRATCH0_BYTE3       0xfaa
3532 #define NVIDIA_SCRATCH_TRIGGER (1 << 7)
3533 #define NVIDIA_SCRATCH_VALID   (1 << 6)
3534
3535 #define NVIDIA_GET_SCRATCH1             0xfab
3536 #define NVIDIA_SET_SCRATCH1_BYTE0       0xfac
3537 #define NVIDIA_SET_SCRATCH1_BYTE1       0xfad
3538 #define NVIDIA_SET_SCRATCH1_BYTE2       0xfae
3539 #define NVIDIA_SET_SCRATCH1_BYTE3       0xfaf
3540
3541 /*
3542  * The format parameter is the HDA audio format (see AC_FMT_*). If set to 0,
3543  * the format is invalidated so that the HDMI codec can be disabled.
3544  */
3545 static void tegra_hdmi_set_format(struct hda_codec *codec, unsigned int format)
3546 {
3547         unsigned int value;
3548
3549         /* bits [31:30] contain the trigger and valid bits */
3550         value = snd_hda_codec_read(codec, NVIDIA_AFG_NID, 0,
3551                                    NVIDIA_GET_SCRATCH0, 0);
3552         value = (value >> 24) & 0xff;
3553
3554         /* bits [15:0] are used to store the HDA format */
3555         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3556                             NVIDIA_SET_SCRATCH0_BYTE0,
3557                             (format >> 0) & 0xff);
3558         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3559                             NVIDIA_SET_SCRATCH0_BYTE1,
3560                             (format >> 8) & 0xff);
3561
3562         /* bits [16:24] are unused */
3563         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3564                             NVIDIA_SET_SCRATCH0_BYTE2, 0);
3565
3566         /*
3567          * Bit 30 signals that the data is valid and hence that HDMI audio can
3568          * be enabled.
3569          */
3570         if (format == 0)
3571                 value &= ~NVIDIA_SCRATCH_VALID;
3572         else
3573                 value |= NVIDIA_SCRATCH_VALID;
3574
3575         /*
3576          * Whenever the trigger bit is toggled, an interrupt is raised in the
3577          * HDMI codec. The HDMI driver will use that as trigger to update its
3578          * configuration.
3579          */
3580         value ^= NVIDIA_SCRATCH_TRIGGER;
3581
3582         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3583                             NVIDIA_SET_SCRATCH0_BYTE3, value);
3584 }
3585
3586 static int tegra_hdmi_pcm_prepare(struct hda_pcm_stream *hinfo,
3587                                   struct hda_codec *codec,
3588                                   unsigned int stream_tag,
3589                                   unsigned int format,
3590                                   struct snd_pcm_substream *substream)
3591 {
3592         int err;
3593
3594         err = generic_hdmi_playback_pcm_prepare(hinfo, codec, stream_tag,
3595                                                 format, substream);
3596         if (err < 0)
3597                 return err;
3598
3599         /* notify the HDMI codec of the format change */
3600         tegra_hdmi_set_format(codec, format);
3601
3602         return 0;
3603 }
3604
3605 static int tegra_hdmi_pcm_cleanup(struct hda_pcm_stream *hinfo,
3606                                   struct hda_codec *codec,
3607                                   struct snd_pcm_substream *substream)
3608 {
3609         /* invalidate the format in the HDMI codec */
3610         tegra_hdmi_set_format(codec, 0);
3611
3612         return generic_hdmi_playback_pcm_cleanup(hinfo, codec, substream);
3613 }
3614
3615 static struct hda_pcm *hda_find_pcm_by_type(struct hda_codec *codec, int type)
3616 {
3617         struct hdmi_spec *spec = codec->spec;
3618         unsigned int i;
3619
3620         for (i = 0; i < spec->num_pins; i++) {
3621                 struct hda_pcm *pcm = get_pcm_rec(spec, i);
3622
3623                 if (pcm->pcm_type == type)
3624                         return pcm;
3625         }
3626
3627         return NULL;
3628 }
3629
3630 static int tegra_hdmi_build_pcms(struct hda_codec *codec)
3631 {
3632         struct hda_pcm_stream *stream;
3633         struct hda_pcm *pcm;
3634         int err;
3635
3636         err = generic_hdmi_build_pcms(codec);
3637         if (err < 0)
3638                 return err;
3639
3640         pcm = hda_find_pcm_by_type(codec, HDA_PCM_TYPE_HDMI);
3641         if (!pcm)
3642                 return -ENODEV;
3643
3644         /*
3645          * Override ->prepare() and ->cleanup() operations to notify the HDMI
3646          * codec about format changes.
3647          */
3648         stream = &pcm->stream[SNDRV_PCM_STREAM_PLAYBACK];
3649         stream->ops.prepare = tegra_hdmi_pcm_prepare;
3650         stream->ops.cleanup = tegra_hdmi_pcm_cleanup;
3651
3652         return 0;
3653 }
3654
3655 static int patch_tegra_hdmi(struct hda_codec *codec)
3656 {
3657         int err;
3658
3659         err = patch_generic_hdmi(codec);
3660         if (err)
3661                 return err;
3662
3663         codec->patch_ops.build_pcms = tegra_hdmi_build_pcms;
3664
3665         return 0;
3666 }
3667
3668 /*
3669  * ATI/AMD-specific implementations
3670  */
3671
3672 #define is_amdhdmi_rev3_or_later(codec) \
3673         ((codec)->core.vendor_id == 0x1002aa01 && \
3674          ((codec)->core.revision_id & 0xff00) >= 0x0300)
3675 #define has_amd_full_remap_support(codec) is_amdhdmi_rev3_or_later(codec)
3676
3677 /* ATI/AMD specific HDA pin verbs, see the AMD HDA Verbs specification */
3678 #define ATI_VERB_SET_CHANNEL_ALLOCATION 0x771
3679 #define ATI_VERB_SET_DOWNMIX_INFO       0x772
3680 #define ATI_VERB_SET_MULTICHANNEL_01    0x777
3681 #define ATI_VERB_SET_MULTICHANNEL_23    0x778
3682 #define ATI_VERB_SET_MULTICHANNEL_45    0x779
3683 #define ATI_VERB_SET_MULTICHANNEL_67    0x77a
3684 #define ATI_VERB_SET_HBR_CONTROL        0x77c
3685 #define ATI_VERB_SET_MULTICHANNEL_1     0x785
3686 #define ATI_VERB_SET_MULTICHANNEL_3     0x786
3687 #define ATI_VERB_SET_MULTICHANNEL_5     0x787
3688 #define ATI_VERB_SET_MULTICHANNEL_7     0x788
3689 #define ATI_VERB_SET_MULTICHANNEL_MODE  0x789
3690 #define ATI_VERB_GET_CHANNEL_ALLOCATION 0xf71
3691 #define ATI_VERB_GET_DOWNMIX_INFO       0xf72
3692 #define ATI_VERB_GET_MULTICHANNEL_01    0xf77
3693 #define ATI_VERB_GET_MULTICHANNEL_23    0xf78
3694 #define ATI_VERB_GET_MULTICHANNEL_45    0xf79
3695 #define ATI_VERB_GET_MULTICHANNEL_67    0xf7a
3696 #define ATI_VERB_GET_HBR_CONTROL        0xf7c
3697 #define ATI_VERB_GET_MULTICHANNEL_1     0xf85
3698 #define ATI_VERB_GET_MULTICHANNEL_3     0xf86
3699 #define ATI_VERB_GET_MULTICHANNEL_5     0xf87
3700 #define ATI_VERB_GET_MULTICHANNEL_7     0xf88
3701 #define ATI_VERB_GET_MULTICHANNEL_MODE  0xf89
3702
3703 /* AMD specific HDA cvt verbs */
3704 #define ATI_VERB_SET_RAMP_RATE          0x770
3705 #define ATI_VERB_GET_RAMP_RATE          0xf70
3706
3707 #define ATI_OUT_ENABLE 0x1
3708
3709 #define ATI_MULTICHANNEL_MODE_PAIRED    0
3710 #define ATI_MULTICHANNEL_MODE_SINGLE    1
3711
3712 #define ATI_HBR_CAPABLE 0x01
3713 #define ATI_HBR_ENABLE 0x10
3714
3715 static int atihdmi_pin_get_eld(struct hda_codec *codec, hda_nid_t nid,
3716                            unsigned char *buf, int *eld_size)
3717 {
3718         /* call hda_eld.c ATI/AMD-specific function */
3719         return snd_hdmi_get_eld_ati(codec, nid, buf, eld_size,
3720                                     is_amdhdmi_rev3_or_later(codec));
3721 }
3722
3723 static void atihdmi_pin_setup_infoframe(struct hda_codec *codec, hda_nid_t pin_nid, int ca,
3724                                         int active_channels, int conn_type)
3725 {
3726         snd_hda_codec_write(codec, pin_nid, 0, ATI_VERB_SET_CHANNEL_ALLOCATION, ca);
3727 }
3728
3729 static int atihdmi_paired_swap_fc_lfe(int pos)
3730 {
3731         /*
3732          * ATI/AMD have automatic FC/LFE swap built-in
3733          * when in pairwise mapping mode.
3734          */
3735
3736         switch (pos) {
3737                 /* see channel_allocations[].speakers[] */
3738                 case 2: return 3;
3739                 case 3: return 2;
3740                 default: break;
3741         }
3742
3743         return pos;
3744 }
3745
3746 static int atihdmi_paired_chmap_validate(struct hdac_chmap *chmap,
3747                         int ca, int chs, unsigned char *map)
3748 {
3749         struct hdac_cea_channel_speaker_allocation *cap;
3750         int i, j;
3751
3752         /* check that only channel pairs need to be remapped on old pre-rev3 ATI/AMD */
3753
3754         cap = snd_hdac_get_ch_alloc_from_ca(ca);
3755         for (i = 0; i < chs; ++i) {
3756                 int mask = snd_hdac_chmap_to_spk_mask(map[i]);
3757                 bool ok = false;
3758                 bool companion_ok = false;
3759
3760                 if (!mask)
3761                         continue;
3762
3763                 for (j = 0 + i % 2; j < 8; j += 2) {
3764                         int chan_idx = 7 - atihdmi_paired_swap_fc_lfe(j);
3765                         if (cap->speakers[chan_idx] == mask) {
3766                                 /* channel is in a supported position */
3767                                 ok = true;
3768
3769                                 if (i % 2 == 0 && i + 1 < chs) {
3770                                         /* even channel, check the odd companion */
3771                                         int comp_chan_idx = 7 - atihdmi_paired_swap_fc_lfe(j + 1);
3772                                         int comp_mask_req = snd_hdac_chmap_to_spk_mask(map[i+1]);
3773                                         int comp_mask_act = cap->speakers[comp_chan_idx];
3774
3775                                         if (comp_mask_req == comp_mask_act)
3776                                                 companion_ok = true;
3777                                         else
3778                                                 return -EINVAL;
3779                                 }
3780                                 break;
3781                         }
3782                 }
3783
3784                 if (!ok)
3785                         return -EINVAL;
3786
3787                 if (companion_ok)
3788                         i++; /* companion channel already checked */
3789         }
3790
3791         return 0;
3792 }
3793
3794 static int atihdmi_pin_set_slot_channel(struct hdac_device *hdac,
3795                 hda_nid_t pin_nid, int hdmi_slot, int stream_channel)
3796 {
3797         struct hda_codec *codec = container_of(hdac, struct hda_codec, core);
3798         int verb;
3799         int ati_channel_setup = 0;
3800
3801         if (hdmi_slot > 7)
3802                 return -EINVAL;
3803
3804         if (!has_amd_full_remap_support(codec)) {
3805                 hdmi_slot = atihdmi_paired_swap_fc_lfe(hdmi_slot);
3806
3807                 /* In case this is an odd slot but without stream channel, do not
3808                  * disable the slot since the corresponding even slot could have a
3809                  * channel. In case neither have a channel, the slot pair will be
3810                  * disabled when this function is called for the even slot. */
3811                 if (hdmi_slot % 2 != 0 && stream_channel == 0xf)
3812                         return 0;
3813
3814                 hdmi_slot -= hdmi_slot % 2;
3815
3816                 if (stream_channel != 0xf)
3817                         stream_channel -= stream_channel % 2;
3818         }
3819
3820         verb = ATI_VERB_SET_MULTICHANNEL_01 + hdmi_slot/2 + (hdmi_slot % 2) * 0x00e;
3821
3822         /* ati_channel_setup format: [7..4] = stream_channel_id, [1] = mute, [0] = enable */
3823
3824         if (stream_channel != 0xf)
3825                 ati_channel_setup = (stream_channel << 4) | ATI_OUT_ENABLE;
3826
3827         return snd_hda_codec_write(codec, pin_nid, 0, verb, ati_channel_setup);
3828 }
3829
3830 static int atihdmi_pin_get_slot_channel(struct hdac_device *hdac,
3831                                 hda_nid_t pin_nid, int asp_slot)
3832 {
3833         struct hda_codec *codec = container_of(hdac, struct hda_codec, core);
3834         bool was_odd = false;
3835         int ati_asp_slot = asp_slot;
3836         int verb;
3837         int ati_channel_setup;
3838
3839         if (asp_slot > 7)
3840                 return -EINVAL;
3841
3842         if (!has_amd_full_remap_support(codec)) {
3843                 ati_asp_slot = atihdmi_paired_swap_fc_lfe(asp_slot);
3844                 if (ati_asp_slot % 2 != 0) {
3845                         ati_asp_slot -= 1;
3846                         was_odd = true;
3847                 }
3848         }
3849
3850         verb = ATI_VERB_GET_MULTICHANNEL_01 + ati_asp_slot/2 + (ati_asp_slot % 2) * 0x00e;
3851
3852         ati_channel_setup = snd_hda_codec_read(codec, pin_nid, 0, verb, 0);
3853
3854         if (!(ati_channel_setup & ATI_OUT_ENABLE))
3855                 return 0xf;
3856
3857         return ((ati_channel_setup & 0xf0) >> 4) + !!was_odd;
3858 }
3859
3860 static int atihdmi_paired_chmap_cea_alloc_validate_get_type(
3861                 struct hdac_chmap *chmap,
3862                 struct hdac_cea_channel_speaker_allocation *cap,
3863                 int channels)
3864 {
3865         int c;
3866
3867         /*
3868          * Pre-rev3 ATI/AMD codecs operate in a paired channel mode, so
3869          * we need to take that into account (a single channel may take 2
3870          * channel slots if we need to carry a silent channel next to it).
3871          * On Rev3+ AMD codecs this function is not used.
3872          */
3873         int chanpairs = 0;
3874
3875         /* We only produce even-numbered channel count TLVs */
3876         if ((channels % 2) != 0)
3877                 return -1;
3878
3879         for (c = 0; c < 7; c += 2) {
3880                 if (cap->speakers[c] || cap->speakers[c+1])
3881                         chanpairs++;
3882         }
3883
3884         if (chanpairs * 2 != channels)
3885                 return -1;
3886
3887         return SNDRV_CTL_TLVT_CHMAP_PAIRED;
3888 }
3889
3890 static void atihdmi_paired_cea_alloc_to_tlv_chmap(struct hdac_chmap *hchmap,
3891                 struct hdac_cea_channel_speaker_allocation *cap,
3892                 unsigned int *chmap, int channels)
3893 {
3894         /* produce paired maps for pre-rev3 ATI/AMD codecs */
3895         int count = 0;
3896         int c;
3897
3898         for (c = 7; c >= 0; c--) {
3899                 int chan = 7 - atihdmi_paired_swap_fc_lfe(7 - c);
3900                 int spk = cap->speakers[chan];
3901                 if (!spk) {
3902                         /* add N/A channel if the companion channel is occupied */
3903                         if (cap->speakers[chan + (chan % 2 ? -1 : 1)])
3904                                 chmap[count++] = SNDRV_CHMAP_NA;
3905
3906                         continue;
3907                 }
3908
3909                 chmap[count++] = snd_hdac_spk_to_chmap(spk);
3910         }
3911
3912         WARN_ON(count != channels);
3913 }
3914
3915 static int atihdmi_pin_hbr_setup(struct hda_codec *codec, hda_nid_t pin_nid,
3916                                  bool hbr)
3917 {
3918         int hbr_ctl, hbr_ctl_new;
3919
3920         hbr_ctl = snd_hda_codec_read(codec, pin_nid, 0, ATI_VERB_GET_HBR_CONTROL, 0);
3921         if (hbr_ctl >= 0 && (hbr_ctl & ATI_HBR_CAPABLE)) {
3922                 if (hbr)
3923                         hbr_ctl_new = hbr_ctl | ATI_HBR_ENABLE;
3924                 else
3925                         hbr_ctl_new = hbr_ctl & ~ATI_HBR_ENABLE;
3926
3927                 codec_dbg(codec,
3928                           "atihdmi_pin_hbr_setup: NID=0x%x, %shbr-ctl=0x%x\n",
3929                                 pin_nid,
3930                                 hbr_ctl == hbr_ctl_new ? "" : "new-",
3931                                 hbr_ctl_new);
3932
3933                 if (hbr_ctl != hbr_ctl_new)
3934                         snd_hda_codec_write(codec, pin_nid, 0,
3935                                                 ATI_VERB_SET_HBR_CONTROL,
3936                                                 hbr_ctl_new);
3937
3938         } else if (hbr)
3939                 return -EINVAL;
3940
3941         return 0;
3942 }
3943
3944 static int atihdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
3945                                 hda_nid_t pin_nid, u32 stream_tag, int format)
3946 {
3947
3948         if (is_amdhdmi_rev3_or_later(codec)) {
3949                 int ramp_rate = 180; /* default as per AMD spec */
3950                 /* disable ramp-up/down for non-pcm as per AMD spec */
3951                 if (format & AC_FMT_TYPE_NON_PCM)
3952                         ramp_rate = 0;
3953
3954                 snd_hda_codec_write(codec, cvt_nid, 0, ATI_VERB_SET_RAMP_RATE, ramp_rate);
3955         }
3956
3957         return hdmi_setup_stream(codec, cvt_nid, pin_nid, stream_tag, format);
3958 }
3959
3960
3961 static int atihdmi_init(struct hda_codec *codec)
3962 {
3963         struct hdmi_spec *spec = codec->spec;
3964         int pin_idx, err;
3965
3966         err = generic_hdmi_init(codec);
3967
3968         if (err)
3969                 return err;
3970
3971         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
3972                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
3973
3974                 /* make sure downmix information in infoframe is zero */
3975                 snd_hda_codec_write(codec, per_pin->pin_nid, 0, ATI_VERB_SET_DOWNMIX_INFO, 0);
3976
3977                 /* enable channel-wise remap mode if supported */
3978                 if (has_amd_full_remap_support(codec))
3979                         snd_hda_codec_write(codec, per_pin->pin_nid, 0,
3980                                             ATI_VERB_SET_MULTICHANNEL_MODE,
3981                                             ATI_MULTICHANNEL_MODE_SINGLE);
3982         }
3983
3984         return 0;
3985 }
3986
3987 /* map from pin NID to port; port is 0-based */
3988 /* for AMD: assume widget NID starting from 3, with step 2 (3, 5, 7, ...) */
3989 static int atihdmi_pin2port(void *audio_ptr, int pin_nid)
3990 {
3991         return pin_nid / 2 - 1;
3992 }
3993
3994 /* reverse-map from port to pin NID: see above */
3995 static int atihdmi_port2pin(struct hda_codec *codec, int port)
3996 {
3997         return port * 2 + 3;
3998 }
3999
4000 static const struct drm_audio_component_audio_ops atihdmi_audio_ops = {
4001         .pin2port = atihdmi_pin2port,
4002         .pin_eld_notify = generic_acomp_pin_eld_notify,
4003         .master_bind = generic_acomp_master_bind,
4004         .master_unbind = generic_acomp_master_unbind,
4005 };
4006
4007 static int patch_atihdmi(struct hda_codec *codec)
4008 {
4009         struct hdmi_spec *spec;
4010         struct hdmi_spec_per_cvt *per_cvt;
4011         int err, cvt_idx;
4012
4013         err = patch_generic_hdmi(codec);
4014
4015         if (err)
4016                 return err;
4017
4018         codec->patch_ops.init = atihdmi_init;
4019
4020         spec = codec->spec;
4021
4022         spec->ops.pin_get_eld = atihdmi_pin_get_eld;
4023         spec->ops.pin_setup_infoframe = atihdmi_pin_setup_infoframe;
4024         spec->ops.pin_hbr_setup = atihdmi_pin_hbr_setup;
4025         spec->ops.setup_stream = atihdmi_setup_stream;
4026
4027         spec->chmap.ops.pin_get_slot_channel = atihdmi_pin_get_slot_channel;
4028         spec->chmap.ops.pin_set_slot_channel = atihdmi_pin_set_slot_channel;
4029
4030         if (!has_amd_full_remap_support(codec)) {
4031                 /* override to ATI/AMD-specific versions with pairwise mapping */
4032                 spec->chmap.ops.chmap_cea_alloc_validate_get_type =
4033                         atihdmi_paired_chmap_cea_alloc_validate_get_type;
4034                 spec->chmap.ops.cea_alloc_to_tlv_chmap =
4035                                 atihdmi_paired_cea_alloc_to_tlv_chmap;
4036                 spec->chmap.ops.chmap_validate = atihdmi_paired_chmap_validate;
4037         }
4038
4039         /* ATI/AMD converters do not advertise all of their capabilities */
4040         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
4041                 per_cvt = get_cvt(spec, cvt_idx);
4042                 per_cvt->channels_max = max(per_cvt->channels_max, 8u);
4043                 per_cvt->rates |= SUPPORTED_RATES;
4044                 per_cvt->formats |= SUPPORTED_FORMATS;
4045                 per_cvt->maxbps = max(per_cvt->maxbps, 24u);
4046         }
4047
4048         spec->chmap.channels_max = max(spec->chmap.channels_max, 8u);
4049
4050         /* AMD GPUs have neither EPSS nor CLKSTOP bits, hence preventing
4051          * the link-down as is.  Tell the core to allow it.
4052          */
4053         codec->link_down_at_suspend = 1;
4054
4055         generic_acomp_init(codec, &atihdmi_audio_ops, atihdmi_port2pin);
4056
4057         return 0;
4058 }
4059
4060 /* VIA HDMI Implementation */
4061 #define VIAHDMI_CVT_NID 0x02    /* audio converter1 */
4062 #define VIAHDMI_PIN_NID 0x03    /* HDMI output pin1 */
4063
4064 static int patch_via_hdmi(struct hda_codec *codec)
4065 {
4066         return patch_simple_hdmi(codec, VIAHDMI_CVT_NID, VIAHDMI_PIN_NID);
4067 }
4068
4069 /*
4070  * patch entries
4071  */
4072 static const struct hda_device_id snd_hda_id_hdmi[] = {
4073 HDA_CODEC_ENTRY(0x1002793c, "RS600 HDMI",       patch_atihdmi),
4074 HDA_CODEC_ENTRY(0x10027919, "RS600 HDMI",       patch_atihdmi),
4075 HDA_CODEC_ENTRY(0x1002791a, "RS690/780 HDMI",   patch_atihdmi),
4076 HDA_CODEC_ENTRY(0x1002aa01, "R6xx HDMI",        patch_atihdmi),
4077 HDA_CODEC_ENTRY(0x10951390, "SiI1390 HDMI",     patch_generic_hdmi),
4078 HDA_CODEC_ENTRY(0x10951392, "SiI1392 HDMI",     patch_generic_hdmi),
4079 HDA_CODEC_ENTRY(0x17e80047, "Chrontel HDMI",    patch_generic_hdmi),
4080 HDA_CODEC_ENTRY(0x10de0001, "MCP73 HDMI",       patch_nvhdmi_2ch),
4081 HDA_CODEC_ENTRY(0x10de0002, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
4082 HDA_CODEC_ENTRY(0x10de0003, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
4083 HDA_CODEC_ENTRY(0x10de0004, "GPU 04 HDMI",      patch_nvhdmi_8ch_7x),
4084 HDA_CODEC_ENTRY(0x10de0005, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
4085 HDA_CODEC_ENTRY(0x10de0006, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
4086 HDA_CODEC_ENTRY(0x10de0007, "MCP79/7A HDMI",    patch_nvhdmi_8ch_7x),
4087 HDA_CODEC_ENTRY(0x10de0008, "GPU 08 HDMI/DP",   patch_nvhdmi),
4088 HDA_CODEC_ENTRY(0x10de0009, "GPU 09 HDMI/DP",   patch_nvhdmi),
4089 HDA_CODEC_ENTRY(0x10de000a, "GPU 0a HDMI/DP",   patch_nvhdmi),
4090 HDA_CODEC_ENTRY(0x10de000b, "GPU 0b HDMI/DP",   patch_nvhdmi),
4091 HDA_CODEC_ENTRY(0x10de000c, "MCP89 HDMI",       patch_nvhdmi),
4092 HDA_CODEC_ENTRY(0x10de000d, "GPU 0d HDMI/DP",   patch_nvhdmi),
4093 HDA_CODEC_ENTRY(0x10de0010, "GPU 10 HDMI/DP",   patch_nvhdmi),
4094 HDA_CODEC_ENTRY(0x10de0011, "GPU 11 HDMI/DP",   patch_nvhdmi),
4095 HDA_CODEC_ENTRY(0x10de0012, "GPU 12 HDMI/DP",   patch_nvhdmi),
4096 HDA_CODEC_ENTRY(0x10de0013, "GPU 13 HDMI/DP",   patch_nvhdmi),
4097 HDA_CODEC_ENTRY(0x10de0014, "GPU 14 HDMI/DP",   patch_nvhdmi),
4098 HDA_CODEC_ENTRY(0x10de0015, "GPU 15 HDMI/DP",   patch_nvhdmi),
4099 HDA_CODEC_ENTRY(0x10de0016, "GPU 16 HDMI/DP",   patch_nvhdmi),
4100 /* 17 is known to be absent */
4101 HDA_CODEC_ENTRY(0x10de0018, "GPU 18 HDMI/DP",   patch_nvhdmi),
4102 HDA_CODEC_ENTRY(0x10de0019, "GPU 19 HDMI/DP",   patch_nvhdmi),
4103 HDA_CODEC_ENTRY(0x10de001a, "GPU 1a HDMI/DP",   patch_nvhdmi),
4104 HDA_CODEC_ENTRY(0x10de001b, "GPU 1b HDMI/DP",   patch_nvhdmi),
4105 HDA_CODEC_ENTRY(0x10de001c, "GPU 1c HDMI/DP",   patch_nvhdmi),
4106 HDA_CODEC_ENTRY(0x10de0020, "Tegra30 HDMI",     patch_tegra_hdmi),
4107 HDA_CODEC_ENTRY(0x10de0022, "Tegra114 HDMI",    patch_tegra_hdmi),
4108 HDA_CODEC_ENTRY(0x10de0028, "Tegra124 HDMI",    patch_tegra_hdmi),
4109 HDA_CODEC_ENTRY(0x10de0029, "Tegra210 HDMI/DP", patch_tegra_hdmi),
4110 HDA_CODEC_ENTRY(0x10de002d, "Tegra186 HDMI/DP0", patch_tegra_hdmi),
4111 HDA_CODEC_ENTRY(0x10de002e, "Tegra186 HDMI/DP1", patch_tegra_hdmi),
4112 HDA_CODEC_ENTRY(0x10de002f, "Tegra194 HDMI/DP2", patch_tegra_hdmi),
4113 HDA_CODEC_ENTRY(0x10de0030, "Tegra194 HDMI/DP3", patch_tegra_hdmi),
4114 HDA_CODEC_ENTRY(0x10de0040, "GPU 40 HDMI/DP",   patch_nvhdmi),
4115 HDA_CODEC_ENTRY(0x10de0041, "GPU 41 HDMI/DP",   patch_nvhdmi),
4116 HDA_CODEC_ENTRY(0x10de0042, "GPU 42 HDMI/DP",   patch_nvhdmi),
4117 HDA_CODEC_ENTRY(0x10de0043, "GPU 43 HDMI/DP",   patch_nvhdmi),
4118 HDA_CODEC_ENTRY(0x10de0044, "GPU 44 HDMI/DP",   patch_nvhdmi),
4119 HDA_CODEC_ENTRY(0x10de0045, "GPU 45 HDMI/DP",   patch_nvhdmi),
4120 HDA_CODEC_ENTRY(0x10de0050, "GPU 50 HDMI/DP",   patch_nvhdmi),
4121 HDA_CODEC_ENTRY(0x10de0051, "GPU 51 HDMI/DP",   patch_nvhdmi),
4122 HDA_CODEC_ENTRY(0x10de0052, "GPU 52 HDMI/DP",   patch_nvhdmi),
4123 HDA_CODEC_ENTRY(0x10de0060, "GPU 60 HDMI/DP",   patch_nvhdmi),
4124 HDA_CODEC_ENTRY(0x10de0061, "GPU 61 HDMI/DP",   patch_nvhdmi),
4125 HDA_CODEC_ENTRY(0x10de0062, "GPU 62 HDMI/DP",   patch_nvhdmi),
4126 HDA_CODEC_ENTRY(0x10de0067, "MCP67 HDMI",       patch_nvhdmi_2ch),
4127 HDA_CODEC_ENTRY(0x10de0070, "GPU 70 HDMI/DP",   patch_nvhdmi),
4128 HDA_CODEC_ENTRY(0x10de0071, "GPU 71 HDMI/DP",   patch_nvhdmi),
4129 HDA_CODEC_ENTRY(0x10de0072, "GPU 72 HDMI/DP",   patch_nvhdmi),
4130 HDA_CODEC_ENTRY(0x10de0073, "GPU 73 HDMI/DP",   patch_nvhdmi),
4131 HDA_CODEC_ENTRY(0x10de0074, "GPU 74 HDMI/DP",   patch_nvhdmi),
4132 HDA_CODEC_ENTRY(0x10de0076, "GPU 76 HDMI/DP",   patch_nvhdmi),
4133 HDA_CODEC_ENTRY(0x10de007b, "GPU 7b HDMI/DP",   patch_nvhdmi),
4134 HDA_CODEC_ENTRY(0x10de007c, "GPU 7c HDMI/DP",   patch_nvhdmi),
4135 HDA_CODEC_ENTRY(0x10de007d, "GPU 7d HDMI/DP",   patch_nvhdmi),
4136 HDA_CODEC_ENTRY(0x10de007e, "GPU 7e HDMI/DP",   patch_nvhdmi),
4137 HDA_CODEC_ENTRY(0x10de0080, "GPU 80 HDMI/DP",   patch_nvhdmi),
4138 HDA_CODEC_ENTRY(0x10de0081, "GPU 81 HDMI/DP",   patch_nvhdmi),
4139 HDA_CODEC_ENTRY(0x10de0082, "GPU 82 HDMI/DP",   patch_nvhdmi),
4140 HDA_CODEC_ENTRY(0x10de0083, "GPU 83 HDMI/DP",   patch_nvhdmi),
4141 HDA_CODEC_ENTRY(0x10de0084, "GPU 84 HDMI/DP",   patch_nvhdmi),
4142 HDA_CODEC_ENTRY(0x10de0090, "GPU 90 HDMI/DP",   patch_nvhdmi),
4143 HDA_CODEC_ENTRY(0x10de0091, "GPU 91 HDMI/DP",   patch_nvhdmi),
4144 HDA_CODEC_ENTRY(0x10de0092, "GPU 92 HDMI/DP",   patch_nvhdmi),
4145 HDA_CODEC_ENTRY(0x10de0093, "GPU 93 HDMI/DP",   patch_nvhdmi),
4146 HDA_CODEC_ENTRY(0x10de0094, "GPU 94 HDMI/DP",   patch_nvhdmi),
4147 HDA_CODEC_ENTRY(0x10de0095, "GPU 95 HDMI/DP",   patch_nvhdmi),
4148 HDA_CODEC_ENTRY(0x10de0097, "GPU 97 HDMI/DP",   patch_nvhdmi),
4149 HDA_CODEC_ENTRY(0x10de0098, "GPU 98 HDMI/DP",   patch_nvhdmi),
4150 HDA_CODEC_ENTRY(0x10de0099, "GPU 99 HDMI/DP",   patch_nvhdmi),
4151 HDA_CODEC_ENTRY(0x10de8001, "MCP73 HDMI",       patch_nvhdmi_2ch),
4152 HDA_CODEC_ENTRY(0x10de8067, "MCP67/68 HDMI",    patch_nvhdmi_2ch),
4153 HDA_CODEC_ENTRY(0x11069f80, "VX900 HDMI/DP",    patch_via_hdmi),
4154 HDA_CODEC_ENTRY(0x11069f81, "VX900 HDMI/DP",    patch_via_hdmi),
4155 HDA_CODEC_ENTRY(0x11069f84, "VX11 HDMI/DP",     patch_generic_hdmi),
4156 HDA_CODEC_ENTRY(0x11069f85, "VX11 HDMI/DP",     patch_generic_hdmi),
4157 HDA_CODEC_ENTRY(0x80860054, "IbexPeak HDMI",    patch_i915_cpt_hdmi),
4158 HDA_CODEC_ENTRY(0x80862800, "Geminilake HDMI",  patch_i915_glk_hdmi),
4159 HDA_CODEC_ENTRY(0x80862801, "Bearlake HDMI",    patch_generic_hdmi),
4160 HDA_CODEC_ENTRY(0x80862802, "Cantiga HDMI",     patch_generic_hdmi),
4161 HDA_CODEC_ENTRY(0x80862803, "Eaglelake HDMI",   patch_generic_hdmi),
4162 HDA_CODEC_ENTRY(0x80862804, "IbexPeak HDMI",    patch_i915_cpt_hdmi),
4163 HDA_CODEC_ENTRY(0x80862805, "CougarPoint HDMI", patch_i915_cpt_hdmi),
4164 HDA_CODEC_ENTRY(0x80862806, "PantherPoint HDMI", patch_i915_cpt_hdmi),
4165 HDA_CODEC_ENTRY(0x80862807, "Haswell HDMI",     patch_i915_hsw_hdmi),
4166 HDA_CODEC_ENTRY(0x80862808, "Broadwell HDMI",   patch_i915_hsw_hdmi),
4167 HDA_CODEC_ENTRY(0x80862809, "Skylake HDMI",     patch_i915_hsw_hdmi),
4168 HDA_CODEC_ENTRY(0x8086280a, "Broxton HDMI",     patch_i915_hsw_hdmi),
4169 HDA_CODEC_ENTRY(0x8086280b, "Kabylake HDMI",    patch_i915_hsw_hdmi),
4170 HDA_CODEC_ENTRY(0x8086280c, "Cannonlake HDMI",  patch_i915_glk_hdmi),
4171 HDA_CODEC_ENTRY(0x8086280d, "Geminilake HDMI",  patch_i915_glk_hdmi),
4172 HDA_CODEC_ENTRY(0x8086280f, "Icelake HDMI",     patch_i915_icl_hdmi),
4173 HDA_CODEC_ENTRY(0x80862812, "Tigerlake HDMI",   patch_i915_tgl_hdmi),
4174 HDA_CODEC_ENTRY(0x80862880, "CedarTrail HDMI",  patch_generic_hdmi),
4175 HDA_CODEC_ENTRY(0x80862882, "Valleyview2 HDMI", patch_i915_byt_hdmi),
4176 HDA_CODEC_ENTRY(0x80862883, "Braswell HDMI",    patch_i915_byt_hdmi),
4177 HDA_CODEC_ENTRY(0x808629fb, "Crestline HDMI",   patch_generic_hdmi),
4178 /* special ID for generic HDMI */
4179 HDA_CODEC_ENTRY(HDA_CODEC_ID_GENERIC_HDMI, "Generic HDMI", patch_generic_hdmi),
4180 {} /* terminator */
4181 };
4182 MODULE_DEVICE_TABLE(hdaudio, snd_hda_id_hdmi);
4183
4184 MODULE_LICENSE("GPL");
4185 MODULE_DESCRIPTION("HDMI HD-audio codec");
4186 MODULE_ALIAS("snd-hda-codec-intelhdmi");
4187 MODULE_ALIAS("snd-hda-codec-nvhdmi");
4188 MODULE_ALIAS("snd-hda-codec-atihdmi");
4189
4190 static struct hda_codec_driver hdmi_driver = {
4191         .id = snd_hda_id_hdmi,
4192 };
4193
4194 module_hda_codec_driver(hdmi_driver);