sound/pci/hda/patch_hdmi.c

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  *
   4  *  patch_hdmi.c - routines for HDMI/DisplayPort codecs
   5  *
   6  *  Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
   7  *  Copyright (c) 2006 ATI Technologies Inc.
   8  *  Copyright (c) 2008 NVIDIA Corp.  All rights reserved.
   9  *  Copyright (c) 2008 Wei Ni <wni@nvidia.com>
  10  *  Copyright (c) 2013 Anssi Hannula <anssi.hannula@iki.fi>
  11  *
  12  *  Authors:
  13  *                      Wu Fengguang <wfg@linux.intel.com>
  14  *
  15  *  Maintained by:
  16  *                      Wu Fengguang <wfg@linux.intel.com>
  17  */
  18
  19 #include <linux/init.h>
  20 #include <linux/delay.h>
  21 #include <linux/pci.h>
  22 #include <linux/slab.h>
  23 #include <linux/module.h>
  24 #include <linux/pm_runtime.h>
  25 #include <sound/core.h>
  26 #include <sound/jack.h>
  27 #include <sound/asoundef.h>
  28 #include <sound/tlv.h>
  29 #include <sound/hdaudio.h>
  30 #include <sound/hda_i915.h>
  31 #include <sound/hda_chmap.h>
  32 #include <sound/hda_codec.h>
  33 #include "hda_local.h"
  34 #include "hda_jack.h"
  35
  36 static bool static_hdmi_pcm;
  37 module_param(static_hdmi_pcm, bool, 0644);
  38 MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info");
  39
  40 struct hdmi_spec_per_cvt {
  41         hda_nid_t cvt_nid;
  42         int assigned;
  43         unsigned int channels_min;
  44         unsigned int channels_max;
  45         u32 rates;
  46         u64 formats;
  47         unsigned int maxbps;
  48 };
  49
  50 /* max. connections to a widget */
  51 #define HDA_MAX_CONNECTIONS     32
  52
  53 struct hdmi_spec_per_pin {
  54         hda_nid_t pin_nid;
  55         int dev_id;
  56         /* pin idx, different device entries on the same pin use the same idx */
  57         int pin_nid_idx;
  58         int num_mux_nids;
  59         hda_nid_t mux_nids[HDA_MAX_CONNECTIONS];
  60         int mux_idx;
  61         hda_nid_t cvt_nid;
  62
  63         struct hda_codec *codec;
  64         struct hdmi_eld sink_eld;
  65         struct mutex lock;
  66         struct delayed_work work;
  67         struct hdmi_pcm *pcm; /* pointer to spec->pcm_rec[n] dynamically*/
  68         int pcm_idx; /* which pcm is attached. -1 means no pcm is attached */
  69         int repoll_count;
  70         bool setup; /* the stream has been set up by prepare callback */
  71         int channels; /* current number of channels */
  72         bool non_pcm;
  73         bool chmap_set;         /* channel-map override by ALSA API? */
  74         unsigned char chmap[8]; /* ALSA API channel-map */
  75 #ifdef CONFIG_SND_PROC_FS
  76         struct snd_info_entry *proc_entry;
  77 #endif
  78 };
  79
  80 /* operations used by generic code that can be overridden by patches */
  81 struct hdmi_ops {
  82         int (*pin_get_eld)(struct hda_codec *codec, hda_nid_t pin_nid,
  83                            int dev_id, unsigned char *buf, int *eld_size);
  84
  85         void (*pin_setup_infoframe)(struct hda_codec *codec, hda_nid_t pin_nid,
  86                                     int dev_id,
  87                                     int ca, int active_channels, int conn_type);
  88
  89         /* enable/disable HBR (HD passthrough) */
  90         int (*pin_hbr_setup)(struct hda_codec *codec, hda_nid_t pin_nid,
  91                              int dev_id, bool hbr);
  92
  93         int (*setup_stream)(struct hda_codec *codec, hda_nid_t cvt_nid,
  94                             hda_nid_t pin_nid, int dev_id, u32 stream_tag,
  95                             int format);
  96
  97         void (*pin_cvt_fixup)(struct hda_codec *codec,
  98                               struct hdmi_spec_per_pin *per_pin,
  99                               hda_nid_t cvt_nid);
 100 };
 101
 102 struct hdmi_pcm {
 103         struct hda_pcm *pcm;
 104         struct snd_jack *jack;
 105         struct snd_kcontrol *eld_ctl;
 106 };
 107
 108 struct hdmi_spec {
 109         struct hda_codec *codec;
 110         int num_cvts;
 111         struct snd_array cvts; /* struct hdmi_spec_per_cvt */
 112         hda_nid_t cvt_nids[4]; /* only for haswell fix */
 113
 114         /*
 115          * num_pins is the number of virtual pins
 116          * for example, there are 3 pins, and each pin
 117          * has 4 device entries, then the num_pins is 12
 118          */
 119         int num_pins;
 120         /*
 121          * num_nids is the number of real pins
 122          * In the above example, num_nids is 3
 123          */
 124         int num_nids;
 125         /*
 126          * dev_num is the number of device entries
 127          * on each pin.
 128          * In the above example, dev_num is 4
 129          */
 130         int dev_num;
 131         struct snd_array pins; /* struct hdmi_spec_per_pin */
 132         struct hdmi_pcm pcm_rec[16];
 133         struct mutex pcm_lock;
 134         struct mutex bind_lock; /* for audio component binding */
 135         /* pcm_bitmap means which pcms have been assigned to pins*/
 136         unsigned long pcm_bitmap;
 137         int pcm_used;   /* counter of pcm_rec[] */
 138         /* bitmap shows whether the pcm is opened in user space
 139          * bit 0 means the first playback PCM (PCM3);
 140          * bit 1 means the second playback PCM, and so on.
 141          */
 142         unsigned long pcm_in_use;
 143
 144         struct hdmi_eld temp_eld;
 145         struct hdmi_ops ops;
 146
 147         bool dyn_pin_out;
 148         bool dyn_pcm_assign;
 149         bool intel_hsw_fixup;   /* apply Intel platform-specific fixups */
 150         /*
 151          * Non-generic VIA/NVIDIA specific
 152          */
 153         struct hda_multi_out multiout;
 154         struct hda_pcm_stream pcm_playback;
 155
 156         bool use_jack_detect; /* jack detection enabled */
 157         bool use_acomp_notifier; /* use eld_notify callback for hotplug */
 158         bool acomp_registered; /* audio component registered in this driver */
 159         struct drm_audio_component_audio_ops drm_audio_ops;
 160         int (*port2pin)(struct hda_codec *, int); /* reverse port/pin mapping */
 161
 162         struct hdac_chmap chmap;
 163         hda_nid_t vendor_nid;
 164         const int *port_map;
 165         int port_num;
 166 };
 167
 168 #ifdef CONFIG_SND_HDA_COMPONENT
 169 static inline bool codec_has_acomp(struct hda_codec *codec)
 170 {
 171         struct hdmi_spec *spec = codec->spec;
 172         return spec->use_acomp_notifier;
 173 }
 174 #else
 175 #define codec_has_acomp(codec)  false
 176 #endif
 177
 178 struct hdmi_audio_infoframe {
 179         u8 type; /* 0x84 */
 180         u8 ver;  /* 0x01 */
 181         u8 len;  /* 0x0a */
 182
 183         u8 checksum;
 184
 185         u8 CC02_CT47;   /* CC in bits 0:2, CT in 4:7 */
 186         u8 SS01_SF24;
 187         u8 CXT04;
 188         u8 CA;
 189         u8 LFEPBL01_LSV36_DM_INH7;
 190 };
 191
 192 struct dp_audio_infoframe {
 193         u8 type; /* 0x84 */
 194         u8 len;  /* 0x1b */
 195         u8 ver;  /* 0x11 << 2 */
 196
 197         u8 CC02_CT47;   /* match with HDMI infoframe from this on */
 198         u8 SS01_SF24;
 199         u8 CXT04;
 200         u8 CA;
 201         u8 LFEPBL01_LSV36_DM_INH7;
 202 };
 203
 204 union audio_infoframe {
 205         struct hdmi_audio_infoframe hdmi;
 206         struct dp_audio_infoframe dp;
 207         u8 bytes[0];
 208 };
 209
 210 /*
 211  * HDMI routines
 212  */
 213
 214 #define get_pin(spec, idx) \
 215         ((struct hdmi_spec_per_pin *)snd_array_elem(&spec->pins, idx))
 216 #define get_cvt(spec, idx) \
 217         ((struct hdmi_spec_per_cvt  *)snd_array_elem(&spec->cvts, idx))
 218 /* obtain hdmi_pcm object assigned to idx */
 219 #define get_hdmi_pcm(spec, idx) (&(spec)->pcm_rec[idx])
 220 /* obtain hda_pcm object assigned to idx */
 221 #define get_pcm_rec(spec, idx)  (get_hdmi_pcm(spec, idx)->pcm)
 222
 223 static int pin_id_to_pin_index(struct hda_codec *codec,
 224                                hda_nid_t pin_nid, int dev_id)
 225 {
 226         struct hdmi_spec *spec = codec->spec;
 227         int pin_idx;
 228         struct hdmi_spec_per_pin *per_pin;
 229
 230         /*
 231          * (dev_id == -1) means it is NON-MST pin
 232          * return the first virtual pin on this port
 233          */
 234         if (dev_id == -1)
 235                 dev_id = 0;
 236
 237         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
 238                 per_pin = get_pin(spec, pin_idx);
 239                 if ((per_pin->pin_nid == pin_nid) &&
 240                         (per_pin->dev_id == dev_id))
 241                         return pin_idx;
 242         }
 243
 244         codec_warn(codec, "HDMI: pin nid %d not registered\n", pin_nid);
 245         return -EINVAL;
 246 }
 247
 248 static int hinfo_to_pcm_index(struct hda_codec *codec,
 249                         struct hda_pcm_stream *hinfo)
 250 {
 251         struct hdmi_spec *spec = codec->spec;
 252         int pcm_idx;
 253
 254         for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++)
 255                 if (get_pcm_rec(spec, pcm_idx)->stream == hinfo)
 256                         return pcm_idx;
 257
 258         codec_warn(codec, "HDMI: hinfo %p not registered\n", hinfo);
 259         return -EINVAL;
 260 }
 261
 262 static int hinfo_to_pin_index(struct hda_codec *codec,
 263                               struct hda_pcm_stream *hinfo)
 264 {
 265         struct hdmi_spec *spec = codec->spec;
 266         struct hdmi_spec_per_pin *per_pin;
 267         int pin_idx;
 268
 269         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
 270                 per_pin = get_pin(spec, pin_idx);
 271                 if (per_pin->pcm &&
 272                         per_pin->pcm->pcm->stream == hinfo)
 273                         return pin_idx;
 274         }
 275
 276         codec_dbg(codec, "HDMI: hinfo %p not registered\n", hinfo);
 277         return -EINVAL;
 278 }
 279
 280 static struct hdmi_spec_per_pin *pcm_idx_to_pin(struct hdmi_spec *spec,
 281                                                 int pcm_idx)
 282 {
 283         int i;
 284         struct hdmi_spec_per_pin *per_pin;
 285
 286         for (i = 0; i < spec->num_pins; i++) {
 287                 per_pin = get_pin(spec, i);
 288                 if (per_pin->pcm_idx == pcm_idx)
 289                         return per_pin;
 290         }
 291         return NULL;
 292 }
 293
 294 static int cvt_nid_to_cvt_index(struct hda_codec *codec, hda_nid_t cvt_nid)
 295 {
 296         struct hdmi_spec *spec = codec->spec;
 297         int cvt_idx;
 298
 299         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++)
 300                 if (get_cvt(spec, cvt_idx)->cvt_nid == cvt_nid)
 301                         return cvt_idx;
 302
 303         codec_warn(codec, "HDMI: cvt nid %d not registered\n", cvt_nid);
 304         return -EINVAL;
 305 }
 306
 307 static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol,
 308                         struct snd_ctl_elem_info *uinfo)
 309 {
 310         struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
 311         struct hdmi_spec *spec = codec->spec;
 312         struct hdmi_spec_per_pin *per_pin;
 313         struct hdmi_eld *eld;
 314         int pcm_idx;
 315
 316         uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
 317
 318         pcm_idx = kcontrol->private_value;
 319         mutex_lock(&spec->pcm_lock);
 320         per_pin = pcm_idx_to_pin(spec, pcm_idx);
 321         if (!per_pin) {
 322                 /* no pin is bound to the pcm */
 323                 uinfo->count = 0;
 324                 goto unlock;
 325         }
 326         eld = &per_pin->sink_eld;
 327         uinfo->count = eld->eld_valid ? eld->eld_size : 0;
 328
 329  unlock:
 330         mutex_unlock(&spec->pcm_lock);
 331         return 0;
 332 }
 333
 334 static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol,
 335                         struct snd_ctl_elem_value *ucontrol)
 336 {
 337         struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
 338         struct hdmi_spec *spec = codec->spec;
 339         struct hdmi_spec_per_pin *per_pin;
 340         struct hdmi_eld *eld;
 341         int pcm_idx;
 342         int err = 0;
 343
 344         pcm_idx = kcontrol->private_value;
 345         mutex_lock(&spec->pcm_lock);
 346         per_pin = pcm_idx_to_pin(spec, pcm_idx);
 347         if (!per_pin) {
 348                 /* no pin is bound to the pcm */
 349                 memset(ucontrol->value.bytes.data, 0,
 350                        ARRAY_SIZE(ucontrol->value.bytes.data));
 351                 goto unlock;
 352         }
 353
 354         eld = &per_pin->sink_eld;
 355         if (eld->eld_size > ARRAY_SIZE(ucontrol->value.bytes.data) ||
 356             eld->eld_size > ELD_MAX_SIZE) {
 357                 snd_BUG();
 358                 err = -EINVAL;
 359                 goto unlock;
 360         }
 361
 362         memset(ucontrol->value.bytes.data, 0,
 363                ARRAY_SIZE(ucontrol->value.bytes.data));
 364         if (eld->eld_valid)
 365                 memcpy(ucontrol->value.bytes.data, eld->eld_buffer,
 366                        eld->eld_size);
 367
 368  unlock:
 369         mutex_unlock(&spec->pcm_lock);
 370         return err;
 371 }
 372
 373 static const struct snd_kcontrol_new eld_bytes_ctl = {
 374         .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
 375         .iface = SNDRV_CTL_ELEM_IFACE_PCM,
 376         .name = "ELD",
 377         .info = hdmi_eld_ctl_info,
 378         .get = hdmi_eld_ctl_get,
 379 };
 380
 381 static int hdmi_create_eld_ctl(struct hda_codec *codec, int pcm_idx,
 382                         int device)
 383 {
 384         struct snd_kcontrol *kctl;
 385         struct hdmi_spec *spec = codec->spec;
 386         int err;
 387
 388         kctl = snd_ctl_new1(&eld_bytes_ctl, codec);
 389         if (!kctl)
 390                 return -ENOMEM;
 391         kctl->private_value = pcm_idx;
 392         kctl->id.device = device;
 393
 394         /* no pin nid is associated with the kctl now
 395          * tbd: associate pin nid to eld ctl later
 396          */
 397         err = snd_hda_ctl_add(codec, 0, kctl);
 398         if (err < 0)
 399                 return err;
 400
 401         get_hdmi_pcm(spec, pcm_idx)->eld_ctl = kctl;
 402         return 0;
 403 }
 404
 405 #ifdef BE_PARANOID
 406 static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
 407                                 int *packet_index, int *byte_index)
 408 {
 409         int val;
 410
 411         val = snd_hda_codec_read(codec, pin_nid, 0,
 412                                  AC_VERB_GET_HDMI_DIP_INDEX, 0);
 413
 414         *packet_index = val >> 5;
 415         *byte_index = val & 0x1f;
 416 }
 417 #endif
 418
 419 static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
 420                                 int packet_index, int byte_index)
 421 {
 422         int val;
 423
 424         val = (packet_index << 5) | (byte_index & 0x1f);
 425
 426         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
 427 }
 428
 429 static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
 430                                 unsigned char val)
 431 {
 432         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
 433 }
 434
 435 static void hdmi_init_pin(struct hda_codec *codec, hda_nid_t pin_nid)
 436 {
 437         struct hdmi_spec *spec = codec->spec;
 438         int pin_out;
 439
 440         /* Unmute */
 441         if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
 442                 snd_hda_codec_write(codec, pin_nid, 0,
 443                                 AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
 444
 445         if (spec->dyn_pin_out)
 446                 /* Disable pin out until stream is active */
 447                 pin_out = 0;
 448         else
 449                 /* Enable pin out: some machines with GM965 gets broken output
 450                  * when the pin is disabled or changed while using with HDMI
 451                  */
 452                 pin_out = PIN_OUT;
 453
 454         snd_hda_codec_write(codec, pin_nid, 0,
 455                             AC_VERB_SET_PIN_WIDGET_CONTROL, pin_out);
 456 }
 457
 458 /*
 459  * ELD proc files
 460  */
 461
 462 #ifdef CONFIG_SND_PROC_FS
 463 static void print_eld_info(struct snd_info_entry *entry,
 464                            struct snd_info_buffer *buffer)
 465 {
 466         struct hdmi_spec_per_pin *per_pin = entry->private_data;
 467
 468         mutex_lock(&per_pin->lock);
 469         snd_hdmi_print_eld_info(&per_pin->sink_eld, buffer);
 470         mutex_unlock(&per_pin->lock);
 471 }
 472
 473 static void write_eld_info(struct snd_info_entry *entry,
 474                            struct snd_info_buffer *buffer)
 475 {
 476         struct hdmi_spec_per_pin *per_pin = entry->private_data;
 477
 478         mutex_lock(&per_pin->lock);
 479         snd_hdmi_write_eld_info(&per_pin->sink_eld, buffer);
 480         mutex_unlock(&per_pin->lock);
 481 }
 482
 483 static int eld_proc_new(struct hdmi_spec_per_pin *per_pin, int index)
 484 {
 485         char name[32];
 486         struct hda_codec *codec = per_pin->codec;
 487         struct snd_info_entry *entry;
 488         int err;
 489
 490         snprintf(name, sizeof(name), "eld#%d.%d", codec->addr, index);
 491         err = snd_card_proc_new(codec->card, name, &entry);
 492         if (err < 0)
 493                 return err;
 494
 495         snd_info_set_text_ops(entry, per_pin, print_eld_info);
 496         entry->c.text.write = write_eld_info;
 497         entry->mode |= 0200;
 498         per_pin->proc_entry = entry;
 499
 500         return 0;
 501 }
 502
 503 static void eld_proc_free(struct hdmi_spec_per_pin *per_pin)
 504 {
 505         if (!per_pin->codec->bus->shutdown) {
 506                 snd_info_free_entry(per_pin->proc_entry);
 507                 per_pin->proc_entry = NULL;
 508         }
 509 }
 510 #else
 511 static inline int eld_proc_new(struct hdmi_spec_per_pin *per_pin,
 512                                int index)
 513 {
 514         return 0;
 515 }
 516 static inline void eld_proc_free(struct hdmi_spec_per_pin *per_pin)
 517 {
 518 }
 519 #endif
 520
 521 /*
 522  * Audio InfoFrame routines
 523  */
 524
 525 /*
 526  * Enable Audio InfoFrame Transmission
 527  */
 528 static void hdmi_start_infoframe_trans(struct hda_codec *codec,
 529                                        hda_nid_t pin_nid)
 530 {
 531         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 532         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
 533                                                 AC_DIPXMIT_BEST);
 534 }
 535
 536 /*
 537  * Disable Audio InfoFrame Transmission
 538  */
 539 static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
 540                                       hda_nid_t pin_nid)
 541 {
 542         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 543         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
 544                                                 AC_DIPXMIT_DISABLE);
 545 }
 546
 547 static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
 548 {
 549 #ifdef CONFIG_SND_DEBUG_VERBOSE
 550         int i;
 551         int size;
 552
 553         size = snd_hdmi_get_eld_size(codec, pin_nid);
 554         codec_dbg(codec, "HDMI: ELD buf size is %d\n", size);
 555
 556         for (i = 0; i < 8; i++) {
 557                 size = snd_hda_codec_read(codec, pin_nid, 0,
 558                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
 559                 codec_dbg(codec, "HDMI: DIP GP[%d] buf size is %d\n", i, size);
 560         }
 561 #endif
 562 }
 563
 564 static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
 565 {
 566 #ifdef BE_PARANOID
 567         int i, j;
 568         int size;
 569         int pi, bi;
 570         for (i = 0; i < 8; i++) {
 571                 size = snd_hda_codec_read(codec, pin_nid, 0,
 572                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
 573                 if (size == 0)
 574                         continue;
 575
 576                 hdmi_set_dip_index(codec, pin_nid, i, 0x0);
 577                 for (j = 1; j < 1000; j++) {
 578                         hdmi_write_dip_byte(codec, pin_nid, 0x0);
 579                         hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
 580                         if (pi != i)
 581                                 codec_dbg(codec, "dip index %d: %d != %d\n",
 582                                                 bi, pi, i);
 583                         if (bi == 0) /* byte index wrapped around */
 584                                 break;
 585                 }
 586                 codec_dbg(codec,
 587                         "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
 588                         i, size, j);
 589         }
 590 #endif
 591 }
 592
 593 static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *hdmi_ai)
 594 {
 595         u8 *bytes = (u8 *)hdmi_ai;
 596         u8 sum = 0;
 597         int i;
 598
 599         hdmi_ai->checksum = 0;
 600
 601         for (i = 0; i < sizeof(*hdmi_ai); i++)
 602                 sum += bytes[i];
 603
 604         hdmi_ai->checksum = -sum;
 605 }
 606
 607 static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
 608                                       hda_nid_t pin_nid,
 609                                       u8 *dip, int size)
 610 {
 611         int i;
 612
 613         hdmi_debug_dip_size(codec, pin_nid);
 614         hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */
 615
 616         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 617         for (i = 0; i < size; i++)
 618                 hdmi_write_dip_byte(codec, pin_nid, dip[i]);
 619 }
 620
 621 static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid,
 622                                     u8 *dip, int size)
 623 {
 624         u8 val;
 625         int i;
 626
 627         if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
 628                                                             != AC_DIPXMIT_BEST)
 629                 return false;
 630
 631         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 632         for (i = 0; i < size; i++) {
 633                 val = snd_hda_codec_read(codec, pin_nid, 0,
 634                                          AC_VERB_GET_HDMI_DIP_DATA, 0);
 635                 if (val != dip[i])
 636                         return false;
 637         }
 638
 639         return true;
 640 }
 641
 642 static int hdmi_pin_get_eld(struct hda_codec *codec, hda_nid_t nid,
 643                             int dev_id, unsigned char *buf, int *eld_size)
 644 {
 645         snd_hda_set_dev_select(codec, nid, dev_id);
 646
 647         return snd_hdmi_get_eld(codec, nid, buf, eld_size);
 648 }
 649
 650 static void hdmi_pin_setup_infoframe(struct hda_codec *codec,
 651                                      hda_nid_t pin_nid, int dev_id,
 652                                      int ca, int active_channels,
 653                                      int conn_type)
 654 {
 655         union audio_infoframe ai;
 656
 657         memset(&ai, 0, sizeof(ai));
 658         if (conn_type == 0) { /* HDMI */
 659                 struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi;
 660
 661                 hdmi_ai->type           = 0x84;
 662                 hdmi_ai->ver            = 0x01;
 663                 hdmi_ai->len            = 0x0a;
 664                 hdmi_ai->CC02_CT47      = active_channels - 1;
 665                 hdmi_ai->CA             = ca;
 666                 hdmi_checksum_audio_infoframe(hdmi_ai);
 667         } else if (conn_type == 1) { /* DisplayPort */
 668                 struct dp_audio_infoframe *dp_ai = &ai.dp;
 669
 670                 dp_ai->type             = 0x84;
 671                 dp_ai->len              = 0x1b;
 672                 dp_ai->ver              = 0x11 << 2;
 673                 dp_ai->CC02_CT47        = active_channels - 1;
 674                 dp_ai->CA               = ca;
 675         } else {
 676                 codec_dbg(codec, "HDMI: unknown connection type at pin %d\n",
 677                             pin_nid);
 678                 return;
 679         }
 680
 681         snd_hda_set_dev_select(codec, pin_nid, dev_id);
 682
 683         /*
 684          * sizeof(ai) is used instead of sizeof(*hdmi_ai) or
 685          * sizeof(*dp_ai) to avoid partial match/update problems when
 686          * the user switches between HDMI/DP monitors.
 687          */
 688         if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes,
 689                                         sizeof(ai))) {
 690                 codec_dbg(codec,
 691                           "hdmi_pin_setup_infoframe: pin=%d channels=%d ca=0x%02x\n",
 692                             pin_nid,
 693                             active_channels, ca);
 694                 hdmi_stop_infoframe_trans(codec, pin_nid);
 695                 hdmi_fill_audio_infoframe(codec, pin_nid,
 696                                             ai.bytes, sizeof(ai));
 697                 hdmi_start_infoframe_trans(codec, pin_nid);
 698         }
 699 }
 700
 701 static void hdmi_setup_audio_infoframe(struct hda_codec *codec,
 702                                        struct hdmi_spec_per_pin *per_pin,
 703                                        bool non_pcm)
 704 {
 705         struct hdmi_spec *spec = codec->spec;
 706         struct hdac_chmap *chmap = &spec->chmap;
 707         hda_nid_t pin_nid = per_pin->pin_nid;
 708         int dev_id = per_pin->dev_id;
 709         int channels = per_pin->channels;
 710         int active_channels;
 711         struct hdmi_eld *eld;
 712         int ca;
 713
 714         if (!channels)
 715                 return;
 716
 717         snd_hda_set_dev_select(codec, pin_nid, dev_id);
 718
 719         /* some HW (e.g. HSW+) needs reprogramming the amp at each time */
 720         if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
 721                 snd_hda_codec_write(codec, pin_nid, 0,
 722                                             AC_VERB_SET_AMP_GAIN_MUTE,
 723                                             AMP_OUT_UNMUTE);
 724
 725         eld = &per_pin->sink_eld;
 726
 727         ca = snd_hdac_channel_allocation(&codec->core,
 728                         eld->info.spk_alloc, channels,
 729                         per_pin->chmap_set, non_pcm, per_pin->chmap);
 730
 731         active_channels = snd_hdac_get_active_channels(ca);
 732
 733         chmap->ops.set_channel_count(&codec->core, per_pin->cvt_nid,
 734                                                 active_channels);
 735
 736         /*
 737          * always configure channel mapping, it may have been changed by the
 738          * user in the meantime
 739          */
 740         snd_hdac_setup_channel_mapping(&spec->chmap,
 741                                 pin_nid, non_pcm, ca, channels,
 742                                 per_pin->chmap, per_pin->chmap_set);
 743
 744         spec->ops.pin_setup_infoframe(codec, pin_nid, dev_id,
 745                                       ca, active_channels, eld->info.conn_type);
 746
 747         per_pin->non_pcm = non_pcm;
 748 }
 749
 750 /*
 751  * Unsolicited events
 752  */
 753
 754 static bool hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll);
 755
 756 static void check_presence_and_report(struct hda_codec *codec, hda_nid_t nid,
 757                                       int dev_id)
 758 {
 759         struct hdmi_spec *spec = codec->spec;
 760         int pin_idx = pin_id_to_pin_index(codec, nid, dev_id);
 761
 762         if (pin_idx < 0)
 763                 return;
 764         mutex_lock(&spec->pcm_lock);
 765         if (hdmi_present_sense(get_pin(spec, pin_idx), 1))
 766                 snd_hda_jack_report_sync(codec);
 767         mutex_unlock(&spec->pcm_lock);
 768 }
 769
 770 static void jack_callback(struct hda_codec *codec,
 771                           struct hda_jack_callback *jack)
 772 {
 773         /* stop polling when notification is enabled */
 774         if (codec_has_acomp(codec))
 775                 return;
 776
 777         check_presence_and_report(codec, jack->nid, jack->dev_id);
 778 }
 779
 780 static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res)
 781 {
 782         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
 783         struct hda_jack_tbl *jack;
 784
 785         if (codec->dp_mst) {
 786                 int dev_entry =
 787                         (res & AC_UNSOL_RES_DE) >> AC_UNSOL_RES_DE_SHIFT;
 788
 789                 jack = snd_hda_jack_tbl_get_from_tag(codec, tag, dev_entry);
 790         } else {
 791                 jack = snd_hda_jack_tbl_get_from_tag(codec, tag, 0);
 792         }
 793         if (!jack)
 794                 return;
 795         jack->jack_dirty = 1;
 796
 797         codec_dbg(codec,
 798                 "HDMI hot plug event: Codec=%d Pin=%d Device=%d Inactive=%d Presence_Detect=%d ELD_Valid=%d\n",
 799                 codec->addr, jack->nid, jack->dev_id, !!(res & AC_UNSOL_RES_IA),
 800                 !!(res & AC_UNSOL_RES_PD), !!(res & AC_UNSOL_RES_ELDV));
 801
 802         check_presence_and_report(codec, jack->nid, jack->dev_id);
 803 }
 804
 805 static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
 806 {
 807         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
 808         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
 809         int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
 810         int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
 811
 812         codec_info(codec,
 813                 "HDMI CP event: CODEC=%d TAG=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
 814                 codec->addr,
 815                 tag,
 816                 subtag,
 817                 cp_state,
 818                 cp_ready);
 819
 820         /* TODO */
 821         if (cp_state)
 822                 ;
 823         if (cp_ready)
 824                 ;
 825 }
 826
 827
 828 static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
 829 {
 830         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
 831         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
 832         struct hda_jack_tbl *jack;
 833
 834         if (codec_has_acomp(codec))
 835                 return;
 836
 837         if (codec->dp_mst) {
 838                 int dev_entry =
 839                         (res & AC_UNSOL_RES_DE) >> AC_UNSOL_RES_DE_SHIFT;
 840
 841                 jack = snd_hda_jack_tbl_get_from_tag(codec, tag, dev_entry);
 842         } else {
 843                 jack = snd_hda_jack_tbl_get_from_tag(codec, tag, 0);
 844         }
 845
 846         if (!jack) {
 847                 codec_dbg(codec, "Unexpected HDMI event tag 0x%x\n", tag);
 848                 return;
 849         }
 850
 851         if (subtag == 0)
 852                 hdmi_intrinsic_event(codec, res);
 853         else
 854                 hdmi_non_intrinsic_event(codec, res);
 855 }
 856
 857 static void haswell_verify_D0(struct hda_codec *codec,
 858                 hda_nid_t cvt_nid, hda_nid_t nid)
 859 {
 860         int pwr;
 861
 862         /* For Haswell, the converter 1/2 may keep in D3 state after bootup,
 863          * thus pins could only choose converter 0 for use. Make sure the
 864          * converters are in correct power state */
 865         if (!snd_hda_check_power_state(codec, cvt_nid, AC_PWRST_D0))
 866                 snd_hda_codec_write(codec, cvt_nid, 0, AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
 867
 868         if (!snd_hda_check_power_state(codec, nid, AC_PWRST_D0)) {
 869                 snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_POWER_STATE,
 870                                     AC_PWRST_D0);
 871                 msleep(40);
 872                 pwr = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_POWER_STATE, 0);
 873                 pwr = (pwr & AC_PWRST_ACTUAL) >> AC_PWRST_ACTUAL_SHIFT;
 874                 codec_dbg(codec, "Haswell HDMI audio: Power for pin 0x%x is now D%d\n", nid, pwr);
 875         }
 876 }
 877
 878 /*
 879  * Callbacks
 880  */
 881
 882 /* HBR should be Non-PCM, 8 channels */
 883 #define is_hbr_format(format) \
 884         ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
 885
 886 static int hdmi_pin_hbr_setup(struct hda_codec *codec, hda_nid_t pin_nid,
 887                               int dev_id, bool hbr)
 888 {
 889         int pinctl, new_pinctl;
 890
 891         if (snd_hda_query_pin_caps(codec, pin_nid) & AC_PINCAP_HBR) {
 892                 snd_hda_set_dev_select(codec, pin_nid, dev_id);
 893                 pinctl = snd_hda_codec_read(codec, pin_nid, 0,
 894                                             AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
 895
 896                 if (pinctl < 0)
 897                         return hbr ? -EINVAL : 0;
 898
 899                 new_pinctl = pinctl & ~AC_PINCTL_EPT;
 900                 if (hbr)
 901                         new_pinctl |= AC_PINCTL_EPT_HBR;
 902                 else
 903                         new_pinctl |= AC_PINCTL_EPT_NATIVE;
 904
 905                 codec_dbg(codec,
 906                           "hdmi_pin_hbr_setup: NID=0x%x, %spinctl=0x%x\n",
 907                             pin_nid,
 908                             pinctl == new_pinctl ? "" : "new-",
 909                             new_pinctl);
 910
 911                 if (pinctl != new_pinctl)
 912                         snd_hda_codec_write(codec, pin_nid, 0,
 913                                             AC_VERB_SET_PIN_WIDGET_CONTROL,
 914                                             new_pinctl);
 915         } else if (hbr)
 916                 return -EINVAL;
 917
 918         return 0;
 919 }
 920
 921 static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
 922                               hda_nid_t pin_nid, int dev_id,
 923                               u32 stream_tag, int format)
 924 {
 925         struct hdmi_spec *spec = codec->spec;
 926         unsigned int param;
 927         int err;
 928
 929         err = spec->ops.pin_hbr_setup(codec, pin_nid, dev_id,
 930                                       is_hbr_format(format));
 931
 932         if (err) {
 933                 codec_dbg(codec, "hdmi_setup_stream: HBR is not supported\n");
 934                 return err;
 935         }
 936
 937         if (spec->intel_hsw_fixup) {
 938
 939                 /*
 940                  * on recent platforms IEC Coding Type is required for HBR
 941                  * support, read current Digital Converter settings and set
 942                  * ICT bitfield if needed.
 943                  */
 944                 param = snd_hda_codec_read(codec, cvt_nid, 0,
 945                                            AC_VERB_GET_DIGI_CONVERT_1, 0);
 946
 947                 param = (param >> 16) & ~(AC_DIG3_ICT);
 948
 949                 /* on recent platforms ICT mode is required for HBR support */
 950                 if (is_hbr_format(format))
 951                         param |= 0x1;
 952
 953                 snd_hda_codec_write(codec, cvt_nid, 0,
 954                                     AC_VERB_SET_DIGI_CONVERT_3, param);
 955         }
 956
 957         snd_hda_codec_setup_stream(codec, cvt_nid, stream_tag, 0, format);
 958         return 0;
 959 }
 960
 961 /* Try to find an available converter
 962  * If pin_idx is less then zero, just try to find an available converter.
 963  * Otherwise, try to find an available converter and get the cvt mux index
 964  * of the pin.
 965  */
 966 static int hdmi_choose_cvt(struct hda_codec *codec,
 967                            int pin_idx, int *cvt_id)
 968 {
 969         struct hdmi_spec *spec = codec->spec;
 970         struct hdmi_spec_per_pin *per_pin;
 971         struct hdmi_spec_per_cvt *per_cvt = NULL;
 972         int cvt_idx, mux_idx = 0;
 973
 974         /* pin_idx < 0 means no pin will be bound to the converter */
 975         if (pin_idx < 0)
 976                 per_pin = NULL;
 977         else
 978                 per_pin = get_pin(spec, pin_idx);
 979
 980         /* Dynamically assign converter to stream */
 981         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
 982                 per_cvt = get_cvt(spec, cvt_idx);
 983
 984                 /* Must not already be assigned */
 985                 if (per_cvt->assigned)
 986                         continue;
 987                 if (per_pin == NULL)
 988                         break;
 989                 /* Must be in pin's mux's list of converters */
 990                 for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
 991                         if (per_pin->mux_nids[mux_idx] == per_cvt->cvt_nid)
 992                                 break;
 993                 /* Not in mux list */
 994                 if (mux_idx == per_pin->num_mux_nids)
 995                         continue;
 996                 break;
 997         }
 998
 999         /* No free converters */
1000         if (cvt_idx == spec->num_cvts)
1001                 return -EBUSY;
1002
1003         if (per_pin != NULL)
1004                 per_pin->mux_idx = mux_idx;
1005
1006         if (cvt_id)
1007                 *cvt_id = cvt_idx;
1008
1009         return 0;
1010 }
1011
1012 /* Assure the pin select the right convetor */
1013 static void intel_verify_pin_cvt_connect(struct hda_codec *codec,
1014                         struct hdmi_spec_per_pin *per_pin)
1015 {
1016         hda_nid_t pin_nid = per_pin->pin_nid;
1017         int mux_idx, curr;
1018
1019         mux_idx = per_pin->mux_idx;
1020         curr = snd_hda_codec_read(codec, pin_nid, 0,
1021                                           AC_VERB_GET_CONNECT_SEL, 0);
1022         if (curr != mux_idx)
1023                 snd_hda_codec_write_cache(codec, pin_nid, 0,
1024                                             AC_VERB_SET_CONNECT_SEL,
1025                                             mux_idx);
1026 }
1027
1028 /* get the mux index for the converter of the pins
1029  * converter's mux index is the same for all pins on Intel platform
1030  */
1031 static int intel_cvt_id_to_mux_idx(struct hdmi_spec *spec,
1032                         hda_nid_t cvt_nid)
1033 {
1034         int i;
1035
1036         for (i = 0; i < spec->num_cvts; i++)
1037                 if (spec->cvt_nids[i] == cvt_nid)
1038                         return i;
1039         return -EINVAL;
1040 }
1041
1042 /* Intel HDMI workaround to fix audio routing issue:
1043  * For some Intel display codecs, pins share the same connection list.
1044  * So a conveter can be selected by multiple pins and playback on any of these
1045  * pins will generate sound on the external display, because audio flows from
1046  * the same converter to the display pipeline. Also muting one pin may make
1047  * other pins have no sound output.
1048  * So this function assures that an assigned converter for a pin is not selected
1049  * by any other pins.
1050  */
1051 static void intel_not_share_assigned_cvt(struct hda_codec *codec,
1052                                          hda_nid_t pin_nid,
1053                                          int dev_id, int mux_idx)
1054 {
1055         struct hdmi_spec *spec = codec->spec;
1056         hda_nid_t nid;
1057         int cvt_idx, curr;
1058         struct hdmi_spec_per_cvt *per_cvt;
1059         struct hdmi_spec_per_pin *per_pin;
1060         int pin_idx;
1061
1062         /* configure the pins connections */
1063         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1064                 int dev_id_saved;
1065                 int dev_num;
1066
1067                 per_pin = get_pin(spec, pin_idx);
1068                 /*
1069                  * pin not connected to monitor
1070                  * no need to operate on it
1071                  */
1072                 if (!per_pin->pcm)
1073                         continue;
1074
1075                 if ((per_pin->pin_nid == pin_nid) &&
1076                         (per_pin->dev_id == dev_id))
1077                         continue;
1078
1079                 /*
1080                  * if per_pin->dev_id >= dev_num,
1081                  * snd_hda_get_dev_select() will fail,
1082                  * and the following operation is unpredictable.
1083                  * So skip this situation.
1084                  */
1085                 dev_num = snd_hda_get_num_devices(codec, per_pin->pin_nid) + 1;
1086                 if (per_pin->dev_id >= dev_num)
1087                         continue;
1088
1089                 nid = per_pin->pin_nid;
1090
1091                 /*
1092                  * Calling this function should not impact
1093                  * on the device entry selection
1094                  * So let's save the dev id for each pin,
1095                  * and restore it when return
1096                  */
1097                 dev_id_saved = snd_hda_get_dev_select(codec, nid);
1098                 snd_hda_set_dev_select(codec, nid, per_pin->dev_id);
1099                 curr = snd_hda_codec_read(codec, nid, 0,
1100                                           AC_VERB_GET_CONNECT_SEL, 0);
1101                 if (curr != mux_idx) {
1102                         snd_hda_set_dev_select(codec, nid, dev_id_saved);
1103                         continue;
1104                 }
1105
1106
1107                 /* choose an unassigned converter. The conveters in the
1108                  * connection list are in the same order as in the codec.
1109                  */
1110                 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
1111                         per_cvt = get_cvt(spec, cvt_idx);
1112                         if (!per_cvt->assigned) {
1113                                 codec_dbg(codec,
1114                                           "choose cvt %d for pin nid %d\n",
1115                                         cvt_idx, nid);
1116                                 snd_hda_codec_write_cache(codec, nid, 0,
1117                                             AC_VERB_SET_CONNECT_SEL,
1118                                             cvt_idx);
1119                                 break;
1120                         }
1121                 }
1122                 snd_hda_set_dev_select(codec, nid, dev_id_saved);
1123         }
1124 }
1125
1126 /* A wrapper of intel_not_share_asigned_cvt() */
1127 static void intel_not_share_assigned_cvt_nid(struct hda_codec *codec,
1128                         hda_nid_t pin_nid, int dev_id, hda_nid_t cvt_nid)
1129 {
1130         int mux_idx;
1131         struct hdmi_spec *spec = codec->spec;
1132
1133         /* On Intel platform, the mapping of converter nid to
1134          * mux index of the pins are always the same.
1135          * The pin nid may be 0, this means all pins will not
1136          * share the converter.
1137          */
1138         mux_idx = intel_cvt_id_to_mux_idx(spec, cvt_nid);
1139         if (mux_idx >= 0)
1140                 intel_not_share_assigned_cvt(codec, pin_nid, dev_id, mux_idx);
1141 }
1142
1143 /* skeleton caller of pin_cvt_fixup ops */
1144 static void pin_cvt_fixup(struct hda_codec *codec,
1145                           struct hdmi_spec_per_pin *per_pin,
1146                           hda_nid_t cvt_nid)
1147 {
1148         struct hdmi_spec *spec = codec->spec;
1149
1150         if (spec->ops.pin_cvt_fixup)
1151                 spec->ops.pin_cvt_fixup(codec, per_pin, cvt_nid);
1152 }
1153
1154 /* called in hdmi_pcm_open when no pin is assigned to the PCM
1155  * in dyn_pcm_assign mode.
1156  */
1157 static int hdmi_pcm_open_no_pin(struct hda_pcm_stream *hinfo,
1158                          struct hda_codec *codec,
1159                          struct snd_pcm_substream *substream)
1160 {
1161         struct hdmi_spec *spec = codec->spec;
1162         struct snd_pcm_runtime *runtime = substream->runtime;
1163         int cvt_idx, pcm_idx;
1164         struct hdmi_spec_per_cvt *per_cvt = NULL;
1165         int err;
1166
1167         pcm_idx = hinfo_to_pcm_index(codec, hinfo);
1168         if (pcm_idx < 0)
1169                 return -EINVAL;
1170
1171         err = hdmi_choose_cvt(codec, -1, &cvt_idx);
1172         if (err)
1173                 return err;
1174
1175         per_cvt = get_cvt(spec, cvt_idx);
1176         per_cvt->assigned = 1;
1177         hinfo->nid = per_cvt->cvt_nid;
1178
1179         pin_cvt_fixup(codec, NULL, per_cvt->cvt_nid);
1180
1181         set_bit(pcm_idx, &spec->pcm_in_use);
1182         /* todo: setup spdif ctls assign */
1183
1184         /* Initially set the converter's capabilities */
1185         hinfo->channels_min = per_cvt->channels_min;
1186         hinfo->channels_max = per_cvt->channels_max;
1187         hinfo->rates = per_cvt->rates;
1188         hinfo->formats = per_cvt->formats;
1189         hinfo->maxbps = per_cvt->maxbps;
1190
1191         /* Store the updated parameters */
1192         runtime->hw.channels_min = hinfo->channels_min;
1193         runtime->hw.channels_max = hinfo->channels_max;
1194         runtime->hw.formats = hinfo->formats;
1195         runtime->hw.rates = hinfo->rates;
1196
1197         snd_pcm_hw_constraint_step(substream->runtime, 0,
1198                                    SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1199         return 0;
1200 }
1201
1202 /*
1203  * HDA PCM callbacks
1204  */
1205 static int hdmi_pcm_open(struct hda_pcm_stream *hinfo,
1206                          struct hda_codec *codec,
1207                          struct snd_pcm_substream *substream)
1208 {
1209         struct hdmi_spec *spec = codec->spec;
1210         struct snd_pcm_runtime *runtime = substream->runtime;
1211         int pin_idx, cvt_idx, pcm_idx;
1212         struct hdmi_spec_per_pin *per_pin;
1213         struct hdmi_eld *eld;
1214         struct hdmi_spec_per_cvt *per_cvt = NULL;
1215         int err;
1216
1217         /* Validate hinfo */
1218         pcm_idx = hinfo_to_pcm_index(codec, hinfo);
1219         if (pcm_idx < 0)
1220                 return -EINVAL;
1221
1222         mutex_lock(&spec->pcm_lock);
1223         pin_idx = hinfo_to_pin_index(codec, hinfo);
1224         if (!spec->dyn_pcm_assign) {
1225                 if (snd_BUG_ON(pin_idx < 0)) {
1226                         err = -EINVAL;
1227                         goto unlock;
1228                 }
1229         } else {
1230                 /* no pin is assigned to the PCM
1231                  * PA need pcm open successfully when probe
1232                  */
1233                 if (pin_idx < 0) {
1234                         err = hdmi_pcm_open_no_pin(hinfo, codec, substream);
1235                         goto unlock;
1236                 }
1237         }
1238
1239         err = hdmi_choose_cvt(codec, pin_idx, &cvt_idx);
1240         if (err < 0)
1241                 goto unlock;
1242
1243         per_cvt = get_cvt(spec, cvt_idx);
1244         /* Claim converter */
1245         per_cvt->assigned = 1;
1246
1247         set_bit(pcm_idx, &spec->pcm_in_use);
1248         per_pin = get_pin(spec, pin_idx);
1249         per_pin->cvt_nid = per_cvt->cvt_nid;
1250         hinfo->nid = per_cvt->cvt_nid;
1251
1252         snd_hda_set_dev_select(codec, per_pin->pin_nid, per_pin->dev_id);
1253         snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
1254                             AC_VERB_SET_CONNECT_SEL,
1255                             per_pin->mux_idx);
1256
1257         /* configure unused pins to choose other converters */
1258         pin_cvt_fixup(codec, per_pin, 0);
1259
1260         snd_hda_spdif_ctls_assign(codec, pcm_idx, per_cvt->cvt_nid);
1261
1262         /* Initially set the converter's capabilities */
1263         hinfo->channels_min = per_cvt->channels_min;
1264         hinfo->channels_max = per_cvt->channels_max;
1265         hinfo->rates = per_cvt->rates;
1266         hinfo->formats = per_cvt->formats;
1267         hinfo->maxbps = per_cvt->maxbps;
1268
1269         eld = &per_pin->sink_eld;
1270         /* Restrict capabilities by ELD if this isn't disabled */
1271         if (!static_hdmi_pcm && eld->eld_valid) {
1272                 snd_hdmi_eld_update_pcm_info(&eld->info, hinfo);
1273                 if (hinfo->channels_min > hinfo->channels_max ||
1274                     !hinfo->rates || !hinfo->formats) {
1275                         per_cvt->assigned = 0;
1276                         hinfo->nid = 0;
1277                         snd_hda_spdif_ctls_unassign(codec, pcm_idx);
1278                         err = -ENODEV;
1279                         goto unlock;
1280                 }
1281         }
1282
1283         /* Store the updated parameters */
1284         runtime->hw.channels_min = hinfo->channels_min;
1285         runtime->hw.channels_max = hinfo->channels_max;
1286         runtime->hw.formats = hinfo->formats;
1287         runtime->hw.rates = hinfo->rates;
1288
1289         snd_pcm_hw_constraint_step(substream->runtime, 0,
1290                                    SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1291  unlock:
1292         mutex_unlock(&spec->pcm_lock);
1293         return err;
1294 }
1295
1296 /*
1297  * HDA/HDMI auto parsing
1298  */
1299 static int hdmi_read_pin_conn(struct hda_codec *codec, int pin_idx)
1300 {
1301         struct hdmi_spec *spec = codec->spec;
1302         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1303         hda_nid_t pin_nid = per_pin->pin_nid;
1304         int dev_id = per_pin->dev_id;
1305
1306         if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
1307                 codec_warn(codec,
1308                            "HDMI: pin %d wcaps %#x does not support connection list\n",
1309                            pin_nid, get_wcaps(codec, pin_nid));
1310                 return -EINVAL;
1311         }
1312
1313         snd_hda_set_dev_select(codec, pin_nid, dev_id);
1314
1315         /* all the device entries on the same pin have the same conn list */
1316         per_pin->num_mux_nids =
1317                 snd_hda_get_raw_connections(codec, pin_nid, per_pin->mux_nids,
1318                                             HDA_MAX_CONNECTIONS);
1319
1320         return 0;
1321 }
1322
1323 static int hdmi_find_pcm_slot(struct hdmi_spec *spec,
1324                                 struct hdmi_spec_per_pin *per_pin)
1325 {
1326         int i;
1327
1328         /* try the prefer PCM */
1329         if (!test_bit(per_pin->pin_nid_idx, &spec->pcm_bitmap))
1330                 return per_pin->pin_nid_idx;
1331
1332         /* have a second try; check the "reserved area" over num_pins */
1333         for (i = spec->num_nids; i < spec->pcm_used; i++) {
1334                 if (!test_bit(i, &spec->pcm_bitmap))
1335                         return i;
1336         }
1337
1338         /* the last try; check the empty slots in pins */
1339         for (i = 0; i < spec->num_nids; i++) {
1340                 if (!test_bit(i, &spec->pcm_bitmap))
1341                         return i;
1342         }
1343         return -EBUSY;
1344 }
1345
1346 static void hdmi_attach_hda_pcm(struct hdmi_spec *spec,
1347                                 struct hdmi_spec_per_pin *per_pin)
1348 {
1349         int idx;
1350
1351         /* pcm already be attached to the pin */
1352         if (per_pin->pcm)
1353                 return;
1354         idx = hdmi_find_pcm_slot(spec, per_pin);
1355         if (idx == -EBUSY)
1356                 return;
1357         per_pin->pcm_idx = idx;
1358         per_pin->pcm = get_hdmi_pcm(spec, idx);
1359         set_bit(idx, &spec->pcm_bitmap);
1360 }
1361
1362 static void hdmi_detach_hda_pcm(struct hdmi_spec *spec,
1363                                 struct hdmi_spec_per_pin *per_pin)
1364 {
1365         int idx;
1366
1367         /* pcm already be detached from the pin */
1368         if (!per_pin->pcm)
1369                 return;
1370         idx = per_pin->pcm_idx;
1371         per_pin->pcm_idx = -1;
1372         per_pin->pcm = NULL;
1373         if (idx >= 0 && idx < spec->pcm_used)
1374                 clear_bit(idx, &spec->pcm_bitmap);
1375 }
1376
1377 static int hdmi_get_pin_cvt_mux(struct hdmi_spec *spec,
1378                 struct hdmi_spec_per_pin *per_pin, hda_nid_t cvt_nid)
1379 {
1380         int mux_idx;
1381
1382         for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
1383                 if (per_pin->mux_nids[mux_idx] == cvt_nid)
1384                         break;
1385         return mux_idx;
1386 }
1387
1388 static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid);
1389
1390 static void hdmi_pcm_setup_pin(struct hdmi_spec *spec,
1391                            struct hdmi_spec_per_pin *per_pin)
1392 {
1393         struct hda_codec *codec = per_pin->codec;
1394         struct hda_pcm *pcm;
1395         struct hda_pcm_stream *hinfo;
1396         struct snd_pcm_substream *substream;
1397         int mux_idx;
1398         bool non_pcm;
1399
1400         if (per_pin->pcm_idx >= 0 && per_pin->pcm_idx < spec->pcm_used)
1401                 pcm = get_pcm_rec(spec, per_pin->pcm_idx);
1402         else
1403                 return;
1404         if (!pcm->pcm)
1405                 return;
1406         if (!test_bit(per_pin->pcm_idx, &spec->pcm_in_use))
1407                 return;
1408
1409         /* hdmi audio only uses playback and one substream */
1410         hinfo = pcm->stream;
1411         substream = pcm->pcm->streams[0].substream;
1412
1413         per_pin->cvt_nid = hinfo->nid;
1414
1415         mux_idx = hdmi_get_pin_cvt_mux(spec, per_pin, hinfo->nid);
1416         if (mux_idx < per_pin->num_mux_nids) {
1417                 snd_hda_set_dev_select(codec, per_pin->pin_nid,
1418                                    per_pin->dev_id);
1419                 snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
1420                                 AC_VERB_SET_CONNECT_SEL,
1421                                 mux_idx);
1422         }
1423         snd_hda_spdif_ctls_assign(codec, per_pin->pcm_idx, hinfo->nid);
1424
1425         non_pcm = check_non_pcm_per_cvt(codec, hinfo->nid);
1426         if (substream->runtime)
1427                 per_pin->channels = substream->runtime->channels;
1428         per_pin->setup = true;
1429         per_pin->mux_idx = mux_idx;
1430
1431         hdmi_setup_audio_infoframe(codec, per_pin, non_pcm);
1432 }
1433
1434 static void hdmi_pcm_reset_pin(struct hdmi_spec *spec,
1435                            struct hdmi_spec_per_pin *per_pin)
1436 {
1437         if (per_pin->pcm_idx >= 0 && per_pin->pcm_idx < spec->pcm_used)
1438                 snd_hda_spdif_ctls_unassign(per_pin->codec, per_pin->pcm_idx);
1439
1440         per_pin->chmap_set = false;
1441         memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
1442
1443         per_pin->setup = false;
1444         per_pin->channels = 0;
1445 }
1446
1447 /* update per_pin ELD from the given new ELD;
1448  * setup info frame and notification accordingly
1449  */
1450 static bool update_eld(struct hda_codec *codec,
1451                        struct hdmi_spec_per_pin *per_pin,
1452                        struct hdmi_eld *eld)
1453 {
1454         struct hdmi_eld *pin_eld = &per_pin->sink_eld;
1455         struct hdmi_spec *spec = codec->spec;
1456         bool old_eld_valid = pin_eld->eld_valid;
1457         bool eld_changed;
1458         int pcm_idx;
1459
1460         /* for monitor disconnection, save pcm_idx firstly */
1461         pcm_idx = per_pin->pcm_idx;
1462         if (spec->dyn_pcm_assign) {
1463                 if (eld->eld_valid) {
1464                         hdmi_attach_hda_pcm(spec, per_pin);
1465                         hdmi_pcm_setup_pin(spec, per_pin);
1466                 } else {
1467                         hdmi_pcm_reset_pin(spec, per_pin);
1468                         hdmi_detach_hda_pcm(spec, per_pin);
1469                 }
1470         }
1471         /* if pcm_idx == -1, it means this is in monitor connection event
1472          * we can get the correct pcm_idx now.
1473          */
1474         if (pcm_idx == -1)
1475                 pcm_idx = per_pin->pcm_idx;
1476
1477         if (eld->eld_valid)
1478                 snd_hdmi_show_eld(codec, &eld->info);
1479
1480         eld_changed = (pin_eld->eld_valid != eld->eld_valid);
1481         eld_changed |= (pin_eld->monitor_present != eld->monitor_present);
1482         if (!eld_changed && eld->eld_valid && pin_eld->eld_valid)
1483                 if (pin_eld->eld_size != eld->eld_size ||
1484                     memcmp(pin_eld->eld_buffer, eld->eld_buffer,
1485                            eld->eld_size) != 0)
1486                         eld_changed = true;
1487
1488         if (eld_changed) {
1489                 pin_eld->monitor_present = eld->monitor_present;
1490                 pin_eld->eld_valid = eld->eld_valid;
1491                 pin_eld->eld_size = eld->eld_size;
1492                 if (eld->eld_valid)
1493                         memcpy(pin_eld->eld_buffer, eld->eld_buffer,
1494                                eld->eld_size);
1495                 pin_eld->info = eld->info;
1496         }
1497
1498         /*
1499          * Re-setup pin and infoframe. This is needed e.g. when
1500          * - sink is first plugged-in
1501          * - transcoder can change during stream playback on Haswell
1502          *   and this can make HW reset converter selection on a pin.
1503          */
1504         if (eld->eld_valid && !old_eld_valid && per_pin->setup) {
1505                 pin_cvt_fixup(codec, per_pin, 0);
1506                 hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm);
1507         }
1508
1509         if (eld_changed && pcm_idx >= 0)
1510                 snd_ctl_notify(codec->card,
1511                                SNDRV_CTL_EVENT_MASK_VALUE |
1512                                SNDRV_CTL_EVENT_MASK_INFO,
1513                                &get_hdmi_pcm(spec, pcm_idx)->eld_ctl->id);
1514         return eld_changed;
1515 }
1516
1517 /* update ELD and jack state via HD-audio verbs */
1518 static bool hdmi_present_sense_via_verbs(struct hdmi_spec_per_pin *per_pin,
1519                                          int repoll)
1520 {
1521         struct hda_jack_tbl *jack;
1522         struct hda_codec *codec = per_pin->codec;
1523         struct hdmi_spec *spec = codec->spec;
1524         struct hdmi_eld *eld = &spec->temp_eld;
1525         hda_nid_t pin_nid = per_pin->pin_nid;
1526         int dev_id = per_pin->dev_id;
1527         /*
1528          * Always execute a GetPinSense verb here, even when called from
1529          * hdmi_intrinsic_event; for some NVIDIA HW, the unsolicited
1530          * response's PD bit is not the real PD value, but indicates that
1531          * the real PD value changed. An older version of the HD-audio
1532          * specification worked this way. Hence, we just ignore the data in
1533          * the unsolicited response to avoid custom WARs.
1534          */
1535         int present;
1536         bool ret;
1537         bool do_repoll = false;
1538
1539         present = snd_hda_jack_pin_sense(codec, pin_nid, dev_id);
1540
1541         mutex_lock(&per_pin->lock);
1542         eld->monitor_present = !!(present & AC_PINSENSE_PRESENCE);
1543         if (eld->monitor_present)
1544                 eld->eld_valid  = !!(present & AC_PINSENSE_ELDV);
1545         else
1546                 eld->eld_valid = false;
1547
1548         codec_dbg(codec,
1549                 "HDMI status: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
1550                 codec->addr, pin_nid, eld->monitor_present, eld->eld_valid);
1551
1552         if (eld->eld_valid) {
1553                 if (spec->ops.pin_get_eld(codec, pin_nid, dev_id,
1554                                           eld->eld_buffer, &eld->eld_size) < 0)
1555                         eld->eld_valid = false;
1556                 else {
1557                         if (snd_hdmi_parse_eld(codec, &eld->info, eld->eld_buffer,
1558                                                     eld->eld_size) < 0)
1559                                 eld->eld_valid = false;
1560                 }
1561                 if (!eld->eld_valid && repoll)
1562                         do_repoll = true;
1563         }
1564
1565         if (do_repoll)
1566                 schedule_delayed_work(&per_pin->work, msecs_to_jiffies(300));
1567         else
1568                 update_eld(codec, per_pin, eld);
1569
1570         ret = !repoll || !eld->monitor_present || eld->eld_valid;
1571
1572         jack = snd_hda_jack_tbl_get_mst(codec, pin_nid, per_pin->dev_id);
1573         if (jack) {
1574                 jack->block_report = !ret;
1575                 jack->pin_sense = (eld->monitor_present && eld->eld_valid) ?
1576                         AC_PINSENSE_PRESENCE : 0;
1577         }
1578         mutex_unlock(&per_pin->lock);
1579         return ret;
1580 }
1581
1582 static struct snd_jack *pin_idx_to_jack(struct hda_codec *codec,
1583                                  struct hdmi_spec_per_pin *per_pin)
1584 {
1585         struct hdmi_spec *spec = codec->spec;
1586         struct snd_jack *jack = NULL;
1587         struct hda_jack_tbl *jack_tbl;
1588
1589         /* if !dyn_pcm_assign, get jack from hda_jack_tbl
1590          * in !dyn_pcm_assign case, spec->pcm_rec[].jack is not
1591          * NULL even after snd_hda_jack_tbl_clear() is called to
1592          * free snd_jack. This may cause access invalid memory
1593          * when calling snd_jack_report
1594          */
1595         if (per_pin->pcm_idx >= 0 && spec->dyn_pcm_assign)
1596                 jack = spec->pcm_rec[per_pin->pcm_idx].jack;
1597         else if (!spec->dyn_pcm_assign) {
1598                 /*
1599                  * jack tbl doesn't support DP MST
1600                  * DP MST will use dyn_pcm_assign,
1601                  * so DP MST will never come here
1602                  */
1603                 jack_tbl = snd_hda_jack_tbl_get_mst(codec, per_pin->pin_nid,
1604                                                     per_pin->dev_id);
1605                 if (jack_tbl)
1606                         jack = jack_tbl->jack;
1607         }
1608         return jack;
1609 }
1610
1611 /* update ELD and jack state via audio component */
1612 static void sync_eld_via_acomp(struct hda_codec *codec,
1613                                struct hdmi_spec_per_pin *per_pin)
1614 {
1615         struct hdmi_spec *spec = codec->spec;
1616         struct hdmi_eld *eld = &spec->temp_eld;
1617         struct snd_jack *jack = NULL;
1618         bool changed;
1619         int size;
1620
1621         mutex_lock(&per_pin->lock);
1622         eld->monitor_present = false;
1623         size = snd_hdac_acomp_get_eld(&codec->core, per_pin->pin_nid,
1624                                       per_pin->dev_id, &eld->monitor_present,
1625                                       eld->eld_buffer, ELD_MAX_SIZE);
1626         if (size > 0) {
1627                 size = min(size, ELD_MAX_SIZE);
1628                 if (snd_hdmi_parse_eld(codec, &eld->info,
1629                                        eld->eld_buffer, size) < 0)
1630                         size = -EINVAL;
1631         }
1632
1633         if (size > 0) {
1634                 eld->eld_valid = true;
1635                 eld->eld_size = size;
1636         } else {
1637                 eld->eld_valid = false;
1638                 eld->eld_size = 0;
1639         }
1640
1641         /* pcm_idx >=0 before update_eld() means it is in monitor
1642          * disconnected event. Jack must be fetched before update_eld()
1643          */
1644         jack = pin_idx_to_jack(codec, per_pin);
1645         changed = update_eld(codec, per_pin, eld);
1646         if (jack == NULL)
1647                 jack = pin_idx_to_jack(codec, per_pin);
1648         if (changed && jack)
1649                 snd_jack_report(jack,
1650                                 (eld->monitor_present && eld->eld_valid) ?
1651                                 SND_JACK_AVOUT : 0);
1652         mutex_unlock(&per_pin->lock);
1653 }
1654
1655 static bool hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll)
1656 {
1657         struct hda_codec *codec = per_pin->codec;
1658         int ret;
1659
1660         /* no temporary power up/down needed for component notifier */
1661         if (!codec_has_acomp(codec)) {
1662                 ret = snd_hda_power_up_pm(codec);
1663                 if (ret < 0 && pm_runtime_suspended(hda_codec_dev(codec))) {
1664                         snd_hda_power_down_pm(codec);
1665                         return false;
1666                 }
1667                 ret = hdmi_present_sense_via_verbs(per_pin, repoll);
1668                 snd_hda_power_down_pm(codec);
1669         } else {
1670                 sync_eld_via_acomp(codec, per_pin);
1671                 ret = false; /* don't call snd_hda_jack_report_sync() */
1672         }
1673
1674         return ret;
1675 }
1676
1677 static void hdmi_repoll_eld(struct work_struct *work)
1678 {
1679         struct hdmi_spec_per_pin *per_pin =
1680         container_of(to_delayed_work(work), struct hdmi_spec_per_pin, work);
1681         struct hda_codec *codec = per_pin->codec;
1682         struct hdmi_spec *spec = codec->spec;
1683         struct hda_jack_tbl *jack;
1684
1685         jack = snd_hda_jack_tbl_get_mst(codec, per_pin->pin_nid,
1686                                         per_pin->dev_id);
1687         if (jack)
1688                 jack->jack_dirty = 1;
1689
1690         if (per_pin->repoll_count++ > 6)
1691                 per_pin->repoll_count = 0;
1692
1693         mutex_lock(&spec->pcm_lock);
1694         if (hdmi_present_sense(per_pin, per_pin->repoll_count))
1695                 snd_hda_jack_report_sync(per_pin->codec);
1696         mutex_unlock(&spec->pcm_lock);
1697 }
1698
1699 static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
1700                                              hda_nid_t nid);
1701
1702 static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
1703 {
1704         struct hdmi_spec *spec = codec->spec;
1705         unsigned int caps, config;
1706         int pin_idx;
1707         struct hdmi_spec_per_pin *per_pin;
1708         int err;
1709         int dev_num, i;
1710
1711         caps = snd_hda_query_pin_caps(codec, pin_nid);
1712         if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP)))
1713                 return 0;
1714
1715         /*
1716          * For DP MST audio, Configuration Default is the same for
1717          * all device entries on the same pin
1718          */
1719         config = snd_hda_codec_get_pincfg(codec, pin_nid);
1720         if (get_defcfg_connect(config) == AC_JACK_PORT_NONE)
1721                 return 0;
1722
1723         /*
1724          * To simplify the implementation, malloc all
1725          * the virtual pins in the initialization statically
1726          */
1727         if (spec->intel_hsw_fixup) {
1728                 /*
1729                  * On Intel platforms, device entries number is
1730                  * changed dynamically. If there is a DP MST
1731                  * hub connected, the device entries number is 3.
1732                  * Otherwise, it is 1.
1733                  * Here we manually set dev_num to 3, so that
1734                  * we can initialize all the device entries when
1735                  * bootup statically.
1736                  */
1737                 dev_num = 3;
1738                 spec->dev_num = 3;
1739         } else if (spec->dyn_pcm_assign && codec->dp_mst) {
1740                 dev_num = snd_hda_get_num_devices(codec, pin_nid) + 1;
1741                 /*
1742                  * spec->dev_num is the maxinum number of device entries
1743                  * among all the pins
1744                  */
1745                 spec->dev_num = (spec->dev_num > dev_num) ?
1746                         spec->dev_num : dev_num;
1747         } else {
1748                 /*
1749                  * If the platform doesn't support DP MST,
1750                  * manually set dev_num to 1. This means
1751                  * the pin has only one device entry.
1752                  */
1753                 dev_num = 1;
1754                 spec->dev_num = 1;
1755         }
1756
1757         for (i = 0; i < dev_num; i++) {
1758                 pin_idx = spec->num_pins;
1759                 per_pin = snd_array_new(&spec->pins);
1760
1761                 if (!per_pin)
1762                         return -ENOMEM;
1763
1764                 if (spec->dyn_pcm_assign) {
1765                         per_pin->pcm = NULL;
1766                         per_pin->pcm_idx = -1;
1767                 } else {
1768                         per_pin->pcm = get_hdmi_pcm(spec, pin_idx);
1769                         per_pin->pcm_idx = pin_idx;
1770                 }
1771                 per_pin->pin_nid = pin_nid;
1772                 per_pin->pin_nid_idx = spec->num_nids;
1773                 per_pin->dev_id = i;
1774                 per_pin->non_pcm = false;
1775                 snd_hda_set_dev_select(codec, pin_nid, i);
1776                 if (spec->intel_hsw_fixup)
1777                         intel_haswell_fixup_connect_list(codec, pin_nid);
1778                 err = hdmi_read_pin_conn(codec, pin_idx);
1779                 if (err < 0)
1780                         return err;
1781                 spec->num_pins++;
1782         }
1783         spec->num_nids++;
1784
1785         return 0;
1786 }
1787
1788 static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1789 {
1790         struct hdmi_spec *spec = codec->spec;
1791         struct hdmi_spec_per_cvt *per_cvt;
1792         unsigned int chans;
1793         int err;
1794
1795         chans = get_wcaps(codec, cvt_nid);
1796         chans = get_wcaps_channels(chans);
1797
1798         per_cvt = snd_array_new(&spec->cvts);
1799         if (!per_cvt)
1800                 return -ENOMEM;
1801
1802         per_cvt->cvt_nid = cvt_nid;
1803         per_cvt->channels_min = 2;
1804         if (chans <= 16) {
1805                 per_cvt->channels_max = chans;
1806                 if (chans > spec->chmap.channels_max)
1807                         spec->chmap.channels_max = chans;
1808         }
1809
1810         err = snd_hda_query_supported_pcm(codec, cvt_nid,
1811                                           &per_cvt->rates,
1812                                           &per_cvt->formats,
1813                                           &per_cvt->maxbps);
1814         if (err < 0)
1815                 return err;
1816
1817         if (spec->num_cvts < ARRAY_SIZE(spec->cvt_nids))
1818                 spec->cvt_nids[spec->num_cvts] = cvt_nid;
1819         spec->num_cvts++;
1820
1821         return 0;
1822 }
1823
1824 static int hdmi_parse_codec(struct hda_codec *codec)
1825 {
1826         hda_nid_t nid;
1827         int i, nodes;
1828
1829         nodes = snd_hda_get_sub_nodes(codec, codec->core.afg, &nid);
1830         if (!nid || nodes < 0) {
1831                 codec_warn(codec, "HDMI: failed to get afg sub nodes\n");
1832                 return -EINVAL;
1833         }
1834
1835         for (i = 0; i < nodes; i++, nid++) {
1836                 unsigned int caps;
1837                 unsigned int type;
1838
1839                 caps = get_wcaps(codec, nid);
1840                 type = get_wcaps_type(caps);
1841
1842                 if (!(caps & AC_WCAP_DIGITAL))
1843                         continue;
1844
1845                 switch (type) {
1846                 case AC_WID_AUD_OUT:
1847                         hdmi_add_cvt(codec, nid);
1848                         break;
1849                 case AC_WID_PIN:
1850                         hdmi_add_pin(codec, nid);
1851                         break;
1852                 }
1853         }
1854
1855         return 0;
1856 }
1857
1858 /*
1859  */
1860 static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1861 {
1862         struct hda_spdif_out *spdif;
1863         bool non_pcm;
1864
1865         mutex_lock(&codec->spdif_mutex);
1866         spdif = snd_hda_spdif_out_of_nid(codec, cvt_nid);
1867         /* Add sanity check to pass klockwork check.
1868          * This should never happen.
1869          */
1870         if (WARN_ON(spdif == NULL))
1871                 return true;
1872         non_pcm = !!(spdif->status & IEC958_AES0_NONAUDIO);
1873         mutex_unlock(&codec->spdif_mutex);
1874         return non_pcm;
1875 }
1876
1877 /*
1878  * HDMI callbacks
1879  */
1880
1881 static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1882                                            struct hda_codec *codec,
1883                                            unsigned int stream_tag,
1884                                            unsigned int format,
1885                                            struct snd_pcm_substream *substream)
1886 {
1887         hda_nid_t cvt_nid = hinfo->nid;
1888         struct hdmi_spec *spec = codec->spec;
1889         int pin_idx;
1890         struct hdmi_spec_per_pin *per_pin;
1891         struct snd_pcm_runtime *runtime = substream->runtime;
1892         bool non_pcm;
1893         int pinctl, stripe;
1894         int err = 0;
1895
1896         mutex_lock(&spec->pcm_lock);
1897         pin_idx = hinfo_to_pin_index(codec, hinfo);
1898         if (spec->dyn_pcm_assign && pin_idx < 0) {
1899                 /* when dyn_pcm_assign and pcm is not bound to a pin
1900                  * skip pin setup and return 0 to make audio playback
1901                  * be ongoing
1902                  */
1903                 pin_cvt_fixup(codec, NULL, cvt_nid);
1904                 snd_hda_codec_setup_stream(codec, cvt_nid,
1905                                         stream_tag, 0, format);
1906                 goto unlock;
1907         }
1908
1909         if (snd_BUG_ON(pin_idx < 0)) {
1910                 err = -EINVAL;
1911                 goto unlock;
1912         }
1913         per_pin = get_pin(spec, pin_idx);
1914
1915         /* Verify pin:cvt selections to avoid silent audio after S3.
1916          * After S3, the audio driver restores pin:cvt selections
1917          * but this can happen before gfx is ready and such selection
1918          * is overlooked by HW. Thus multiple pins can share a same
1919          * default convertor and mute control will affect each other,
1920          * which can cause a resumed audio playback become silent
1921          * after S3.
1922          */
1923         pin_cvt_fixup(codec, per_pin, 0);
1924
1925         /* Call sync_audio_rate to set the N/CTS/M manually if necessary */
1926         /* Todo: add DP1.2 MST audio support later */
1927         if (codec_has_acomp(codec))
1928                 snd_hdac_sync_audio_rate(&codec->core, per_pin->pin_nid,
1929                                          per_pin->dev_id, runtime->rate);
1930
1931         non_pcm = check_non_pcm_per_cvt(codec, cvt_nid);
1932         mutex_lock(&per_pin->lock);
1933         per_pin->channels = substream->runtime->channels;
1934         per_pin->setup = true;
1935
1936         if (get_wcaps(codec, cvt_nid) & AC_WCAP_STRIPE) {
1937                 stripe = snd_hdac_get_stream_stripe_ctl(&codec->bus->core,
1938                                                         substream);
1939                 snd_hda_codec_write(codec, cvt_nid, 0,
1940                                     AC_VERB_SET_STRIPE_CONTROL,
1941                                     stripe);
1942         }
1943
1944         hdmi_setup_audio_infoframe(codec, per_pin, non_pcm);
1945         mutex_unlock(&per_pin->lock);
1946         if (spec->dyn_pin_out) {
1947                 snd_hda_set_dev_select(codec, per_pin->pin_nid,
1948                                        per_pin->dev_id);
1949                 pinctl = snd_hda_codec_read(codec, per_pin->pin_nid, 0,
1950                                             AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
1951                 snd_hda_codec_write(codec, per_pin->pin_nid, 0,
1952                                     AC_VERB_SET_PIN_WIDGET_CONTROL,
1953                                     pinctl | PIN_OUT);
1954         }
1955
1956         /* snd_hda_set_dev_select() has been called before */
1957         err = spec->ops.setup_stream(codec, cvt_nid, per_pin->pin_nid,
1958                                      per_pin->dev_id, stream_tag, format);
1959  unlock:
1960         mutex_unlock(&spec->pcm_lock);
1961         return err;
1962 }
1963
1964 static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
1965                                              struct hda_codec *codec,
1966                                              struct snd_pcm_substream *substream)
1967 {
1968         snd_hda_codec_cleanup_stream(codec, hinfo->nid);
1969         return 0;
1970 }
1971
1972 static int hdmi_pcm_close(struct hda_pcm_stream *hinfo,
1973                           struct hda_codec *codec,
1974                           struct snd_pcm_substream *substream)
1975 {
1976         struct hdmi_spec *spec = codec->spec;
1977         int cvt_idx, pin_idx, pcm_idx;
1978         struct hdmi_spec_per_cvt *per_cvt;
1979         struct hdmi_spec_per_pin *per_pin;
1980         int pinctl;
1981         int err = 0;
1982
1983         if (hinfo->nid) {
1984                 pcm_idx = hinfo_to_pcm_index(codec, hinfo);
1985                 if (snd_BUG_ON(pcm_idx < 0))
1986                         return -EINVAL;
1987                 cvt_idx = cvt_nid_to_cvt_index(codec, hinfo->nid);
1988                 if (snd_BUG_ON(cvt_idx < 0))
1989                         return -EINVAL;
1990                 per_cvt = get_cvt(spec, cvt_idx);
1991
1992                 snd_BUG_ON(!per_cvt->assigned);
1993                 per_cvt->assigned = 0;
1994                 hinfo->nid = 0;
1995
1996                 mutex_lock(&spec->pcm_lock);
1997                 snd_hda_spdif_ctls_unassign(codec, pcm_idx);
1998                 clear_bit(pcm_idx, &spec->pcm_in_use);
1999                 pin_idx = hinfo_to_pin_index(codec, hinfo);
2000                 if (spec->dyn_pcm_assign && pin_idx < 0)
2001                         goto unlock;
2002
2003                 if (snd_BUG_ON(pin_idx < 0)) {
2004                         err = -EINVAL;
2005                         goto unlock;
2006                 }
2007                 per_pin = get_pin(spec, pin_idx);
2008
2009                 if (spec->dyn_pin_out) {
2010                         snd_hda_set_dev_select(codec, per_pin->pin_nid,
2011                                                per_pin->dev_id);
2012                         pinctl = snd_hda_codec_read(codec, per_pin->pin_nid, 0,
2013                                         AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
2014                         snd_hda_codec_write(codec, per_pin->pin_nid, 0,
2015                                             AC_VERB_SET_PIN_WIDGET_CONTROL,
2016                                             pinctl & ~PIN_OUT);
2017                 }
2018
2019                 mutex_lock(&per_pin->lock);
2020                 per_pin->chmap_set = false;
2021                 memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
2022
2023                 per_pin->setup = false;
2024                 per_pin->channels = 0;
2025                 mutex_unlock(&per_pin->lock);
2026         unlock:
2027                 mutex_unlock(&spec->pcm_lock);
2028         }
2029
2030         return err;
2031 }
2032
2033 static const struct hda_pcm_ops generic_ops = {
2034         .open = hdmi_pcm_open,
2035         .close = hdmi_pcm_close,
2036         .prepare = generic_hdmi_playback_pcm_prepare,
2037         .cleanup = generic_hdmi_playback_pcm_cleanup,
2038 };
2039
2040 static int hdmi_get_spk_alloc(struct hdac_device *hdac, int pcm_idx)
2041 {
2042         struct hda_codec *codec = container_of(hdac, struct hda_codec, core);
2043         struct hdmi_spec *spec = codec->spec;
2044         struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
2045
2046         if (!per_pin)
2047                 return 0;
2048
2049         return per_pin->sink_eld.info.spk_alloc;
2050 }
2051
2052 static void hdmi_get_chmap(struct hdac_device *hdac, int pcm_idx,
2053                                         unsigned char *chmap)
2054 {
2055         struct hda_codec *codec = container_of(hdac, struct hda_codec, core);
2056         struct hdmi_spec *spec = codec->spec;
2057         struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
2058
2059         /* chmap is already set to 0 in caller */
2060         if (!per_pin)
2061                 return;
2062
2063         memcpy(chmap, per_pin->chmap, ARRAY_SIZE(per_pin->chmap));
2064 }
2065
2066 static void hdmi_set_chmap(struct hdac_device *hdac, int pcm_idx,
2067                                 unsigned char *chmap, int prepared)
2068 {
2069         struct hda_codec *codec = container_of(hdac, struct hda_codec, core);
2070         struct hdmi_spec *spec = codec->spec;
2071         struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
2072
2073         if (!per_pin)
2074                 return;
2075         mutex_lock(&per_pin->lock);
2076         per_pin->chmap_set = true;
2077         memcpy(per_pin->chmap, chmap, ARRAY_SIZE(per_pin->chmap));
2078         if (prepared)
2079                 hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm);
2080         mutex_unlock(&per_pin->lock);
2081 }
2082
2083 static bool is_hdmi_pcm_attached(struct hdac_device *hdac, int pcm_idx)
2084 {
2085         struct hda_codec *codec = container_of(hdac, struct hda_codec, core);
2086         struct hdmi_spec *spec = codec->spec;
2087         struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
2088
2089         return per_pin ? true:false;
2090 }
2091
2092 static int generic_hdmi_build_pcms(struct hda_codec *codec)
2093 {
2094         struct hdmi_spec *spec = codec->spec;
2095         int idx, pcm_num;
2096
2097         /*
2098          * for non-mst mode, pcm number is the same as before
2099          * for DP MST mode without extra PCM, pcm number is same
2100          * for DP MST mode with extra PCMs, pcm number is
2101          *  (nid number + dev_num - 1)
2102          * dev_num is the device entry number in a pin
2103          */
2104
2105         if (codec->mst_no_extra_pcms)
2106                 pcm_num = spec->num_nids;
2107         else
2108                 pcm_num = spec->num_nids + spec->dev_num - 1;
2109
2110         codec_dbg(codec, "hdmi: pcm_num set to %d\n", pcm_num);
2111
2112         for (idx = 0; idx < pcm_num; idx++) {
2113                 struct hda_pcm *info;
2114                 struct hda_pcm_stream *pstr;
2115
2116                 info = snd_hda_codec_pcm_new(codec, "HDMI %d", idx);
2117                 if (!info)
2118                         return -ENOMEM;
2119
2120                 spec->pcm_rec[idx].pcm = info;
2121                 spec->pcm_used++;
2122                 info->pcm_type = HDA_PCM_TYPE_HDMI;
2123                 info->own_chmap = true;
2124
2125                 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
2126                 pstr->substreams = 1;
2127                 pstr->ops = generic_ops;
2128                 /* pcm number is less than 16 */
2129                 if (spec->pcm_used >= 16)
2130                         break;
2131                 /* other pstr fields are set in open */
2132         }
2133
2134         return 0;
2135 }
2136
2137 static void free_hdmi_jack_priv(struct snd_jack *jack)
2138 {
2139         struct hdmi_pcm *pcm = jack->private_data;
2140
2141         pcm->jack = NULL;
2142 }
2143
2144 static int add_hdmi_jack_kctl(struct hda_codec *codec,
2145                                struct hdmi_spec *spec,
2146                                int pcm_idx,
2147                                const char *name)
2148 {
2149         struct snd_jack *jack;
2150         int err;
2151
2152         err = snd_jack_new(codec->card, name, SND_JACK_AVOUT, &jack,
2153                            true, false);
2154         if (err < 0)
2155                 return err;
2156
2157         spec->pcm_rec[pcm_idx].jack = jack;
2158         jack->private_data = &spec->pcm_rec[pcm_idx];
2159         jack->private_free = free_hdmi_jack_priv;
2160         return 0;
2161 }
2162
2163 static int generic_hdmi_build_jack(struct hda_codec *codec, int pcm_idx)
2164 {
2165         char hdmi_str[32] = "HDMI/DP";
2166         struct hdmi_spec *spec = codec->spec;
2167         struct hdmi_spec_per_pin *per_pin;
2168         struct hda_jack_tbl *jack;
2169         int pcmdev = get_pcm_rec(spec, pcm_idx)->device;
2170         bool phantom_jack;
2171         int ret;
2172
2173         if (pcmdev > 0)
2174                 sprintf(hdmi_str + strlen(hdmi_str), ",pcm=%d", pcmdev);
2175
2176         if (spec->dyn_pcm_assign)
2177                 return add_hdmi_jack_kctl(codec, spec, pcm_idx, hdmi_str);
2178
2179         /* for !dyn_pcm_assign, we still use hda_jack for compatibility */
2180         /* if !dyn_pcm_assign, it must be non-MST mode.
2181          * This means pcms and pins are statically mapped.
2182          * And pcm_idx is pin_idx.
2183          */
2184         per_pin = get_pin(spec, pcm_idx);
2185         phantom_jack = !is_jack_detectable(codec, per_pin->pin_nid);
2186         if (phantom_jack)
2187                 strncat(hdmi_str, " Phantom",
2188                         sizeof(hdmi_str) - strlen(hdmi_str) - 1);
2189         ret = snd_hda_jack_add_kctl_mst(codec, per_pin->pin_nid,
2190                                         per_pin->dev_id, hdmi_str, phantom_jack,
2191                                         0, NULL);
2192         if (ret < 0)
2193                 return ret;
2194         jack = snd_hda_jack_tbl_get_mst(codec, per_pin->pin_nid,
2195                                         per_pin->dev_id);
2196         if (jack == NULL)
2197                 return 0;
2198         /* assign jack->jack to pcm_rec[].jack to
2199          * align with dyn_pcm_assign mode
2200          */
2201         spec->pcm_rec[pcm_idx].jack = jack->jack;
2202         return 0;
2203 }
2204
2205 static int generic_hdmi_build_controls(struct hda_codec *codec)
2206 {
2207         struct hdmi_spec *spec = codec->spec;
2208         int dev, err;
2209         int pin_idx, pcm_idx;
2210
2211         for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++) {
2212                 if (!get_pcm_rec(spec, pcm_idx)->pcm) {
2213                         /* no PCM: mark this for skipping permanently */
2214                         set_bit(pcm_idx, &spec->pcm_bitmap);
2215                         continue;
2216                 }
2217
2218                 err = generic_hdmi_build_jack(codec, pcm_idx);
2219                 if (err < 0)
2220                         return err;
2221
2222                 /* create the spdif for each pcm
2223                  * pin will be bound when monitor is connected
2224                  */
2225                 if (spec->dyn_pcm_assign)
2226                         err = snd_hda_create_dig_out_ctls(codec,
2227                                           0, spec->cvt_nids[0],
2228                                           HDA_PCM_TYPE_HDMI);
2229                 else {
2230                         struct hdmi_spec_per_pin *per_pin =
2231                                 get_pin(spec, pcm_idx);
2232                         err = snd_hda_create_dig_out_ctls(codec,
2233                                                   per_pin->pin_nid,
2234                                                   per_pin->mux_nids[0],
2235                                                   HDA_PCM_TYPE_HDMI);
2236                 }
2237                 if (err < 0)
2238                         return err;
2239                 snd_hda_spdif_ctls_unassign(codec, pcm_idx);
2240
2241                 dev = get_pcm_rec(spec, pcm_idx)->device;
2242                 if (dev != SNDRV_PCM_INVALID_DEVICE) {
2243                         /* add control for ELD Bytes */
2244                         err = hdmi_create_eld_ctl(codec, pcm_idx, dev);
2245                         if (err < 0)
2246                                 return err;
2247                 }
2248         }
2249
2250         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2251                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2252
2253                 hdmi_present_sense(per_pin, 0);
2254         }
2255
2256         /* add channel maps */
2257         for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++) {
2258                 struct hda_pcm *pcm;
2259
2260                 pcm = get_pcm_rec(spec, pcm_idx);
2261                 if (!pcm || !pcm->pcm)
2262                         break;
2263                 err = snd_hdac_add_chmap_ctls(pcm->pcm, pcm_idx, &spec->chmap);
2264                 if (err < 0)
2265                         return err;
2266         }
2267
2268         return 0;
2269 }
2270
2271 static int generic_hdmi_init_per_pins(struct hda_codec *codec)
2272 {
2273         struct hdmi_spec *spec = codec->spec;
2274         int pin_idx;
2275
2276         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2277                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2278
2279                 per_pin->codec = codec;
2280                 mutex_init(&per_pin->lock);
2281                 INIT_DELAYED_WORK(&per_pin->work, hdmi_repoll_eld);
2282                 eld_proc_new(per_pin, pin_idx);
2283         }
2284         return 0;
2285 }
2286
2287 static int generic_hdmi_init(struct hda_codec *codec)
2288 {
2289         struct hdmi_spec *spec = codec->spec;
2290         int pin_idx;
2291
2292         mutex_lock(&spec->bind_lock);
2293         spec->use_jack_detect = !codec->jackpoll_interval;
2294         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2295                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2296                 hda_nid_t pin_nid = per_pin->pin_nid;
2297                 int dev_id = per_pin->dev_id;
2298
2299                 snd_hda_set_dev_select(codec, pin_nid, dev_id);
2300                 hdmi_init_pin(codec, pin_nid);
2301                 if (codec_has_acomp(codec))
2302                         continue;
2303                 if (spec->use_jack_detect)
2304                         snd_hda_jack_detect_enable(codec, pin_nid, dev_id);
2305                 else
2306                         snd_hda_jack_detect_enable_callback_mst(codec, pin_nid,
2307                                                                 dev_id,
2308                                                                 jack_callback);
2309         }
2310         mutex_unlock(&spec->bind_lock);
2311         return 0;
2312 }
2313
2314 static void hdmi_array_init(struct hdmi_spec *spec, int nums)
2315 {
2316         snd_array_init(&spec->pins, sizeof(struct hdmi_spec_per_pin), nums);
2317         snd_array_init(&spec->cvts, sizeof(struct hdmi_spec_per_cvt), nums);
2318 }
2319
2320 static void hdmi_array_free(struct hdmi_spec *spec)
2321 {
2322         snd_array_free(&spec->pins);
2323         snd_array_free(&spec->cvts);
2324 }
2325
2326 static void generic_spec_free(struct hda_codec *codec)
2327 {
2328         struct hdmi_spec *spec = codec->spec;
2329
2330         if (spec) {
2331                 hdmi_array_free(spec);
2332                 kfree(spec);
2333                 codec->spec = NULL;
2334         }
2335         codec->dp_mst = false;
2336 }
2337
2338 static void generic_hdmi_free(struct hda_codec *codec)
2339 {
2340         struct hdmi_spec *spec = codec->spec;
2341         int pin_idx, pcm_idx;
2342
2343         if (spec->acomp_registered) {
2344                 snd_hdac_acomp_exit(&codec->bus->core);
2345         } else if (codec_has_acomp(codec)) {
2346                 snd_hdac_acomp_register_notifier(&codec->bus->core, NULL);
2347                 codec->relaxed_resume = 0;
2348         }
2349
2350         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2351                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2352                 cancel_delayed_work_sync(&per_pin->work);
2353                 eld_proc_free(per_pin);
2354         }
2355
2356         for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++) {
2357                 if (spec->pcm_rec[pcm_idx].jack == NULL)
2358                         continue;
2359                 if (spec->dyn_pcm_assign)
2360                         snd_device_free(codec->card,
2361                                         spec->pcm_rec[pcm_idx].jack);
2362                 else
2363                         spec->pcm_rec[pcm_idx].jack = NULL;
2364         }
2365
2366         generic_spec_free(codec);
2367 }
2368
2369 #ifdef CONFIG_PM
2370 static int generic_hdmi_resume(struct hda_codec *codec)
2371 {
2372         struct hdmi_spec *spec = codec->spec;
2373         int pin_idx;
2374
2375         codec->patch_ops.init(codec);
2376         regcache_sync(codec->core.regmap);
2377
2378         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2379                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2380                 hdmi_present_sense(per_pin, 1);
2381         }
2382         return 0;
2383 }
2384 #endif
2385
2386 static const struct hda_codec_ops generic_hdmi_patch_ops = {
2387         .init                   = generic_hdmi_init,
2388         .free                   = generic_hdmi_free,
2389         .build_pcms             = generic_hdmi_build_pcms,
2390         .build_controls         = generic_hdmi_build_controls,
2391         .unsol_event            = hdmi_unsol_event,
2392 #ifdef CONFIG_PM
2393         .resume                 = generic_hdmi_resume,
2394 #endif
2395 };
2396
2397 static const struct hdmi_ops generic_standard_hdmi_ops = {
2398         .pin_get_eld                            = hdmi_pin_get_eld,
2399         .pin_setup_infoframe                    = hdmi_pin_setup_infoframe,
2400         .pin_hbr_setup                          = hdmi_pin_hbr_setup,
2401         .setup_stream                           = hdmi_setup_stream,
2402 };
2403
2404 /* allocate codec->spec and assign/initialize generic parser ops */
2405 static int alloc_generic_hdmi(struct hda_codec *codec)
2406 {
2407         struct hdmi_spec *spec;
2408
2409         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2410         if (!spec)
2411                 return -ENOMEM;
2412
2413         spec->codec = codec;
2414         spec->ops = generic_standard_hdmi_ops;
2415         spec->dev_num = 1;      /* initialize to 1 */
2416         mutex_init(&spec->pcm_lock);
2417         mutex_init(&spec->bind_lock);
2418         snd_hdac_register_chmap_ops(&codec->core, &spec->chmap);
2419
2420         spec->chmap.ops.get_chmap = hdmi_get_chmap;
2421         spec->chmap.ops.set_chmap = hdmi_set_chmap;
2422         spec->chmap.ops.is_pcm_attached = is_hdmi_pcm_attached;
2423         spec->chmap.ops.get_spk_alloc = hdmi_get_spk_alloc,
2424
2425         codec->spec = spec;
2426         hdmi_array_init(spec, 4);
2427
2428         codec->patch_ops = generic_hdmi_patch_ops;
2429
2430         return 0;
2431 }
2432
2433 /* generic HDMI parser */
2434 static int patch_generic_hdmi(struct hda_codec *codec)
2435 {
2436         int err;
2437
2438         err = alloc_generic_hdmi(codec);
2439         if (err < 0)
2440                 return err;
2441
2442         err = hdmi_parse_codec(codec);
2443         if (err < 0) {
2444                 generic_spec_free(codec);
2445                 return err;
2446         }
2447
2448         generic_hdmi_init_per_pins(codec);
2449         return 0;
2450 }
2451
2452 /*
2453  * generic audio component binding
2454  */
2455
2456 /* turn on / off the unsol event jack detection dynamically */
2457 static void reprogram_jack_detect(struct hda_codec *codec, hda_nid_t nid,
2458                                   int dev_id, bool use_acomp)
2459 {
2460         struct hda_jack_tbl *tbl;
2461
2462         tbl = snd_hda_jack_tbl_get_mst(codec, nid, dev_id);
2463         if (tbl) {
2464                 /* clear unsol even if component notifier is used, or re-enable
2465                  * if notifier is cleared
2466                  */
2467                 unsigned int val = use_acomp ? 0 : (AC_USRSP_EN | tbl->tag);
2468                 snd_hda_codec_write_cache(codec, nid, 0,
2469                                           AC_VERB_SET_UNSOLICITED_ENABLE, val);
2470         } else {
2471                 /* if no jack entry was defined beforehand, create a new one
2472                  * at need (i.e. only when notifier is cleared)
2473                  */
2474                 if (!use_acomp)
2475                         snd_hda_jack_detect_enable(codec, nid, dev_id);
2476         }
2477 }
2478
2479 /* set up / clear component notifier dynamically */
2480 static void generic_acomp_notifier_set(struct drm_audio_component *acomp,
2481                                        bool use_acomp)
2482 {
2483         struct hdmi_spec *spec;
2484         int i;
2485
2486         spec = container_of(acomp->audio_ops, struct hdmi_spec, drm_audio_ops);
2487         mutex_lock(&spec->bind_lock);
2488         spec->use_acomp_notifier = use_acomp;
2489         spec->codec->relaxed_resume = use_acomp;
2490         /* reprogram each jack detection logic depending on the notifier */
2491         if (spec->use_jack_detect) {
2492                 for (i = 0; i < spec->num_pins; i++)
2493                         reprogram_jack_detect(spec->codec,
2494                                               get_pin(spec, i)->pin_nid,
2495                                               get_pin(spec, i)->dev_id,
2496                                               use_acomp);
2497         }
2498         mutex_unlock(&spec->bind_lock);
2499 }
2500
2501 /* enable / disable the notifier via master bind / unbind */
2502 static int generic_acomp_master_bind(struct device *dev,
2503                                      struct drm_audio_component *acomp)
2504 {
2505         generic_acomp_notifier_set(acomp, true);
2506         return 0;
2507 }
2508
2509 static void generic_acomp_master_unbind(struct device *dev,
2510                                         struct drm_audio_component *acomp)
2511 {
2512         generic_acomp_notifier_set(acomp, false);
2513 }
2514
2515 /* check whether both HD-audio and DRM PCI devices belong to the same bus */
2516 static int match_bound_vga(struct device *dev, int subtype, void *data)
2517 {
2518         struct hdac_bus *bus = data;
2519         struct pci_dev *pci, *master;
2520
2521         if (!dev_is_pci(dev) || !dev_is_pci(bus->dev))
2522                 return 0;
2523         master = to_pci_dev(bus->dev);
2524         pci = to_pci_dev(dev);
2525         return master->bus == pci->bus;
2526 }
2527
2528 /* audio component notifier for AMD/Nvidia HDMI codecs */
2529 static void generic_acomp_pin_eld_notify(void *audio_ptr, int port, int dev_id)
2530 {
2531         struct hda_codec *codec = audio_ptr;
2532         struct hdmi_spec *spec = codec->spec;
2533         hda_nid_t pin_nid = spec->port2pin(codec, port);
2534
2535         if (!pin_nid)
2536                 return;
2537         if (get_wcaps_type(get_wcaps(codec, pin_nid)) != AC_WID_PIN)
2538                 return;
2539         /* skip notification during system suspend (but not in runtime PM);
2540          * the state will be updated at resume
2541          */
2542         if (snd_power_get_state(codec->card) != SNDRV_CTL_POWER_D0)
2543                 return;
2544         /* ditto during suspend/resume process itself */
2545         if (snd_hdac_is_in_pm(&codec->core))
2546                 return;
2547
2548         check_presence_and_report(codec, pin_nid, dev_id);
2549 }
2550
2551 /* set up the private drm_audio_ops from the template */
2552 static void setup_drm_audio_ops(struct hda_codec *codec,
2553                                 const struct drm_audio_component_audio_ops *ops)
2554 {
2555         struct hdmi_spec *spec = codec->spec;
2556
2557         spec->drm_audio_ops.audio_ptr = codec;
2558         /* intel_audio_codec_enable() or intel_audio_codec_disable()
2559          * will call pin_eld_notify with using audio_ptr pointer
2560          * We need make sure audio_ptr is really setup
2561          */
2562         wmb();
2563         spec->drm_audio_ops.pin2port = ops->pin2port;
2564         spec->drm_audio_ops.pin_eld_notify = ops->pin_eld_notify;
2565         spec->drm_audio_ops.master_bind = ops->master_bind;
2566         spec->drm_audio_ops.master_unbind = ops->master_unbind;
2567 }
2568
2569 /* initialize the generic HDMI audio component */
2570 static void generic_acomp_init(struct hda_codec *codec,
2571                                const struct drm_audio_component_audio_ops *ops,
2572                                int (*port2pin)(struct hda_codec *, int))
2573 {
2574         struct hdmi_spec *spec = codec->spec;
2575
2576         spec->port2pin = port2pin;
2577         setup_drm_audio_ops(codec, ops);
2578         if (!snd_hdac_acomp_init(&codec->bus->core, &spec->drm_audio_ops,
2579                                  match_bound_vga, 0)) {
2580                 spec->acomp_registered = true;
2581                 codec->bus->keep_power = 0;
2582         }
2583 }
2584
2585 /*
2586  * Intel codec parsers and helpers
2587  */
2588
2589 static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
2590                                              hda_nid_t nid)
2591 {
2592         struct hdmi_spec *spec = codec->spec;
2593         hda_nid_t conns[4];
2594         int nconns;
2595
2596         nconns = snd_hda_get_raw_connections(codec, nid, conns,
2597                                              ARRAY_SIZE(conns));
2598         if (nconns == spec->num_cvts &&
2599             !memcmp(conns, spec->cvt_nids, spec->num_cvts * sizeof(hda_nid_t)))
2600                 return;
2601
2602         /* override pins connection list */
2603         codec_dbg(codec, "hdmi: haswell: override pin connection 0x%x\n", nid);
2604         snd_hda_override_conn_list(codec, nid, spec->num_cvts, spec->cvt_nids);
2605 }
2606
2607 #define INTEL_GET_VENDOR_VERB   0xf81
2608 #define INTEL_SET_VENDOR_VERB   0x781
2609 #define INTEL_EN_DP12           0x02    /* enable DP 1.2 features */
2610 #define INTEL_EN_ALL_PIN_CVTS   0x01    /* enable 2nd & 3rd pins and convertors */
2611
2612 static void intel_haswell_enable_all_pins(struct hda_codec *codec,
2613                                           bool update_tree)
2614 {
2615         unsigned int vendor_param;
2616         struct hdmi_spec *spec = codec->spec;
2617
2618         vendor_param = snd_hda_codec_read(codec, spec->vendor_nid, 0,
2619                                 INTEL_GET_VENDOR_VERB, 0);
2620         if (vendor_param == -1 || vendor_param & INTEL_EN_ALL_PIN_CVTS)
2621                 return;
2622
2623         vendor_param |= INTEL_EN_ALL_PIN_CVTS;
2624         vendor_param = snd_hda_codec_read(codec, spec->vendor_nid, 0,
2625                                 INTEL_SET_VENDOR_VERB, vendor_param);
2626         if (vendor_param == -1)
2627                 return;
2628
2629         if (update_tree)
2630                 snd_hda_codec_update_widgets(codec);
2631 }
2632
2633 static void intel_haswell_fixup_enable_dp12(struct hda_codec *codec)
2634 {
2635         unsigned int vendor_param;
2636         struct hdmi_spec *spec = codec->spec;
2637
2638         vendor_param = snd_hda_codec_read(codec, spec->vendor_nid, 0,
2639                                 INTEL_GET_VENDOR_VERB, 0);
2640         if (vendor_param == -1 || vendor_param & INTEL_EN_DP12)
2641                 return;
2642
2643         /* enable DP1.2 mode */
2644         vendor_param |= INTEL_EN_DP12;
2645         snd_hdac_regmap_add_vendor_verb(&codec->core, INTEL_SET_VENDOR_VERB);
2646         snd_hda_codec_write_cache(codec, spec->vendor_nid, 0,
2647                                 INTEL_SET_VENDOR_VERB, vendor_param);
2648 }
2649
2650 /* Haswell needs to re-issue the vendor-specific verbs before turning to D0.
2651  * Otherwise you may get severe h/w communication errors.
2652  */
2653 static void haswell_set_power_state(struct hda_codec *codec, hda_nid_t fg,
2654                                 unsigned int power_state)
2655 {
2656         if (power_state == AC_PWRST_D0) {
2657                 intel_haswell_enable_all_pins(codec, false);
2658                 intel_haswell_fixup_enable_dp12(codec);
2659         }
2660
2661         snd_hda_codec_read(codec, fg, 0, AC_VERB_SET_POWER_STATE, power_state);
2662         snd_hda_codec_set_power_to_all(codec, fg, power_state);
2663 }
2664
2665 /* There is a fixed mapping between audio pin node and display port.
2666  * on SNB, IVY, HSW, BSW, SKL, BXT, KBL:
2667  * Pin Widget 5 - PORT B (port = 1 in i915 driver)
2668  * Pin Widget 6 - PORT C (port = 2 in i915 driver)
2669  * Pin Widget 7 - PORT D (port = 3 in i915 driver)
2670  *
2671  * on VLV, ILK:
2672  * Pin Widget 4 - PORT B (port = 1 in i915 driver)
2673  * Pin Widget 5 - PORT C (port = 2 in i915 driver)
2674  * Pin Widget 6 - PORT D (port = 3 in i915 driver)
2675  */
2676 static int intel_base_nid(struct hda_codec *codec)
2677 {
2678         switch (codec->core.vendor_id) {
2679         case 0x80860054: /* ILK */
2680         case 0x80862804: /* ILK */
2681         case 0x80862882: /* VLV */
2682                 return 4;
2683         default:
2684                 return 5;
2685         }
2686 }
2687
2688 static int intel_pin2port(void *audio_ptr, int pin_nid)
2689 {
2690         struct hda_codec *codec = audio_ptr;
2691         struct hdmi_spec *spec = codec->spec;
2692         int base_nid, i;
2693
2694         if (!spec->port_num) {
2695                 base_nid = intel_base_nid(codec);
2696                 if (WARN_ON(pin_nid < base_nid || pin_nid >= base_nid + 3))
2697                         return -1;
2698                 return pin_nid - base_nid + 1;
2699         }
2700
2701         /*
2702          * looking for the pin number in the mapping table and return
2703          * the index which indicate the port number
2704          */
2705         for (i = 0; i < spec->port_num; i++) {
2706                 if (pin_nid == spec->port_map[i])
2707                         return i;
2708         }
2709
2710         codec_info(codec, "Can't find the HDMI/DP port for pin %d\n", pin_nid);
2711         return -1;
2712 }
2713
2714 static int intel_port2pin(struct hda_codec *codec, int port)
2715 {
2716         struct hdmi_spec *spec = codec->spec;
2717
2718         if (!spec->port_num) {
2719                 /* we assume only from port-B to port-D */
2720                 if (port < 1 || port > 3)
2721                         return 0;
2722                 return port + intel_base_nid(codec) - 1;
2723         }
2724
2725         if (port < 0 || port >= spec->port_num)
2726                 return 0;
2727         return spec->port_map[port];
2728 }
2729
2730 static void intel_pin_eld_notify(void *audio_ptr, int port, int pipe)
2731 {
2732         struct hda_codec *codec = audio_ptr;
2733         int pin_nid;
2734         int dev_id = pipe;
2735
2736         pin_nid = intel_port2pin(codec, port);
2737         if (!pin_nid)
2738                 return;
2739         /* skip notification during system suspend (but not in runtime PM);
2740          * the state will be updated at resume
2741          */
2742         if (snd_power_get_state(codec->card) != SNDRV_CTL_POWER_D0)
2743                 return;
2744         /* ditto during suspend/resume process itself */
2745         if (snd_hdac_is_in_pm(&codec->core))
2746                 return;
2747
2748         snd_hdac_i915_set_bclk(&codec->bus->core);
2749         check_presence_and_report(codec, pin_nid, dev_id);
2750 }
2751
2752 static const struct drm_audio_component_audio_ops intel_audio_ops = {
2753         .pin2port = intel_pin2port,
2754         .pin_eld_notify = intel_pin_eld_notify,
2755 };
2756
2757 /* register i915 component pin_eld_notify callback */
2758 static void register_i915_notifier(struct hda_codec *codec)
2759 {
2760         struct hdmi_spec *spec = codec->spec;
2761
2762         spec->use_acomp_notifier = true;
2763         spec->port2pin = intel_port2pin;
2764         setup_drm_audio_ops(codec, &intel_audio_ops);
2765         snd_hdac_acomp_register_notifier(&codec->bus->core,
2766                                         &spec->drm_audio_ops);
2767         /* no need for forcible resume for jack check thanks to notifier */
2768         codec->relaxed_resume = 1;
2769 }
2770
2771 /* setup_stream ops override for HSW+ */
2772 static int i915_hsw_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
2773                                  hda_nid_t pin_nid, int dev_id, u32 stream_tag,
2774                                  int format)
2775 {
2776         haswell_verify_D0(codec, cvt_nid, pin_nid);
2777         return hdmi_setup_stream(codec, cvt_nid, pin_nid, dev_id,
2778                                  stream_tag, format);
2779 }
2780
2781 /* pin_cvt_fixup ops override for HSW+ and VLV+ */
2782 static void i915_pin_cvt_fixup(struct hda_codec *codec,
2783                                struct hdmi_spec_per_pin *per_pin,
2784                                hda_nid_t cvt_nid)
2785 {
2786         if (per_pin) {
2787                 snd_hda_set_dev_select(codec, per_pin->pin_nid,
2788                                per_pin->dev_id);
2789                 intel_verify_pin_cvt_connect(codec, per_pin);
2790                 intel_not_share_assigned_cvt(codec, per_pin->pin_nid,
2791                                      per_pin->dev_id, per_pin->mux_idx);
2792         } else {
2793                 intel_not_share_assigned_cvt_nid(codec, 0, 0, cvt_nid);
2794         }
2795 }
2796
2797 /* precondition and allocation for Intel codecs */
2798 static int alloc_intel_hdmi(struct hda_codec *codec)
2799 {
2800         int err;
2801
2802         /* requires i915 binding */
2803         if (!codec->bus->core.audio_component) {
2804                 codec_info(codec, "No i915 binding for Intel HDMI/DP codec\n");
2805                 /* set probe_id here to prevent generic fallback binding */
2806                 codec->probe_id = HDA_CODEC_ID_SKIP_PROBE;
2807                 return -ENODEV;
2808         }
2809
2810         err = alloc_generic_hdmi(codec);
2811         if (err < 0)
2812                 return err;
2813         /* no need to handle unsol events */
2814         codec->patch_ops.unsol_event = NULL;
2815         return 0;
2816 }
2817
2818 /* parse and post-process for Intel codecs */
2819 static int parse_intel_hdmi(struct hda_codec *codec)
2820 {
2821         int err;
2822
2823         err = hdmi_parse_codec(codec);
2824         if (err < 0) {
2825                 generic_spec_free(codec);
2826                 return err;
2827         }
2828
2829         generic_hdmi_init_per_pins(codec);
2830         register_i915_notifier(codec);
2831         return 0;
2832 }
2833
2834 /* Intel Haswell and onwards; audio component with eld notifier */
2835 static int intel_hsw_common_init(struct hda_codec *codec, hda_nid_t vendor_nid,
2836                                  const int *port_map, int port_num)
2837 {
2838         struct hdmi_spec *spec;
2839         int err;
2840
2841         err = alloc_intel_hdmi(codec);
2842         if (err < 0)
2843                 return err;
2844         spec = codec->spec;
2845         codec->dp_mst = true;
2846         spec->dyn_pcm_assign = true;
2847         spec->vendor_nid = vendor_nid;
2848         spec->port_map = port_map;
2849         spec->port_num = port_num;
2850         spec->intel_hsw_fixup = true;
2851
2852         intel_haswell_enable_all_pins(codec, true);
2853         intel_haswell_fixup_enable_dp12(codec);
2854
2855         codec->display_power_control = 1;
2856
2857         codec->patch_ops.set_power_state = haswell_set_power_state;
2858         codec->depop_delay = 0;
2859         codec->auto_runtime_pm = 1;
2860
2861         spec->ops.setup_stream = i915_hsw_setup_stream;
2862         spec->ops.pin_cvt_fixup = i915_pin_cvt_fixup;
2863
2864         return parse_intel_hdmi(codec);
2865 }
2866
2867 static int patch_i915_hsw_hdmi(struct hda_codec *codec)
2868 {
2869         return intel_hsw_common_init(codec, 0x08, NULL, 0);
2870 }
2871
2872 static int patch_i915_glk_hdmi(struct hda_codec *codec)
2873 {
2874         return intel_hsw_common_init(codec, 0x0b, NULL, 0);
2875 }
2876
2877 static int patch_i915_icl_hdmi(struct hda_codec *codec)
2878 {
2879         /*
2880          * pin to port mapping table where the value indicate the pin number and
2881          * the index indicate the port number.
2882          */
2883         static const int map[] = {0x0, 0x4, 0x6, 0x8, 0xa, 0xb};
2884
2885         return intel_hsw_common_init(codec, 0x02, map, ARRAY_SIZE(map));
2886 }
2887
2888 static int patch_i915_tgl_hdmi(struct hda_codec *codec)
2889 {
2890         /*
2891          * pin to port mapping table where the value indicate the pin number and
2892          * the index indicate the port number.
2893          */
2894         static const int map[] = {0x4, 0x6, 0x8, 0xa, 0xb, 0xc, 0xd, 0xe, 0xf};
2895
2896         return intel_hsw_common_init(codec, 0x02, map, ARRAY_SIZE(map));
2897 }
2898
2899 /* Intel Baytrail and Braswell; with eld notifier */
2900 static int patch_i915_byt_hdmi(struct hda_codec *codec)
2901 {
2902         struct hdmi_spec *spec;
2903         int err;
2904
2905         err = alloc_intel_hdmi(codec);
2906         if (err < 0)
2907                 return err;
2908         spec = codec->spec;
2909
2910         /* For Valleyview/Cherryview, only the display codec is in the display
2911          * power well and can use link_power ops to request/release the power.
2912          */
2913         codec->display_power_control = 1;
2914
2915         codec->depop_delay = 0;
2916         codec->auto_runtime_pm = 1;
2917
2918         spec->ops.pin_cvt_fixup = i915_pin_cvt_fixup;
2919
2920         return parse_intel_hdmi(codec);
2921 }
2922
2923 /* Intel IronLake, SandyBridge and IvyBridge; with eld notifier */
2924 static int patch_i915_cpt_hdmi(struct hda_codec *codec)
2925 {
2926         int err;
2927
2928         err = alloc_intel_hdmi(codec);
2929         if (err < 0)
2930                 return err;
2931         return parse_intel_hdmi(codec);
2932 }
2933
2934 /*
2935  * Shared non-generic implementations
2936  */
2937
2938 static int simple_playback_build_pcms(struct hda_codec *codec)
2939 {
2940         struct hdmi_spec *spec = codec->spec;
2941         struct hda_pcm *info;
2942         unsigned int chans;
2943         struct hda_pcm_stream *pstr;
2944         struct hdmi_spec_per_cvt *per_cvt;
2945
2946         per_cvt = get_cvt(spec, 0);
2947         chans = get_wcaps(codec, per_cvt->cvt_nid);
2948         chans = get_wcaps_channels(chans);
2949
2950         info = snd_hda_codec_pcm_new(codec, "HDMI 0");
2951         if (!info)
2952                 return -ENOMEM;
2953         spec->pcm_rec[0].pcm = info;
2954         info->pcm_type = HDA_PCM_TYPE_HDMI;
2955         pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
2956         *pstr = spec->pcm_playback;
2957         pstr->nid = per_cvt->cvt_nid;
2958         if (pstr->channels_max <= 2 && chans && chans <= 16)
2959                 pstr->channels_max = chans;
2960
2961         return 0;
2962 }
2963
2964 /* unsolicited event for jack sensing */
2965 static void simple_hdmi_unsol_event(struct hda_codec *codec,
2966                                     unsigned int res)
2967 {
2968         snd_hda_jack_set_dirty_all(codec);
2969         snd_hda_jack_report_sync(codec);
2970 }
2971
2972 /* generic_hdmi_build_jack can be used for simple_hdmi, too,
2973  * as long as spec->pins[] is set correctly
2974  */
2975 #define simple_hdmi_build_jack  generic_hdmi_build_jack
2976
2977 static int simple_playback_build_controls(struct hda_codec *codec)
2978 {
2979         struct hdmi_spec *spec = codec->spec;
2980         struct hdmi_spec_per_cvt *per_cvt;
2981         int err;
2982
2983         per_cvt = get_cvt(spec, 0);
2984         err = snd_hda_create_dig_out_ctls(codec, per_cvt->cvt_nid,
2985                                           per_cvt->cvt_nid,
2986                                           HDA_PCM_TYPE_HDMI);
2987         if (err < 0)
2988                 return err;
2989         return simple_hdmi_build_jack(codec, 0);
2990 }
2991
2992 static int simple_playback_init(struct hda_codec *codec)
2993 {
2994         struct hdmi_spec *spec = codec->spec;
2995         struct hdmi_spec_per_pin *per_pin = get_pin(spec, 0);
2996         hda_nid_t pin = per_pin->pin_nid;
2997
2998         snd_hda_codec_write(codec, pin, 0,
2999                             AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
3000         /* some codecs require to unmute the pin */
3001         if (get_wcaps(codec, pin) & AC_WCAP_OUT_AMP)
3002                 snd_hda_codec_write(codec, pin, 0, AC_VERB_SET_AMP_GAIN_MUTE,
3003                                     AMP_OUT_UNMUTE);
3004         snd_hda_jack_detect_enable(codec, pin, per_pin->dev_id);
3005         return 0;
3006 }
3007
3008 static void simple_playback_free(struct hda_codec *codec)
3009 {
3010         struct hdmi_spec *spec = codec->spec;
3011
3012         hdmi_array_free(spec);
3013         kfree(spec);
3014 }
3015
3016 /*
3017  * Nvidia specific implementations
3018  */
3019
3020 #define Nv_VERB_SET_Channel_Allocation          0xF79
3021 #define Nv_VERB_SET_Info_Frame_Checksum         0xF7A
3022 #define Nv_VERB_SET_Audio_Protection_On         0xF98
3023 #define Nv_VERB_SET_Audio_Protection_Off        0xF99
3024
3025 #define nvhdmi_master_con_nid_7x        0x04
3026 #define nvhdmi_master_pin_nid_7x        0x05
3027
3028 static const hda_nid_t nvhdmi_con_nids_7x[4] = {
3029         /*front, rear, clfe, rear_surr */
3030         0x6, 0x8, 0xa, 0xc,
3031 };
3032
3033 static const struct hda_verb nvhdmi_basic_init_7x_2ch[] = {
3034         /* set audio protect on */
3035         { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
3036         /* enable digital output on pin widget */
3037         { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3038         {} /* terminator */
3039 };
3040
3041 static const struct hda_verb nvhdmi_basic_init_7x_8ch[] = {
3042         /* set audio protect on */
3043         { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
3044         /* enable digital output on pin widget */
3045         { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3046         { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3047         { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3048         { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3049         { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3050         {} /* terminator */
3051 };
3052
3053 #ifdef LIMITED_RATE_FMT_SUPPORT
3054 /* support only the safe format and rate */
3055 #define SUPPORTED_RATES         SNDRV_PCM_RATE_48000
3056 #define SUPPORTED_MAXBPS        16
3057 #define SUPPORTED_FORMATS       SNDRV_PCM_FMTBIT_S16_LE
3058 #else
3059 /* support all rates and formats */
3060 #define SUPPORTED_RATES \
3061         (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
3062         SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
3063          SNDRV_PCM_RATE_192000)
3064 #define SUPPORTED_MAXBPS        24
3065 #define SUPPORTED_FORMATS \
3066         (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
3067 #endif
3068
3069 static int nvhdmi_7x_init_2ch(struct hda_codec *codec)
3070 {
3071         snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_2ch);
3072         return 0;
3073 }
3074
3075 static int nvhdmi_7x_init_8ch(struct hda_codec *codec)
3076 {
3077         snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_8ch);
3078         return 0;
3079 }
3080
3081 static const unsigned int channels_2_6_8[] = {
3082         2, 6, 8
3083 };
3084
3085 static const unsigned int channels_2_8[] = {
3086         2, 8
3087 };
3088
3089 static const struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels = {
3090         .count = ARRAY_SIZE(channels_2_6_8),
3091         .list = channels_2_6_8,
3092         .mask = 0,
3093 };
3094
3095 static const struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels = {
3096         .count = ARRAY_SIZE(channels_2_8),
3097         .list = channels_2_8,
3098         .mask = 0,
3099 };
3100
3101 static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo,
3102                                     struct hda_codec *codec,
3103                                     struct snd_pcm_substream *substream)
3104 {
3105         struct hdmi_spec *spec = codec->spec;
3106         const struct snd_pcm_hw_constraint_list *hw_constraints_channels = NULL;
3107
3108         switch (codec->preset->vendor_id) {
3109         case 0x10de0002:
3110         case 0x10de0003:
3111         case 0x10de0005:
3112         case 0x10de0006:
3113                 hw_constraints_channels = &hw_constraints_2_8_channels;
3114                 break;
3115         case 0x10de0007:
3116                 hw_constraints_channels = &hw_constraints_2_6_8_channels;
3117                 break;
3118         default:
3119                 break;
3120         }
3121
3122         if (hw_constraints_channels != NULL) {
3123                 snd_pcm_hw_constraint_list(substream->runtime, 0,
3124                                 SNDRV_PCM_HW_PARAM_CHANNELS,
3125                                 hw_constraints_channels);
3126         } else {
3127                 snd_pcm_hw_constraint_step(substream->runtime, 0,
3128                                            SNDRV_PCM_HW_PARAM_CHANNELS, 2);
3129         }
3130
3131         return snd_hda_multi_out_dig_open(codec, &spec->multiout);
3132 }
3133
3134 static int simple_playback_pcm_close(struct hda_pcm_stream *hinfo,
3135                                      struct hda_codec *codec,
3136                                      struct snd_pcm_substream *substream)
3137 {
3138         struct hdmi_spec *spec = codec->spec;
3139         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
3140 }
3141
3142 static int simple_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
3143                                        struct hda_codec *codec,
3144                                        unsigned int stream_tag,
3145                                        unsigned int format,
3146                                        struct snd_pcm_substream *substream)
3147 {
3148         struct hdmi_spec *spec = codec->spec;
3149         return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
3150                                              stream_tag, format, substream);
3151 }
3152
3153 static const struct hda_pcm_stream simple_pcm_playback = {
3154         .substreams = 1,
3155         .channels_min = 2,
3156         .channels_max = 2,
3157         .ops = {
3158                 .open = simple_playback_pcm_open,
3159                 .close = simple_playback_pcm_close,
3160                 .prepare = simple_playback_pcm_prepare
3161         },
3162 };
3163
3164 static const struct hda_codec_ops simple_hdmi_patch_ops = {
3165         .build_controls = simple_playback_build_controls,
3166         .build_pcms = simple_playback_build_pcms,
3167         .init = simple_playback_init,
3168         .free = simple_playback_free,
3169         .unsol_event = simple_hdmi_unsol_event,
3170 };
3171
3172 static int patch_simple_hdmi(struct hda_codec *codec,
3173                              hda_nid_t cvt_nid, hda_nid_t pin_nid)
3174 {
3175         struct hdmi_spec *spec;
3176         struct hdmi_spec_per_cvt *per_cvt;
3177         struct hdmi_spec_per_pin *per_pin;
3178
3179         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3180         if (!spec)
3181                 return -ENOMEM;
3182
3183         spec->codec = codec;
3184         codec->spec = spec;
3185         hdmi_array_init(spec, 1);
3186
3187         spec->multiout.num_dacs = 0;  /* no analog */
3188         spec->multiout.max_channels = 2;
3189         spec->multiout.dig_out_nid = cvt_nid;
3190         spec->num_cvts = 1;
3191         spec->num_pins = 1;
3192         per_pin = snd_array_new(&spec->pins);
3193         per_cvt = snd_array_new(&spec->cvts);
3194         if (!per_pin || !per_cvt) {
3195                 simple_playback_free(codec);
3196                 return -ENOMEM;
3197         }
3198         per_cvt->cvt_nid = cvt_nid;
3199         per_pin->pin_nid = pin_nid;
3200         spec->pcm_playback = simple_pcm_playback;
3201
3202         codec->patch_ops = simple_hdmi_patch_ops;
3203
3204         return 0;
3205 }
3206
3207 static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec *codec,
3208                                                     int channels)
3209 {
3210         unsigned int chanmask;
3211         int chan = channels ? (channels - 1) : 1;
3212
3213         switch (channels) {
3214         default:
3215         case 0:
3216         case 2:
3217                 chanmask = 0x00;
3218                 break;
3219         case 4:
3220                 chanmask = 0x08;
3221                 break;
3222         case 6:
3223                 chanmask = 0x0b;
3224                 break;
3225         case 8:
3226                 chanmask = 0x13;
3227                 break;
3228         }
3229
3230         /* Set the audio infoframe channel allocation and checksum fields.  The
3231          * channel count is computed implicitly by the hardware. */
3232         snd_hda_codec_write(codec, 0x1, 0,
3233                         Nv_VERB_SET_Channel_Allocation, chanmask);
3234
3235         snd_hda_codec_write(codec, 0x1, 0,
3236                         Nv_VERB_SET_Info_Frame_Checksum,
3237                         (0x71 - chan - chanmask));
3238 }
3239
3240 static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream *hinfo,
3241                                    struct hda_codec *codec,
3242                                    struct snd_pcm_substream *substream)
3243 {
3244         struct hdmi_spec *spec = codec->spec;
3245         int i;
3246
3247         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x,
3248                         0, AC_VERB_SET_CHANNEL_STREAMID, 0);
3249         for (i = 0; i < 4; i++) {
3250                 /* set the stream id */
3251                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
3252                                 AC_VERB_SET_CHANNEL_STREAMID, 0);
3253                 /* set the stream format */
3254                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
3255                                 AC_VERB_SET_STREAM_FORMAT, 0);
3256         }
3257
3258         /* The audio hardware sends a channel count of 0x7 (8ch) when all the
3259          * streams are disabled. */
3260         nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
3261
3262         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
3263 }
3264
3265 static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream *hinfo,
3266                                      struct hda_codec *codec,
3267                                      unsigned int stream_tag,
3268                                      unsigned int format,
3269                                      struct snd_pcm_substream *substream)
3270 {
3271         int chs;
3272         unsigned int dataDCC2, channel_id;
3273         int i;
3274         struct hdmi_spec *spec = codec->spec;
3275         struct hda_spdif_out *spdif;
3276         struct hdmi_spec_per_cvt *per_cvt;
3277
3278         mutex_lock(&codec->spdif_mutex);
3279         per_cvt = get_cvt(spec, 0);
3280         spdif = snd_hda_spdif_out_of_nid(codec, per_cvt->cvt_nid);
3281
3282         chs = substream->runtime->channels;
3283
3284         dataDCC2 = 0x2;
3285
3286         /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
3287         if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE))
3288                 snd_hda_codec_write(codec,
3289                                 nvhdmi_master_con_nid_7x,
3290                                 0,
3291                                 AC_VERB_SET_DIGI_CONVERT_1,
3292                                 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
3293
3294         /* set the stream id */
3295         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
3296                         AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0);
3297
3298         /* set the stream format */
3299         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
3300                         AC_VERB_SET_STREAM_FORMAT, format);
3301
3302         /* turn on again (if needed) */
3303         /* enable and set the channel status audio/data flag */
3304         if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) {
3305                 snd_hda_codec_write(codec,
3306                                 nvhdmi_master_con_nid_7x,
3307                                 0,
3308                                 AC_VERB_SET_DIGI_CONVERT_1,
3309                                 spdif->ctls & 0xff);
3310                 snd_hda_codec_write(codec,
3311                                 nvhdmi_master_con_nid_7x,
3312                                 0,
3313                                 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
3314         }
3315
3316         for (i = 0; i < 4; i++) {
3317                 if (chs == 2)
3318                         channel_id = 0;
3319                 else
3320                         channel_id = i * 2;
3321
3322                 /* turn off SPDIF once;
3323                  *otherwise the IEC958 bits won't be updated
3324                  */
3325                 if (codec->spdif_status_reset &&
3326                 (spdif->ctls & AC_DIG1_ENABLE))
3327                         snd_hda_codec_write(codec,
3328                                 nvhdmi_con_nids_7x[i],
3329                                 0,
3330                                 AC_VERB_SET_DIGI_CONVERT_1,
3331                                 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
3332                 /* set the stream id */
3333                 snd_hda_codec_write(codec,
3334                                 nvhdmi_con_nids_7x[i],
3335                                 0,
3336                                 AC_VERB_SET_CHANNEL_STREAMID,
3337                                 (stream_tag << 4) | channel_id);
3338                 /* set the stream format */
3339                 snd_hda_codec_write(codec,
3340                                 nvhdmi_con_nids_7x[i],
3341                                 0,
3342                                 AC_VERB_SET_STREAM_FORMAT,
3343                                 format);
3344                 /* turn on again (if needed) */
3345                 /* enable and set the channel status audio/data flag */
3346                 if (codec->spdif_status_reset &&
3347                 (spdif->ctls & AC_DIG1_ENABLE)) {
3348                         snd_hda_codec_write(codec,
3349                                         nvhdmi_con_nids_7x[i],
3350                                         0,
3351                                         AC_VERB_SET_DIGI_CONVERT_1,
3352                                         spdif->ctls & 0xff);
3353                         snd_hda_codec_write(codec,
3354                                         nvhdmi_con_nids_7x[i],
3355                                         0,
3356                                         AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
3357                 }
3358         }
3359
3360         nvhdmi_8ch_7x_set_info_frame_parameters(codec, chs);
3361
3362         mutex_unlock(&codec->spdif_mutex);
3363         return 0;
3364 }
3365
3366 static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x = {
3367         .substreams = 1,
3368         .channels_min = 2,
3369         .channels_max = 8,
3370         .nid = nvhdmi_master_con_nid_7x,
3371         .rates = SUPPORTED_RATES,
3372         .maxbps = SUPPORTED_MAXBPS,
3373         .formats = SUPPORTED_FORMATS,
3374         .ops = {
3375                 .open = simple_playback_pcm_open,
3376                 .close = nvhdmi_8ch_7x_pcm_close,
3377                 .prepare = nvhdmi_8ch_7x_pcm_prepare
3378         },
3379 };
3380
3381 static int patch_nvhdmi_2ch(struct hda_codec *codec)
3382 {
3383         struct hdmi_spec *spec;
3384         int err = patch_simple_hdmi(codec, nvhdmi_master_con_nid_7x,
3385                                     nvhdmi_master_pin_nid_7x);
3386         if (err < 0)
3387                 return err;
3388
3389         codec->patch_ops.init = nvhdmi_7x_init_2ch;
3390         /* override the PCM rates, etc, as the codec doesn't give full list */
3391         spec = codec->spec;
3392         spec->pcm_playback.rates = SUPPORTED_RATES;
3393         spec->pcm_playback.maxbps = SUPPORTED_MAXBPS;
3394         spec->pcm_playback.formats = SUPPORTED_FORMATS;
3395         return 0;
3396 }
3397
3398 static int nvhdmi_7x_8ch_build_pcms(struct hda_codec *codec)
3399 {
3400         struct hdmi_spec *spec = codec->spec;
3401         int err = simple_playback_build_pcms(codec);
3402         if (!err) {
3403                 struct hda_pcm *info = get_pcm_rec(spec, 0);
3404                 info->own_chmap = true;
3405         }
3406         return err;
3407 }
3408
3409 static int nvhdmi_7x_8ch_build_controls(struct hda_codec *codec)
3410 {
3411         struct hdmi_spec *spec = codec->spec;
3412         struct hda_pcm *info;
3413         struct snd_pcm_chmap *chmap;
3414         int err;
3415
3416         err = simple_playback_build_controls(codec);
3417         if (err < 0)
3418                 return err;
3419
3420         /* add channel maps */
3421         info = get_pcm_rec(spec, 0);
3422         err = snd_pcm_add_chmap_ctls(info->pcm,
3423                                      SNDRV_PCM_STREAM_PLAYBACK,
3424                                      snd_pcm_alt_chmaps, 8, 0, &chmap);
3425         if (err < 0)
3426                 return err;
3427         switch (codec->preset->vendor_id) {
3428         case 0x10de0002:
3429         case 0x10de0003:
3430         case 0x10de0005:
3431         case 0x10de0006:
3432                 chmap->channel_mask = (1U << 2) | (1U << 8);
3433                 break;
3434         case 0x10de0007:
3435                 chmap->channel_mask = (1U << 2) | (1U << 6) | (1U << 8);
3436         }
3437         return 0;
3438 }
3439
3440 static int patch_nvhdmi_8ch_7x(struct hda_codec *codec)
3441 {
3442         struct hdmi_spec *spec;
3443         int err = patch_nvhdmi_2ch(codec);
3444         if (err < 0)
3445                 return err;
3446         spec = codec->spec;
3447         spec->multiout.max_channels = 8;
3448         spec->pcm_playback = nvhdmi_pcm_playback_8ch_7x;
3449         codec->patch_ops.init = nvhdmi_7x_init_8ch;
3450         codec->patch_ops.build_pcms = nvhdmi_7x_8ch_build_pcms;
3451         codec->patch_ops.build_controls = nvhdmi_7x_8ch_build_controls;
3452
3453         /* Initialize the audio infoframe channel mask and checksum to something
3454          * valid */
3455         nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
3456
3457         return 0;
3458 }
3459
3460 /*
3461  * NVIDIA codecs ignore ASP mapping for 2ch - confirmed on:
3462  * - 0x10de0015
3463  * - 0x10de0040
3464  */
3465 static int nvhdmi_chmap_cea_alloc_validate_get_type(struct hdac_chmap *chmap,
3466                 struct hdac_cea_channel_speaker_allocation *cap, int channels)
3467 {
3468         if (cap->ca_index == 0x00 && channels == 2)
3469                 return SNDRV_CTL_TLVT_CHMAP_FIXED;
3470
3471         /* If the speaker allocation matches the channel count, it is OK. */
3472         if (cap->channels != channels)
3473                 return -1;
3474
3475         /* all channels are remappable freely */
3476         return SNDRV_CTL_TLVT_CHMAP_VAR;
3477 }
3478
3479 static int nvhdmi_chmap_validate(struct hdac_chmap *chmap,
3480                 int ca, int chs, unsigned char *map)
3481 {
3482         if (ca == 0x00 && (map[0] != SNDRV_CHMAP_FL || map[1] != SNDRV_CHMAP_FR))
3483                 return -EINVAL;
3484
3485         return 0;
3486 }
3487
3488 /* map from pin NID to port; port is 0-based */
3489 /* for Nvidia: assume widget NID starting from 4, with step 1 (4, 5, 6, ...) */
3490 static int nvhdmi_pin2port(void *audio_ptr, int pin_nid)
3491 {
3492         return pin_nid - 4;
3493 }
3494
3495 /* reverse-map from port to pin NID: see above */
3496 static int nvhdmi_port2pin(struct hda_codec *codec, int port)
3497 {
3498         return port + 4;
3499 }
3500
3501 static const struct drm_audio_component_audio_ops nvhdmi_audio_ops = {
3502         .pin2port = nvhdmi_pin2port,
3503         .pin_eld_notify = generic_acomp_pin_eld_notify,
3504         .master_bind = generic_acomp_master_bind,
3505         .master_unbind = generic_acomp_master_unbind,
3506 };
3507
3508 static int patch_nvhdmi(struct hda_codec *codec)
3509 {
3510         struct hdmi_spec *spec;
3511         int err;
3512
3513         err = patch_generic_hdmi(codec);
3514         if (err)
3515                 return err;
3516
3517         spec = codec->spec;
3518         spec->dyn_pin_out = true;
3519
3520         spec->chmap.ops.chmap_cea_alloc_validate_get_type =
3521                 nvhdmi_chmap_cea_alloc_validate_get_type;
3522         spec->chmap.ops.chmap_validate = nvhdmi_chmap_validate;
3523
3524         codec->link_down_at_suspend = 1;
3525
3526         generic_acomp_init(codec, &nvhdmi_audio_ops, nvhdmi_port2pin);
3527
3528         return 0;
3529 }
3530
3531 /*
3532  * The HDA codec on NVIDIA Tegra contains two scratch registers that are
3533  * accessed using vendor-defined verbs. These registers can be used for
3534  * interoperability between the HDA and HDMI drivers.
3535  */
3536
3537 /* Audio Function Group node */
3538 #define NVIDIA_AFG_NID 0x01
3539
3540 /*
3541  * The SCRATCH0 register is used to notify the HDMI codec of changes in audio
3542  * format. On Tegra, bit 31 is used as a trigger that causes an interrupt to
3543  * be raised in the HDMI codec. The remainder of the bits is arbitrary. This
3544  * implementation stores the HDA format (see AC_FMT_*) in bits [15:0] and an
3545  * additional bit (at position 30) to signal the validity of the format.
3546  *
3547  * | 31      | 30    | 29  16 | 15   0 |
3548  * +---------+-------+--------+--------+
3549  * | TRIGGER | VALID | UNUSED | FORMAT |
3550  * +-----------------------------------|
3551  *
3552  * Note that for the trigger bit to take effect it needs to change value
3553  * (i.e. it needs to be toggled).
3554  */
3555 #define NVIDIA_GET_SCRATCH0             0xfa6
3556 #define NVIDIA_SET_SCRATCH0_BYTE0       0xfa7
3557 #define NVIDIA_SET_SCRATCH0_BYTE1       0xfa8
3558 #define NVIDIA_SET_SCRATCH0_BYTE2       0xfa9
3559 #define NVIDIA_SET_SCRATCH0_BYTE3       0xfaa
3560 #define NVIDIA_SCRATCH_TRIGGER (1 << 7)
3561 #define NVIDIA_SCRATCH_VALID   (1 << 6)
3562
3563 #define NVIDIA_GET_SCRATCH1             0xfab
3564 #define NVIDIA_SET_SCRATCH1_BYTE0       0xfac
3565 #define NVIDIA_SET_SCRATCH1_BYTE1       0xfad
3566 #define NVIDIA_SET_SCRATCH1_BYTE2       0xfae
3567 #define NVIDIA_SET_SCRATCH1_BYTE3       0xfaf
3568
3569 /*
3570  * The format parameter is the HDA audio format (see AC_FMT_*). If set to 0,
3571  * the format is invalidated so that the HDMI codec can be disabled.
3572  */
3573 static void tegra_hdmi_set_format(struct hda_codec *codec, unsigned int format)
3574 {
3575         unsigned int value;
3576
3577         /* bits [31:30] contain the trigger and valid bits */
3578         value = snd_hda_codec_read(codec, NVIDIA_AFG_NID, 0,
3579                                    NVIDIA_GET_SCRATCH0, 0);
3580         value = (value >> 24) & 0xff;
3581
3582         /* bits [15:0] are used to store the HDA format */
3583         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3584                             NVIDIA_SET_SCRATCH0_BYTE0,
3585                             (format >> 0) & 0xff);
3586         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3587                             NVIDIA_SET_SCRATCH0_BYTE1,
3588                             (format >> 8) & 0xff);
3589
3590         /* bits [16:24] are unused */
3591         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3592                             NVIDIA_SET_SCRATCH0_BYTE2, 0);
3593
3594         /*
3595          * Bit 30 signals that the data is valid and hence that HDMI audio can
3596          * be enabled.
3597          */
3598         if (format == 0)
3599                 value &= ~NVIDIA_SCRATCH_VALID;
3600         else
3601                 value |= NVIDIA_SCRATCH_VALID;
3602
3603         /*
3604          * Whenever the trigger bit is toggled, an interrupt is raised in the
3605          * HDMI codec. The HDMI driver will use that as trigger to update its
3606          * configuration.
3607          */
3608         value ^= NVIDIA_SCRATCH_TRIGGER;
3609
3610         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3611                             NVIDIA_SET_SCRATCH0_BYTE3, value);
3612 }
3613
3614 static int tegra_hdmi_pcm_prepare(struct hda_pcm_stream *hinfo,
3615                                   struct hda_codec *codec,
3616                                   unsigned int stream_tag,
3617                                   unsigned int format,
3618                                   struct snd_pcm_substream *substream)
3619 {
3620         int err;
3621
3622         err = generic_hdmi_playback_pcm_prepare(hinfo, codec, stream_tag,
3623                                                 format, substream);
3624         if (err < 0)
3625                 return err;
3626
3627         /* notify the HDMI codec of the format change */
3628         tegra_hdmi_set_format(codec, format);
3629
3630         return 0;
3631 }
3632
3633 static int tegra_hdmi_pcm_cleanup(struct hda_pcm_stream *hinfo,
3634                                   struct hda_codec *codec,
3635                                   struct snd_pcm_substream *substream)
3636 {
3637         /* invalidate the format in the HDMI codec */
3638         tegra_hdmi_set_format(codec, 0);
3639
3640         return generic_hdmi_playback_pcm_cleanup(hinfo, codec, substream);
3641 }
3642
3643 static struct hda_pcm *hda_find_pcm_by_type(struct hda_codec *codec, int type)
3644 {
3645         struct hdmi_spec *spec = codec->spec;
3646         unsigned int i;
3647
3648         for (i = 0; i < spec->num_pins; i++) {
3649                 struct hda_pcm *pcm = get_pcm_rec(spec, i);
3650
3651                 if (pcm->pcm_type == type)
3652                         return pcm;
3653         }
3654
3655         return NULL;
3656 }
3657
3658 static int tegra_hdmi_build_pcms(struct hda_codec *codec)
3659 {
3660         struct hda_pcm_stream *stream;
3661         struct hda_pcm *pcm;
3662         int err;
3663
3664         err = generic_hdmi_build_pcms(codec);
3665         if (err < 0)
3666                 return err;
3667
3668         pcm = hda_find_pcm_by_type(codec, HDA_PCM_TYPE_HDMI);
3669         if (!pcm)
3670                 return -ENODEV;
3671
3672         /*
3673          * Override ->prepare() and ->cleanup() operations to notify the HDMI
3674          * codec about format changes.
3675          */
3676         stream = &pcm->stream[SNDRV_PCM_STREAM_PLAYBACK];
3677         stream->ops.prepare = tegra_hdmi_pcm_prepare;
3678         stream->ops.cleanup = tegra_hdmi_pcm_cleanup;
3679
3680         return 0;
3681 }
3682
3683 static int patch_tegra_hdmi(struct hda_codec *codec)
3684 {
3685         int err;
3686
3687         err = patch_generic_hdmi(codec);
3688         if (err)
3689                 return err;
3690
3691         codec->patch_ops.build_pcms = tegra_hdmi_build_pcms;
3692
3693         return 0;
3694 }
3695
3696 /*
3697  * ATI/AMD-specific implementations
3698  */
3699
3700 #define is_amdhdmi_rev3_or_later(codec) \
3701         ((codec)->core.vendor_id == 0x1002aa01 && \
3702          ((codec)->core.revision_id & 0xff00) >= 0x0300)
3703 #define has_amd_full_remap_support(codec) is_amdhdmi_rev3_or_later(codec)
3704
3705 /* ATI/AMD specific HDA pin verbs, see the AMD HDA Verbs specification */
3706 #define ATI_VERB_SET_CHANNEL_ALLOCATION 0x771
3707 #define ATI_VERB_SET_DOWNMIX_INFO       0x772
3708 #define ATI_VERB_SET_MULTICHANNEL_01    0x777
3709 #define ATI_VERB_SET_MULTICHANNEL_23    0x778
3710 #define ATI_VERB_SET_MULTICHANNEL_45    0x779
3711 #define ATI_VERB_SET_MULTICHANNEL_67    0x77a
3712 #define ATI_VERB_SET_HBR_CONTROL        0x77c
3713 #define ATI_VERB_SET_MULTICHANNEL_1     0x785
3714 #define ATI_VERB_SET_MULTICHANNEL_3     0x786
3715 #define ATI_VERB_SET_MULTICHANNEL_5     0x787
3716 #define ATI_VERB_SET_MULTICHANNEL_7     0x788
3717 #define ATI_VERB_SET_MULTICHANNEL_MODE  0x789
3718 #define ATI_VERB_GET_CHANNEL_ALLOCATION 0xf71
3719 #define ATI_VERB_GET_DOWNMIX_INFO       0xf72
3720 #define ATI_VERB_GET_MULTICHANNEL_01    0xf77
3721 #define ATI_VERB_GET_MULTICHANNEL_23    0xf78
3722 #define ATI_VERB_GET_MULTICHANNEL_45    0xf79
3723 #define ATI_VERB_GET_MULTICHANNEL_67    0xf7a
3724 #define ATI_VERB_GET_HBR_CONTROL        0xf7c
3725 #define ATI_VERB_GET_MULTICHANNEL_1     0xf85
3726 #define ATI_VERB_GET_MULTICHANNEL_3     0xf86
3727 #define ATI_VERB_GET_MULTICHANNEL_5     0xf87
3728 #define ATI_VERB_GET_MULTICHANNEL_7     0xf88
3729 #define ATI_VERB_GET_MULTICHANNEL_MODE  0xf89
3730
3731 /* AMD specific HDA cvt verbs */
3732 #define ATI_VERB_SET_RAMP_RATE          0x770
3733 #define ATI_VERB_GET_RAMP_RATE          0xf70
3734
3735 #define ATI_OUT_ENABLE 0x1
3736
3737 #define ATI_MULTICHANNEL_MODE_PAIRED    0
3738 #define ATI_MULTICHANNEL_MODE_SINGLE    1
3739
3740 #define ATI_HBR_CAPABLE 0x01
3741 #define ATI_HBR_ENABLE 0x10
3742
3743 static int atihdmi_pin_get_eld(struct hda_codec *codec, hda_nid_t nid,
3744                                int dev_id, unsigned char *buf, int *eld_size)
3745 {
3746         WARN_ON(dev_id != 0);
3747         /* call hda_eld.c ATI/AMD-specific function */
3748         return snd_hdmi_get_eld_ati(codec, nid, buf, eld_size,
3749                                     is_amdhdmi_rev3_or_later(codec));
3750 }
3751
3752 static void atihdmi_pin_setup_infoframe(struct hda_codec *codec,
3753                                         hda_nid_t pin_nid, int dev_id, int ca,
3754                                         int active_channels, int conn_type)
3755 {
3756         WARN_ON(dev_id != 0);
3757         snd_hda_codec_write(codec, pin_nid, 0, ATI_VERB_SET_CHANNEL_ALLOCATION, ca);
3758 }
3759
3760 static int atihdmi_paired_swap_fc_lfe(int pos)
3761 {
3762         /*
3763          * ATI/AMD have automatic FC/LFE swap built-in
3764          * when in pairwise mapping mode.
3765          */
3766
3767         switch (pos) {
3768                 /* see channel_allocations[].speakers[] */
3769                 case 2: return 3;
3770                 case 3: return 2;
3771                 default: break;
3772         }
3773
3774         return pos;
3775 }
3776
3777 static int atihdmi_paired_chmap_validate(struct hdac_chmap *chmap,
3778                         int ca, int chs, unsigned char *map)
3779 {
3780         struct hdac_cea_channel_speaker_allocation *cap;
3781         int i, j;
3782
3783         /* check that only channel pairs need to be remapped on old pre-rev3 ATI/AMD */
3784
3785         cap = snd_hdac_get_ch_alloc_from_ca(ca);
3786         for (i = 0; i < chs; ++i) {
3787                 int mask = snd_hdac_chmap_to_spk_mask(map[i]);
3788                 bool ok = false;
3789                 bool companion_ok = false;
3790
3791                 if (!mask)
3792                         continue;
3793
3794                 for (j = 0 + i % 2; j < 8; j += 2) {
3795                         int chan_idx = 7 - atihdmi_paired_swap_fc_lfe(j);
3796                         if (cap->speakers[chan_idx] == mask) {
3797                                 /* channel is in a supported position */
3798                                 ok = true;
3799
3800                                 if (i % 2 == 0 && i + 1 < chs) {
3801                                         /* even channel, check the odd companion */
3802                                         int comp_chan_idx = 7 - atihdmi_paired_swap_fc_lfe(j + 1);
3803                                         int comp_mask_req = snd_hdac_chmap_to_spk_mask(map[i+1]);
3804                                         int comp_mask_act = cap->speakers[comp_chan_idx];
3805
3806                                         if (comp_mask_req == comp_mask_act)
3807                                                 companion_ok = true;
3808                                         else
3809                                                 return -EINVAL;
3810                                 }
3811                                 break;
3812                         }
3813                 }
3814
3815                 if (!ok)
3816                         return -EINVAL;
3817
3818                 if (companion_ok)
3819                         i++; /* companion channel already checked */
3820         }
3821
3822         return 0;
3823 }
3824
3825 static int atihdmi_pin_set_slot_channel(struct hdac_device *hdac,
3826                 hda_nid_t pin_nid, int hdmi_slot, int stream_channel)
3827 {
3828         struct hda_codec *codec = container_of(hdac, struct hda_codec, core);
3829         int verb;
3830         int ati_channel_setup = 0;
3831
3832         if (hdmi_slot > 7)
3833                 return -EINVAL;
3834
3835         if (!has_amd_full_remap_support(codec)) {
3836                 hdmi_slot = atihdmi_paired_swap_fc_lfe(hdmi_slot);
3837
3838                 /* In case this is an odd slot but without stream channel, do not
3839                  * disable the slot since the corresponding even slot could have a
3840                  * channel. In case neither have a channel, the slot pair will be
3841                  * disabled when this function is called for the even slot. */
3842                 if (hdmi_slot % 2 != 0 && stream_channel == 0xf)
3843                         return 0;
3844
3845                 hdmi_slot -= hdmi_slot % 2;
3846
3847                 if (stream_channel != 0xf)
3848                         stream_channel -= stream_channel % 2;
3849         }
3850
3851         verb = ATI_VERB_SET_MULTICHANNEL_01 + hdmi_slot/2 + (hdmi_slot % 2) * 0x00e;
3852
3853         /* ati_channel_setup format: [7..4] = stream_channel_id, [1] = mute, [0] = enable */
3854
3855         if (stream_channel != 0xf)
3856                 ati_channel_setup = (stream_channel << 4) | ATI_OUT_ENABLE;
3857
3858         return snd_hda_codec_write(codec, pin_nid, 0, verb, ati_channel_setup);
3859 }
3860
3861 static int atihdmi_pin_get_slot_channel(struct hdac_device *hdac,
3862                                 hda_nid_t pin_nid, int asp_slot)
3863 {
3864         struct hda_codec *codec = container_of(hdac, struct hda_codec, core);
3865         bool was_odd = false;
3866         int ati_asp_slot = asp_slot;
3867         int verb;
3868         int ati_channel_setup;
3869
3870         if (asp_slot > 7)
3871                 return -EINVAL;
3872
3873         if (!has_amd_full_remap_support(codec)) {
3874                 ati_asp_slot = atihdmi_paired_swap_fc_lfe(asp_slot);
3875                 if (ati_asp_slot % 2 != 0) {
3876                         ati_asp_slot -= 1;
3877                         was_odd = true;
3878                 }
3879         }
3880
3881         verb = ATI_VERB_GET_MULTICHANNEL_01 + ati_asp_slot/2 + (ati_asp_slot % 2) * 0x00e;
3882
3883         ati_channel_setup = snd_hda_codec_read(codec, pin_nid, 0, verb, 0);
3884
3885         if (!(ati_channel_setup & ATI_OUT_ENABLE))
3886                 return 0xf;
3887
3888         return ((ati_channel_setup & 0xf0) >> 4) + !!was_odd;
3889 }
3890
3891 static int atihdmi_paired_chmap_cea_alloc_validate_get_type(
3892                 struct hdac_chmap *chmap,
3893                 struct hdac_cea_channel_speaker_allocation *cap,
3894                 int channels)
3895 {
3896         int c;
3897
3898         /*
3899          * Pre-rev3 ATI/AMD codecs operate in a paired channel mode, so
3900          * we need to take that into account (a single channel may take 2
3901          * channel slots if we need to carry a silent channel next to it).
3902          * On Rev3+ AMD codecs this function is not used.
3903          */
3904         int chanpairs = 0;
3905
3906         /* We only produce even-numbered channel count TLVs */
3907         if ((channels % 2) != 0)
3908                 return -1;
3909
3910         for (c = 0; c < 7; c += 2) {
3911                 if (cap->speakers[c] || cap->speakers[c+1])
3912                         chanpairs++;
3913         }
3914
3915         if (chanpairs * 2 != channels)
3916                 return -1;
3917
3918         return SNDRV_CTL_TLVT_CHMAP_PAIRED;
3919 }
3920
3921 static void atihdmi_paired_cea_alloc_to_tlv_chmap(struct hdac_chmap *hchmap,
3922                 struct hdac_cea_channel_speaker_allocation *cap,
3923                 unsigned int *chmap, int channels)
3924 {
3925         /* produce paired maps for pre-rev3 ATI/AMD codecs */
3926         int count = 0;
3927         int c;
3928
3929         for (c = 7; c >= 0; c--) {
3930                 int chan = 7 - atihdmi_paired_swap_fc_lfe(7 - c);
3931                 int spk = cap->speakers[chan];
3932                 if (!spk) {
3933                         /* add N/A channel if the companion channel is occupied */
3934                         if (cap->speakers[chan + (chan % 2 ? -1 : 1)])
3935                                 chmap[count++] = SNDRV_CHMAP_NA;
3936
3937                         continue;
3938                 }
3939
3940                 chmap[count++] = snd_hdac_spk_to_chmap(spk);
3941         }
3942
3943         WARN_ON(count != channels);
3944 }
3945
3946 static int atihdmi_pin_hbr_setup(struct hda_codec *codec, hda_nid_t pin_nid,
3947                                  int dev_id, bool hbr)
3948 {
3949         int hbr_ctl, hbr_ctl_new;
3950
3951         WARN_ON(dev_id != 0);
3952
3953         hbr_ctl = snd_hda_codec_read(codec, pin_nid, 0, ATI_VERB_GET_HBR_CONTROL, 0);
3954         if (hbr_ctl >= 0 && (hbr_ctl & ATI_HBR_CAPABLE)) {
3955                 if (hbr)
3956                         hbr_ctl_new = hbr_ctl | ATI_HBR_ENABLE;
3957                 else
3958                         hbr_ctl_new = hbr_ctl & ~ATI_HBR_ENABLE;
3959
3960                 codec_dbg(codec,
3961                           "atihdmi_pin_hbr_setup: NID=0x%x, %shbr-ctl=0x%x\n",
3962                                 pin_nid,
3963                                 hbr_ctl == hbr_ctl_new ? "" : "new-",
3964                                 hbr_ctl_new);
3965
3966                 if (hbr_ctl != hbr_ctl_new)
3967                         snd_hda_codec_write(codec, pin_nid, 0,
3968                                                 ATI_VERB_SET_HBR_CONTROL,
3969                                                 hbr_ctl_new);
3970
3971         } else if (hbr)
3972                 return -EINVAL;
3973
3974         return 0;
3975 }
3976
3977 static int atihdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
3978                                 hda_nid_t pin_nid, int dev_id,
3979                                 u32 stream_tag, int format)
3980 {
3981         if (is_amdhdmi_rev3_or_later(codec)) {
3982                 int ramp_rate = 180; /* default as per AMD spec */
3983                 /* disable ramp-up/down for non-pcm as per AMD spec */
3984                 if (format & AC_FMT_TYPE_NON_PCM)
3985                         ramp_rate = 0;
3986
3987                 snd_hda_codec_write(codec, cvt_nid, 0, ATI_VERB_SET_RAMP_RATE, ramp_rate);
3988         }
3989
3990         return hdmi_setup_stream(codec, cvt_nid, pin_nid, dev_id,
3991                                  stream_tag, format);
3992 }
3993
3994
3995 static int atihdmi_init(struct hda_codec *codec)
3996 {
3997         struct hdmi_spec *spec = codec->spec;
3998         int pin_idx, err;
3999
4000         err = generic_hdmi_init(codec);
4001
4002         if (err)
4003                 return err;
4004
4005         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
4006                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
4007
4008                 /* make sure downmix information in infoframe is zero */
4009                 snd_hda_codec_write(codec, per_pin->pin_nid, 0, ATI_VERB_SET_DOWNMIX_INFO, 0);
4010
4011                 /* enable channel-wise remap mode if supported */
4012                 if (has_amd_full_remap_support(codec))
4013                         snd_hda_codec_write(codec, per_pin->pin_nid, 0,
4014                                             ATI_VERB_SET_MULTICHANNEL_MODE,
4015                                             ATI_MULTICHANNEL_MODE_SINGLE);
4016         }
4017
4018         return 0;
4019 }
4020
4021 /* map from pin NID to port; port is 0-based */
4022 /* for AMD: assume widget NID starting from 3, with step 2 (3, 5, 7, ...) */
4023 static int atihdmi_pin2port(void *audio_ptr, int pin_nid)
4024 {
4025         return pin_nid / 2 - 1;
4026 }
4027
4028 /* reverse-map from port to pin NID: see above */
4029 static int atihdmi_port2pin(struct hda_codec *codec, int port)
4030 {
4031         return port * 2 + 3;
4032 }
4033
4034 static const struct drm_audio_component_audio_ops atihdmi_audio_ops = {
4035         .pin2port = atihdmi_pin2port,
4036         .pin_eld_notify = generic_acomp_pin_eld_notify,
4037         .master_bind = generic_acomp_master_bind,
4038         .master_unbind = generic_acomp_master_unbind,
4039 };
4040
4041 static int patch_atihdmi(struct hda_codec *codec)
4042 {
4043         struct hdmi_spec *spec;
4044         struct hdmi_spec_per_cvt *per_cvt;
4045         int err, cvt_idx;
4046
4047         err = patch_generic_hdmi(codec);
4048
4049         if (err)
4050                 return err;
4051
4052         codec->patch_ops.init = atihdmi_init;
4053
4054         spec = codec->spec;
4055
4056         spec->ops.pin_get_eld = atihdmi_pin_get_eld;
4057         spec->ops.pin_setup_infoframe = atihdmi_pin_setup_infoframe;
4058         spec->ops.pin_hbr_setup = atihdmi_pin_hbr_setup;
4059         spec->ops.setup_stream = atihdmi_setup_stream;
4060
4061         spec->chmap.ops.pin_get_slot_channel = atihdmi_pin_get_slot_channel;
4062         spec->chmap.ops.pin_set_slot_channel = atihdmi_pin_set_slot_channel;
4063
4064         if (!has_amd_full_remap_support(codec)) {
4065                 /* override to ATI/AMD-specific versions with pairwise mapping */
4066                 spec->chmap.ops.chmap_cea_alloc_validate_get_type =
4067                         atihdmi_paired_chmap_cea_alloc_validate_get_type;
4068                 spec->chmap.ops.cea_alloc_to_tlv_chmap =
4069                                 atihdmi_paired_cea_alloc_to_tlv_chmap;
4070                 spec->chmap.ops.chmap_validate = atihdmi_paired_chmap_validate;
4071         }
4072
4073         /* ATI/AMD converters do not advertise all of their capabilities */
4074         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
4075                 per_cvt = get_cvt(spec, cvt_idx);
4076                 per_cvt->channels_max = max(per_cvt->channels_max, 8u);
4077                 per_cvt->rates |= SUPPORTED_RATES;
4078                 per_cvt->formats |= SUPPORTED_FORMATS;
4079                 per_cvt->maxbps = max(per_cvt->maxbps, 24u);
4080         }
4081
4082         spec->chmap.channels_max = max(spec->chmap.channels_max, 8u);
4083
4084         /* AMD GPUs have neither EPSS nor CLKSTOP bits, hence preventing
4085          * the link-down as is.  Tell the core to allow it.
4086          */
4087         codec->link_down_at_suspend = 1;
4088
4089         generic_acomp_init(codec, &atihdmi_audio_ops, atihdmi_port2pin);
4090
4091         return 0;
4092 }
4093
4094 /* VIA HDMI Implementation */
4095 #define VIAHDMI_CVT_NID 0x02    /* audio converter1 */
4096 #define VIAHDMI_PIN_NID 0x03    /* HDMI output pin1 */
4097
4098 static int patch_via_hdmi(struct hda_codec *codec)
4099 {
4100         return patch_simple_hdmi(codec, VIAHDMI_CVT_NID, VIAHDMI_PIN_NID);
4101 }
4102
4103 /*
4104  * patch entries
4105  */
4106 static const struct hda_device_id snd_hda_id_hdmi[] = {
4107 HDA_CODEC_ENTRY(0x1002793c, "RS600 HDMI",       patch_atihdmi),
4108 HDA_CODEC_ENTRY(0x10027919, "RS600 HDMI",       patch_atihdmi),
4109 HDA_CODEC_ENTRY(0x1002791a, "RS690/780 HDMI",   patch_atihdmi),
4110 HDA_CODEC_ENTRY(0x1002aa01, "R6xx HDMI",        patch_atihdmi),
4111 HDA_CODEC_ENTRY(0x10951390, "SiI1390 HDMI",     patch_generic_hdmi),
4112 HDA_CODEC_ENTRY(0x10951392, "SiI1392 HDMI",     patch_generic_hdmi),
4113 HDA_CODEC_ENTRY(0x17e80047, "Chrontel HDMI",    patch_generic_hdmi),
4114 HDA_CODEC_ENTRY(0x10de0001, "MCP73 HDMI",       patch_nvhdmi_2ch),
4115 HDA_CODEC_ENTRY(0x10de0002, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
4116 HDA_CODEC_ENTRY(0x10de0003, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
4117 HDA_CODEC_ENTRY(0x10de0004, "GPU 04 HDMI",      patch_nvhdmi_8ch_7x),
4118 HDA_CODEC_ENTRY(0x10de0005, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
4119 HDA_CODEC_ENTRY(0x10de0006, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
4120 HDA_CODEC_ENTRY(0x10de0007, "MCP79/7A HDMI",    patch_nvhdmi_8ch_7x),
4121 HDA_CODEC_ENTRY(0x10de0008, "GPU 08 HDMI/DP",   patch_nvhdmi),
4122 HDA_CODEC_ENTRY(0x10de0009, "GPU 09 HDMI/DP",   patch_nvhdmi),
4123 HDA_CODEC_ENTRY(0x10de000a, "GPU 0a HDMI/DP",   patch_nvhdmi),
4124 HDA_CODEC_ENTRY(0x10de000b, "GPU 0b HDMI/DP",   patch_nvhdmi),
4125 HDA_CODEC_ENTRY(0x10de000c, "MCP89 HDMI",       patch_nvhdmi),
4126 HDA_CODEC_ENTRY(0x10de000d, "GPU 0d HDMI/DP",   patch_nvhdmi),
4127 HDA_CODEC_ENTRY(0x10de0010, "GPU 10 HDMI/DP",   patch_nvhdmi),
4128 HDA_CODEC_ENTRY(0x10de0011, "GPU 11 HDMI/DP",   patch_nvhdmi),
4129 HDA_CODEC_ENTRY(0x10de0012, "GPU 12 HDMI/DP",   patch_nvhdmi),
4130 HDA_CODEC_ENTRY(0x10de0013, "GPU 13 HDMI/DP",   patch_nvhdmi),
4131 HDA_CODEC_ENTRY(0x10de0014, "GPU 14 HDMI/DP",   patch_nvhdmi),
4132 HDA_CODEC_ENTRY(0x10de0015, "GPU 15 HDMI/DP",   patch_nvhdmi),
4133 HDA_CODEC_ENTRY(0x10de0016, "GPU 16 HDMI/DP",   patch_nvhdmi),
4134 /* 17 is known to be absent */
4135 HDA_CODEC_ENTRY(0x10de0018, "GPU 18 HDMI/DP",   patch_nvhdmi),
4136 HDA_CODEC_ENTRY(0x10de0019, "GPU 19 HDMI/DP",   patch_nvhdmi),
4137 HDA_CODEC_ENTRY(0x10de001a, "GPU 1a HDMI/DP",   patch_nvhdmi),
4138 HDA_CODEC_ENTRY(0x10de001b, "GPU 1b HDMI/DP",   patch_nvhdmi),
4139 HDA_CODEC_ENTRY(0x10de001c, "GPU 1c HDMI/DP",   patch_nvhdmi),
4140 HDA_CODEC_ENTRY(0x10de0020, "Tegra30 HDMI",     patch_tegra_hdmi),
4141 HDA_CODEC_ENTRY(0x10de0022, "Tegra114 HDMI",    patch_tegra_hdmi),
4142 HDA_CODEC_ENTRY(0x10de0028, "Tegra124 HDMI",    patch_tegra_hdmi),
4143 HDA_CODEC_ENTRY(0x10de0029, "Tegra210 HDMI/DP", patch_tegra_hdmi),
4144 HDA_CODEC_ENTRY(0x10de002d, "Tegra186 HDMI/DP0", patch_tegra_hdmi),
4145 HDA_CODEC_ENTRY(0x10de002e, "Tegra186 HDMI/DP1", patch_tegra_hdmi),
4146 HDA_CODEC_ENTRY(0x10de002f, "Tegra194 HDMI/DP2", patch_tegra_hdmi),
4147 HDA_CODEC_ENTRY(0x10de0030, "Tegra194 HDMI/DP3", patch_tegra_hdmi),
4148 HDA_CODEC_ENTRY(0x10de0040, "GPU 40 HDMI/DP",   patch_nvhdmi),
4149 HDA_CODEC_ENTRY(0x10de0041, "GPU 41 HDMI/DP",   patch_nvhdmi),
4150 HDA_CODEC_ENTRY(0x10de0042, "GPU 42 HDMI/DP",   patch_nvhdmi),
4151 HDA_CODEC_ENTRY(0x10de0043, "GPU 43 HDMI/DP",   patch_nvhdmi),
4152 HDA_CODEC_ENTRY(0x10de0044, "GPU 44 HDMI/DP",   patch_nvhdmi),
4153 HDA_CODEC_ENTRY(0x10de0045, "GPU 45 HDMI/DP",   patch_nvhdmi),
4154 HDA_CODEC_ENTRY(0x10de0050, "GPU 50 HDMI/DP",   patch_nvhdmi),
4155 HDA_CODEC_ENTRY(0x10de0051, "GPU 51 HDMI/DP",   patch_nvhdmi),
4156 HDA_CODEC_ENTRY(0x10de0052, "GPU 52 HDMI/DP",   patch_nvhdmi),
4157 HDA_CODEC_ENTRY(0x10de0060, "GPU 60 HDMI/DP",   patch_nvhdmi),
4158 HDA_CODEC_ENTRY(0x10de0061, "GPU 61 HDMI/DP",   patch_nvhdmi),
4159 HDA_CODEC_ENTRY(0x10de0062, "GPU 62 HDMI/DP",   patch_nvhdmi),
4160 HDA_CODEC_ENTRY(0x10de0067, "MCP67 HDMI",       patch_nvhdmi_2ch),
4161 HDA_CODEC_ENTRY(0x10de0070, "GPU 70 HDMI/DP",   patch_nvhdmi),
4162 HDA_CODEC_ENTRY(0x10de0071, "GPU 71 HDMI/DP",   patch_nvhdmi),
4163 HDA_CODEC_ENTRY(0x10de0072, "GPU 72 HDMI/DP",   patch_nvhdmi),
4164 HDA_CODEC_ENTRY(0x10de0073, "GPU 73 HDMI/DP",   patch_nvhdmi),
4165 HDA_CODEC_ENTRY(0x10de0074, "GPU 74 HDMI/DP",   patch_nvhdmi),
4166 HDA_CODEC_ENTRY(0x10de0076, "GPU 76 HDMI/DP",   patch_nvhdmi),
4167 HDA_CODEC_ENTRY(0x10de007b, "GPU 7b HDMI/DP",   patch_nvhdmi),
4168 HDA_CODEC_ENTRY(0x10de007c, "GPU 7c HDMI/DP",   patch_nvhdmi),
4169 HDA_CODEC_ENTRY(0x10de007d, "GPU 7d HDMI/DP",   patch_nvhdmi),
4170 HDA_CODEC_ENTRY(0x10de007e, "GPU 7e HDMI/DP",   patch_nvhdmi),
4171 HDA_CODEC_ENTRY(0x10de0080, "GPU 80 HDMI/DP",   patch_nvhdmi),
4172 HDA_CODEC_ENTRY(0x10de0081, "GPU 81 HDMI/DP",   patch_nvhdmi),
4173 HDA_CODEC_ENTRY(0x10de0082, "GPU 82 HDMI/DP",   patch_nvhdmi),
4174 HDA_CODEC_ENTRY(0x10de0083, "GPU 83 HDMI/DP",   patch_nvhdmi),
4175 HDA_CODEC_ENTRY(0x10de0084, "GPU 84 HDMI/DP",   patch_nvhdmi),
4176 HDA_CODEC_ENTRY(0x10de0090, "GPU 90 HDMI/DP",   patch_nvhdmi),
4177 HDA_CODEC_ENTRY(0x10de0091, "GPU 91 HDMI/DP",   patch_nvhdmi),
4178 HDA_CODEC_ENTRY(0x10de0092, "GPU 92 HDMI/DP",   patch_nvhdmi),
4179 HDA_CODEC_ENTRY(0x10de0093, "GPU 93 HDMI/DP",   patch_nvhdmi),
4180 HDA_CODEC_ENTRY(0x10de0094, "GPU 94 HDMI/DP",   patch_nvhdmi),
4181 HDA_CODEC_ENTRY(0x10de0095, "GPU 95 HDMI/DP",   patch_nvhdmi),
4182 HDA_CODEC_ENTRY(0x10de0097, "GPU 97 HDMI/DP",   patch_nvhdmi),
4183 HDA_CODEC_ENTRY(0x10de0098, "GPU 98 HDMI/DP",   patch_nvhdmi),
4184 HDA_CODEC_ENTRY(0x10de0099, "GPU 99 HDMI/DP",   patch_nvhdmi),
4185 HDA_CODEC_ENTRY(0x10de8001, "MCP73 HDMI",       patch_nvhdmi_2ch),
4186 HDA_CODEC_ENTRY(0x10de8067, "MCP67/68 HDMI",    patch_nvhdmi_2ch),
4187 HDA_CODEC_ENTRY(0x11069f80, "VX900 HDMI/DP",    patch_via_hdmi),
4188 HDA_CODEC_ENTRY(0x11069f81, "VX900 HDMI/DP",    patch_via_hdmi),
4189 HDA_CODEC_ENTRY(0x11069f84, "VX11 HDMI/DP",     patch_generic_hdmi),
4190 HDA_CODEC_ENTRY(0x11069f85, "VX11 HDMI/DP",     patch_generic_hdmi),
4191 HDA_CODEC_ENTRY(0x80860054, "IbexPeak HDMI",    patch_i915_cpt_hdmi),
4192 HDA_CODEC_ENTRY(0x80862800, "Geminilake HDMI",  patch_i915_glk_hdmi),
4193 HDA_CODEC_ENTRY(0x80862801, "Bearlake HDMI",    patch_generic_hdmi),
4194 HDA_CODEC_ENTRY(0x80862802, "Cantiga HDMI",     patch_generic_hdmi),
4195 HDA_CODEC_ENTRY(0x80862803, "Eaglelake HDMI",   patch_generic_hdmi),
4196 HDA_CODEC_ENTRY(0x80862804, "IbexPeak HDMI",    patch_i915_cpt_hdmi),
4197 HDA_CODEC_ENTRY(0x80862805, "CougarPoint HDMI", patch_i915_cpt_hdmi),
4198 HDA_CODEC_ENTRY(0x80862806, "PantherPoint HDMI", patch_i915_cpt_hdmi),
4199 HDA_CODEC_ENTRY(0x80862807, "Haswell HDMI",     patch_i915_hsw_hdmi),
4200 HDA_CODEC_ENTRY(0x80862808, "Broadwell HDMI",   patch_i915_hsw_hdmi),
4201 HDA_CODEC_ENTRY(0x80862809, "Skylake HDMI",     patch_i915_hsw_hdmi),
4202 HDA_CODEC_ENTRY(0x8086280a, "Broxton HDMI",     patch_i915_hsw_hdmi),
4203 HDA_CODEC_ENTRY(0x8086280b, "Kabylake HDMI",    patch_i915_hsw_hdmi),
4204 HDA_CODEC_ENTRY(0x8086280c, "Cannonlake HDMI",  patch_i915_glk_hdmi),
4205 HDA_CODEC_ENTRY(0x8086280d, "Geminilake HDMI",  patch_i915_glk_hdmi),
4206 HDA_CODEC_ENTRY(0x8086280f, "Icelake HDMI",     patch_i915_icl_hdmi),
4207 HDA_CODEC_ENTRY(0x80862812, "Tigerlake HDMI",   patch_i915_tgl_hdmi),
4208 HDA_CODEC_ENTRY(0x80862880, "CedarTrail HDMI",  patch_generic_hdmi),
4209 HDA_CODEC_ENTRY(0x80862882, "Valleyview2 HDMI", patch_i915_byt_hdmi),
4210 HDA_CODEC_ENTRY(0x80862883, "Braswell HDMI",    patch_i915_byt_hdmi),
4211 HDA_CODEC_ENTRY(0x808629fb, "Crestline HDMI",   patch_generic_hdmi),
4212 /* special ID for generic HDMI */
4213 HDA_CODEC_ENTRY(HDA_CODEC_ID_GENERIC_HDMI, "Generic HDMI", patch_generic_hdmi),
4214 {} /* terminator */
4215 };
4216 MODULE_DEVICE_TABLE(hdaudio, snd_hda_id_hdmi);
4217
4218 MODULE_LICENSE("GPL");
4219 MODULE_DESCRIPTION("HDMI HD-audio codec");
4220 MODULE_ALIAS("snd-hda-codec-intelhdmi");
4221 MODULE_ALIAS("snd-hda-codec-nvhdmi");
4222 MODULE_ALIAS("snd-hda-codec-atihdmi");
4223
4224 static struct hda_codec_driver hdmi_driver = {
4225         .id = snd_hda_id_hdmi,
4226 };
4227
4228 module_hda_codec_driver(hdmi_driver);