2 * HD audio interface patch for Creative CA0132 chip
4 * Copyright (c) 2011, Creative Technology Ltd.
6 * Based on patch_ca0110.c
7 * Copyright (c) 2008 Takashi Iwai <tiwai@suse.de>
9 * This driver is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
14 * This driver is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
24 #include <linux/init.h>
25 #include <linux/delay.h>
26 #include <linux/slab.h>
27 #include <linux/mutex.h>
28 #include <linux/module.h>
29 #include <linux/firmware.h>
30 #include <linux/kernel.h>
31 #include <linux/types.h>
33 #include <linux/pci.h>
34 #include <sound/core.h>
35 #include "hda_codec.h"
36 #include "hda_local.h"
37 #include "hda_auto_parser.h"
40 #include "ca0132_regs.h"
42 /* Enable this to see controls for tuning purpose. */
43 /*#define ENABLE_TUNING_CONTROLS*/
45 #ifdef ENABLE_TUNING_CONTROLS
46 #include <sound/tlv.h>
49 #define FLOAT_ZERO 0x00000000
50 #define FLOAT_ONE 0x3f800000
51 #define FLOAT_TWO 0x40000000
52 #define FLOAT_THREE 0x40400000
53 #define FLOAT_EIGHT 0x41000000
54 #define FLOAT_MINUS_5 0xc0a00000
56 #define UNSOL_TAG_DSP 0x16
58 #define DSP_DMA_WRITE_BUFLEN_INIT (1UL<<18)
59 #define DSP_DMA_WRITE_BUFLEN_OVLY (1UL<<15)
61 #define DMA_TRANSFER_FRAME_SIZE_NWORDS 8
62 #define DMA_TRANSFER_MAX_FRAME_SIZE_NWORDS 32
63 #define DMA_OVERLAY_FRAME_SIZE_NWORDS 2
65 #define MASTERCONTROL 0x80
66 #define MASTERCONTROL_ALLOC_DMA_CHAN 10
67 #define MASTERCONTROL_QUERY_SPEAKER_EQ_ADDRESS 60
69 #define WIDGET_CHIP_CTRL 0x15
70 #define WIDGET_DSP_CTRL 0x16
72 #define MEM_CONNID_MICIN1 3
73 #define MEM_CONNID_MICIN2 5
74 #define MEM_CONNID_MICOUT1 12
75 #define MEM_CONNID_MICOUT2 14
76 #define MEM_CONNID_WUH 10
77 #define MEM_CONNID_DSP 16
78 #define MEM_CONNID_DMIC 100
83 #define EFX_FILE "ctefx.bin"
84 #define SBZ_EFX_FILE "ctefx-sbz.bin"
85 #define R3DI_EFX_FILE "ctefx-r3di.bin"
87 #ifdef CONFIG_SND_HDA_CODEC_CA0132_DSP
88 MODULE_FIRMWARE(EFX_FILE);
89 MODULE_FIRMWARE(SBZ_EFX_FILE);
90 MODULE_FIRMWARE(R3DI_EFX_FILE);
93 static const char *const dirstr[2] = { "Playback", "Capture" };
95 #define NUM_OF_OUTPUTS 3
107 /* Strings for Input Source Enum Control */
108 static const char *const in_src_str[3] = {"Rear Mic", "Line", "Front Mic" };
109 #define IN_SRC_NUM_OF_INPUTS 3
117 #define VNODE_START_NID 0x80
118 VNID_SPK = VNODE_START_NID, /* Speaker vnid */
125 #define VNODES_COUNT (VNODE_END_NID - VNODE_START_NID)
127 #define EFFECT_START_NID 0x90
128 #define OUT_EFFECT_START_NID EFFECT_START_NID
129 SURROUND = OUT_EFFECT_START_NID,
136 #define OUT_EFFECTS_COUNT (OUT_EFFECT_END_NID - OUT_EFFECT_START_NID)
138 #define IN_EFFECT_START_NID OUT_EFFECT_END_NID
139 ECHO_CANCELLATION = IN_EFFECT_START_NID,
144 #define IN_EFFECTS_COUNT (IN_EFFECT_END_NID - IN_EFFECT_START_NID)
146 VOICEFX = IN_EFFECT_END_NID,
156 #define EFFECTS_COUNT (EFFECT_END_NID - EFFECT_START_NID)
159 /* Effects values size*/
160 #define EFFECT_VALS_MAX_COUNT 12
163 * Default values for the effect slider controls, they are in order of their
164 * effect NID's. Surround, Crystalizer, Dialog Plus, Smart Volume, and then
167 static const unsigned int effect_slider_defaults[] = {67, 65, 50, 74, 50};
168 /* Amount of effect level sliders for ca0132_alt controls. */
169 #define EFFECT_LEVEL_SLIDERS 5
171 /* Latency introduced by DSP blocks in milliseconds. */
172 #define DSP_CAPTURE_INIT_LATENCY 0
173 #define DSP_CRYSTAL_VOICE_LATENCY 124
174 #define DSP_PLAYBACK_INIT_LATENCY 13
175 #define DSP_PLAY_ENHANCEMENT_LATENCY 30
176 #define DSP_SPEAKER_OUT_LATENCY 7
179 char name[SNDRV_CTL_ELEM_ID_NAME_MAXLEN];
181 int mid; /*effect module ID*/
182 int reqs[EFFECT_VALS_MAX_COUNT]; /*effect module request*/
183 int direct; /* 0:output; 1:input*/
184 int params; /* number of default non-on/off params */
185 /*effect default values, 1st is on/off. */
186 unsigned int def_vals[EFFECT_VALS_MAX_COUNT];
189 #define EFX_DIR_OUT 0
192 static const struct ct_effect ca0132_effects[EFFECTS_COUNT] = {
193 { .name = "Surround",
197 .direct = EFX_DIR_OUT,
199 .def_vals = {0x3F800000, 0x3F2B851F}
201 { .name = "Crystalizer",
205 .direct = EFX_DIR_OUT,
207 .def_vals = {0x3F800000, 0x3F266666}
209 { .name = "Dialog Plus",
213 .direct = EFX_DIR_OUT,
215 .def_vals = {0x00000000, 0x3F000000}
217 { .name = "Smart Volume",
221 .direct = EFX_DIR_OUT,
223 .def_vals = {0x3F800000, 0x3F3D70A4, 0x00000000}
228 .reqs = {24, 23, 25},
229 .direct = EFX_DIR_OUT,
231 .def_vals = {0x3F800000, 0x42A00000, 0x3F000000}
233 { .name = "Equalizer",
236 .reqs = {9, 10, 11, 12, 13, 14,
237 15, 16, 17, 18, 19, 20},
238 .direct = EFX_DIR_OUT,
240 .def_vals = {0x00000000, 0x00000000, 0x00000000, 0x00000000,
241 0x00000000, 0x00000000, 0x00000000, 0x00000000,
242 0x00000000, 0x00000000, 0x00000000, 0x00000000}
244 { .name = "Echo Cancellation",
245 .nid = ECHO_CANCELLATION,
247 .reqs = {0, 1, 2, 3},
248 .direct = EFX_DIR_IN,
250 .def_vals = {0x00000000, 0x3F3A9692, 0x00000000, 0x00000000}
252 { .name = "Voice Focus",
255 .reqs = {6, 7, 8, 9},
256 .direct = EFX_DIR_IN,
258 .def_vals = {0x3F800000, 0x3D7DF3B6, 0x41F00000, 0x41F00000}
264 .direct = EFX_DIR_IN,
266 .def_vals = {0x00000000, 0x3F3D70A4}
268 { .name = "Noise Reduction",
269 .nid = NOISE_REDUCTION,
272 .direct = EFX_DIR_IN,
274 .def_vals = {0x3F800000, 0x3F000000}
279 .reqs = {10, 11, 12, 13, 14, 15, 16, 17, 18},
280 .direct = EFX_DIR_IN,
282 .def_vals = {0x00000000, 0x43C80000, 0x44AF0000, 0x44FA0000,
283 0x3F800000, 0x3F800000, 0x3F800000, 0x00000000,
288 /* Tuning controls */
289 #ifdef ENABLE_TUNING_CONTROLS
292 #define TUNING_CTL_START_NID 0xC0
293 WEDGE_ANGLE = TUNING_CTL_START_NID,
306 #define TUNING_CTLS_COUNT (TUNING_CTL_END_NID - TUNING_CTL_START_NID)
309 struct ct_tuning_ctl {
310 char name[SNDRV_CTL_ELEM_ID_NAME_MAXLEN];
311 hda_nid_t parent_nid;
313 int mid; /*effect module ID*/
314 int req; /*effect module request*/
315 int direct; /* 0:output; 1:input*/
316 unsigned int def_val;/*effect default values*/
319 static const struct ct_tuning_ctl ca0132_tuning_ctls[] = {
320 { .name = "Wedge Angle",
321 .parent_nid = VOICE_FOCUS,
325 .direct = EFX_DIR_IN,
326 .def_val = 0x41F00000
328 { .name = "SVM Level",
329 .parent_nid = MIC_SVM,
333 .direct = EFX_DIR_IN,
334 .def_val = 0x3F3D70A4
336 { .name = "EQ Band0",
337 .parent_nid = EQUALIZER,
338 .nid = EQUALIZER_BAND_0,
341 .direct = EFX_DIR_OUT,
342 .def_val = 0x00000000
344 { .name = "EQ Band1",
345 .parent_nid = EQUALIZER,
346 .nid = EQUALIZER_BAND_1,
349 .direct = EFX_DIR_OUT,
350 .def_val = 0x00000000
352 { .name = "EQ Band2",
353 .parent_nid = EQUALIZER,
354 .nid = EQUALIZER_BAND_2,
357 .direct = EFX_DIR_OUT,
358 .def_val = 0x00000000
360 { .name = "EQ Band3",
361 .parent_nid = EQUALIZER,
362 .nid = EQUALIZER_BAND_3,
365 .direct = EFX_DIR_OUT,
366 .def_val = 0x00000000
368 { .name = "EQ Band4",
369 .parent_nid = EQUALIZER,
370 .nid = EQUALIZER_BAND_4,
373 .direct = EFX_DIR_OUT,
374 .def_val = 0x00000000
376 { .name = "EQ Band5",
377 .parent_nid = EQUALIZER,
378 .nid = EQUALIZER_BAND_5,
381 .direct = EFX_DIR_OUT,
382 .def_val = 0x00000000
384 { .name = "EQ Band6",
385 .parent_nid = EQUALIZER,
386 .nid = EQUALIZER_BAND_6,
389 .direct = EFX_DIR_OUT,
390 .def_val = 0x00000000
392 { .name = "EQ Band7",
393 .parent_nid = EQUALIZER,
394 .nid = EQUALIZER_BAND_7,
397 .direct = EFX_DIR_OUT,
398 .def_val = 0x00000000
400 { .name = "EQ Band8",
401 .parent_nid = EQUALIZER,
402 .nid = EQUALIZER_BAND_8,
405 .direct = EFX_DIR_OUT,
406 .def_val = 0x00000000
408 { .name = "EQ Band9",
409 .parent_nid = EQUALIZER,
410 .nid = EQUALIZER_BAND_9,
413 .direct = EFX_DIR_OUT,
414 .def_val = 0x00000000
419 /* Voice FX Presets */
420 #define VOICEFX_MAX_PARAM_COUNT 9
426 int reqs[VOICEFX_MAX_PARAM_COUNT]; /*effect module request*/
429 struct ct_voicefx_preset {
430 char *name; /*preset name*/
431 unsigned int vals[VOICEFX_MAX_PARAM_COUNT];
434 static const struct ct_voicefx ca0132_voicefx = {
435 .name = "VoiceFX Capture Switch",
438 .reqs = {10, 11, 12, 13, 14, 15, 16, 17, 18}
441 static const struct ct_voicefx_preset ca0132_voicefx_presets[] = {
443 .vals = { 0x00000000, 0x43C80000, 0x44AF0000,
444 0x44FA0000, 0x3F800000, 0x3F800000,
445 0x3F800000, 0x00000000, 0x00000000 }
447 { .name = "Female2Male",
448 .vals = { 0x3F800000, 0x43C80000, 0x44AF0000,
449 0x44FA0000, 0x3F19999A, 0x3F866666,
450 0x3F800000, 0x00000000, 0x00000000 }
452 { .name = "Male2Female",
453 .vals = { 0x3F800000, 0x43C80000, 0x44AF0000,
454 0x450AC000, 0x4017AE14, 0x3F6B851F,
455 0x3F800000, 0x00000000, 0x00000000 }
457 { .name = "ScrappyKid",
458 .vals = { 0x3F800000, 0x43C80000, 0x44AF0000,
459 0x44FA0000, 0x40400000, 0x3F28F5C3,
460 0x3F800000, 0x00000000, 0x00000000 }
463 .vals = { 0x3F800000, 0x44324000, 0x44BB8000,
464 0x44E10000, 0x3FB33333, 0x3FB9999A,
465 0x3F800000, 0x3E3A2E43, 0x00000000 }
468 .vals = { 0x3F800000, 0x43EA0000, 0x44A52000,
469 0x45098000, 0x3F266666, 0x3FC00000,
470 0x3F800000, 0x00000000, 0x00000000 }
473 .vals = { 0x3F800000, 0x43C70000, 0x44AE6000,
474 0x45193000, 0x3F8E147B, 0x3F75C28F,
475 0x3F800000, 0x00000000, 0x00000000 }
478 .vals = { 0x3F800000, 0x43930000, 0x44BEE000,
479 0x45007000, 0x3F451EB8, 0x3F7851EC,
480 0x3F800000, 0x00000000, 0x00000000 }
482 { .name = "AlienBrute",
483 .vals = { 0x3F800000, 0x43BFC5AC, 0x44B28FDF,
484 0x451F6000, 0x3F266666, 0x3FA7D945,
485 0x3F800000, 0x3CF5C28F, 0x00000000 }
488 .vals = { 0x3F800000, 0x43C80000, 0x44AF0000,
489 0x44FA0000, 0x3FB2718B, 0x3F800000,
490 0xBC07010E, 0x00000000, 0x00000000 }
493 .vals = { 0x3F800000, 0x43C20000, 0x44906000,
494 0x44E70000, 0x3F4CCCCD, 0x3F8A3D71,
495 0x3F0A3D71, 0x00000000, 0x00000000 }
498 .vals = { 0x3F800000, 0x43C80000, 0x44AF0000,
499 0x44FA0000, 0x3F800000, 0x3F800000,
500 0x3E4CCCCD, 0x00000000, 0x00000000 }
502 { .name = "DeepVoice",
503 .vals = { 0x3F800000, 0x43A9C5AC, 0x44AA4FDF,
504 0x44FFC000, 0x3EDBB56F, 0x3F99C4CA,
505 0x3F800000, 0x00000000, 0x00000000 }
507 { .name = "Munchkin",
508 .vals = { 0x3F800000, 0x43C80000, 0x44AF0000,
509 0x44FA0000, 0x3F800000, 0x3F1A043C,
510 0x3F800000, 0x00000000, 0x00000000 }
514 /* ca0132 EQ presets, taken from Windows Sound Blaster Z Driver */
516 #define EQ_PRESET_MAX_PARAM_COUNT 11
522 int reqs[EQ_PRESET_MAX_PARAM_COUNT]; /*effect module request*/
525 struct ct_eq_preset {
526 char *name; /*preset name*/
527 unsigned int vals[EQ_PRESET_MAX_PARAM_COUNT];
530 static const struct ct_eq ca0132_alt_eq_enum = {
531 .name = "FX: Equalizer Preset Switch",
532 .nid = EQ_PRESET_ENUM,
534 .reqs = {10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20}
538 static const struct ct_eq_preset ca0132_alt_eq_presets[] = {
540 .vals = { 0x00000000, 0x00000000, 0x00000000,
541 0x00000000, 0x00000000, 0x00000000,
542 0x00000000, 0x00000000, 0x00000000,
543 0x00000000, 0x00000000 }
545 { .name = "Acoustic",
546 .vals = { 0x00000000, 0x00000000, 0x3F8CCCCD,
547 0x40000000, 0x00000000, 0x00000000,
548 0x00000000, 0x00000000, 0x40000000,
549 0x40000000, 0x40000000 }
551 { .name = "Classical",
552 .vals = { 0x00000000, 0x00000000, 0x40C00000,
553 0x40C00000, 0x40466666, 0x00000000,
554 0x00000000, 0x00000000, 0x00000000,
555 0x40466666, 0x40466666 }
558 .vals = { 0x00000000, 0xBF99999A, 0x00000000,
559 0x3FA66666, 0x3FA66666, 0x3F8CCCCD,
560 0x00000000, 0x00000000, 0x40000000,
561 0x40466666, 0x40800000 }
564 .vals = { 0x00000000, 0xBF99999A, 0x40000000,
565 0x40466666, 0x40866666, 0xBF99999A,
566 0xBF99999A, 0x00000000, 0x00000000,
567 0x40800000, 0x40800000 }
570 .vals = { 0x00000000, 0x00000000, 0x00000000,
571 0x3F8CCCCD, 0x40800000, 0x40800000,
572 0x40800000, 0x00000000, 0x3F8CCCCD,
573 0x40466666, 0x40466666 }
576 .vals = { 0x00000000, 0x00000000, 0x40000000,
577 0x40000000, 0x00000000, 0x00000000,
578 0x00000000, 0x3F8CCCCD, 0x40000000,
579 0x40000000, 0x40000000 }
582 .vals = { 0x00000000, 0xBFCCCCCD, 0x00000000,
583 0x40000000, 0x40000000, 0x00000000,
584 0xBF99999A, 0xBF99999A, 0x00000000,
585 0x40466666, 0x40C00000 }
588 .vals = { 0x00000000, 0xBF99999A, 0xBF99999A,
589 0x3F8CCCCD, 0x40000000, 0xBF99999A,
590 0xBF99999A, 0x00000000, 0x00000000,
591 0x40800000, 0x40800000 }
594 .vals = { 0x00000000, 0xC0000000, 0xBF99999A,
595 0xBF99999A, 0x00000000, 0x40466666,
596 0x40800000, 0x40466666, 0x00000000,
597 0x00000000, 0x3F8CCCCD }
601 /* DSP command sequences for ca0132_alt_select_out */
602 #define ALT_OUT_SET_MAX_COMMANDS 9 /* Max number of commands in sequence */
603 struct ca0132_alt_out_set {
604 char *name; /*preset name*/
605 unsigned char commands;
606 unsigned int mids[ALT_OUT_SET_MAX_COMMANDS];
607 unsigned int reqs[ALT_OUT_SET_MAX_COMMANDS];
608 unsigned int vals[ALT_OUT_SET_MAX_COMMANDS];
611 static const struct ca0132_alt_out_set alt_out_presets[] = {
612 { .name = "Line Out",
614 .mids = { 0x96, 0x96, 0x96, 0x8F,
616 .reqs = { 0x19, 0x17, 0x18, 0x01,
618 .vals = { 0x3F000000, 0x42A00000, 0x00000000,
619 0x00000000, 0x00000000, 0x00000000,
622 { .name = "Headphone",
624 .mids = { 0x96, 0x96, 0x96, 0x8F,
626 .reqs = { 0x19, 0x17, 0x18, 0x01,
628 .vals = { 0x3F000000, 0x42A00000, 0x00000000,
629 0x00000000, 0x00000000, 0x00000000,
632 { .name = "Surround",
634 .mids = { 0x96, 0x8F, 0x96, 0x96,
635 0x96, 0x96, 0x96, 0x96 },
636 .reqs = { 0x18, 0x01, 0x1F, 0x15,
637 0x3A, 0x1A, 0x1B, 0x1C },
638 .vals = { 0x00000000, 0x00000000, 0x00000000,
639 0x00000000, 0x00000000, 0x00000000,
640 0x00000000, 0x00000000 }
645 * DSP volume setting structs. Req 1 is left volume, req 2 is right volume,
646 * and I don't know what the third req is, but it's always zero. I assume it's
647 * some sort of update or set command to tell the DSP there's new volume info.
649 #define DSP_VOL_OUT 0
652 struct ct_dsp_volume_ctl {
654 int mid; /* module ID*/
655 unsigned int reqs[3]; /* scp req ID */
658 static const struct ct_dsp_volume_ctl ca0132_alt_vol_ctls[] = {
669 enum hda_cmd_vendor_io {
671 VENDOR_DSPIO_SCP_WRITE_DATA_LOW = 0x000,
672 VENDOR_DSPIO_SCP_WRITE_DATA_HIGH = 0x100,
674 VENDOR_DSPIO_STATUS = 0xF01,
675 VENDOR_DSPIO_SCP_POST_READ_DATA = 0x702,
676 VENDOR_DSPIO_SCP_READ_DATA = 0xF02,
677 VENDOR_DSPIO_DSP_INIT = 0x703,
678 VENDOR_DSPIO_SCP_POST_COUNT_QUERY = 0x704,
679 VENDOR_DSPIO_SCP_READ_COUNT = 0xF04,
681 /* for ChipIO node */
682 VENDOR_CHIPIO_ADDRESS_LOW = 0x000,
683 VENDOR_CHIPIO_ADDRESS_HIGH = 0x100,
684 VENDOR_CHIPIO_STREAM_FORMAT = 0x200,
685 VENDOR_CHIPIO_DATA_LOW = 0x300,
686 VENDOR_CHIPIO_DATA_HIGH = 0x400,
688 VENDOR_CHIPIO_GET_PARAMETER = 0xF00,
689 VENDOR_CHIPIO_STATUS = 0xF01,
690 VENDOR_CHIPIO_HIC_POST_READ = 0x702,
691 VENDOR_CHIPIO_HIC_READ_DATA = 0xF03,
693 VENDOR_CHIPIO_8051_DATA_WRITE = 0x707,
694 VENDOR_CHIPIO_8051_DATA_READ = 0xF07,
696 VENDOR_CHIPIO_CT_EXTENSIONS_ENABLE = 0x70A,
697 VENDOR_CHIPIO_CT_EXTENSIONS_GET = 0xF0A,
699 VENDOR_CHIPIO_PLL_PMU_WRITE = 0x70C,
700 VENDOR_CHIPIO_PLL_PMU_READ = 0xF0C,
701 VENDOR_CHIPIO_8051_ADDRESS_LOW = 0x70D,
702 VENDOR_CHIPIO_8051_ADDRESS_HIGH = 0x70E,
703 VENDOR_CHIPIO_FLAG_SET = 0x70F,
704 VENDOR_CHIPIO_FLAGS_GET = 0xF0F,
705 VENDOR_CHIPIO_PARAM_SET = 0x710,
706 VENDOR_CHIPIO_PARAM_GET = 0xF10,
708 VENDOR_CHIPIO_PORT_ALLOC_CONFIG_SET = 0x711,
709 VENDOR_CHIPIO_PORT_ALLOC_SET = 0x712,
710 VENDOR_CHIPIO_PORT_ALLOC_GET = 0xF12,
711 VENDOR_CHIPIO_PORT_FREE_SET = 0x713,
713 VENDOR_CHIPIO_PARAM_EX_ID_GET = 0xF17,
714 VENDOR_CHIPIO_PARAM_EX_ID_SET = 0x717,
715 VENDOR_CHIPIO_PARAM_EX_VALUE_GET = 0xF18,
716 VENDOR_CHIPIO_PARAM_EX_VALUE_SET = 0x718,
718 VENDOR_CHIPIO_DMIC_CTL_SET = 0x788,
719 VENDOR_CHIPIO_DMIC_CTL_GET = 0xF88,
720 VENDOR_CHIPIO_DMIC_PIN_SET = 0x789,
721 VENDOR_CHIPIO_DMIC_PIN_GET = 0xF89,
722 VENDOR_CHIPIO_DMIC_MCLK_SET = 0x78A,
723 VENDOR_CHIPIO_DMIC_MCLK_GET = 0xF8A,
725 VENDOR_CHIPIO_EAPD_SEL_SET = 0x78D
731 enum control_flag_id {
732 /* Connection manager stream setup is bypassed/enabled */
733 CONTROL_FLAG_C_MGR = 0,
734 /* DSP DMA is bypassed/enabled */
735 CONTROL_FLAG_DMA = 1,
736 /* 8051 'idle' mode is disabled/enabled */
737 CONTROL_FLAG_IDLE_ENABLE = 2,
738 /* Tracker for the SPDIF-in path is bypassed/enabled */
739 CONTROL_FLAG_TRACKER = 3,
740 /* DigitalOut to Spdif2Out connection is disabled/enabled */
741 CONTROL_FLAG_SPDIF2OUT = 4,
742 /* Digital Microphone is disabled/enabled */
743 CONTROL_FLAG_DMIC = 5,
744 /* ADC_B rate is 48 kHz/96 kHz */
745 CONTROL_FLAG_ADC_B_96KHZ = 6,
746 /* ADC_C rate is 48 kHz/96 kHz */
747 CONTROL_FLAG_ADC_C_96KHZ = 7,
748 /* DAC rate is 48 kHz/96 kHz (affects all DACs) */
749 CONTROL_FLAG_DAC_96KHZ = 8,
750 /* DSP rate is 48 kHz/96 kHz */
751 CONTROL_FLAG_DSP_96KHZ = 9,
752 /* SRC clock is 98 MHz/196 MHz (196 MHz forces rate to 96 KHz) */
753 CONTROL_FLAG_SRC_CLOCK_196MHZ = 10,
754 /* SRC rate is 48 kHz/96 kHz (48 kHz disabled when clock is 196 MHz) */
755 CONTROL_FLAG_SRC_RATE_96KHZ = 11,
756 /* Decode Loop (DSP->SRC->DSP) is disabled/enabled */
757 CONTROL_FLAG_DECODE_LOOP = 12,
758 /* De-emphasis filter on DAC-1 disabled/enabled */
759 CONTROL_FLAG_DAC1_DEEMPHASIS = 13,
760 /* De-emphasis filter on DAC-2 disabled/enabled */
761 CONTROL_FLAG_DAC2_DEEMPHASIS = 14,
762 /* De-emphasis filter on DAC-3 disabled/enabled */
763 CONTROL_FLAG_DAC3_DEEMPHASIS = 15,
764 /* High-pass filter on ADC_B disabled/enabled */
765 CONTROL_FLAG_ADC_B_HIGH_PASS = 16,
766 /* High-pass filter on ADC_C disabled/enabled */
767 CONTROL_FLAG_ADC_C_HIGH_PASS = 17,
768 /* Common mode on Port_A disabled/enabled */
769 CONTROL_FLAG_PORT_A_COMMON_MODE = 18,
770 /* Common mode on Port_D disabled/enabled */
771 CONTROL_FLAG_PORT_D_COMMON_MODE = 19,
772 /* Impedance for ramp generator on Port_A 16 Ohm/10K Ohm */
773 CONTROL_FLAG_PORT_A_10KOHM_LOAD = 20,
774 /* Impedance for ramp generator on Port_D, 16 Ohm/10K Ohm */
775 CONTROL_FLAG_PORT_D_10KOHM_LOAD = 21,
776 /* ASI rate is 48kHz/96kHz */
777 CONTROL_FLAG_ASI_96KHZ = 22,
778 /* DAC power settings able to control attached ports no/yes */
779 CONTROL_FLAG_DACS_CONTROL_PORTS = 23,
780 /* Clock Stop OK reporting is disabled/enabled */
781 CONTROL_FLAG_CONTROL_STOP_OK_ENABLE = 24,
782 /* Number of control flags */
783 CONTROL_FLAGS_MAX = (CONTROL_FLAG_CONTROL_STOP_OK_ENABLE+1)
787 * Control parameter IDs
789 enum control_param_id {
790 /* 0: None, 1: Mic1In*/
791 CONTROL_PARAM_VIP_SOURCE = 1,
792 /* 0: force HDA, 1: allow DSP if HDA Spdif1Out stream is idle */
793 CONTROL_PARAM_SPDIF1_SOURCE = 2,
794 /* Port A output stage gain setting to use when 16 Ohm output
795 * impedance is selected*/
796 CONTROL_PARAM_PORTA_160OHM_GAIN = 8,
797 /* Port D output stage gain setting to use when 16 Ohm output
798 * impedance is selected*/
799 CONTROL_PARAM_PORTD_160OHM_GAIN = 10,
803 /* Select stream with the given ID */
804 CONTROL_PARAM_STREAM_ID = 24,
805 /* Source connection point for the selected stream */
806 CONTROL_PARAM_STREAM_SOURCE_CONN_POINT = 25,
807 /* Destination connection point for the selected stream */
808 CONTROL_PARAM_STREAM_DEST_CONN_POINT = 26,
809 /* Number of audio channels in the selected stream */
810 CONTROL_PARAM_STREAMS_CHANNELS = 27,
811 /*Enable control for the selected stream */
812 CONTROL_PARAM_STREAM_CONTROL = 28,
814 /* Connection Point Control */
816 /* Select connection point with the given ID */
817 CONTROL_PARAM_CONN_POINT_ID = 29,
818 /* Connection point sample rate */
819 CONTROL_PARAM_CONN_POINT_SAMPLE_RATE = 30,
823 /* Select HDA node with the given ID */
824 CONTROL_PARAM_NODE_ID = 31
828 * Dsp Io Status codes
830 enum hda_vendor_status_dspio {
832 VENDOR_STATUS_DSPIO_OK = 0x00,
833 /* Busy, unable to accept new command, the host must retry */
834 VENDOR_STATUS_DSPIO_BUSY = 0x01,
835 /* SCP command queue is full */
836 VENDOR_STATUS_DSPIO_SCP_COMMAND_QUEUE_FULL = 0x02,
837 /* SCP response queue is empty */
838 VENDOR_STATUS_DSPIO_SCP_RESPONSE_QUEUE_EMPTY = 0x03
842 * Chip Io Status codes
844 enum hda_vendor_status_chipio {
846 VENDOR_STATUS_CHIPIO_OK = 0x00,
847 /* Busy, unable to accept new command, the host must retry */
848 VENDOR_STATUS_CHIPIO_BUSY = 0x01
854 enum ca0132_sample_rate {
874 SR_RATE_UNKNOWN = 0x1F
877 enum dsp_download_state {
878 DSP_DOWNLOAD_FAILED = -1,
879 DSP_DOWNLOAD_INIT = 0,
884 /* retrieve parameters from hda format */
885 #define get_hdafmt_chs(fmt) (fmt & 0xf)
886 #define get_hdafmt_bits(fmt) ((fmt >> 4) & 0x7)
887 #define get_hdafmt_rate(fmt) ((fmt >> 8) & 0x7f)
888 #define get_hdafmt_type(fmt) ((fmt >> 15) & 0x1)
895 const struct snd_kcontrol_new *mixers[5];
896 unsigned int num_mixers;
897 const struct hda_verb *base_init_verbs;
898 const struct hda_verb *base_exit_verbs;
899 const struct hda_verb *chip_init_verbs;
900 const struct hda_verb *sbz_init_verbs;
901 struct hda_verb *spec_init_verbs;
902 struct auto_pin_cfg autocfg;
904 /* Nodes configurations */
905 struct hda_multi_out multiout;
906 hda_nid_t out_pins[AUTO_CFG_MAX_OUTS];
907 hda_nid_t dacs[AUTO_CFG_MAX_OUTS];
908 unsigned int num_outputs;
909 hda_nid_t input_pins[AUTO_PIN_LAST];
910 hda_nid_t adcs[AUTO_PIN_LAST];
913 unsigned int num_inputs;
914 hda_nid_t shared_mic_nid;
915 hda_nid_t shared_out_nid;
916 hda_nid_t unsol_tag_hp;
917 hda_nid_t unsol_tag_front_hp; /* for desktop ca0132 codecs */
918 hda_nid_t unsol_tag_amic1;
921 struct mutex chipio_mutex; /* chip access mutex */
924 /* DSP download related */
925 enum dsp_download_state dsp_state;
926 unsigned int dsp_stream_id;
927 unsigned int wait_scp;
928 unsigned int wait_scp_header;
929 unsigned int wait_num_data;
930 unsigned int scp_resp_header;
931 unsigned int scp_resp_data[4];
932 unsigned int scp_resp_count;
933 bool alt_firmware_present;
934 bool startup_check_entered;
937 /* mixer and effects related */
938 unsigned char dmic_ctl;
941 long vnode_lvol[VNODES_COUNT];
942 long vnode_rvol[VNODES_COUNT];
943 long vnode_lswitch[VNODES_COUNT];
944 long vnode_rswitch[VNODES_COUNT];
945 long effects_switch[EFFECTS_COUNT];
948 /* ca0132_alt control related values */
949 unsigned char in_enum_val;
950 unsigned char out_enum_val;
951 unsigned char mic_boost_enum_val;
952 unsigned char smart_volume_setting;
953 long fx_ctl_val[EFFECT_LEVEL_SLIDERS];
954 long xbass_xover_freq;
957 struct hda_vmaster_mute_hook vmaster_mute;
960 struct hda_codec *codec;
961 struct delayed_work unsol_hp_work;
964 #ifdef ENABLE_TUNING_CONTROLS
965 long cur_ctl_vals[TUNING_CTLS_COUNT];
968 * Sound Blaster Z PCI region 2 iomem, used for input and output
969 * switching, and other unknown commands.
971 void __iomem *mem_base;
974 * Whether or not to use the alt functions like alt_select_out,
975 * alt_select_in, etc. Only used on desktop codecs for now, because of
976 * surround sound support.
978 bool use_alt_functions;
981 * Whether or not to use alt controls: volume effect sliders, EQ
982 * presets, smart volume presets, and new control names with FX prefix.
983 * Renames PlayEnhancement and CrystalVoice too.
985 bool use_alt_controls;
989 * CA0132 quirks table
998 static const struct hda_pintbl alienware_pincfgs[] = {
999 { 0x0b, 0x90170110 }, /* Builtin Speaker */
1000 { 0x0c, 0x411111f0 }, /* N/A */
1001 { 0x0d, 0x411111f0 }, /* N/A */
1002 { 0x0e, 0x411111f0 }, /* N/A */
1003 { 0x0f, 0x0321101f }, /* HP */
1004 { 0x10, 0x411111f0 }, /* Headset? disabled for now */
1005 { 0x11, 0x03a11021 }, /* Mic */
1006 { 0x12, 0xd5a30140 }, /* Builtin Mic */
1007 { 0x13, 0x411111f0 }, /* N/A */
1008 { 0x18, 0x411111f0 }, /* N/A */
1012 /* Sound Blaster Z pin configs taken from Windows Driver */
1013 static const struct hda_pintbl sbz_pincfgs[] = {
1014 { 0x0b, 0x01017010 }, /* Port G -- Lineout FRONT L/R */
1015 { 0x0c, 0x014510f0 }, /* SPDIF Out 1 */
1016 { 0x0d, 0x014510f0 }, /* Digital Out */
1017 { 0x0e, 0x01c510f0 }, /* SPDIF In */
1018 { 0x0f, 0x0221701f }, /* Port A -- BackPanel HP */
1019 { 0x10, 0x01017012 }, /* Port D -- Center/LFE or FP Hp */
1020 { 0x11, 0x01017014 }, /* Port B -- LineMicIn2 / Rear L/R */
1021 { 0x12, 0x01a170f0 }, /* Port C -- LineIn1 */
1022 { 0x13, 0x908700f0 }, /* What U Hear In*/
1023 { 0x18, 0x50d000f0 }, /* N/A */
1027 /* Recon3D integrated pin configs taken from Windows Driver */
1028 static const struct hda_pintbl r3di_pincfgs[] = {
1029 { 0x0b, 0x01014110 }, /* Port G -- Lineout FRONT L/R */
1030 { 0x0c, 0x014510f0 }, /* SPDIF Out 1 */
1031 { 0x0d, 0x014510f0 }, /* Digital Out */
1032 { 0x0e, 0x41c520f0 }, /* SPDIF In */
1033 { 0x0f, 0x0221401f }, /* Port A -- BackPanel HP */
1034 { 0x10, 0x01016011 }, /* Port D -- Center/LFE or FP Hp */
1035 { 0x11, 0x01011014 }, /* Port B -- LineMicIn2 / Rear L/R */
1036 { 0x12, 0x02a090f0 }, /* Port C -- LineIn1 */
1037 { 0x13, 0x908700f0 }, /* What U Hear In*/
1038 { 0x18, 0x500000f0 }, /* N/A */
1042 static const struct snd_pci_quirk ca0132_quirks[] = {
1043 SND_PCI_QUIRK(0x1028, 0x0685, "Alienware 15 2015", QUIRK_ALIENWARE),
1044 SND_PCI_QUIRK(0x1028, 0x0688, "Alienware 17 2015", QUIRK_ALIENWARE),
1045 SND_PCI_QUIRK(0x1028, 0x0708, "Alienware 15 R2 2016", QUIRK_ALIENWARE),
1046 SND_PCI_QUIRK(0x1102, 0x0010, "Sound Blaster Z", QUIRK_SBZ),
1047 SND_PCI_QUIRK(0x1102, 0x0023, "Sound Blaster Z", QUIRK_SBZ),
1048 SND_PCI_QUIRK(0x1458, 0xA016, "Recon3Di", QUIRK_R3DI),
1049 SND_PCI_QUIRK(0x1458, 0xA036, "Recon3Di", QUIRK_R3DI),
1054 * CA0132 codec access
1056 static unsigned int codec_send_command(struct hda_codec *codec, hda_nid_t nid,
1057 unsigned int verb, unsigned int parm, unsigned int *res)
1059 unsigned int response;
1060 response = snd_hda_codec_read(codec, nid, 0, verb, parm);
1063 return ((response == -1) ? -1 : 0);
1066 static int codec_set_converter_format(struct hda_codec *codec, hda_nid_t nid,
1067 unsigned short converter_format, unsigned int *res)
1069 return codec_send_command(codec, nid, VENDOR_CHIPIO_STREAM_FORMAT,
1070 converter_format & 0xffff, res);
1073 static int codec_set_converter_stream_channel(struct hda_codec *codec,
1074 hda_nid_t nid, unsigned char stream,
1075 unsigned char channel, unsigned int *res)
1077 unsigned char converter_stream_channel = 0;
1079 converter_stream_channel = (stream << 4) | (channel & 0x0f);
1080 return codec_send_command(codec, nid, AC_VERB_SET_CHANNEL_STREAMID,
1081 converter_stream_channel, res);
1084 /* Chip access helper function */
1085 static int chipio_send(struct hda_codec *codec,
1090 unsigned long timeout = jiffies + msecs_to_jiffies(1000);
1092 /* send bits of data specified by reg */
1094 res = snd_hda_codec_read(codec, WIDGET_CHIP_CTRL, 0,
1096 if (res == VENDOR_STATUS_CHIPIO_OK)
1099 } while (time_before(jiffies, timeout));
1105 * Write chip address through the vendor widget -- NOT protected by the Mutex!
1107 static int chipio_write_address(struct hda_codec *codec,
1108 unsigned int chip_addx)
1110 struct ca0132_spec *spec = codec->spec;
1113 if (spec->curr_chip_addx == chip_addx)
1116 /* send low 16 bits of the address */
1117 res = chipio_send(codec, VENDOR_CHIPIO_ADDRESS_LOW,
1118 chip_addx & 0xffff);
1121 /* send high 16 bits of the address */
1122 res = chipio_send(codec, VENDOR_CHIPIO_ADDRESS_HIGH,
1126 spec->curr_chip_addx = (res < 0) ? ~0U : chip_addx;
1132 * Write data through the vendor widget -- NOT protected by the Mutex!
1134 static int chipio_write_data(struct hda_codec *codec, unsigned int data)
1136 struct ca0132_spec *spec = codec->spec;
1139 /* send low 16 bits of the data */
1140 res = chipio_send(codec, VENDOR_CHIPIO_DATA_LOW, data & 0xffff);
1143 /* send high 16 bits of the data */
1144 res = chipio_send(codec, VENDOR_CHIPIO_DATA_HIGH,
1148 /*If no error encountered, automatically increment the address
1149 as per chip behaviour*/
1150 spec->curr_chip_addx = (res != -EIO) ?
1151 (spec->curr_chip_addx + 4) : ~0U;
1156 * Write multiple data through the vendor widget -- NOT protected by the Mutex!
1158 static int chipio_write_data_multiple(struct hda_codec *codec,
1165 codec_dbg(codec, "chipio_write_data null ptr\n");
1169 while ((count-- != 0) && (status == 0))
1170 status = chipio_write_data(codec, *data++);
1177 * Read data through the vendor widget -- NOT protected by the Mutex!
1179 static int chipio_read_data(struct hda_codec *codec, unsigned int *data)
1181 struct ca0132_spec *spec = codec->spec;
1185 res = chipio_send(codec, VENDOR_CHIPIO_HIC_POST_READ, 0);
1189 res = chipio_send(codec, VENDOR_CHIPIO_STATUS, 0);
1194 *data = snd_hda_codec_read(codec, WIDGET_CHIP_CTRL, 0,
1195 VENDOR_CHIPIO_HIC_READ_DATA,
1199 /*If no error encountered, automatically increment the address
1200 as per chip behaviour*/
1201 spec->curr_chip_addx = (res != -EIO) ?
1202 (spec->curr_chip_addx + 4) : ~0U;
1207 * Write given value to the given address through the chip I/O widget.
1208 * protected by the Mutex
1210 static int chipio_write(struct hda_codec *codec,
1211 unsigned int chip_addx, const unsigned int data)
1213 struct ca0132_spec *spec = codec->spec;
1216 mutex_lock(&spec->chipio_mutex);
1218 /* write the address, and if successful proceed to write data */
1219 err = chipio_write_address(codec, chip_addx);
1223 err = chipio_write_data(codec, data);
1228 mutex_unlock(&spec->chipio_mutex);
1233 * Write given value to the given address through the chip I/O widget.
1234 * not protected by the Mutex
1236 static int chipio_write_no_mutex(struct hda_codec *codec,
1237 unsigned int chip_addx, const unsigned int data)
1242 /* write the address, and if successful proceed to write data */
1243 err = chipio_write_address(codec, chip_addx);
1247 err = chipio_write_data(codec, data);
1256 * Write multiple values to the given address through the chip I/O widget.
1257 * protected by the Mutex
1259 static int chipio_write_multiple(struct hda_codec *codec,
1264 struct ca0132_spec *spec = codec->spec;
1267 mutex_lock(&spec->chipio_mutex);
1268 status = chipio_write_address(codec, chip_addx);
1272 status = chipio_write_data_multiple(codec, data, count);
1274 mutex_unlock(&spec->chipio_mutex);
1280 * Read the given address through the chip I/O widget
1281 * protected by the Mutex
1283 static int chipio_read(struct hda_codec *codec,
1284 unsigned int chip_addx, unsigned int *data)
1286 struct ca0132_spec *spec = codec->spec;
1289 mutex_lock(&spec->chipio_mutex);
1291 /* write the address, and if successful proceed to write data */
1292 err = chipio_write_address(codec, chip_addx);
1296 err = chipio_read_data(codec, data);
1301 mutex_unlock(&spec->chipio_mutex);
1306 * Set chip control flags through the chip I/O widget.
1308 static void chipio_set_control_flag(struct hda_codec *codec,
1309 enum control_flag_id flag_id,
1313 unsigned int flag_bit;
1315 flag_bit = (flag_state ? 1 : 0);
1316 val = (flag_bit << 7) | (flag_id);
1317 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
1318 VENDOR_CHIPIO_FLAG_SET, val);
1322 * Set chip parameters through the chip I/O widget.
1324 static void chipio_set_control_param(struct hda_codec *codec,
1325 enum control_param_id param_id, int param_val)
1327 struct ca0132_spec *spec = codec->spec;
1330 if ((param_id < 32) && (param_val < 8)) {
1331 val = (param_val << 5) | (param_id);
1332 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
1333 VENDOR_CHIPIO_PARAM_SET, val);
1335 mutex_lock(&spec->chipio_mutex);
1336 if (chipio_send(codec, VENDOR_CHIPIO_STATUS, 0) == 0) {
1337 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
1338 VENDOR_CHIPIO_PARAM_EX_ID_SET,
1340 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
1341 VENDOR_CHIPIO_PARAM_EX_VALUE_SET,
1344 mutex_unlock(&spec->chipio_mutex);
1349 * Set chip parameters through the chip I/O widget. NO MUTEX.
1351 static void chipio_set_control_param_no_mutex(struct hda_codec *codec,
1352 enum control_param_id param_id, int param_val)
1356 if ((param_id < 32) && (param_val < 8)) {
1357 val = (param_val << 5) | (param_id);
1358 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
1359 VENDOR_CHIPIO_PARAM_SET, val);
1361 if (chipio_send(codec, VENDOR_CHIPIO_STATUS, 0) == 0) {
1362 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
1363 VENDOR_CHIPIO_PARAM_EX_ID_SET,
1365 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
1366 VENDOR_CHIPIO_PARAM_EX_VALUE_SET,
1372 * Connect stream to a source point, and then connect
1373 * that source point to a destination point.
1375 static void chipio_set_stream_source_dest(struct hda_codec *codec,
1376 int streamid, int source_point, int dest_point)
1378 chipio_set_control_param_no_mutex(codec,
1379 CONTROL_PARAM_STREAM_ID, streamid);
1380 chipio_set_control_param_no_mutex(codec,
1381 CONTROL_PARAM_STREAM_SOURCE_CONN_POINT, source_point);
1382 chipio_set_control_param_no_mutex(codec,
1383 CONTROL_PARAM_STREAM_DEST_CONN_POINT, dest_point);
1387 * Set number of channels in the selected stream.
1389 static void chipio_set_stream_channels(struct hda_codec *codec,
1390 int streamid, unsigned int channels)
1392 chipio_set_control_param_no_mutex(codec,
1393 CONTROL_PARAM_STREAM_ID, streamid);
1394 chipio_set_control_param_no_mutex(codec,
1395 CONTROL_PARAM_STREAMS_CHANNELS, channels);
1399 * Enable/Disable audio stream.
1401 static void chipio_set_stream_control(struct hda_codec *codec,
1402 int streamid, int enable)
1404 chipio_set_control_param_no_mutex(codec,
1405 CONTROL_PARAM_STREAM_ID, streamid);
1406 chipio_set_control_param_no_mutex(codec,
1407 CONTROL_PARAM_STREAM_CONTROL, enable);
1412 * Set sampling rate of the connection point. NO MUTEX.
1414 static void chipio_set_conn_rate_no_mutex(struct hda_codec *codec,
1415 int connid, enum ca0132_sample_rate rate)
1417 chipio_set_control_param_no_mutex(codec,
1418 CONTROL_PARAM_CONN_POINT_ID, connid);
1419 chipio_set_control_param_no_mutex(codec,
1420 CONTROL_PARAM_CONN_POINT_SAMPLE_RATE, rate);
1424 * Set sampling rate of the connection point.
1426 static void chipio_set_conn_rate(struct hda_codec *codec,
1427 int connid, enum ca0132_sample_rate rate)
1429 chipio_set_control_param(codec, CONTROL_PARAM_CONN_POINT_ID, connid);
1430 chipio_set_control_param(codec, CONTROL_PARAM_CONN_POINT_SAMPLE_RATE,
1437 static void chipio_enable_clocks(struct hda_codec *codec)
1439 struct ca0132_spec *spec = codec->spec;
1441 mutex_lock(&spec->chipio_mutex);
1442 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
1443 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0);
1444 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
1445 VENDOR_CHIPIO_PLL_PMU_WRITE, 0xff);
1446 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
1447 VENDOR_CHIPIO_8051_ADDRESS_LOW, 5);
1448 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
1449 VENDOR_CHIPIO_PLL_PMU_WRITE, 0x0b);
1450 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
1451 VENDOR_CHIPIO_8051_ADDRESS_LOW, 6);
1452 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
1453 VENDOR_CHIPIO_PLL_PMU_WRITE, 0xff);
1454 mutex_unlock(&spec->chipio_mutex);
1458 * CA0132 DSP IO stuffs
1460 static int dspio_send(struct hda_codec *codec, unsigned int reg,
1464 unsigned long timeout = jiffies + msecs_to_jiffies(1000);
1466 /* send bits of data specified by reg to dsp */
1468 res = snd_hda_codec_read(codec, WIDGET_DSP_CTRL, 0, reg, data);
1469 if ((res >= 0) && (res != VENDOR_STATUS_DSPIO_BUSY))
1472 } while (time_before(jiffies, timeout));
1478 * Wait for DSP to be ready for commands
1480 static void dspio_write_wait(struct hda_codec *codec)
1483 unsigned long timeout = jiffies + msecs_to_jiffies(1000);
1486 status = snd_hda_codec_read(codec, WIDGET_DSP_CTRL, 0,
1487 VENDOR_DSPIO_STATUS, 0);
1488 if ((status == VENDOR_STATUS_DSPIO_OK) ||
1489 (status == VENDOR_STATUS_DSPIO_SCP_RESPONSE_QUEUE_EMPTY))
1492 } while (time_before(jiffies, timeout));
1496 * Write SCP data to DSP
1498 static int dspio_write(struct hda_codec *codec, unsigned int scp_data)
1500 struct ca0132_spec *spec = codec->spec;
1503 dspio_write_wait(codec);
1505 mutex_lock(&spec->chipio_mutex);
1506 status = dspio_send(codec, VENDOR_DSPIO_SCP_WRITE_DATA_LOW,
1511 status = dspio_send(codec, VENDOR_DSPIO_SCP_WRITE_DATA_HIGH,
1516 /* OK, now check if the write itself has executed*/
1517 status = snd_hda_codec_read(codec, WIDGET_DSP_CTRL, 0,
1518 VENDOR_DSPIO_STATUS, 0);
1520 mutex_unlock(&spec->chipio_mutex);
1522 return (status == VENDOR_STATUS_DSPIO_SCP_COMMAND_QUEUE_FULL) ?
1527 * Write multiple SCP data to DSP
1529 static int dspio_write_multiple(struct hda_codec *codec,
1530 unsigned int *buffer, unsigned int size)
1539 while (count < size) {
1540 status = dspio_write(codec, *buffer++);
1549 static int dspio_read(struct hda_codec *codec, unsigned int *data)
1553 status = dspio_send(codec, VENDOR_DSPIO_SCP_POST_READ_DATA, 0);
1557 status = dspio_send(codec, VENDOR_DSPIO_STATUS, 0);
1558 if (status == -EIO ||
1559 status == VENDOR_STATUS_DSPIO_SCP_RESPONSE_QUEUE_EMPTY)
1562 *data = snd_hda_codec_read(codec, WIDGET_DSP_CTRL, 0,
1563 VENDOR_DSPIO_SCP_READ_DATA, 0);
1568 static int dspio_read_multiple(struct hda_codec *codec, unsigned int *buffer,
1569 unsigned int *buf_size, unsigned int size_count)
1572 unsigned int size = *buf_size;
1574 unsigned int skip_count;
1581 while (count < size && count < size_count) {
1582 status = dspio_read(codec, buffer++);
1590 while (skip_count < size) {
1591 status = dspio_read(codec, &dummy);
1603 * Construct the SCP header using corresponding fields
1605 static inline unsigned int
1606 make_scp_header(unsigned int target_id, unsigned int source_id,
1607 unsigned int get_flag, unsigned int req,
1608 unsigned int device_flag, unsigned int resp_flag,
1609 unsigned int error_flag, unsigned int data_size)
1611 unsigned int header = 0;
1613 header = (data_size & 0x1f) << 27;
1614 header |= (error_flag & 0x01) << 26;
1615 header |= (resp_flag & 0x01) << 25;
1616 header |= (device_flag & 0x01) << 24;
1617 header |= (req & 0x7f) << 17;
1618 header |= (get_flag & 0x01) << 16;
1619 header |= (source_id & 0xff) << 8;
1620 header |= target_id & 0xff;
1626 * Extract corresponding fields from SCP header
1629 extract_scp_header(unsigned int header,
1630 unsigned int *target_id, unsigned int *source_id,
1631 unsigned int *get_flag, unsigned int *req,
1632 unsigned int *device_flag, unsigned int *resp_flag,
1633 unsigned int *error_flag, unsigned int *data_size)
1636 *data_size = (header >> 27) & 0x1f;
1638 *error_flag = (header >> 26) & 0x01;
1640 *resp_flag = (header >> 25) & 0x01;
1642 *device_flag = (header >> 24) & 0x01;
1644 *req = (header >> 17) & 0x7f;
1646 *get_flag = (header >> 16) & 0x01;
1648 *source_id = (header >> 8) & 0xff;
1650 *target_id = header & 0xff;
1653 #define SCP_MAX_DATA_WORDS (16)
1655 /* Structure to contain any SCP message */
1658 unsigned int data[SCP_MAX_DATA_WORDS];
1661 static void dspio_clear_response_queue(struct hda_codec *codec)
1663 unsigned int dummy = 0;
1666 /* clear all from the response queue */
1668 status = dspio_read(codec, &dummy);
1669 } while (status == 0);
1672 static int dspio_get_response_data(struct hda_codec *codec)
1674 struct ca0132_spec *spec = codec->spec;
1675 unsigned int data = 0;
1678 if (dspio_read(codec, &data) < 0)
1681 if ((data & 0x00ffffff) == spec->wait_scp_header) {
1682 spec->scp_resp_header = data;
1683 spec->scp_resp_count = data >> 27;
1684 count = spec->wait_num_data;
1685 dspio_read_multiple(codec, spec->scp_resp_data,
1686 &spec->scp_resp_count, count);
1694 * Send SCP message to DSP
1696 static int dspio_send_scp_message(struct hda_codec *codec,
1697 unsigned char *send_buf,
1698 unsigned int send_buf_size,
1699 unsigned char *return_buf,
1700 unsigned int return_buf_size,
1701 unsigned int *bytes_returned)
1703 struct ca0132_spec *spec = codec->spec;
1705 unsigned int scp_send_size = 0;
1706 unsigned int total_size;
1707 bool waiting_for_resp = false;
1708 unsigned int header;
1709 struct scp_msg *ret_msg;
1710 unsigned int resp_src_id, resp_target_id;
1711 unsigned int data_size, src_id, target_id, get_flag, device_flag;
1714 *bytes_returned = 0;
1716 /* get scp header from buffer */
1717 header = *((unsigned int *)send_buf);
1718 extract_scp_header(header, &target_id, &src_id, &get_flag, NULL,
1719 &device_flag, NULL, NULL, &data_size);
1720 scp_send_size = data_size + 1;
1721 total_size = (scp_send_size * 4);
1723 if (send_buf_size < total_size)
1726 if (get_flag || device_flag) {
1727 if (!return_buf || return_buf_size < 4 || !bytes_returned)
1730 spec->wait_scp_header = *((unsigned int *)send_buf);
1732 /* swap source id with target id */
1733 resp_target_id = src_id;
1734 resp_src_id = target_id;
1735 spec->wait_scp_header &= 0xffff0000;
1736 spec->wait_scp_header |= (resp_src_id << 8) | (resp_target_id);
1737 spec->wait_num_data = return_buf_size/sizeof(unsigned int) - 1;
1739 waiting_for_resp = true;
1742 status = dspio_write_multiple(codec, (unsigned int *)send_buf,
1749 if (waiting_for_resp) {
1750 unsigned long timeout = jiffies + msecs_to_jiffies(1000);
1751 memset(return_buf, 0, return_buf_size);
1754 } while (spec->wait_scp && time_before(jiffies, timeout));
1755 waiting_for_resp = false;
1756 if (!spec->wait_scp) {
1757 ret_msg = (struct scp_msg *)return_buf;
1758 memcpy(&ret_msg->hdr, &spec->scp_resp_header, 4);
1759 memcpy(&ret_msg->data, spec->scp_resp_data,
1760 spec->wait_num_data);
1761 *bytes_returned = (spec->scp_resp_count + 1) * 4;
1773 * Prepare and send the SCP message to DSP
1774 * @codec: the HDA codec
1775 * @mod_id: ID of the DSP module to send the command
1776 * @req: ID of request to send to the DSP module
1778 * @data: pointer to the data to send with the request, request specific
1779 * @len: length of the data, in bytes
1780 * @reply: point to the buffer to hold data returned for a reply
1781 * @reply_len: length of the reply buffer returned from GET
1783 * Returns zero or a negative error code.
1785 static int dspio_scp(struct hda_codec *codec,
1786 int mod_id, int src_id, int req, int dir, const void *data,
1787 unsigned int len, void *reply, unsigned int *reply_len)
1790 struct scp_msg scp_send, scp_reply;
1791 unsigned int ret_bytes, send_size, ret_size;
1792 unsigned int send_get_flag, reply_resp_flag, reply_error_flag;
1793 unsigned int reply_data_size;
1795 memset(&scp_send, 0, sizeof(scp_send));
1796 memset(&scp_reply, 0, sizeof(scp_reply));
1798 if ((len != 0 && data == NULL) || (len > SCP_MAX_DATA_WORDS))
1801 if (dir == SCP_GET && reply == NULL) {
1802 codec_dbg(codec, "dspio_scp get but has no buffer\n");
1806 if (reply != NULL && (reply_len == NULL || (*reply_len == 0))) {
1807 codec_dbg(codec, "dspio_scp bad resp buf len parms\n");
1811 scp_send.hdr = make_scp_header(mod_id, src_id, (dir == SCP_GET), req,
1812 0, 0, 0, len/sizeof(unsigned int));
1813 if (data != NULL && len > 0) {
1814 len = min((unsigned int)(sizeof(scp_send.data)), len);
1815 memcpy(scp_send.data, data, len);
1819 send_size = sizeof(unsigned int) + len;
1820 status = dspio_send_scp_message(codec, (unsigned char *)&scp_send,
1821 send_size, (unsigned char *)&scp_reply,
1822 sizeof(scp_reply), &ret_bytes);
1825 codec_dbg(codec, "dspio_scp: send scp msg failed\n");
1829 /* extract send and reply headers members */
1830 extract_scp_header(scp_send.hdr, NULL, NULL, &send_get_flag,
1831 NULL, NULL, NULL, NULL, NULL);
1832 extract_scp_header(scp_reply.hdr, NULL, NULL, NULL, NULL, NULL,
1833 &reply_resp_flag, &reply_error_flag,
1839 if (reply_resp_flag && !reply_error_flag) {
1840 ret_size = (ret_bytes - sizeof(scp_reply.hdr))
1841 / sizeof(unsigned int);
1843 if (*reply_len < ret_size*sizeof(unsigned int)) {
1844 codec_dbg(codec, "reply too long for buf\n");
1846 } else if (ret_size != reply_data_size) {
1847 codec_dbg(codec, "RetLen and HdrLen .NE.\n");
1849 } else if (!reply) {
1850 codec_dbg(codec, "NULL reply\n");
1853 *reply_len = ret_size*sizeof(unsigned int);
1854 memcpy(reply, scp_reply.data, *reply_len);
1857 codec_dbg(codec, "reply ill-formed or errflag set\n");
1865 * Set DSP parameters
1867 static int dspio_set_param(struct hda_codec *codec, int mod_id,
1868 int src_id, int req, const void *data, unsigned int len)
1870 return dspio_scp(codec, mod_id, src_id, req, SCP_SET, data, len, NULL,
1874 static int dspio_set_uint_param(struct hda_codec *codec, int mod_id,
1875 int req, const unsigned int data)
1877 return dspio_set_param(codec, mod_id, 0x20, req, &data,
1878 sizeof(unsigned int));
1881 static int dspio_set_uint_param_no_source(struct hda_codec *codec, int mod_id,
1882 int req, const unsigned int data)
1884 return dspio_set_param(codec, mod_id, 0x00, req, &data,
1885 sizeof(unsigned int));
1889 * Allocate a DSP DMA channel via an SCP message
1891 static int dspio_alloc_dma_chan(struct hda_codec *codec, unsigned int *dma_chan)
1894 unsigned int size = sizeof(dma_chan);
1896 codec_dbg(codec, " dspio_alloc_dma_chan() -- begin\n");
1897 status = dspio_scp(codec, MASTERCONTROL, 0x20,
1898 MASTERCONTROL_ALLOC_DMA_CHAN, SCP_GET, NULL, 0,
1902 codec_dbg(codec, "dspio_alloc_dma_chan: SCP Failed\n");
1906 if ((*dma_chan + 1) == 0) {
1907 codec_dbg(codec, "no free dma channels to allocate\n");
1911 codec_dbg(codec, "dspio_alloc_dma_chan: chan=%d\n", *dma_chan);
1912 codec_dbg(codec, " dspio_alloc_dma_chan() -- complete\n");
1918 * Free a DSP DMA via an SCP message
1920 static int dspio_free_dma_chan(struct hda_codec *codec, unsigned int dma_chan)
1923 unsigned int dummy = 0;
1925 codec_dbg(codec, " dspio_free_dma_chan() -- begin\n");
1926 codec_dbg(codec, "dspio_free_dma_chan: chan=%d\n", dma_chan);
1928 status = dspio_scp(codec, MASTERCONTROL, 0x20,
1929 MASTERCONTROL_ALLOC_DMA_CHAN, SCP_SET, &dma_chan,
1930 sizeof(dma_chan), NULL, &dummy);
1933 codec_dbg(codec, "dspio_free_dma_chan: SCP Failed\n");
1937 codec_dbg(codec, " dspio_free_dma_chan() -- complete\n");
1945 static int dsp_set_run_state(struct hda_codec *codec)
1947 unsigned int dbg_ctrl_reg;
1948 unsigned int halt_state;
1951 err = chipio_read(codec, DSP_DBGCNTL_INST_OFFSET, &dbg_ctrl_reg);
1955 halt_state = (dbg_ctrl_reg & DSP_DBGCNTL_STATE_MASK) >>
1956 DSP_DBGCNTL_STATE_LOBIT;
1958 if (halt_state != 0) {
1959 dbg_ctrl_reg &= ~((halt_state << DSP_DBGCNTL_SS_LOBIT) &
1960 DSP_DBGCNTL_SS_MASK);
1961 err = chipio_write(codec, DSP_DBGCNTL_INST_OFFSET,
1966 dbg_ctrl_reg |= (halt_state << DSP_DBGCNTL_EXEC_LOBIT) &
1967 DSP_DBGCNTL_EXEC_MASK;
1968 err = chipio_write(codec, DSP_DBGCNTL_INST_OFFSET,
1980 static int dsp_reset(struct hda_codec *codec)
1985 codec_dbg(codec, "dsp_reset\n");
1987 res = dspio_send(codec, VENDOR_DSPIO_DSP_INIT, 0);
1989 } while (res == -EIO && retry);
1992 codec_dbg(codec, "dsp_reset timeout\n");
2000 * Convert chip address to DSP address
2002 static unsigned int dsp_chip_to_dsp_addx(unsigned int chip_addx,
2003 bool *code, bool *yram)
2005 *code = *yram = false;
2007 if (UC_RANGE(chip_addx, 1)) {
2009 return UC_OFF(chip_addx);
2010 } else if (X_RANGE_ALL(chip_addx, 1)) {
2011 return X_OFF(chip_addx);
2012 } else if (Y_RANGE_ALL(chip_addx, 1)) {
2014 return Y_OFF(chip_addx);
2017 return INVALID_CHIP_ADDRESS;
2021 * Check if the DSP DMA is active
2023 static bool dsp_is_dma_active(struct hda_codec *codec, unsigned int dma_chan)
2025 unsigned int dma_chnlstart_reg;
2027 chipio_read(codec, DSPDMAC_CHNLSTART_INST_OFFSET, &dma_chnlstart_reg);
2029 return ((dma_chnlstart_reg & (1 <<
2030 (DSPDMAC_CHNLSTART_EN_LOBIT + dma_chan))) != 0);
2033 static int dsp_dma_setup_common(struct hda_codec *codec,
2034 unsigned int chip_addx,
2035 unsigned int dma_chan,
2036 unsigned int port_map_mask,
2040 unsigned int chnl_prop;
2041 unsigned int dsp_addx;
2042 unsigned int active;
2045 codec_dbg(codec, "-- dsp_dma_setup_common() -- Begin ---------\n");
2047 if (dma_chan >= DSPDMAC_DMA_CFG_CHANNEL_COUNT) {
2048 codec_dbg(codec, "dma chan num invalid\n");
2052 if (dsp_is_dma_active(codec, dma_chan)) {
2053 codec_dbg(codec, "dma already active\n");
2057 dsp_addx = dsp_chip_to_dsp_addx(chip_addx, &code, &yram);
2059 if (dsp_addx == INVALID_CHIP_ADDRESS) {
2060 codec_dbg(codec, "invalid chip addr\n");
2064 chnl_prop = DSPDMAC_CHNLPROP_AC_MASK;
2067 codec_dbg(codec, " dsp_dma_setup_common() start reg pgm\n");
2070 status = chipio_read(codec, DSPDMAC_CHNLPROP_INST_OFFSET,
2074 codec_dbg(codec, "read CHNLPROP Reg fail\n");
2077 codec_dbg(codec, "dsp_dma_setup_common() Read CHNLPROP\n");
2081 chnl_prop &= ~(1 << (DSPDMAC_CHNLPROP_MSPCE_LOBIT + dma_chan));
2083 chnl_prop |= (1 << (DSPDMAC_CHNLPROP_MSPCE_LOBIT + dma_chan));
2085 chnl_prop &= ~(1 << (DSPDMAC_CHNLPROP_DCON_LOBIT + dma_chan));
2087 status = chipio_write(codec, DSPDMAC_CHNLPROP_INST_OFFSET, chnl_prop);
2089 codec_dbg(codec, "write CHNLPROP Reg fail\n");
2092 codec_dbg(codec, " dsp_dma_setup_common() Write CHNLPROP\n");
2095 status = chipio_read(codec, DSPDMAC_ACTIVE_INST_OFFSET,
2099 codec_dbg(codec, "read ACTIVE Reg fail\n");
2102 codec_dbg(codec, "dsp_dma_setup_common() Read ACTIVE\n");
2105 active &= (~(1 << (DSPDMAC_ACTIVE_AAR_LOBIT + dma_chan))) &
2106 DSPDMAC_ACTIVE_AAR_MASK;
2108 status = chipio_write(codec, DSPDMAC_ACTIVE_INST_OFFSET, active);
2110 codec_dbg(codec, "write ACTIVE Reg fail\n");
2114 codec_dbg(codec, " dsp_dma_setup_common() Write ACTIVE\n");
2116 status = chipio_write(codec, DSPDMAC_AUDCHSEL_INST_OFFSET(dma_chan),
2119 codec_dbg(codec, "write AUDCHSEL Reg fail\n");
2122 codec_dbg(codec, " dsp_dma_setup_common() Write AUDCHSEL\n");
2124 status = chipio_write(codec, DSPDMAC_IRQCNT_INST_OFFSET(dma_chan),
2125 DSPDMAC_IRQCNT_BICNT_MASK | DSPDMAC_IRQCNT_CICNT_MASK);
2127 codec_dbg(codec, "write IRQCNT Reg fail\n");
2130 codec_dbg(codec, " dsp_dma_setup_common() Write IRQCNT\n");
2133 "ChipA=0x%x,DspA=0x%x,dmaCh=%u, "
2134 "CHSEL=0x%x,CHPROP=0x%x,Active=0x%x\n",
2135 chip_addx, dsp_addx, dma_chan,
2136 port_map_mask, chnl_prop, active);
2138 codec_dbg(codec, "-- dsp_dma_setup_common() -- Complete ------\n");
2144 * Setup the DSP DMA per-transfer-specific registers
2146 static int dsp_dma_setup(struct hda_codec *codec,
2147 unsigned int chip_addx,
2149 unsigned int dma_chan)
2153 unsigned int dsp_addx;
2154 unsigned int addr_field;
2155 unsigned int incr_field;
2156 unsigned int base_cnt;
2157 unsigned int cur_cnt;
2158 unsigned int dma_cfg = 0;
2159 unsigned int adr_ofs = 0;
2160 unsigned int xfr_cnt = 0;
2161 const unsigned int max_dma_count = 1 << (DSPDMAC_XFRCNT_BCNT_HIBIT -
2162 DSPDMAC_XFRCNT_BCNT_LOBIT + 1);
2164 codec_dbg(codec, "-- dsp_dma_setup() -- Begin ---------\n");
2166 if (count > max_dma_count) {
2167 codec_dbg(codec, "count too big\n");
2171 dsp_addx = dsp_chip_to_dsp_addx(chip_addx, &code, &yram);
2172 if (dsp_addx == INVALID_CHIP_ADDRESS) {
2173 codec_dbg(codec, "invalid chip addr\n");
2177 codec_dbg(codec, " dsp_dma_setup() start reg pgm\n");
2179 addr_field = dsp_addx << DSPDMAC_DMACFG_DBADR_LOBIT;
2185 addr_field |= (1 << DSPDMAC_DMACFG_DBADR_LOBIT);
2187 incr_field = (1 << DSPDMAC_DMACFG_AINCR_LOBIT);
2190 dma_cfg = addr_field + incr_field;
2191 status = chipio_write(codec, DSPDMAC_DMACFG_INST_OFFSET(dma_chan),
2194 codec_dbg(codec, "write DMACFG Reg fail\n");
2197 codec_dbg(codec, " dsp_dma_setup() Write DMACFG\n");
2199 adr_ofs = (count - 1) << (DSPDMAC_DSPADROFS_BOFS_LOBIT +
2202 status = chipio_write(codec, DSPDMAC_DSPADROFS_INST_OFFSET(dma_chan),
2205 codec_dbg(codec, "write DSPADROFS Reg fail\n");
2208 codec_dbg(codec, " dsp_dma_setup() Write DSPADROFS\n");
2210 base_cnt = (count - 1) << DSPDMAC_XFRCNT_BCNT_LOBIT;
2212 cur_cnt = (count - 1) << DSPDMAC_XFRCNT_CCNT_LOBIT;
2214 xfr_cnt = base_cnt | cur_cnt;
2216 status = chipio_write(codec,
2217 DSPDMAC_XFRCNT_INST_OFFSET(dma_chan), xfr_cnt);
2219 codec_dbg(codec, "write XFRCNT Reg fail\n");
2222 codec_dbg(codec, " dsp_dma_setup() Write XFRCNT\n");
2225 "ChipA=0x%x, cnt=0x%x, DMACFG=0x%x, "
2226 "ADROFS=0x%x, XFRCNT=0x%x\n",
2227 chip_addx, count, dma_cfg, adr_ofs, xfr_cnt);
2229 codec_dbg(codec, "-- dsp_dma_setup() -- Complete ---------\n");
2237 static int dsp_dma_start(struct hda_codec *codec,
2238 unsigned int dma_chan, bool ovly)
2240 unsigned int reg = 0;
2243 codec_dbg(codec, "-- dsp_dma_start() -- Begin ---------\n");
2246 status = chipio_read(codec,
2247 DSPDMAC_CHNLSTART_INST_OFFSET, ®);
2250 codec_dbg(codec, "read CHNLSTART reg fail\n");
2253 codec_dbg(codec, "-- dsp_dma_start() Read CHNLSTART\n");
2255 reg &= ~(DSPDMAC_CHNLSTART_EN_MASK |
2256 DSPDMAC_CHNLSTART_DIS_MASK);
2259 status = chipio_write(codec, DSPDMAC_CHNLSTART_INST_OFFSET,
2260 reg | (1 << (dma_chan + DSPDMAC_CHNLSTART_EN_LOBIT)));
2262 codec_dbg(codec, "write CHNLSTART reg fail\n");
2265 codec_dbg(codec, "-- dsp_dma_start() -- Complete ---------\n");
2273 static int dsp_dma_stop(struct hda_codec *codec,
2274 unsigned int dma_chan, bool ovly)
2276 unsigned int reg = 0;
2279 codec_dbg(codec, "-- dsp_dma_stop() -- Begin ---------\n");
2282 status = chipio_read(codec,
2283 DSPDMAC_CHNLSTART_INST_OFFSET, ®);
2286 codec_dbg(codec, "read CHNLSTART reg fail\n");
2289 codec_dbg(codec, "-- dsp_dma_stop() Read CHNLSTART\n");
2290 reg &= ~(DSPDMAC_CHNLSTART_EN_MASK |
2291 DSPDMAC_CHNLSTART_DIS_MASK);
2294 status = chipio_write(codec, DSPDMAC_CHNLSTART_INST_OFFSET,
2295 reg | (1 << (dma_chan + DSPDMAC_CHNLSTART_DIS_LOBIT)));
2297 codec_dbg(codec, "write CHNLSTART reg fail\n");
2300 codec_dbg(codec, "-- dsp_dma_stop() -- Complete ---------\n");
2306 * Allocate router ports
2308 * @codec: the HDA codec
2309 * @num_chans: number of channels in the stream
2310 * @ports_per_channel: number of ports per channel
2311 * @start_device: start device
2312 * @port_map: pointer to the port list to hold the allocated ports
2314 * Returns zero or a negative error code.
2316 static int dsp_allocate_router_ports(struct hda_codec *codec,
2317 unsigned int num_chans,
2318 unsigned int ports_per_channel,
2319 unsigned int start_device,
2320 unsigned int *port_map)
2326 status = chipio_send(codec, VENDOR_CHIPIO_STATUS, 0);
2330 val = start_device << 6;
2331 val |= (ports_per_channel - 1) << 4;
2332 val |= num_chans - 1;
2334 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
2335 VENDOR_CHIPIO_PORT_ALLOC_CONFIG_SET,
2338 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
2339 VENDOR_CHIPIO_PORT_ALLOC_SET,
2342 status = chipio_send(codec, VENDOR_CHIPIO_STATUS, 0);
2346 res = snd_hda_codec_read(codec, WIDGET_CHIP_CTRL, 0,
2347 VENDOR_CHIPIO_PORT_ALLOC_GET, 0);
2351 return (res < 0) ? res : 0;
2357 static int dsp_free_router_ports(struct hda_codec *codec)
2361 status = chipio_send(codec, VENDOR_CHIPIO_STATUS, 0);
2365 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
2366 VENDOR_CHIPIO_PORT_FREE_SET,
2369 status = chipio_send(codec, VENDOR_CHIPIO_STATUS, 0);
2375 * Allocate DSP ports for the download stream
2377 static int dsp_allocate_ports(struct hda_codec *codec,
2378 unsigned int num_chans,
2379 unsigned int rate_multi, unsigned int *port_map)
2383 codec_dbg(codec, " dsp_allocate_ports() -- begin\n");
2385 if ((rate_multi != 1) && (rate_multi != 2) && (rate_multi != 4)) {
2386 codec_dbg(codec, "bad rate multiple\n");
2390 status = dsp_allocate_router_ports(codec, num_chans,
2391 rate_multi, 0, port_map);
2393 codec_dbg(codec, " dsp_allocate_ports() -- complete\n");
2398 static int dsp_allocate_ports_format(struct hda_codec *codec,
2399 const unsigned short fmt,
2400 unsigned int *port_map)
2403 unsigned int num_chans;
2405 unsigned int sample_rate_div = ((get_hdafmt_rate(fmt) >> 0) & 3) + 1;
2406 unsigned int sample_rate_mul = ((get_hdafmt_rate(fmt) >> 3) & 3) + 1;
2407 unsigned int rate_multi = sample_rate_mul / sample_rate_div;
2409 if ((rate_multi != 1) && (rate_multi != 2) && (rate_multi != 4)) {
2410 codec_dbg(codec, "bad rate multiple\n");
2414 num_chans = get_hdafmt_chs(fmt) + 1;
2416 status = dsp_allocate_ports(codec, num_chans, rate_multi, port_map);
2424 static int dsp_free_ports(struct hda_codec *codec)
2428 codec_dbg(codec, " dsp_free_ports() -- begin\n");
2430 status = dsp_free_router_ports(codec);
2432 codec_dbg(codec, "free router ports fail\n");
2435 codec_dbg(codec, " dsp_free_ports() -- complete\n");
2441 * HDA DMA engine stuffs for DSP code download
2444 struct hda_codec *codec;
2445 unsigned short m_converter_format;
2446 struct snd_dma_buffer *dmab;
2447 unsigned int buf_size;
2456 static int dma_convert_to_hda_format(struct hda_codec *codec,
2457 unsigned int sample_rate,
2458 unsigned short channels,
2459 unsigned short *hda_format)
2461 unsigned int format_val;
2463 format_val = snd_hdac_calc_stream_format(sample_rate,
2464 channels, SNDRV_PCM_FORMAT_S32_LE, 32, 0);
2467 *hda_format = (unsigned short)format_val;
2473 * Reset DMA for DSP download
2475 static int dma_reset(struct dma_engine *dma)
2477 struct hda_codec *codec = dma->codec;
2478 struct ca0132_spec *spec = codec->spec;
2481 if (dma->dmab->area)
2482 snd_hda_codec_load_dsp_cleanup(codec, dma->dmab);
2484 status = snd_hda_codec_load_dsp_prepare(codec,
2485 dma->m_converter_format,
2490 spec->dsp_stream_id = status;
2494 static int dma_set_state(struct dma_engine *dma, enum dma_state state)
2499 case DMA_STATE_STOP:
2509 snd_hda_codec_load_dsp_trigger(dma->codec, cmd);
2513 static unsigned int dma_get_buffer_size(struct dma_engine *dma)
2515 return dma->dmab->bytes;
2518 static unsigned char *dma_get_buffer_addr(struct dma_engine *dma)
2520 return dma->dmab->area;
2523 static int dma_xfer(struct dma_engine *dma,
2524 const unsigned int *data,
2527 memcpy(dma->dmab->area, data, count);
2531 static void dma_get_converter_format(
2532 struct dma_engine *dma,
2533 unsigned short *format)
2536 *format = dma->m_converter_format;
2539 static unsigned int dma_get_stream_id(struct dma_engine *dma)
2541 struct ca0132_spec *spec = dma->codec->spec;
2543 return spec->dsp_stream_id;
2546 struct dsp_image_seg {
2553 static const u32 g_magic_value = 0x4c46584d;
2554 static const u32 g_chip_addr_magic_value = 0xFFFFFF01;
2556 static bool is_valid(const struct dsp_image_seg *p)
2558 return p->magic == g_magic_value;
2561 static bool is_hci_prog_list_seg(const struct dsp_image_seg *p)
2563 return g_chip_addr_magic_value == p->chip_addr;
2566 static bool is_last(const struct dsp_image_seg *p)
2568 return p->count == 0;
2571 static size_t dsp_sizeof(const struct dsp_image_seg *p)
2573 return sizeof(*p) + p->count*sizeof(u32);
2576 static const struct dsp_image_seg *get_next_seg_ptr(
2577 const struct dsp_image_seg *p)
2579 return (struct dsp_image_seg *)((unsigned char *)(p) + dsp_sizeof(p));
2583 * CA0132 chip DSP transfer stuffs. For DSP download.
2585 #define INVALID_DMA_CHANNEL (~0U)
2588 * Program a list of address/data pairs via the ChipIO widget.
2589 * The segment data is in the format of successive pairs of words.
2590 * These are repeated as indicated by the segment's count field.
2592 static int dspxfr_hci_write(struct hda_codec *codec,
2593 const struct dsp_image_seg *fls)
2599 if (fls == NULL || fls->chip_addr != g_chip_addr_magic_value) {
2600 codec_dbg(codec, "hci_write invalid params\n");
2605 data = (u32 *)(fls->data);
2606 while (count >= 2) {
2607 status = chipio_write(codec, data[0], data[1]);
2609 codec_dbg(codec, "hci_write chipio failed\n");
2619 * Write a block of data into DSP code or data RAM using pre-allocated
2622 * @codec: the HDA codec
2623 * @fls: pointer to a fast load image
2624 * @reloc: Relocation address for loading single-segment overlays, or 0 for
2626 * @dma_engine: pointer to DMA engine to be used for DSP download
2627 * @dma_chan: The number of DMA channels used for DSP download
2628 * @port_map_mask: port mapping
2629 * @ovly: TRUE if overlay format is required
2631 * Returns zero or a negative error code.
2633 static int dspxfr_one_seg(struct hda_codec *codec,
2634 const struct dsp_image_seg *fls,
2636 struct dma_engine *dma_engine,
2637 unsigned int dma_chan,
2638 unsigned int port_map_mask,
2642 bool comm_dma_setup_done = false;
2643 const unsigned int *data;
2644 unsigned int chip_addx;
2645 unsigned int words_to_write;
2646 unsigned int buffer_size_words;
2647 unsigned char *buffer_addx;
2648 unsigned short hda_format;
2649 unsigned int sample_rate_div;
2650 unsigned int sample_rate_mul;
2651 unsigned int num_chans;
2652 unsigned int hda_frame_size_words;
2653 unsigned int remainder_words;
2654 const u32 *data_remainder;
2655 u32 chip_addx_remainder;
2656 unsigned int run_size_words;
2657 const struct dsp_image_seg *hci_write = NULL;
2658 unsigned long timeout;
2663 if (is_hci_prog_list_seg(fls)) {
2665 fls = get_next_seg_ptr(fls);
2668 if (hci_write && (!fls || is_last(fls))) {
2669 codec_dbg(codec, "hci_write\n");
2670 return dspxfr_hci_write(codec, hci_write);
2673 if (fls == NULL || dma_engine == NULL || port_map_mask == 0) {
2674 codec_dbg(codec, "Invalid Params\n");
2679 chip_addx = fls->chip_addr,
2680 words_to_write = fls->count;
2682 if (!words_to_write)
2683 return hci_write ? dspxfr_hci_write(codec, hci_write) : 0;
2685 chip_addx = (chip_addx & (0xFFFF0000 << 2)) + (reloc << 2);
2687 if (!UC_RANGE(chip_addx, words_to_write) &&
2688 !X_RANGE_ALL(chip_addx, words_to_write) &&
2689 !Y_RANGE_ALL(chip_addx, words_to_write)) {
2690 codec_dbg(codec, "Invalid chip_addx Params\n");
2694 buffer_size_words = (unsigned int)dma_get_buffer_size(dma_engine) /
2697 buffer_addx = dma_get_buffer_addr(dma_engine);
2699 if (buffer_addx == NULL) {
2700 codec_dbg(codec, "dma_engine buffer NULL\n");
2704 dma_get_converter_format(dma_engine, &hda_format);
2705 sample_rate_div = ((get_hdafmt_rate(hda_format) >> 0) & 3) + 1;
2706 sample_rate_mul = ((get_hdafmt_rate(hda_format) >> 3) & 3) + 1;
2707 num_chans = get_hdafmt_chs(hda_format) + 1;
2709 hda_frame_size_words = ((sample_rate_div == 0) ? 0 :
2710 (num_chans * sample_rate_mul / sample_rate_div));
2712 if (hda_frame_size_words == 0) {
2713 codec_dbg(codec, "frmsz zero\n");
2717 buffer_size_words = min(buffer_size_words,
2718 (unsigned int)(UC_RANGE(chip_addx, 1) ?
2720 buffer_size_words -= buffer_size_words % hda_frame_size_words;
2722 "chpadr=0x%08x frmsz=%u nchan=%u "
2723 "rate_mul=%u div=%u bufsz=%u\n",
2724 chip_addx, hda_frame_size_words, num_chans,
2725 sample_rate_mul, sample_rate_div, buffer_size_words);
2727 if (buffer_size_words < hda_frame_size_words) {
2728 codec_dbg(codec, "dspxfr_one_seg:failed\n");
2732 remainder_words = words_to_write % hda_frame_size_words;
2733 data_remainder = data;
2734 chip_addx_remainder = chip_addx;
2736 data += remainder_words;
2737 chip_addx += remainder_words*sizeof(u32);
2738 words_to_write -= remainder_words;
2740 while (words_to_write != 0) {
2741 run_size_words = min(buffer_size_words, words_to_write);
2742 codec_dbg(codec, "dspxfr (seg loop)cnt=%u rs=%u remainder=%u\n",
2743 words_to_write, run_size_words, remainder_words);
2744 dma_xfer(dma_engine, data, run_size_words*sizeof(u32));
2745 if (!comm_dma_setup_done) {
2746 status = dsp_dma_stop(codec, dma_chan, ovly);
2749 status = dsp_dma_setup_common(codec, chip_addx,
2750 dma_chan, port_map_mask, ovly);
2753 comm_dma_setup_done = true;
2756 status = dsp_dma_setup(codec, chip_addx,
2757 run_size_words, dma_chan);
2760 status = dsp_dma_start(codec, dma_chan, ovly);
2763 if (!dsp_is_dma_active(codec, dma_chan)) {
2764 codec_dbg(codec, "dspxfr:DMA did not start\n");
2767 status = dma_set_state(dma_engine, DMA_STATE_RUN);
2770 if (remainder_words != 0) {
2771 status = chipio_write_multiple(codec,
2772 chip_addx_remainder,
2777 remainder_words = 0;
2780 status = dspxfr_hci_write(codec, hci_write);
2786 timeout = jiffies + msecs_to_jiffies(2000);
2788 dma_active = dsp_is_dma_active(codec, dma_chan);
2792 } while (time_before(jiffies, timeout));
2796 codec_dbg(codec, "+++++ DMA complete\n");
2797 dma_set_state(dma_engine, DMA_STATE_STOP);
2798 status = dma_reset(dma_engine);
2803 data += run_size_words;
2804 chip_addx += run_size_words*sizeof(u32);
2805 words_to_write -= run_size_words;
2808 if (remainder_words != 0) {
2809 status = chipio_write_multiple(codec, chip_addx_remainder,
2810 data_remainder, remainder_words);
2817 * Write the entire DSP image of a DSP code/data overlay to DSP memories
2819 * @codec: the HDA codec
2820 * @fls_data: pointer to a fast load image
2821 * @reloc: Relocation address for loading single-segment overlays, or 0 for
2823 * @sample_rate: sampling rate of the stream used for DSP download
2824 * @channels: channels of the stream used for DSP download
2825 * @ovly: TRUE if overlay format is required
2827 * Returns zero or a negative error code.
2829 static int dspxfr_image(struct hda_codec *codec,
2830 const struct dsp_image_seg *fls_data,
2832 unsigned int sample_rate,
2833 unsigned short channels,
2836 struct ca0132_spec *spec = codec->spec;
2838 unsigned short hda_format = 0;
2839 unsigned int response;
2840 unsigned char stream_id = 0;
2841 struct dma_engine *dma_engine;
2842 unsigned int dma_chan;
2843 unsigned int port_map_mask;
2845 if (fls_data == NULL)
2848 dma_engine = kzalloc(sizeof(*dma_engine), GFP_KERNEL);
2852 dma_engine->dmab = kzalloc(sizeof(*dma_engine->dmab), GFP_KERNEL);
2853 if (!dma_engine->dmab) {
2858 dma_engine->codec = codec;
2859 dma_convert_to_hda_format(codec, sample_rate, channels, &hda_format);
2860 dma_engine->m_converter_format = hda_format;
2861 dma_engine->buf_size = (ovly ? DSP_DMA_WRITE_BUFLEN_OVLY :
2862 DSP_DMA_WRITE_BUFLEN_INIT) * 2;
2864 dma_chan = ovly ? INVALID_DMA_CHANNEL : 0;
2866 status = codec_set_converter_format(codec, WIDGET_CHIP_CTRL,
2867 hda_format, &response);
2870 codec_dbg(codec, "set converter format fail\n");
2874 status = snd_hda_codec_load_dsp_prepare(codec,
2875 dma_engine->m_converter_format,
2876 dma_engine->buf_size,
2880 spec->dsp_stream_id = status;
2883 status = dspio_alloc_dma_chan(codec, &dma_chan);
2885 codec_dbg(codec, "alloc dmachan fail\n");
2886 dma_chan = INVALID_DMA_CHANNEL;
2892 status = dsp_allocate_ports_format(codec, hda_format,
2895 codec_dbg(codec, "alloc ports fail\n");
2899 stream_id = dma_get_stream_id(dma_engine);
2900 status = codec_set_converter_stream_channel(codec,
2901 WIDGET_CHIP_CTRL, stream_id, 0, &response);
2903 codec_dbg(codec, "set stream chan fail\n");
2907 while ((fls_data != NULL) && !is_last(fls_data)) {
2908 if (!is_valid(fls_data)) {
2909 codec_dbg(codec, "FLS check fail\n");
2913 status = dspxfr_one_seg(codec, fls_data, reloc,
2914 dma_engine, dma_chan,
2915 port_map_mask, ovly);
2919 if (is_hci_prog_list_seg(fls_data))
2920 fls_data = get_next_seg_ptr(fls_data);
2922 if ((fls_data != NULL) && !is_last(fls_data))
2923 fls_data = get_next_seg_ptr(fls_data);
2926 if (port_map_mask != 0)
2927 status = dsp_free_ports(codec);
2932 status = codec_set_converter_stream_channel(codec,
2933 WIDGET_CHIP_CTRL, 0, 0, &response);
2936 if (ovly && (dma_chan != INVALID_DMA_CHANNEL))
2937 dspio_free_dma_chan(codec, dma_chan);
2939 if (dma_engine->dmab->area)
2940 snd_hda_codec_load_dsp_cleanup(codec, dma_engine->dmab);
2941 kfree(dma_engine->dmab);
2948 * CA0132 DSP download stuffs.
2950 static void dspload_post_setup(struct hda_codec *codec)
2952 struct ca0132_spec *spec = codec->spec;
2953 codec_dbg(codec, "---- dspload_post_setup ------\n");
2954 if (!spec->use_alt_functions) {
2955 /*set DSP speaker to 2.0 configuration*/
2956 chipio_write(codec, XRAM_XRAM_INST_OFFSET(0x18), 0x08080080);
2957 chipio_write(codec, XRAM_XRAM_INST_OFFSET(0x19), 0x3f800000);
2959 /*update write pointer*/
2960 chipio_write(codec, XRAM_XRAM_INST_OFFSET(0x29), 0x00000002);
2965 * dspload_image - Download DSP from a DSP Image Fast Load structure.
2967 * @codec: the HDA codec
2968 * @fls: pointer to a fast load image
2969 * @ovly: TRUE if overlay format is required
2970 * @reloc: Relocation address for loading single-segment overlays, or 0 for
2972 * @autostart: TRUE if DSP starts after loading; ignored if ovly is TRUE
2973 * @router_chans: number of audio router channels to be allocated (0 means use
2974 * internal defaults; max is 32)
2976 * Download DSP from a DSP Image Fast Load structure. This structure is a
2977 * linear, non-constant sized element array of structures, each of which
2978 * contain the count of the data to be loaded, the data itself, and the
2979 * corresponding starting chip address of the starting data location.
2980 * Returns zero or a negative error code.
2982 static int dspload_image(struct hda_codec *codec,
2983 const struct dsp_image_seg *fls,
2990 unsigned int sample_rate;
2991 unsigned short channels;
2993 codec_dbg(codec, "---- dspload_image begin ------\n");
2994 if (router_chans == 0) {
2996 router_chans = DMA_TRANSFER_FRAME_SIZE_NWORDS;
2998 router_chans = DMA_OVERLAY_FRAME_SIZE_NWORDS;
3001 sample_rate = 48000;
3002 channels = (unsigned short)router_chans;
3004 while (channels > 16) {
3010 codec_dbg(codec, "Ready to program DMA\n");
3012 status = dsp_reset(codec);
3017 codec_dbg(codec, "dsp_reset() complete\n");
3018 status = dspxfr_image(codec, fls, reloc, sample_rate, channels,
3024 codec_dbg(codec, "dspxfr_image() complete\n");
3025 if (autostart && !ovly) {
3026 dspload_post_setup(codec);
3027 status = dsp_set_run_state(codec);
3030 codec_dbg(codec, "LOAD FINISHED\n");
3036 #ifdef CONFIG_SND_HDA_CODEC_CA0132_DSP
3037 static bool dspload_is_loaded(struct hda_codec *codec)
3039 unsigned int data = 0;
3042 status = chipio_read(codec, 0x40004, &data);
3043 if ((status < 0) || (data != 1))
3049 #define dspload_is_loaded(codec) false
3052 static bool dspload_wait_loaded(struct hda_codec *codec)
3054 unsigned long timeout = jiffies + msecs_to_jiffies(2000);
3057 if (dspload_is_loaded(codec)) {
3058 codec_info(codec, "ca0132 DSP downloaded and running\n");
3062 } while (time_before(jiffies, timeout));
3064 codec_err(codec, "ca0132 failed to download DSP\n");
3069 * Setup GPIO for the other variants of Core3D.
3073 * Sets up the GPIO pins so that they are discoverable. If this isn't done,
3074 * the card shows as having no GPIO pins.
3076 static void ca0132_gpio_init(struct hda_codec *codec)
3078 struct ca0132_spec *spec = codec->spec;
3080 switch (spec->quirk) {
3082 snd_hda_codec_write(codec, 0x01, 0, 0x793, 0x00);
3083 snd_hda_codec_write(codec, 0x01, 0, 0x794, 0x53);
3084 snd_hda_codec_write(codec, 0x01, 0, 0x790, 0x23);
3087 snd_hda_codec_write(codec, 0x01, 0, 0x793, 0x00);
3088 snd_hda_codec_write(codec, 0x01, 0, 0x794, 0x5B);
3094 /* Sets the GPIO for audio output. */
3095 static void ca0132_gpio_setup(struct hda_codec *codec)
3097 struct ca0132_spec *spec = codec->spec;
3099 switch (spec->quirk) {
3101 snd_hda_codec_write(codec, 0x01, 0,
3102 AC_VERB_SET_GPIO_DIRECTION, 0x07);
3103 snd_hda_codec_write(codec, 0x01, 0,
3104 AC_VERB_SET_GPIO_MASK, 0x07);
3105 snd_hda_codec_write(codec, 0x01, 0,
3106 AC_VERB_SET_GPIO_DATA, 0x04);
3107 snd_hda_codec_write(codec, 0x01, 0,
3108 AC_VERB_SET_GPIO_DATA, 0x06);
3111 snd_hda_codec_write(codec, 0x01, 0,
3112 AC_VERB_SET_GPIO_DIRECTION, 0x1E);
3113 snd_hda_codec_write(codec, 0x01, 0,
3114 AC_VERB_SET_GPIO_MASK, 0x1F);
3115 snd_hda_codec_write(codec, 0x01, 0,
3116 AC_VERB_SET_GPIO_DATA, 0x0C);
3122 * GPIO control functions for the Recon3D integrated.
3125 enum r3di_gpio_bit {
3126 /* Bit 1 - Switch between front/rear mic. 0 = rear, 1 = front */
3127 R3DI_MIC_SELECT_BIT = 1,
3128 /* Bit 2 - Switch between headphone/line out. 0 = Headphone, 1 = Line */
3129 R3DI_OUT_SELECT_BIT = 2,
3131 * I dunno what this actually does, but it stays on until the dsp
3134 R3DI_GPIO_DSP_DOWNLOADING = 3,
3136 * Same as above, no clue what it does, but it comes on after the dsp
3139 R3DI_GPIO_DSP_DOWNLOADED = 4
3142 enum r3di_mic_select {
3143 /* Set GPIO bit 1 to 0 for rear mic */
3145 /* Set GPIO bit 1 to 1 for front microphone*/
3149 enum r3di_out_select {
3150 /* Set GPIO bit 2 to 0 for headphone */
3151 R3DI_HEADPHONE_OUT = 0,
3152 /* Set GPIO bit 2 to 1 for speaker */
3155 enum r3di_dsp_status {
3156 /* Set GPIO bit 3 to 1 until DSP is downloaded */
3157 R3DI_DSP_DOWNLOADING = 0,
3158 /* Set GPIO bit 4 to 1 once DSP is downloaded */
3159 R3DI_DSP_DOWNLOADED = 1
3163 static void r3di_gpio_mic_set(struct hda_codec *codec,
3164 enum r3di_mic_select cur_mic)
3166 unsigned int cur_gpio;
3168 /* Get the current GPIO Data setup */
3169 cur_gpio = snd_hda_codec_read(codec, 0x01, 0, AC_VERB_GET_GPIO_DATA, 0);
3173 cur_gpio &= ~(1 << R3DI_MIC_SELECT_BIT);
3175 case R3DI_FRONT_MIC:
3176 cur_gpio |= (1 << R3DI_MIC_SELECT_BIT);
3179 snd_hda_codec_write(codec, codec->core.afg, 0,
3180 AC_VERB_SET_GPIO_DATA, cur_gpio);
3183 static void r3di_gpio_out_set(struct hda_codec *codec,
3184 enum r3di_out_select cur_out)
3186 unsigned int cur_gpio;
3188 /* Get the current GPIO Data setup */
3189 cur_gpio = snd_hda_codec_read(codec, 0x01, 0, AC_VERB_GET_GPIO_DATA, 0);
3192 case R3DI_HEADPHONE_OUT:
3193 cur_gpio &= ~(1 << R3DI_OUT_SELECT_BIT);
3196 cur_gpio |= (1 << R3DI_OUT_SELECT_BIT);
3199 snd_hda_codec_write(codec, codec->core.afg, 0,
3200 AC_VERB_SET_GPIO_DATA, cur_gpio);
3203 static void r3di_gpio_dsp_status_set(struct hda_codec *codec,
3204 enum r3di_dsp_status dsp_status)
3206 unsigned int cur_gpio;
3208 /* Get the current GPIO Data setup */
3209 cur_gpio = snd_hda_codec_read(codec, 0x01, 0, AC_VERB_GET_GPIO_DATA, 0);
3211 switch (dsp_status) {
3212 case R3DI_DSP_DOWNLOADING:
3213 cur_gpio |= (1 << R3DI_GPIO_DSP_DOWNLOADING);
3214 snd_hda_codec_write(codec, codec->core.afg, 0,
3215 AC_VERB_SET_GPIO_DATA, cur_gpio);
3217 case R3DI_DSP_DOWNLOADED:
3218 /* Set DOWNLOADING bit to 0. */
3219 cur_gpio &= ~(1 << R3DI_GPIO_DSP_DOWNLOADING);
3221 snd_hda_codec_write(codec, codec->core.afg, 0,
3222 AC_VERB_SET_GPIO_DATA, cur_gpio);
3224 cur_gpio |= (1 << R3DI_GPIO_DSP_DOWNLOADED);
3228 snd_hda_codec_write(codec, codec->core.afg, 0,
3229 AC_VERB_SET_GPIO_DATA, cur_gpio);
3235 static int ca0132_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
3236 struct hda_codec *codec,
3237 unsigned int stream_tag,
3238 unsigned int format,
3239 struct snd_pcm_substream *substream)
3241 struct ca0132_spec *spec = codec->spec;
3243 snd_hda_codec_setup_stream(codec, spec->dacs[0], stream_tag, 0, format);
3248 static int ca0132_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
3249 struct hda_codec *codec,
3250 struct snd_pcm_substream *substream)
3252 struct ca0132_spec *spec = codec->spec;
3254 if (spec->dsp_state == DSP_DOWNLOADING)
3257 /*If Playback effects are on, allow stream some time to flush
3259 if (spec->effects_switch[PLAY_ENHANCEMENT - EFFECT_START_NID])
3262 snd_hda_codec_cleanup_stream(codec, spec->dacs[0]);
3267 static unsigned int ca0132_playback_pcm_delay(struct hda_pcm_stream *info,
3268 struct hda_codec *codec,
3269 struct snd_pcm_substream *substream)
3271 struct ca0132_spec *spec = codec->spec;
3272 unsigned int latency = DSP_PLAYBACK_INIT_LATENCY;
3273 struct snd_pcm_runtime *runtime = substream->runtime;
3275 if (spec->dsp_state != DSP_DOWNLOADED)
3278 /* Add latency if playback enhancement and either effect is enabled. */
3279 if (spec->effects_switch[PLAY_ENHANCEMENT - EFFECT_START_NID]) {
3280 if ((spec->effects_switch[SURROUND - EFFECT_START_NID]) ||
3281 (spec->effects_switch[DIALOG_PLUS - EFFECT_START_NID]))
3282 latency += DSP_PLAY_ENHANCEMENT_LATENCY;
3285 /* Applying Speaker EQ adds latency as well. */
3286 if (spec->cur_out_type == SPEAKER_OUT)
3287 latency += DSP_SPEAKER_OUT_LATENCY;
3289 return (latency * runtime->rate) / 1000;
3295 static int ca0132_dig_playback_pcm_open(struct hda_pcm_stream *hinfo,
3296 struct hda_codec *codec,
3297 struct snd_pcm_substream *substream)
3299 struct ca0132_spec *spec = codec->spec;
3300 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
3303 static int ca0132_dig_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
3304 struct hda_codec *codec,
3305 unsigned int stream_tag,
3306 unsigned int format,
3307 struct snd_pcm_substream *substream)
3309 struct ca0132_spec *spec = codec->spec;
3310 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
3311 stream_tag, format, substream);
3314 static int ca0132_dig_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
3315 struct hda_codec *codec,
3316 struct snd_pcm_substream *substream)
3318 struct ca0132_spec *spec = codec->spec;
3319 return snd_hda_multi_out_dig_cleanup(codec, &spec->multiout);
3322 static int ca0132_dig_playback_pcm_close(struct hda_pcm_stream *hinfo,
3323 struct hda_codec *codec,
3324 struct snd_pcm_substream *substream)
3326 struct ca0132_spec *spec = codec->spec;
3327 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
3333 static int ca0132_capture_pcm_prepare(struct hda_pcm_stream *hinfo,
3334 struct hda_codec *codec,
3335 unsigned int stream_tag,
3336 unsigned int format,
3337 struct snd_pcm_substream *substream)
3339 snd_hda_codec_setup_stream(codec, hinfo->nid,
3340 stream_tag, 0, format);
3345 static int ca0132_capture_pcm_cleanup(struct hda_pcm_stream *hinfo,
3346 struct hda_codec *codec,
3347 struct snd_pcm_substream *substream)
3349 struct ca0132_spec *spec = codec->spec;
3351 if (spec->dsp_state == DSP_DOWNLOADING)
3354 snd_hda_codec_cleanup_stream(codec, hinfo->nid);
3358 static unsigned int ca0132_capture_pcm_delay(struct hda_pcm_stream *info,
3359 struct hda_codec *codec,
3360 struct snd_pcm_substream *substream)
3362 struct ca0132_spec *spec = codec->spec;
3363 unsigned int latency = DSP_CAPTURE_INIT_LATENCY;
3364 struct snd_pcm_runtime *runtime = substream->runtime;
3366 if (spec->dsp_state != DSP_DOWNLOADED)
3369 if (spec->effects_switch[CRYSTAL_VOICE - EFFECT_START_NID])
3370 latency += DSP_CRYSTAL_VOICE_LATENCY;
3372 return (latency * runtime->rate) / 1000;
3380 * Mixer controls helpers.
3382 #define CA0132_CODEC_VOL_MONO(xname, nid, channel, dir) \
3383 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
3385 .subdevice = HDA_SUBDEV_AMP_FLAG, \
3386 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | \
3387 SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
3388 SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK, \
3389 .info = ca0132_volume_info, \
3390 .get = ca0132_volume_get, \
3391 .put = ca0132_volume_put, \
3392 .tlv = { .c = ca0132_volume_tlv }, \
3393 .private_value = HDA_COMPOSE_AMP_VAL(nid, channel, 0, dir) }
3396 * Creates a mixer control that uses defaults of HDA_CODEC_VOL except for the
3397 * volume put, which is used for setting the DSP volume. This was done because
3398 * the ca0132 functions were taking too much time and causing lag.
3400 #define CA0132_ALT_CODEC_VOL_MONO(xname, nid, channel, dir) \
3401 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
3403 .subdevice = HDA_SUBDEV_AMP_FLAG, \
3404 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | \
3405 SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
3406 SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK, \
3407 .info = snd_hda_mixer_amp_volume_info, \
3408 .get = snd_hda_mixer_amp_volume_get, \
3409 .put = ca0132_alt_volume_put, \
3410 .tlv = { .c = snd_hda_mixer_amp_tlv }, \
3411 .private_value = HDA_COMPOSE_AMP_VAL(nid, channel, 0, dir) }
3413 #define CA0132_CODEC_MUTE_MONO(xname, nid, channel, dir) \
3414 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
3416 .subdevice = HDA_SUBDEV_AMP_FLAG, \
3417 .info = snd_hda_mixer_amp_switch_info, \
3418 .get = ca0132_switch_get, \
3419 .put = ca0132_switch_put, \
3420 .private_value = HDA_COMPOSE_AMP_VAL(nid, channel, 0, dir) }
3423 #define CA0132_CODEC_VOL(xname, nid, dir) \
3424 CA0132_CODEC_VOL_MONO(xname, nid, 3, dir)
3425 #define CA0132_ALT_CODEC_VOL(xname, nid, dir) \
3426 CA0132_ALT_CODEC_VOL_MONO(xname, nid, 3, dir)
3427 #define CA0132_CODEC_MUTE(xname, nid, dir) \
3428 CA0132_CODEC_MUTE_MONO(xname, nid, 3, dir)
3432 * Lookup table with decibel values for the DSP. When volume is changed in
3433 * Windows, the DSP is also sent the dB value in floating point. In Windows,
3434 * these values have decimal points, probably because the Windows driver
3435 * actually uses floating point. We can't here, so I made a lookup table of
3436 * values -90 to 9. -90 is the lowest decibel value for both the ADC's and the
3437 * DAC's, and 9 is the maximum.
3439 static const unsigned int float_vol_db_lookup[] = {
3440 0xC2B40000, 0xC2B20000, 0xC2B00000, 0xC2AE0000, 0xC2AC0000, 0xC2AA0000,
3441 0xC2A80000, 0xC2A60000, 0xC2A40000, 0xC2A20000, 0xC2A00000, 0xC29E0000,
3442 0xC29C0000, 0xC29A0000, 0xC2980000, 0xC2960000, 0xC2940000, 0xC2920000,
3443 0xC2900000, 0xC28E0000, 0xC28C0000, 0xC28A0000, 0xC2880000, 0xC2860000,
3444 0xC2840000, 0xC2820000, 0xC2800000, 0xC27C0000, 0xC2780000, 0xC2740000,
3445 0xC2700000, 0xC26C0000, 0xC2680000, 0xC2640000, 0xC2600000, 0xC25C0000,
3446 0xC2580000, 0xC2540000, 0xC2500000, 0xC24C0000, 0xC2480000, 0xC2440000,
3447 0xC2400000, 0xC23C0000, 0xC2380000, 0xC2340000, 0xC2300000, 0xC22C0000,
3448 0xC2280000, 0xC2240000, 0xC2200000, 0xC21C0000, 0xC2180000, 0xC2140000,
3449 0xC2100000, 0xC20C0000, 0xC2080000, 0xC2040000, 0xC2000000, 0xC1F80000,
3450 0xC1F00000, 0xC1E80000, 0xC1E00000, 0xC1D80000, 0xC1D00000, 0xC1C80000,
3451 0xC1C00000, 0xC1B80000, 0xC1B00000, 0xC1A80000, 0xC1A00000, 0xC1980000,
3452 0xC1900000, 0xC1880000, 0xC1800000, 0xC1700000, 0xC1600000, 0xC1500000,
3453 0xC1400000, 0xC1300000, 0xC1200000, 0xC1100000, 0xC1000000, 0xC0E00000,
3454 0xC0C00000, 0xC0A00000, 0xC0800000, 0xC0400000, 0xC0000000, 0xBF800000,
3455 0x00000000, 0x3F800000, 0x40000000, 0x40400000, 0x40800000, 0x40A00000,
3456 0x40C00000, 0x40E00000, 0x41000000, 0x41100000
3460 * This table counts from float 0 to 1 in increments of .01, which is
3461 * useful for a few different sliders.
3463 static const unsigned int float_zero_to_one_lookup[] = {
3464 0x00000000, 0x3C23D70A, 0x3CA3D70A, 0x3CF5C28F, 0x3D23D70A, 0x3D4CCCCD,
3465 0x3D75C28F, 0x3D8F5C29, 0x3DA3D70A, 0x3DB851EC, 0x3DCCCCCD, 0x3DE147AE,
3466 0x3DF5C28F, 0x3E051EB8, 0x3E0F5C29, 0x3E19999A, 0x3E23D70A, 0x3E2E147B,
3467 0x3E3851EC, 0x3E428F5C, 0x3E4CCCCD, 0x3E570A3D, 0x3E6147AE, 0x3E6B851F,
3468 0x3E75C28F, 0x3E800000, 0x3E851EB8, 0x3E8A3D71, 0x3E8F5C29, 0x3E947AE1,
3469 0x3E99999A, 0x3E9EB852, 0x3EA3D70A, 0x3EA8F5C3, 0x3EAE147B, 0x3EB33333,
3470 0x3EB851EC, 0x3EBD70A4, 0x3EC28F5C, 0x3EC7AE14, 0x3ECCCCCD, 0x3ED1EB85,
3471 0x3ED70A3D, 0x3EDC28F6, 0x3EE147AE, 0x3EE66666, 0x3EEB851F, 0x3EF0A3D7,
3472 0x3EF5C28F, 0x3EFAE148, 0x3F000000, 0x3F028F5C, 0x3F051EB8, 0x3F07AE14,
3473 0x3F0A3D71, 0x3F0CCCCD, 0x3F0F5C29, 0x3F11EB85, 0x3F147AE1, 0x3F170A3D,
3474 0x3F19999A, 0x3F1C28F6, 0x3F1EB852, 0x3F2147AE, 0x3F23D70A, 0x3F266666,
3475 0x3F28F5C3, 0x3F2B851F, 0x3F2E147B, 0x3F30A3D7, 0x3F333333, 0x3F35C28F,
3476 0x3F3851EC, 0x3F3AE148, 0x3F3D70A4, 0x3F400000, 0x3F428F5C, 0x3F451EB8,
3477 0x3F47AE14, 0x3F4A3D71, 0x3F4CCCCD, 0x3F4F5C29, 0x3F51EB85, 0x3F547AE1,
3478 0x3F570A3D, 0x3F59999A, 0x3F5C28F6, 0x3F5EB852, 0x3F6147AE, 0x3F63D70A,
3479 0x3F666666, 0x3F68F5C3, 0x3F6B851F, 0x3F6E147B, 0x3F70A3D7, 0x3F733333,
3480 0x3F75C28F, 0x3F7851EC, 0x3F7AE148, 0x3F7D70A4, 0x3F800000
3484 * This table counts from float 10 to 1000, which is the range of the x-bass
3485 * crossover slider in Windows.
3487 static const unsigned int float_xbass_xover_lookup[] = {
3488 0x41200000, 0x41A00000, 0x41F00000, 0x42200000, 0x42480000, 0x42700000,
3489 0x428C0000, 0x42A00000, 0x42B40000, 0x42C80000, 0x42DC0000, 0x42F00000,
3490 0x43020000, 0x430C0000, 0x43160000, 0x43200000, 0x432A0000, 0x43340000,
3491 0x433E0000, 0x43480000, 0x43520000, 0x435C0000, 0x43660000, 0x43700000,
3492 0x437A0000, 0x43820000, 0x43870000, 0x438C0000, 0x43910000, 0x43960000,
3493 0x439B0000, 0x43A00000, 0x43A50000, 0x43AA0000, 0x43AF0000, 0x43B40000,
3494 0x43B90000, 0x43BE0000, 0x43C30000, 0x43C80000, 0x43CD0000, 0x43D20000,
3495 0x43D70000, 0x43DC0000, 0x43E10000, 0x43E60000, 0x43EB0000, 0x43F00000,
3496 0x43F50000, 0x43FA0000, 0x43FF0000, 0x44020000, 0x44048000, 0x44070000,
3497 0x44098000, 0x440C0000, 0x440E8000, 0x44110000, 0x44138000, 0x44160000,
3498 0x44188000, 0x441B0000, 0x441D8000, 0x44200000, 0x44228000, 0x44250000,
3499 0x44278000, 0x442A0000, 0x442C8000, 0x442F0000, 0x44318000, 0x44340000,
3500 0x44368000, 0x44390000, 0x443B8000, 0x443E0000, 0x44408000, 0x44430000,
3501 0x44458000, 0x44480000, 0x444A8000, 0x444D0000, 0x444F8000, 0x44520000,
3502 0x44548000, 0x44570000, 0x44598000, 0x445C0000, 0x445E8000, 0x44610000,
3503 0x44638000, 0x44660000, 0x44688000, 0x446B0000, 0x446D8000, 0x44700000,
3504 0x44728000, 0x44750000, 0x44778000, 0x447A0000
3507 /* The following are for tuning of products */
3508 #ifdef ENABLE_TUNING_CONTROLS
3510 static unsigned int voice_focus_vals_lookup[] = {
3511 0x41A00000, 0x41A80000, 0x41B00000, 0x41B80000, 0x41C00000, 0x41C80000,
3512 0x41D00000, 0x41D80000, 0x41E00000, 0x41E80000, 0x41F00000, 0x41F80000,
3513 0x42000000, 0x42040000, 0x42080000, 0x420C0000, 0x42100000, 0x42140000,
3514 0x42180000, 0x421C0000, 0x42200000, 0x42240000, 0x42280000, 0x422C0000,
3515 0x42300000, 0x42340000, 0x42380000, 0x423C0000, 0x42400000, 0x42440000,
3516 0x42480000, 0x424C0000, 0x42500000, 0x42540000, 0x42580000, 0x425C0000,
3517 0x42600000, 0x42640000, 0x42680000, 0x426C0000, 0x42700000, 0x42740000,
3518 0x42780000, 0x427C0000, 0x42800000, 0x42820000, 0x42840000, 0x42860000,
3519 0x42880000, 0x428A0000, 0x428C0000, 0x428E0000, 0x42900000, 0x42920000,
3520 0x42940000, 0x42960000, 0x42980000, 0x429A0000, 0x429C0000, 0x429E0000,
3521 0x42A00000, 0x42A20000, 0x42A40000, 0x42A60000, 0x42A80000, 0x42AA0000,
3522 0x42AC0000, 0x42AE0000, 0x42B00000, 0x42B20000, 0x42B40000, 0x42B60000,
3523 0x42B80000, 0x42BA0000, 0x42BC0000, 0x42BE0000, 0x42C00000, 0x42C20000,
3524 0x42C40000, 0x42C60000, 0x42C80000, 0x42CA0000, 0x42CC0000, 0x42CE0000,
3525 0x42D00000, 0x42D20000, 0x42D40000, 0x42D60000, 0x42D80000, 0x42DA0000,
3526 0x42DC0000, 0x42DE0000, 0x42E00000, 0x42E20000, 0x42E40000, 0x42E60000,
3527 0x42E80000, 0x42EA0000, 0x42EC0000, 0x42EE0000, 0x42F00000, 0x42F20000,
3528 0x42F40000, 0x42F60000, 0x42F80000, 0x42FA0000, 0x42FC0000, 0x42FE0000,
3529 0x43000000, 0x43010000, 0x43020000, 0x43030000, 0x43040000, 0x43050000,
3530 0x43060000, 0x43070000, 0x43080000, 0x43090000, 0x430A0000, 0x430B0000,
3531 0x430C0000, 0x430D0000, 0x430E0000, 0x430F0000, 0x43100000, 0x43110000,
3532 0x43120000, 0x43130000, 0x43140000, 0x43150000, 0x43160000, 0x43170000,
3533 0x43180000, 0x43190000, 0x431A0000, 0x431B0000, 0x431C0000, 0x431D0000,
3534 0x431E0000, 0x431F0000, 0x43200000, 0x43210000, 0x43220000, 0x43230000,
3535 0x43240000, 0x43250000, 0x43260000, 0x43270000, 0x43280000, 0x43290000,
3536 0x432A0000, 0x432B0000, 0x432C0000, 0x432D0000, 0x432E0000, 0x432F0000,
3537 0x43300000, 0x43310000, 0x43320000, 0x43330000, 0x43340000
3540 static unsigned int mic_svm_vals_lookup[] = {
3541 0x00000000, 0x3C23D70A, 0x3CA3D70A, 0x3CF5C28F, 0x3D23D70A, 0x3D4CCCCD,
3542 0x3D75C28F, 0x3D8F5C29, 0x3DA3D70A, 0x3DB851EC, 0x3DCCCCCD, 0x3DE147AE,
3543 0x3DF5C28F, 0x3E051EB8, 0x3E0F5C29, 0x3E19999A, 0x3E23D70A, 0x3E2E147B,
3544 0x3E3851EC, 0x3E428F5C, 0x3E4CCCCD, 0x3E570A3D, 0x3E6147AE, 0x3E6B851F,
3545 0x3E75C28F, 0x3E800000, 0x3E851EB8, 0x3E8A3D71, 0x3E8F5C29, 0x3E947AE1,
3546 0x3E99999A, 0x3E9EB852, 0x3EA3D70A, 0x3EA8F5C3, 0x3EAE147B, 0x3EB33333,
3547 0x3EB851EC, 0x3EBD70A4, 0x3EC28F5C, 0x3EC7AE14, 0x3ECCCCCD, 0x3ED1EB85,
3548 0x3ED70A3D, 0x3EDC28F6, 0x3EE147AE, 0x3EE66666, 0x3EEB851F, 0x3EF0A3D7,
3549 0x3EF5C28F, 0x3EFAE148, 0x3F000000, 0x3F028F5C, 0x3F051EB8, 0x3F07AE14,
3550 0x3F0A3D71, 0x3F0CCCCD, 0x3F0F5C29, 0x3F11EB85, 0x3F147AE1, 0x3F170A3D,
3551 0x3F19999A, 0x3F1C28F6, 0x3F1EB852, 0x3F2147AE, 0x3F23D70A, 0x3F266666,
3552 0x3F28F5C3, 0x3F2B851F, 0x3F2E147B, 0x3F30A3D7, 0x3F333333, 0x3F35C28F,
3553 0x3F3851EC, 0x3F3AE148, 0x3F3D70A4, 0x3F400000, 0x3F428F5C, 0x3F451EB8,
3554 0x3F47AE14, 0x3F4A3D71, 0x3F4CCCCD, 0x3F4F5C29, 0x3F51EB85, 0x3F547AE1,
3555 0x3F570A3D, 0x3F59999A, 0x3F5C28F6, 0x3F5EB852, 0x3F6147AE, 0x3F63D70A,
3556 0x3F666666, 0x3F68F5C3, 0x3F6B851F, 0x3F6E147B, 0x3F70A3D7, 0x3F733333,
3557 0x3F75C28F, 0x3F7851EC, 0x3F7AE148, 0x3F7D70A4, 0x3F800000
3560 static unsigned int equalizer_vals_lookup[] = {
3561 0xC1C00000, 0xC1B80000, 0xC1B00000, 0xC1A80000, 0xC1A00000, 0xC1980000,
3562 0xC1900000, 0xC1880000, 0xC1800000, 0xC1700000, 0xC1600000, 0xC1500000,
3563 0xC1400000, 0xC1300000, 0xC1200000, 0xC1100000, 0xC1000000, 0xC0E00000,
3564 0xC0C00000, 0xC0A00000, 0xC0800000, 0xC0400000, 0xC0000000, 0xBF800000,
3565 0x00000000, 0x3F800000, 0x40000000, 0x40400000, 0x40800000, 0x40A00000,
3566 0x40C00000, 0x40E00000, 0x41000000, 0x41100000, 0x41200000, 0x41300000,
3567 0x41400000, 0x41500000, 0x41600000, 0x41700000, 0x41800000, 0x41880000,
3568 0x41900000, 0x41980000, 0x41A00000, 0x41A80000, 0x41B00000, 0x41B80000,
3572 static int tuning_ctl_set(struct hda_codec *codec, hda_nid_t nid,
3573 unsigned int *lookup, int idx)
3577 for (i = 0; i < TUNING_CTLS_COUNT; i++)
3578 if (nid == ca0132_tuning_ctls[i].nid)
3581 snd_hda_power_up(codec);
3582 dspio_set_param(codec, ca0132_tuning_ctls[i].mid, 0x20,
3583 ca0132_tuning_ctls[i].req,
3584 &(lookup[idx]), sizeof(unsigned int));
3585 snd_hda_power_down(codec);
3590 static int tuning_ctl_get(struct snd_kcontrol *kcontrol,
3591 struct snd_ctl_elem_value *ucontrol)
3593 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
3594 struct ca0132_spec *spec = codec->spec;
3595 hda_nid_t nid = get_amp_nid(kcontrol);
3596 long *valp = ucontrol->value.integer.value;
3597 int idx = nid - TUNING_CTL_START_NID;
3599 *valp = spec->cur_ctl_vals[idx];
3603 static int voice_focus_ctl_info(struct snd_kcontrol *kcontrol,
3604 struct snd_ctl_elem_info *uinfo)
3606 int chs = get_amp_channels(kcontrol);
3607 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
3608 uinfo->count = chs == 3 ? 2 : 1;
3609 uinfo->value.integer.min = 20;
3610 uinfo->value.integer.max = 180;
3611 uinfo->value.integer.step = 1;
3616 static int voice_focus_ctl_put(struct snd_kcontrol *kcontrol,
3617 struct snd_ctl_elem_value *ucontrol)
3619 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
3620 struct ca0132_spec *spec = codec->spec;
3621 hda_nid_t nid = get_amp_nid(kcontrol);
3622 long *valp = ucontrol->value.integer.value;
3625 idx = nid - TUNING_CTL_START_NID;
3627 if (spec->cur_ctl_vals[idx] == *valp)
3630 spec->cur_ctl_vals[idx] = *valp;
3633 tuning_ctl_set(codec, nid, voice_focus_vals_lookup, idx);
3638 static int mic_svm_ctl_info(struct snd_kcontrol *kcontrol,
3639 struct snd_ctl_elem_info *uinfo)
3641 int chs = get_amp_channels(kcontrol);
3642 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
3643 uinfo->count = chs == 3 ? 2 : 1;
3644 uinfo->value.integer.min = 0;
3645 uinfo->value.integer.max = 100;
3646 uinfo->value.integer.step = 1;
3651 static int mic_svm_ctl_put(struct snd_kcontrol *kcontrol,
3652 struct snd_ctl_elem_value *ucontrol)
3654 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
3655 struct ca0132_spec *spec = codec->spec;
3656 hda_nid_t nid = get_amp_nid(kcontrol);
3657 long *valp = ucontrol->value.integer.value;
3660 idx = nid - TUNING_CTL_START_NID;
3662 if (spec->cur_ctl_vals[idx] == *valp)
3665 spec->cur_ctl_vals[idx] = *valp;
3668 tuning_ctl_set(codec, nid, mic_svm_vals_lookup, idx);
3673 static int equalizer_ctl_info(struct snd_kcontrol *kcontrol,
3674 struct snd_ctl_elem_info *uinfo)
3676 int chs = get_amp_channels(kcontrol);
3677 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
3678 uinfo->count = chs == 3 ? 2 : 1;
3679 uinfo->value.integer.min = 0;
3680 uinfo->value.integer.max = 48;
3681 uinfo->value.integer.step = 1;
3686 static int equalizer_ctl_put(struct snd_kcontrol *kcontrol,
3687 struct snd_ctl_elem_value *ucontrol)
3689 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
3690 struct ca0132_spec *spec = codec->spec;
3691 hda_nid_t nid = get_amp_nid(kcontrol);
3692 long *valp = ucontrol->value.integer.value;
3695 idx = nid - TUNING_CTL_START_NID;
3697 if (spec->cur_ctl_vals[idx] == *valp)
3700 spec->cur_ctl_vals[idx] = *valp;
3703 tuning_ctl_set(codec, nid, equalizer_vals_lookup, idx);
3708 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(voice_focus_db_scale, 2000, 100, 0);
3709 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(eq_db_scale, -2400, 100, 0);
3711 static int add_tuning_control(struct hda_codec *codec,
3712 hda_nid_t pnid, hda_nid_t nid,
3713 const char *name, int dir)
3715 char namestr[SNDRV_CTL_ELEM_ID_NAME_MAXLEN];
3716 int type = dir ? HDA_INPUT : HDA_OUTPUT;
3717 struct snd_kcontrol_new knew =
3718 HDA_CODEC_VOLUME_MONO(namestr, nid, 1, 0, type);
3720 knew.access = SNDRV_CTL_ELEM_ACCESS_READWRITE |
3721 SNDRV_CTL_ELEM_ACCESS_TLV_READ;
3726 knew.info = voice_focus_ctl_info;
3727 knew.get = tuning_ctl_get;
3728 knew.put = voice_focus_ctl_put;
3729 knew.tlv.p = voice_focus_db_scale;
3732 knew.info = mic_svm_ctl_info;
3733 knew.get = tuning_ctl_get;
3734 knew.put = mic_svm_ctl_put;
3737 knew.info = equalizer_ctl_info;
3738 knew.get = tuning_ctl_get;
3739 knew.put = equalizer_ctl_put;
3740 knew.tlv.p = eq_db_scale;
3745 knew.private_value =
3746 HDA_COMPOSE_AMP_VAL(nid, 1, 0, type);
3747 sprintf(namestr, "%s %s Volume", name, dirstr[dir]);
3748 return snd_hda_ctl_add(codec, nid, snd_ctl_new1(&knew, codec));
3751 static int add_tuning_ctls(struct hda_codec *codec)
3756 for (i = 0; i < TUNING_CTLS_COUNT; i++) {
3757 err = add_tuning_control(codec,
3758 ca0132_tuning_ctls[i].parent_nid,
3759 ca0132_tuning_ctls[i].nid,
3760 ca0132_tuning_ctls[i].name,
3761 ca0132_tuning_ctls[i].direct);
3769 static void ca0132_init_tuning_defaults(struct hda_codec *codec)
3771 struct ca0132_spec *spec = codec->spec;
3774 /* Wedge Angle defaults to 30. 10 below is 30 - 20. 20 is min. */
3775 spec->cur_ctl_vals[WEDGE_ANGLE - TUNING_CTL_START_NID] = 10;
3776 /* SVM level defaults to 0.74. */
3777 spec->cur_ctl_vals[SVM_LEVEL - TUNING_CTL_START_NID] = 74;
3779 /* EQ defaults to 0dB. */
3780 for (i = 2; i < TUNING_CTLS_COUNT; i++)
3781 spec->cur_ctl_vals[i] = 24;
3783 #endif /*ENABLE_TUNING_CONTROLS*/
3786 * Select the active output.
3787 * If autodetect is enabled, output will be selected based on jack detection.
3788 * If jack inserted, headphone will be selected, else built-in speakers
3789 * If autodetect is disabled, output will be selected based on selection.
3791 static int ca0132_select_out(struct hda_codec *codec)
3793 struct ca0132_spec *spec = codec->spec;
3794 unsigned int pin_ctl;
3800 codec_dbg(codec, "ca0132_select_out\n");
3802 snd_hda_power_up_pm(codec);
3804 auto_jack = spec->vnode_lswitch[VNID_HP_ASEL - VNODE_START_NID];
3807 jack_present = snd_hda_jack_detect(codec, spec->unsol_tag_hp);
3810 spec->vnode_lswitch[VNID_HP_SEL - VNODE_START_NID];
3813 spec->cur_out_type = HEADPHONE_OUT;
3815 spec->cur_out_type = SPEAKER_OUT;
3817 if (spec->cur_out_type == SPEAKER_OUT) {
3818 codec_dbg(codec, "ca0132_select_out speaker\n");
3819 /*speaker out config*/
3821 err = dspio_set_uint_param(codec, 0x80, 0x04, tmp);
3824 /*enable speaker EQ*/
3826 err = dspio_set_uint_param(codec, 0x8f, 0x00, tmp);
3831 snd_hda_codec_write(codec, spec->out_pins[1], 0,
3832 VENDOR_CHIPIO_EAPD_SEL_SET, 0x02);
3833 snd_hda_codec_write(codec, spec->out_pins[0], 0,
3834 AC_VERB_SET_EAPD_BTLENABLE, 0x00);
3835 snd_hda_codec_write(codec, spec->out_pins[0], 0,
3836 VENDOR_CHIPIO_EAPD_SEL_SET, 0x00);
3837 snd_hda_codec_write(codec, spec->out_pins[0], 0,
3838 AC_VERB_SET_EAPD_BTLENABLE, 0x02);
3840 /* disable headphone node */
3841 pin_ctl = snd_hda_codec_read(codec, spec->out_pins[1], 0,
3842 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
3843 snd_hda_set_pin_ctl(codec, spec->out_pins[1],
3845 /* enable speaker node */
3846 pin_ctl = snd_hda_codec_read(codec, spec->out_pins[0], 0,
3847 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
3848 snd_hda_set_pin_ctl(codec, spec->out_pins[0],
3851 codec_dbg(codec, "ca0132_select_out hp\n");
3852 /*headphone out config*/
3854 err = dspio_set_uint_param(codec, 0x80, 0x04, tmp);
3857 /*disable speaker EQ*/
3859 err = dspio_set_uint_param(codec, 0x8f, 0x00, tmp);
3864 snd_hda_codec_write(codec, spec->out_pins[0], 0,
3865 VENDOR_CHIPIO_EAPD_SEL_SET, 0x00);
3866 snd_hda_codec_write(codec, spec->out_pins[0], 0,
3867 AC_VERB_SET_EAPD_BTLENABLE, 0x00);
3868 snd_hda_codec_write(codec, spec->out_pins[1], 0,
3869 VENDOR_CHIPIO_EAPD_SEL_SET, 0x02);
3870 snd_hda_codec_write(codec, spec->out_pins[0], 0,
3871 AC_VERB_SET_EAPD_BTLENABLE, 0x02);
3873 /* disable speaker*/
3874 pin_ctl = snd_hda_codec_read(codec, spec->out_pins[0], 0,
3875 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
3876 snd_hda_set_pin_ctl(codec, spec->out_pins[0],
3878 /* enable headphone*/
3879 pin_ctl = snd_hda_codec_read(codec, spec->out_pins[1], 0,
3880 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
3881 snd_hda_set_pin_ctl(codec, spec->out_pins[1],
3886 snd_hda_power_down_pm(codec);
3888 return err < 0 ? err : 0;
3892 * This function behaves similarly to the ca0132_select_out funciton above,
3893 * except with a few differences. It adds the ability to select the current
3894 * output with an enumerated control "output source" if the auto detect
3895 * mute switch is set to off. If the auto detect mute switch is enabled, it
3896 * will detect either headphone or lineout(SPEAKER_OUT) from jack detection.
3897 * It also adds the ability to auto-detect the front headphone port. The only
3898 * way to select surround is to disable auto detect, and set Surround with the
3899 * enumerated control.
3901 static int ca0132_alt_select_out(struct hda_codec *codec)
3903 struct ca0132_spec *spec = codec->spec;
3904 unsigned int pin_ctl;
3910 /* Default Headphone is rear headphone */
3911 hda_nid_t headphone_nid = spec->out_pins[1];
3913 codec_dbg(codec, "%s\n", __func__);
3915 snd_hda_power_up_pm(codec);
3917 auto_jack = spec->vnode_lswitch[VNID_HP_ASEL - VNODE_START_NID];
3920 * If headphone rear or front is plugged in, set to headphone.
3921 * If neither is plugged in, set to rear line out. Only if
3922 * hp/speaker auto detect is enabled.
3925 jack_present = snd_hda_jack_detect(codec, spec->unsol_tag_hp) ||
3926 snd_hda_jack_detect(codec, spec->unsol_tag_front_hp);
3929 spec->cur_out_type = HEADPHONE_OUT;
3931 spec->cur_out_type = SPEAKER_OUT;
3933 spec->cur_out_type = spec->out_enum_val;
3935 /* Begin DSP output switch */
3937 err = dspio_set_uint_param(codec, 0x96, 0x3A, tmp);
3941 switch (spec->cur_out_type) {
3943 codec_dbg(codec, "%s speaker\n", __func__);
3944 /*speaker out config*/
3945 switch (spec->quirk) {
3947 writew(0x0007, spec->mem_base + 0x320);
3948 writew(0x0104, spec->mem_base + 0x320);
3949 writew(0x0101, spec->mem_base + 0x320);
3950 chipio_set_control_param(codec, 0x0D, 0x18);
3953 chipio_set_control_param(codec, 0x0D, 0x24);
3954 r3di_gpio_out_set(codec, R3DI_LINE_OUT);
3958 /* disable headphone node */
3959 pin_ctl = snd_hda_codec_read(codec, spec->out_pins[1], 0,
3960 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
3961 snd_hda_set_pin_ctl(codec, spec->out_pins[1],
3963 /* enable line-out node */
3964 pin_ctl = snd_hda_codec_read(codec, spec->out_pins[0], 0,
3965 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
3966 snd_hda_set_pin_ctl(codec, spec->out_pins[0],
3969 snd_hda_codec_write(codec, spec->out_pins[0], 0,
3970 AC_VERB_SET_EAPD_BTLENABLE, 0x01);
3972 /* If PlayEnhancement is enabled, set different source */
3973 if (spec->effects_switch[PLAY_ENHANCEMENT - EFFECT_START_NID])
3974 dspio_set_uint_param(codec, 0x80, 0x04, FLOAT_ONE);
3976 dspio_set_uint_param(codec, 0x80, 0x04, FLOAT_EIGHT);
3979 codec_dbg(codec, "%s hp\n", __func__);
3980 /* Headphone out config*/
3981 switch (spec->quirk) {
3983 writew(0x0107, spec->mem_base + 0x320);
3984 writew(0x0104, spec->mem_base + 0x320);
3985 writew(0x0001, spec->mem_base + 0x320);
3986 chipio_set_control_param(codec, 0x0D, 0x12);
3989 chipio_set_control_param(codec, 0x0D, 0x21);
3990 r3di_gpio_out_set(codec, R3DI_HEADPHONE_OUT);
3994 snd_hda_codec_write(codec, spec->out_pins[0], 0,
3995 AC_VERB_SET_EAPD_BTLENABLE, 0x00);
3997 /* disable speaker*/
3998 pin_ctl = snd_hda_codec_read(codec, spec->out_pins[0], 0,
3999 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
4000 snd_hda_set_pin_ctl(codec, spec->out_pins[0],
4003 /* enable headphone, either front or rear */
4005 if (snd_hda_jack_detect(codec, spec->unsol_tag_front_hp))
4006 headphone_nid = spec->out_pins[2];
4007 else if (snd_hda_jack_detect(codec, spec->unsol_tag_hp))
4008 headphone_nid = spec->out_pins[1];
4010 pin_ctl = snd_hda_codec_read(codec, headphone_nid, 0,
4011 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
4012 snd_hda_set_pin_ctl(codec, headphone_nid,
4015 if (spec->effects_switch[PLAY_ENHANCEMENT - EFFECT_START_NID])
4016 dspio_set_uint_param(codec, 0x80, 0x04, FLOAT_ONE);
4018 dspio_set_uint_param(codec, 0x80, 0x04, FLOAT_ZERO);
4021 codec_dbg(codec, "%s surround\n", __func__);
4022 /* Surround out config*/
4023 switch (spec->quirk) {
4025 writew(0x0007, spec->mem_base + 0x320);
4026 writew(0x0104, spec->mem_base + 0x320);
4027 writew(0x0101, spec->mem_base + 0x320);
4028 chipio_set_control_param(codec, 0x0D, 0x18);
4031 chipio_set_control_param(codec, 0x0D, 0x24);
4032 r3di_gpio_out_set(codec, R3DI_LINE_OUT);
4035 /* enable line out node */
4036 pin_ctl = snd_hda_codec_read(codec, spec->out_pins[0], 0,
4037 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
4038 snd_hda_set_pin_ctl(codec, spec->out_pins[0],
4040 /* Disable headphone out */
4041 pin_ctl = snd_hda_codec_read(codec, spec->out_pins[1], 0,
4042 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
4043 snd_hda_set_pin_ctl(codec, spec->out_pins[1],
4045 /* Enable EAPD on line out */
4046 snd_hda_codec_write(codec, spec->out_pins[0], 0,
4047 AC_VERB_SET_EAPD_BTLENABLE, 0x01);
4048 /* enable center/lfe out node */
4049 pin_ctl = snd_hda_codec_read(codec, spec->out_pins[2], 0,
4050 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
4051 snd_hda_set_pin_ctl(codec, spec->out_pins[2],
4053 /* Now set rear surround node as out. */
4054 pin_ctl = snd_hda_codec_read(codec, spec->out_pins[3], 0,
4055 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
4056 snd_hda_set_pin_ctl(codec, spec->out_pins[3],
4059 if (spec->effects_switch[PLAY_ENHANCEMENT - EFFECT_START_NID])
4060 dspio_set_uint_param(codec, 0x80, 0x04, FLOAT_ONE);
4062 dspio_set_uint_param(codec, 0x80, 0x04, FLOAT_EIGHT);
4066 /* run through the output dsp commands for line-out */
4067 for (i = 0; i < alt_out_presets[spec->cur_out_type].commands; i++) {
4068 err = dspio_set_uint_param(codec,
4069 alt_out_presets[spec->cur_out_type].mids[i],
4070 alt_out_presets[spec->cur_out_type].reqs[i],
4071 alt_out_presets[spec->cur_out_type].vals[i]);
4078 snd_hda_power_down_pm(codec);
4080 return err < 0 ? err : 0;
4083 static void ca0132_unsol_hp_delayed(struct work_struct *work)
4085 struct ca0132_spec *spec = container_of(
4086 to_delayed_work(work), struct ca0132_spec, unsol_hp_work);
4087 struct hda_jack_tbl *jack;
4089 if (spec->use_alt_functions)
4090 ca0132_alt_select_out(spec->codec);
4092 ca0132_select_out(spec->codec);
4094 jack = snd_hda_jack_tbl_get(spec->codec, spec->unsol_tag_hp);
4096 jack->block_report = 0;
4097 snd_hda_jack_report_sync(spec->codec);
4101 static void ca0132_set_dmic(struct hda_codec *codec, int enable);
4102 static int ca0132_mic_boost_set(struct hda_codec *codec, long val);
4103 static int ca0132_effects_set(struct hda_codec *codec, hda_nid_t nid, long val);
4104 static void resume_mic1(struct hda_codec *codec, unsigned int oldval);
4105 static int stop_mic1(struct hda_codec *codec);
4106 static int ca0132_cvoice_switch_set(struct hda_codec *codec);
4107 static int ca0132_alt_mic_boost_set(struct hda_codec *codec, long val);
4110 * Select the active VIP source
4112 static int ca0132_set_vipsource(struct hda_codec *codec, int val)
4114 struct ca0132_spec *spec = codec->spec;
4117 if (spec->dsp_state != DSP_DOWNLOADED)
4120 /* if CrystalVoice if off, vipsource should be 0 */
4121 if (!spec->effects_switch[CRYSTAL_VOICE - EFFECT_START_NID] ||
4123 chipio_set_control_param(codec, CONTROL_PARAM_VIP_SOURCE, 0);
4124 chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_96_000);
4125 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_96_000);
4126 if (spec->cur_mic_type == DIGITAL_MIC)
4130 dspio_set_uint_param(codec, 0x80, 0x00, tmp);
4132 dspio_set_uint_param(codec, 0x80, 0x05, tmp);
4134 chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_16_000);
4135 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_16_000);
4136 if (spec->cur_mic_type == DIGITAL_MIC)
4140 dspio_set_uint_param(codec, 0x80, 0x00, tmp);
4142 dspio_set_uint_param(codec, 0x80, 0x05, tmp);
4144 chipio_set_control_param(codec, CONTROL_PARAM_VIP_SOURCE, val);
4150 static int ca0132_alt_set_vipsource(struct hda_codec *codec, int val)
4152 struct ca0132_spec *spec = codec->spec;
4155 if (spec->dsp_state != DSP_DOWNLOADED)
4158 codec_dbg(codec, "%s\n", __func__);
4160 chipio_set_stream_control(codec, 0x03, 0);
4161 chipio_set_stream_control(codec, 0x04, 0);
4163 /* if CrystalVoice is off, vipsource should be 0 */
4164 if (!spec->effects_switch[CRYSTAL_VOICE - EFFECT_START_NID] ||
4165 (val == 0) || spec->in_enum_val == REAR_LINE_IN) {
4166 codec_dbg(codec, "%s: off.", __func__);
4167 chipio_set_control_param(codec, CONTROL_PARAM_VIP_SOURCE, 0);
4170 dspio_set_uint_param(codec, 0x80, 0x05, tmp);
4172 chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_96_000);
4173 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_96_000);
4174 if (spec->quirk == QUIRK_R3DI)
4175 chipio_set_conn_rate(codec, 0x0F, SR_96_000);
4178 if (spec->in_enum_val == REAR_LINE_IN)
4181 if (spec->quirk == QUIRK_SBZ)
4187 dspio_set_uint_param(codec, 0x80, 0x00, tmp);
4190 codec_dbg(codec, "%s: on.", __func__);
4191 chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_16_000);
4192 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_16_000);
4193 if (spec->quirk == QUIRK_R3DI)
4194 chipio_set_conn_rate(codec, 0x0F, SR_16_000);
4196 if (spec->effects_switch[VOICE_FOCUS - EFFECT_START_NID])
4200 dspio_set_uint_param(codec, 0x80, 0x00, tmp);
4203 dspio_set_uint_param(codec, 0x80, 0x05, tmp);
4206 chipio_set_control_param(codec, CONTROL_PARAM_VIP_SOURCE, val);
4209 chipio_set_stream_control(codec, 0x03, 1);
4210 chipio_set_stream_control(codec, 0x04, 1);
4216 * Select the active microphone.
4217 * If autodetect is enabled, mic will be selected based on jack detection.
4218 * If jack inserted, ext.mic will be selected, else built-in mic
4219 * If autodetect is disabled, mic will be selected based on selection.
4221 static int ca0132_select_mic(struct hda_codec *codec)
4223 struct ca0132_spec *spec = codec->spec;
4227 codec_dbg(codec, "ca0132_select_mic\n");
4229 snd_hda_power_up_pm(codec);
4231 auto_jack = spec->vnode_lswitch[VNID_AMIC1_ASEL - VNODE_START_NID];
4234 jack_present = snd_hda_jack_detect(codec, spec->unsol_tag_amic1);
4237 spec->vnode_lswitch[VNID_AMIC1_SEL - VNODE_START_NID];
4240 spec->cur_mic_type = LINE_MIC_IN;
4242 spec->cur_mic_type = DIGITAL_MIC;
4244 if (spec->cur_mic_type == DIGITAL_MIC) {
4245 /* enable digital Mic */
4246 chipio_set_conn_rate(codec, MEM_CONNID_DMIC, SR_32_000);
4247 ca0132_set_dmic(codec, 1);
4248 ca0132_mic_boost_set(codec, 0);
4249 /* set voice focus */
4250 ca0132_effects_set(codec, VOICE_FOCUS,
4251 spec->effects_switch
4252 [VOICE_FOCUS - EFFECT_START_NID]);
4254 /* disable digital Mic */
4255 chipio_set_conn_rate(codec, MEM_CONNID_DMIC, SR_96_000);
4256 ca0132_set_dmic(codec, 0);
4257 ca0132_mic_boost_set(codec, spec->cur_mic_boost);
4258 /* disable voice focus */
4259 ca0132_effects_set(codec, VOICE_FOCUS, 0);
4262 snd_hda_power_down_pm(codec);
4268 * Select the active input.
4269 * Mic detection isn't used, because it's kind of pointless on the SBZ.
4270 * The front mic has no jack-detection, so the only way to switch to it
4271 * is to do it manually in alsamixer.
4273 static int ca0132_alt_select_in(struct hda_codec *codec)
4275 struct ca0132_spec *spec = codec->spec;
4278 codec_dbg(codec, "%s\n", __func__);
4280 snd_hda_power_up_pm(codec);
4282 chipio_set_stream_control(codec, 0x03, 0);
4283 chipio_set_stream_control(codec, 0x04, 0);
4285 spec->cur_mic_type = spec->in_enum_val;
4287 switch (spec->cur_mic_type) {
4289 switch (spec->quirk) {
4291 writew(0x0000, spec->mem_base + 0x320);
4295 r3di_gpio_mic_set(codec, R3DI_REAR_MIC);
4303 chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_96_000);
4304 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_96_000);
4305 if (spec->quirk == QUIRK_R3DI)
4306 chipio_set_conn_rate(codec, 0x0F, SR_96_000);
4308 dspio_set_uint_param(codec, 0x80, 0x00, tmp);
4310 chipio_set_stream_control(codec, 0x03, 1);
4311 chipio_set_stream_control(codec, 0x04, 1);
4313 if (spec->quirk == QUIRK_SBZ) {
4314 chipio_write(codec, 0x18B098, 0x0000000C);
4315 chipio_write(codec, 0x18B09C, 0x0000000C);
4317 ca0132_alt_mic_boost_set(codec, spec->mic_boost_enum_val);
4320 ca0132_mic_boost_set(codec, 0);
4321 switch (spec->quirk) {
4323 writew(0x0000, spec->mem_base + 0x320);
4326 r3di_gpio_mic_set(codec, R3DI_REAR_MIC);
4330 chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_96_000);
4331 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_96_000);
4332 if (spec->quirk == QUIRK_R3DI)
4333 chipio_set_conn_rate(codec, 0x0F, SR_96_000);
4336 dspio_set_uint_param(codec, 0x80, 0x00, tmp);
4338 if (spec->quirk == QUIRK_SBZ) {
4339 chipio_write(codec, 0x18B098, 0x00000000);
4340 chipio_write(codec, 0x18B09C, 0x00000000);
4343 chipio_set_stream_control(codec, 0x03, 1);
4344 chipio_set_stream_control(codec, 0x04, 1);
4347 switch (spec->quirk) {
4349 writew(0x0100, spec->mem_base + 0x320);
4350 writew(0x0005, spec->mem_base + 0x320);
4354 r3di_gpio_mic_set(codec, R3DI_FRONT_MIC);
4362 chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_96_000);
4363 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_96_000);
4364 if (spec->quirk == QUIRK_R3DI)
4365 chipio_set_conn_rate(codec, 0x0F, SR_96_000);
4367 dspio_set_uint_param(codec, 0x80, 0x00, tmp);
4369 chipio_set_stream_control(codec, 0x03, 1);
4370 chipio_set_stream_control(codec, 0x04, 1);
4372 if (spec->quirk == QUIRK_SBZ) {
4373 chipio_write(codec, 0x18B098, 0x0000000C);
4374 chipio_write(codec, 0x18B09C, 0x000000CC);
4376 ca0132_alt_mic_boost_set(codec, spec->mic_boost_enum_val);
4379 ca0132_cvoice_switch_set(codec);
4381 snd_hda_power_down_pm(codec);
4387 * Check if VNODE settings take effect immediately.
4389 static bool ca0132_is_vnode_effective(struct hda_codec *codec,
4391 hda_nid_t *shared_nid)
4393 struct ca0132_spec *spec = codec->spec;
4398 nid = spec->shared_out_nid;
4401 nid = spec->shared_mic_nid;
4414 * The following functions are control change helpers.
4415 * They return 0 if no changed. Return 1 if changed.
4417 static int ca0132_voicefx_set(struct hda_codec *codec, int enable)
4419 struct ca0132_spec *spec = codec->spec;
4422 /* based on CrystalVoice state to enable VoiceFX. */
4424 tmp = spec->effects_switch[CRYSTAL_VOICE - EFFECT_START_NID] ?
4425 FLOAT_ONE : FLOAT_ZERO;
4430 dspio_set_uint_param(codec, ca0132_voicefx.mid,
4431 ca0132_voicefx.reqs[0], tmp);
4437 * Set the effects parameters
4439 static int ca0132_effects_set(struct hda_codec *codec, hda_nid_t nid, long val)
4441 struct ca0132_spec *spec = codec->spec;
4442 unsigned int on, tmp;
4443 int num_fx = OUT_EFFECTS_COUNT + IN_EFFECTS_COUNT;
4445 int idx = nid - EFFECT_START_NID;
4447 if ((idx < 0) || (idx >= num_fx))
4448 return 0; /* no changed */
4450 /* for out effect, qualify with PE */
4451 if ((nid >= OUT_EFFECT_START_NID) && (nid < OUT_EFFECT_END_NID)) {
4452 /* if PE if off, turn off out effects. */
4453 if (!spec->effects_switch[PLAY_ENHANCEMENT - EFFECT_START_NID])
4457 /* for in effect, qualify with CrystalVoice */
4458 if ((nid >= IN_EFFECT_START_NID) && (nid < IN_EFFECT_END_NID)) {
4459 /* if CrystalVoice if off, turn off in effects. */
4460 if (!spec->effects_switch[CRYSTAL_VOICE - EFFECT_START_NID])
4463 /* Voice Focus applies to 2-ch Mic, Digital Mic */
4464 if ((nid == VOICE_FOCUS) && (spec->cur_mic_type != DIGITAL_MIC))
4467 /* If Voice Focus on SBZ, set to two channel. */
4468 if ((nid == VOICE_FOCUS) && (spec->quirk == QUIRK_SBZ)
4469 && (spec->cur_mic_type != REAR_LINE_IN)) {
4470 if (spec->effects_switch[CRYSTAL_VOICE -
4471 EFFECT_START_NID]) {
4473 if (spec->effects_switch[VOICE_FOCUS -
4474 EFFECT_START_NID]) {
4480 dspio_set_uint_param(codec, 0x80, 0x00, tmp);
4484 * For SBZ noise reduction, there's an extra command
4485 * to module ID 0x47. No clue why.
4487 if ((nid == NOISE_REDUCTION) && (spec->quirk == QUIRK_SBZ)
4488 && (spec->cur_mic_type != REAR_LINE_IN)) {
4489 if (spec->effects_switch[CRYSTAL_VOICE -
4490 EFFECT_START_NID]) {
4491 if (spec->effects_switch[NOISE_REDUCTION -
4499 dspio_set_uint_param(codec, 0x47, 0x00, tmp);
4502 /* If rear line in disable effects. */
4503 if (spec->use_alt_functions &&
4504 spec->in_enum_val == REAR_LINE_IN)
4508 codec_dbg(codec, "ca0132_effect_set: nid=0x%x, val=%ld\n",
4511 on = (val == 0) ? FLOAT_ZERO : FLOAT_ONE;
4512 err = dspio_set_uint_param(codec, ca0132_effects[idx].mid,
4513 ca0132_effects[idx].reqs[0], on);
4516 return 0; /* no changed */
4522 * Turn on/off Playback Enhancements
4524 static int ca0132_pe_switch_set(struct hda_codec *codec)
4526 struct ca0132_spec *spec = codec->spec;
4530 codec_dbg(codec, "ca0132_pe_switch_set: val=%ld\n",
4531 spec->effects_switch[PLAY_ENHANCEMENT - EFFECT_START_NID]);
4533 if (spec->use_alt_functions)
4534 ca0132_alt_select_out(codec);
4536 i = OUT_EFFECT_START_NID - EFFECT_START_NID;
4537 nid = OUT_EFFECT_START_NID;
4538 /* PE affects all out effects */
4539 for (; nid < OUT_EFFECT_END_NID; nid++, i++)
4540 ret |= ca0132_effects_set(codec, nid, spec->effects_switch[i]);
4545 /* Check if Mic1 is streaming, if so, stop streaming */
4546 static int stop_mic1(struct hda_codec *codec)
4548 struct ca0132_spec *spec = codec->spec;
4549 unsigned int oldval = snd_hda_codec_read(codec, spec->adcs[0], 0,
4550 AC_VERB_GET_CONV, 0);
4552 snd_hda_codec_write(codec, spec->adcs[0], 0,
4553 AC_VERB_SET_CHANNEL_STREAMID,
4558 /* Resume Mic1 streaming if it was stopped. */
4559 static void resume_mic1(struct hda_codec *codec, unsigned int oldval)
4561 struct ca0132_spec *spec = codec->spec;
4562 /* Restore the previous stream and channel */
4564 snd_hda_codec_write(codec, spec->adcs[0], 0,
4565 AC_VERB_SET_CHANNEL_STREAMID,
4570 * Turn on/off CrystalVoice
4572 static int ca0132_cvoice_switch_set(struct hda_codec *codec)
4574 struct ca0132_spec *spec = codec->spec;
4577 unsigned int oldval;
4579 codec_dbg(codec, "ca0132_cvoice_switch_set: val=%ld\n",
4580 spec->effects_switch[CRYSTAL_VOICE - EFFECT_START_NID]);
4582 i = IN_EFFECT_START_NID - EFFECT_START_NID;
4583 nid = IN_EFFECT_START_NID;
4584 /* CrystalVoice affects all in effects */
4585 for (; nid < IN_EFFECT_END_NID; nid++, i++)
4586 ret |= ca0132_effects_set(codec, nid, spec->effects_switch[i]);
4588 /* including VoiceFX */
4589 ret |= ca0132_voicefx_set(codec, (spec->voicefx_val ? 1 : 0));
4591 /* set correct vipsource */
4592 oldval = stop_mic1(codec);
4593 if (spec->use_alt_functions)
4594 ret |= ca0132_alt_set_vipsource(codec, 1);
4596 ret |= ca0132_set_vipsource(codec, 1);
4597 resume_mic1(codec, oldval);
4601 static int ca0132_mic_boost_set(struct hda_codec *codec, long val)
4603 struct ca0132_spec *spec = codec->spec;
4607 ret = snd_hda_codec_amp_update(codec, spec->input_pins[0], 0,
4608 HDA_INPUT, 0, HDA_AMP_VOLMASK, 3);
4610 ret = snd_hda_codec_amp_update(codec, spec->input_pins[0], 0,
4611 HDA_INPUT, 0, HDA_AMP_VOLMASK, 0);
4616 static int ca0132_alt_mic_boost_set(struct hda_codec *codec, long val)
4618 struct ca0132_spec *spec = codec->spec;
4621 ret = snd_hda_codec_amp_update(codec, spec->input_pins[0], 0,
4622 HDA_INPUT, 0, HDA_AMP_VOLMASK, val);
4626 static int ca0132_vnode_switch_set(struct snd_kcontrol *kcontrol,
4627 struct snd_ctl_elem_value *ucontrol)
4629 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
4630 hda_nid_t nid = get_amp_nid(kcontrol);
4631 hda_nid_t shared_nid = 0;
4634 struct ca0132_spec *spec = codec->spec;
4637 if (nid == VNID_HP_SEL) {
4639 spec->vnode_lswitch[VNID_HP_ASEL - VNODE_START_NID];
4641 if (spec->use_alt_functions)
4642 ca0132_alt_select_out(codec);
4644 ca0132_select_out(codec);
4649 if (nid == VNID_AMIC1_SEL) {
4651 spec->vnode_lswitch[VNID_AMIC1_ASEL - VNODE_START_NID];
4653 ca0132_select_mic(codec);
4657 if (nid == VNID_HP_ASEL) {
4658 if (spec->use_alt_functions)
4659 ca0132_alt_select_out(codec);
4661 ca0132_select_out(codec);
4665 if (nid == VNID_AMIC1_ASEL) {
4666 ca0132_select_mic(codec);
4670 /* if effective conditions, then update hw immediately. */
4671 effective = ca0132_is_vnode_effective(codec, nid, &shared_nid);
4673 int dir = get_amp_direction(kcontrol);
4674 int ch = get_amp_channels(kcontrol);
4677 mutex_lock(&codec->control_mutex);
4678 pval = kcontrol->private_value;
4679 kcontrol->private_value = HDA_COMPOSE_AMP_VAL(shared_nid, ch,
4681 ret = snd_hda_mixer_amp_switch_put(kcontrol, ucontrol);
4682 kcontrol->private_value = pval;
4683 mutex_unlock(&codec->control_mutex);
4688 /* End of control change helpers. */
4690 * Below I've added controls to mess with the effect levels, I've only enabled
4691 * them on the Sound Blaster Z, but they would probably also work on the
4692 * Chromebook. I figured they were probably tuned specifically for it, and left
4696 /* Sets DSP effect level from the sliders above the controls */
4697 static int ca0132_alt_slider_ctl_set(struct hda_codec *codec, hda_nid_t nid,
4698 const unsigned int *lookup, int idx)
4703 * For X_BASS, req 2 is actually crossover freq instead of
4711 snd_hda_power_up(codec);
4712 if (nid == XBASS_XOVER) {
4713 for (i = 0; i < OUT_EFFECTS_COUNT; i++)
4714 if (ca0132_effects[i].nid == X_BASS)
4717 dspio_set_param(codec, ca0132_effects[i].mid, 0x20,
4718 ca0132_effects[i].reqs[1],
4719 &(lookup[idx - 1]), sizeof(unsigned int));
4721 /* Find the actual effect structure */
4722 for (i = 0; i < OUT_EFFECTS_COUNT; i++)
4723 if (nid == ca0132_effects[i].nid)
4726 dspio_set_param(codec, ca0132_effects[i].mid, 0x20,
4727 ca0132_effects[i].reqs[y],
4728 &(lookup[idx]), sizeof(unsigned int));
4731 snd_hda_power_down(codec);
4736 static int ca0132_alt_xbass_xover_slider_ctl_get(struct snd_kcontrol *kcontrol,
4737 struct snd_ctl_elem_value *ucontrol)
4739 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
4740 struct ca0132_spec *spec = codec->spec;
4741 long *valp = ucontrol->value.integer.value;
4743 *valp = spec->xbass_xover_freq;
4747 static int ca0132_alt_slider_ctl_get(struct snd_kcontrol *kcontrol,
4748 struct snd_ctl_elem_value *ucontrol)
4750 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
4751 struct ca0132_spec *spec = codec->spec;
4752 hda_nid_t nid = get_amp_nid(kcontrol);
4753 long *valp = ucontrol->value.integer.value;
4754 int idx = nid - OUT_EFFECT_START_NID;
4756 *valp = spec->fx_ctl_val[idx];
4761 * The X-bass crossover starts at 10hz, so the min is 1. The
4762 * frequency is set in multiples of 10.
4764 static int ca0132_alt_xbass_xover_slider_info(struct snd_kcontrol *kcontrol,
4765 struct snd_ctl_elem_info *uinfo)
4767 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
4769 uinfo->value.integer.min = 1;
4770 uinfo->value.integer.max = 100;
4771 uinfo->value.integer.step = 1;
4776 static int ca0132_alt_effect_slider_info(struct snd_kcontrol *kcontrol,
4777 struct snd_ctl_elem_info *uinfo)
4779 int chs = get_amp_channels(kcontrol);
4781 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
4782 uinfo->count = chs == 3 ? 2 : 1;
4783 uinfo->value.integer.min = 0;
4784 uinfo->value.integer.max = 100;
4785 uinfo->value.integer.step = 1;
4790 static int ca0132_alt_xbass_xover_slider_put(struct snd_kcontrol *kcontrol,
4791 struct snd_ctl_elem_value *ucontrol)
4793 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
4794 struct ca0132_spec *spec = codec->spec;
4795 hda_nid_t nid = get_amp_nid(kcontrol);
4796 long *valp = ucontrol->value.integer.value;
4800 if (spec->xbass_xover_freq == *valp)
4803 spec->xbass_xover_freq = *valp;
4806 ca0132_alt_slider_ctl_set(codec, nid, float_xbass_xover_lookup, idx);
4811 static int ca0132_alt_effect_slider_put(struct snd_kcontrol *kcontrol,
4812 struct snd_ctl_elem_value *ucontrol)
4814 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
4815 struct ca0132_spec *spec = codec->spec;
4816 hda_nid_t nid = get_amp_nid(kcontrol);
4817 long *valp = ucontrol->value.integer.value;
4820 idx = nid - EFFECT_START_NID;
4822 if (spec->fx_ctl_val[idx] == *valp)
4825 spec->fx_ctl_val[idx] = *valp;
4828 ca0132_alt_slider_ctl_set(codec, nid, float_zero_to_one_lookup, idx);
4835 * Mic Boost Enum for alternative ca0132 codecs. I didn't like that the original
4836 * only has off or full 30 dB, and didn't like making a volume slider that has
4837 * traditional 0-100 in alsamixer that goes in big steps. I like enum better.
4839 #define MIC_BOOST_NUM_OF_STEPS 4
4840 #define MIC_BOOST_ENUM_MAX_STRLEN 10
4842 static int ca0132_alt_mic_boost_info(struct snd_kcontrol *kcontrol,
4843 struct snd_ctl_elem_info *uinfo)
4846 char namestr[SNDRV_CTL_ELEM_ID_NAME_MAXLEN];
4848 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
4850 uinfo->value.enumerated.items = MIC_BOOST_NUM_OF_STEPS;
4851 if (uinfo->value.enumerated.item >= MIC_BOOST_NUM_OF_STEPS)
4852 uinfo->value.enumerated.item = MIC_BOOST_NUM_OF_STEPS - 1;
4853 sprintf(namestr, "%d %s", (uinfo->value.enumerated.item * 10), sfx);
4854 strcpy(uinfo->value.enumerated.name, namestr);
4858 static int ca0132_alt_mic_boost_get(struct snd_kcontrol *kcontrol,
4859 struct snd_ctl_elem_value *ucontrol)
4861 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
4862 struct ca0132_spec *spec = codec->spec;
4864 ucontrol->value.enumerated.item[0] = spec->mic_boost_enum_val;
4868 static int ca0132_alt_mic_boost_put(struct snd_kcontrol *kcontrol,
4869 struct snd_ctl_elem_value *ucontrol)
4871 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
4872 struct ca0132_spec *spec = codec->spec;
4873 int sel = ucontrol->value.enumerated.item[0];
4874 unsigned int items = MIC_BOOST_NUM_OF_STEPS;
4879 codec_dbg(codec, "ca0132_alt_mic_boost: boost=%d\n",
4882 spec->mic_boost_enum_val = sel;
4884 if (spec->in_enum_val != REAR_LINE_IN)
4885 ca0132_alt_mic_boost_set(codec, spec->mic_boost_enum_val);
4892 * Input Select Control for alternative ca0132 codecs. This exists because
4893 * front microphone has no auto-detect, and we need a way to set the rear
4896 static int ca0132_alt_input_source_info(struct snd_kcontrol *kcontrol,
4897 struct snd_ctl_elem_info *uinfo)
4899 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
4901 uinfo->value.enumerated.items = IN_SRC_NUM_OF_INPUTS;
4902 if (uinfo->value.enumerated.item >= IN_SRC_NUM_OF_INPUTS)
4903 uinfo->value.enumerated.item = IN_SRC_NUM_OF_INPUTS - 1;
4904 strcpy(uinfo->value.enumerated.name,
4905 in_src_str[uinfo->value.enumerated.item]);
4909 static int ca0132_alt_input_source_get(struct snd_kcontrol *kcontrol,
4910 struct snd_ctl_elem_value *ucontrol)
4912 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
4913 struct ca0132_spec *spec = codec->spec;
4915 ucontrol->value.enumerated.item[0] = spec->in_enum_val;
4919 static int ca0132_alt_input_source_put(struct snd_kcontrol *kcontrol,
4920 struct snd_ctl_elem_value *ucontrol)
4922 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
4923 struct ca0132_spec *spec = codec->spec;
4924 int sel = ucontrol->value.enumerated.item[0];
4925 unsigned int items = IN_SRC_NUM_OF_INPUTS;
4930 codec_dbg(codec, "ca0132_alt_input_select: sel=%d, preset=%s\n",
4931 sel, in_src_str[sel]);
4933 spec->in_enum_val = sel;
4935 ca0132_alt_select_in(codec);
4940 /* Sound Blaster Z Output Select Control */
4941 static int ca0132_alt_output_select_get_info(struct snd_kcontrol *kcontrol,
4942 struct snd_ctl_elem_info *uinfo)
4944 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
4946 uinfo->value.enumerated.items = NUM_OF_OUTPUTS;
4947 if (uinfo->value.enumerated.item >= NUM_OF_OUTPUTS)
4948 uinfo->value.enumerated.item = NUM_OF_OUTPUTS - 1;
4949 strcpy(uinfo->value.enumerated.name,
4950 alt_out_presets[uinfo->value.enumerated.item].name);
4954 static int ca0132_alt_output_select_get(struct snd_kcontrol *kcontrol,
4955 struct snd_ctl_elem_value *ucontrol)
4957 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
4958 struct ca0132_spec *spec = codec->spec;
4960 ucontrol->value.enumerated.item[0] = spec->out_enum_val;
4964 static int ca0132_alt_output_select_put(struct snd_kcontrol *kcontrol,
4965 struct snd_ctl_elem_value *ucontrol)
4967 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
4968 struct ca0132_spec *spec = codec->spec;
4969 int sel = ucontrol->value.enumerated.item[0];
4970 unsigned int items = NUM_OF_OUTPUTS;
4971 unsigned int auto_jack;
4976 codec_dbg(codec, "ca0132_alt_output_select: sel=%d, preset=%s\n",
4977 sel, alt_out_presets[sel].name);
4979 spec->out_enum_val = sel;
4981 auto_jack = spec->vnode_lswitch[VNID_HP_ASEL - VNODE_START_NID];
4984 ca0132_alt_select_out(codec);
4990 * Smart Volume output setting control. Three different settings, Normal,
4991 * which takes the value from the smart volume slider. The two others, loud
4992 * and night, disregard the slider value and have uneditable values.
4994 #define NUM_OF_SVM_SETTINGS 3
4995 static const char *const out_svm_set_enum_str[3] = {"Normal", "Loud", "Night" };
4997 static int ca0132_alt_svm_setting_info(struct snd_kcontrol *kcontrol,
4998 struct snd_ctl_elem_info *uinfo)
5000 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
5002 uinfo->value.enumerated.items = NUM_OF_SVM_SETTINGS;
5003 if (uinfo->value.enumerated.item >= NUM_OF_SVM_SETTINGS)
5004 uinfo->value.enumerated.item = NUM_OF_SVM_SETTINGS - 1;
5005 strcpy(uinfo->value.enumerated.name,
5006 out_svm_set_enum_str[uinfo->value.enumerated.item]);
5010 static int ca0132_alt_svm_setting_get(struct snd_kcontrol *kcontrol,
5011 struct snd_ctl_elem_value *ucontrol)
5013 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
5014 struct ca0132_spec *spec = codec->spec;
5016 ucontrol->value.enumerated.item[0] = spec->smart_volume_setting;
5020 static int ca0132_alt_svm_setting_put(struct snd_kcontrol *kcontrol,
5021 struct snd_ctl_elem_value *ucontrol)
5023 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
5024 struct ca0132_spec *spec = codec->spec;
5025 int sel = ucontrol->value.enumerated.item[0];
5026 unsigned int items = NUM_OF_SVM_SETTINGS;
5027 unsigned int idx = SMART_VOLUME - EFFECT_START_NID;
5033 codec_dbg(codec, "ca0132_alt_svm_setting: sel=%d, preset=%s\n",
5034 sel, out_svm_set_enum_str[sel]);
5036 spec->smart_volume_setting = sel;
5052 /* Req 2 is the Smart Volume Setting req. */
5053 dspio_set_uint_param(codec, ca0132_effects[idx].mid,
5054 ca0132_effects[idx].reqs[2], tmp);
5058 /* Sound Blaster Z EQ preset controls */
5059 static int ca0132_alt_eq_preset_info(struct snd_kcontrol *kcontrol,
5060 struct snd_ctl_elem_info *uinfo)
5062 unsigned int items = ARRAY_SIZE(ca0132_alt_eq_presets);
5064 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
5066 uinfo->value.enumerated.items = items;
5067 if (uinfo->value.enumerated.item >= items)
5068 uinfo->value.enumerated.item = items - 1;
5069 strcpy(uinfo->value.enumerated.name,
5070 ca0132_alt_eq_presets[uinfo->value.enumerated.item].name);
5074 static int ca0132_alt_eq_preset_get(struct snd_kcontrol *kcontrol,
5075 struct snd_ctl_elem_value *ucontrol)
5077 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
5078 struct ca0132_spec *spec = codec->spec;
5080 ucontrol->value.enumerated.item[0] = spec->eq_preset_val;
5084 static int ca0132_alt_eq_preset_put(struct snd_kcontrol *kcontrol,
5085 struct snd_ctl_elem_value *ucontrol)
5087 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
5088 struct ca0132_spec *spec = codec->spec;
5090 int sel = ucontrol->value.enumerated.item[0];
5091 unsigned int items = ARRAY_SIZE(ca0132_alt_eq_presets);
5096 codec_dbg(codec, "%s: sel=%d, preset=%s\n", __func__, sel,
5097 ca0132_alt_eq_presets[sel].name);
5100 * Default needs to qualify with CrystalVoice state.
5102 for (i = 0; i < EQ_PRESET_MAX_PARAM_COUNT; i++) {
5103 err = dspio_set_uint_param(codec, ca0132_alt_eq_enum.mid,
5104 ca0132_alt_eq_enum.reqs[i],
5105 ca0132_alt_eq_presets[sel].vals[i]);
5111 spec->eq_preset_val = sel;
5116 static int ca0132_voicefx_info(struct snd_kcontrol *kcontrol,
5117 struct snd_ctl_elem_info *uinfo)
5119 unsigned int items = ARRAY_SIZE(ca0132_voicefx_presets);
5121 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
5123 uinfo->value.enumerated.items = items;
5124 if (uinfo->value.enumerated.item >= items)
5125 uinfo->value.enumerated.item = items - 1;
5126 strcpy(uinfo->value.enumerated.name,
5127 ca0132_voicefx_presets[uinfo->value.enumerated.item].name);
5131 static int ca0132_voicefx_get(struct snd_kcontrol *kcontrol,
5132 struct snd_ctl_elem_value *ucontrol)
5134 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
5135 struct ca0132_spec *spec = codec->spec;
5137 ucontrol->value.enumerated.item[0] = spec->voicefx_val;
5141 static int ca0132_voicefx_put(struct snd_kcontrol *kcontrol,
5142 struct snd_ctl_elem_value *ucontrol)
5144 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
5145 struct ca0132_spec *spec = codec->spec;
5147 int sel = ucontrol->value.enumerated.item[0];
5149 if (sel >= ARRAY_SIZE(ca0132_voicefx_presets))
5152 codec_dbg(codec, "ca0132_voicefx_put: sel=%d, preset=%s\n",
5153 sel, ca0132_voicefx_presets[sel].name);
5157 * Default needs to qualify with CrystalVoice state.
5159 for (i = 0; i < VOICEFX_MAX_PARAM_COUNT; i++) {
5160 err = dspio_set_uint_param(codec, ca0132_voicefx.mid,
5161 ca0132_voicefx.reqs[i],
5162 ca0132_voicefx_presets[sel].vals[i]);
5168 spec->voicefx_val = sel;
5169 /* enable voice fx */
5170 ca0132_voicefx_set(codec, (sel ? 1 : 0));
5176 static int ca0132_switch_get(struct snd_kcontrol *kcontrol,
5177 struct snd_ctl_elem_value *ucontrol)
5179 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
5180 struct ca0132_spec *spec = codec->spec;
5181 hda_nid_t nid = get_amp_nid(kcontrol);
5182 int ch = get_amp_channels(kcontrol);
5183 long *valp = ucontrol->value.integer.value;
5186 if ((nid >= VNODE_START_NID) && (nid < VNODE_END_NID)) {
5188 *valp = spec->vnode_lswitch[nid - VNODE_START_NID];
5192 *valp = spec->vnode_rswitch[nid - VNODE_START_NID];
5198 /* effects, include PE and CrystalVoice */
5199 if ((nid >= EFFECT_START_NID) && (nid < EFFECT_END_NID)) {
5200 *valp = spec->effects_switch[nid - EFFECT_START_NID];
5205 if (nid == spec->input_pins[0]) {
5206 *valp = spec->cur_mic_boost;
5213 static int ca0132_switch_put(struct snd_kcontrol *kcontrol,
5214 struct snd_ctl_elem_value *ucontrol)
5216 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
5217 struct ca0132_spec *spec = codec->spec;
5218 hda_nid_t nid = get_amp_nid(kcontrol);
5219 int ch = get_amp_channels(kcontrol);
5220 long *valp = ucontrol->value.integer.value;
5223 codec_dbg(codec, "ca0132_switch_put: nid=0x%x, val=%ld\n",
5226 snd_hda_power_up(codec);
5228 if ((nid >= VNODE_START_NID) && (nid < VNODE_END_NID)) {
5230 spec->vnode_lswitch[nid - VNODE_START_NID] = *valp;
5234 spec->vnode_rswitch[nid - VNODE_START_NID] = *valp;
5237 changed = ca0132_vnode_switch_set(kcontrol, ucontrol);
5242 if (nid == PLAY_ENHANCEMENT) {
5243 spec->effects_switch[nid - EFFECT_START_NID] = *valp;
5244 changed = ca0132_pe_switch_set(codec);
5249 if (nid == CRYSTAL_VOICE) {
5250 spec->effects_switch[nid - EFFECT_START_NID] = *valp;
5251 changed = ca0132_cvoice_switch_set(codec);
5255 /* out and in effects */
5256 if (((nid >= OUT_EFFECT_START_NID) && (nid < OUT_EFFECT_END_NID)) ||
5257 ((nid >= IN_EFFECT_START_NID) && (nid < IN_EFFECT_END_NID))) {
5258 spec->effects_switch[nid - EFFECT_START_NID] = *valp;
5259 changed = ca0132_effects_set(codec, nid, *valp);
5264 if (nid == spec->input_pins[0]) {
5265 spec->cur_mic_boost = *valp;
5266 if (spec->use_alt_functions) {
5267 if (spec->in_enum_val != REAR_LINE_IN)
5268 changed = ca0132_mic_boost_set(codec, *valp);
5270 /* Mic boost does not apply to Digital Mic */
5271 if (spec->cur_mic_type != DIGITAL_MIC)
5272 changed = ca0132_mic_boost_set(codec, *valp);
5279 snd_hda_power_down(codec);
5287 * Sets the internal DSP decibel level to match the DAC for output, and the
5288 * ADC for input. Currently only the SBZ sets dsp capture volume level, and
5289 * all alternative codecs set DSP playback volume.
5291 static void ca0132_alt_dsp_volume_put(struct hda_codec *codec, hda_nid_t nid)
5293 struct ca0132_spec *spec = codec->spec;
5294 unsigned int dsp_dir;
5295 unsigned int lookup_val;
5297 if (nid == VNID_SPK)
5298 dsp_dir = DSP_VOL_OUT;
5300 dsp_dir = DSP_VOL_IN;
5302 lookup_val = spec->vnode_lvol[nid - VNODE_START_NID];
5304 dspio_set_uint_param(codec,
5305 ca0132_alt_vol_ctls[dsp_dir].mid,
5306 ca0132_alt_vol_ctls[dsp_dir].reqs[0],
5307 float_vol_db_lookup[lookup_val]);
5309 lookup_val = spec->vnode_rvol[nid - VNODE_START_NID];
5311 dspio_set_uint_param(codec,
5312 ca0132_alt_vol_ctls[dsp_dir].mid,
5313 ca0132_alt_vol_ctls[dsp_dir].reqs[1],
5314 float_vol_db_lookup[lookup_val]);
5316 dspio_set_uint_param(codec,
5317 ca0132_alt_vol_ctls[dsp_dir].mid,
5318 ca0132_alt_vol_ctls[dsp_dir].reqs[2], FLOAT_ZERO);
5321 static int ca0132_volume_info(struct snd_kcontrol *kcontrol,
5322 struct snd_ctl_elem_info *uinfo)
5324 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
5325 struct ca0132_spec *spec = codec->spec;
5326 hda_nid_t nid = get_amp_nid(kcontrol);
5327 int ch = get_amp_channels(kcontrol);
5328 int dir = get_amp_direction(kcontrol);
5334 /* follow shared_out info */
5335 nid = spec->shared_out_nid;
5336 mutex_lock(&codec->control_mutex);
5337 pval = kcontrol->private_value;
5338 kcontrol->private_value = HDA_COMPOSE_AMP_VAL(nid, ch, 0, dir);
5339 err = snd_hda_mixer_amp_volume_info(kcontrol, uinfo);
5340 kcontrol->private_value = pval;
5341 mutex_unlock(&codec->control_mutex);
5344 /* follow shared_mic info */
5345 nid = spec->shared_mic_nid;
5346 mutex_lock(&codec->control_mutex);
5347 pval = kcontrol->private_value;
5348 kcontrol->private_value = HDA_COMPOSE_AMP_VAL(nid, ch, 0, dir);
5349 err = snd_hda_mixer_amp_volume_info(kcontrol, uinfo);
5350 kcontrol->private_value = pval;
5351 mutex_unlock(&codec->control_mutex);
5354 err = snd_hda_mixer_amp_volume_info(kcontrol, uinfo);
5359 static int ca0132_volume_get(struct snd_kcontrol *kcontrol,
5360 struct snd_ctl_elem_value *ucontrol)
5362 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
5363 struct ca0132_spec *spec = codec->spec;
5364 hda_nid_t nid = get_amp_nid(kcontrol);
5365 int ch = get_amp_channels(kcontrol);
5366 long *valp = ucontrol->value.integer.value;
5368 /* store the left and right volume */
5370 *valp = spec->vnode_lvol[nid - VNODE_START_NID];
5374 *valp = spec->vnode_rvol[nid - VNODE_START_NID];
5380 static int ca0132_volume_put(struct snd_kcontrol *kcontrol,
5381 struct snd_ctl_elem_value *ucontrol)
5383 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
5384 struct ca0132_spec *spec = codec->spec;
5385 hda_nid_t nid = get_amp_nid(kcontrol);
5386 int ch = get_amp_channels(kcontrol);
5387 long *valp = ucontrol->value.integer.value;
5388 hda_nid_t shared_nid = 0;
5392 /* store the left and right volume */
5394 spec->vnode_lvol[nid - VNODE_START_NID] = *valp;
5398 spec->vnode_rvol[nid - VNODE_START_NID] = *valp;
5402 /* if effective conditions, then update hw immediately. */
5403 effective = ca0132_is_vnode_effective(codec, nid, &shared_nid);
5405 int dir = get_amp_direction(kcontrol);
5408 snd_hda_power_up(codec);
5409 mutex_lock(&codec->control_mutex);
5410 pval = kcontrol->private_value;
5411 kcontrol->private_value = HDA_COMPOSE_AMP_VAL(shared_nid, ch,
5413 changed = snd_hda_mixer_amp_volume_put(kcontrol, ucontrol);
5414 kcontrol->private_value = pval;
5415 mutex_unlock(&codec->control_mutex);
5416 snd_hda_power_down(codec);
5423 * This function is the same as the one above, because using an if statement
5424 * inside of the above volume control for the DSP volume would cause too much
5425 * lag. This is a lot more smooth.
5427 static int ca0132_alt_volume_put(struct snd_kcontrol *kcontrol,
5428 struct snd_ctl_elem_value *ucontrol)
5430 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
5431 struct ca0132_spec *spec = codec->spec;
5432 hda_nid_t nid = get_amp_nid(kcontrol);
5433 int ch = get_amp_channels(kcontrol);
5434 long *valp = ucontrol->value.integer.value;
5447 /* store the left and right volume */
5449 spec->vnode_lvol[vnid - VNODE_START_NID] = *valp;
5453 spec->vnode_rvol[vnid - VNODE_START_NID] = *valp;
5457 snd_hda_power_up(codec);
5458 ca0132_alt_dsp_volume_put(codec, vnid);
5459 mutex_lock(&codec->control_mutex);
5460 changed = snd_hda_mixer_amp_volume_put(kcontrol, ucontrol);
5461 mutex_unlock(&codec->control_mutex);
5462 snd_hda_power_down(codec);
5467 static int ca0132_volume_tlv(struct snd_kcontrol *kcontrol, int op_flag,
5468 unsigned int size, unsigned int __user *tlv)
5470 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
5471 struct ca0132_spec *spec = codec->spec;
5472 hda_nid_t nid = get_amp_nid(kcontrol);
5473 int ch = get_amp_channels(kcontrol);
5474 int dir = get_amp_direction(kcontrol);
5480 /* follow shared_out tlv */
5481 nid = spec->shared_out_nid;
5482 mutex_lock(&codec->control_mutex);
5483 pval = kcontrol->private_value;
5484 kcontrol->private_value = HDA_COMPOSE_AMP_VAL(nid, ch, 0, dir);
5485 err = snd_hda_mixer_amp_tlv(kcontrol, op_flag, size, tlv);
5486 kcontrol->private_value = pval;
5487 mutex_unlock(&codec->control_mutex);
5490 /* follow shared_mic tlv */
5491 nid = spec->shared_mic_nid;
5492 mutex_lock(&codec->control_mutex);
5493 pval = kcontrol->private_value;
5494 kcontrol->private_value = HDA_COMPOSE_AMP_VAL(nid, ch, 0, dir);
5495 err = snd_hda_mixer_amp_tlv(kcontrol, op_flag, size, tlv);
5496 kcontrol->private_value = pval;
5497 mutex_unlock(&codec->control_mutex);
5500 err = snd_hda_mixer_amp_tlv(kcontrol, op_flag, size, tlv);
5505 /* Add volume slider control for effect level */
5506 static int ca0132_alt_add_effect_slider(struct hda_codec *codec, hda_nid_t nid,
5507 const char *pfx, int dir)
5509 char namestr[SNDRV_CTL_ELEM_ID_NAME_MAXLEN];
5510 int type = dir ? HDA_INPUT : HDA_OUTPUT;
5511 struct snd_kcontrol_new knew =
5512 HDA_CODEC_VOLUME_MONO(namestr, nid, 1, 0, type);
5514 sprintf(namestr, "FX: %s %s Volume", pfx, dirstr[dir]);
5521 knew.info = ca0132_alt_xbass_xover_slider_info;
5522 knew.get = ca0132_alt_xbass_xover_slider_ctl_get;
5523 knew.put = ca0132_alt_xbass_xover_slider_put;
5526 knew.info = ca0132_alt_effect_slider_info;
5527 knew.get = ca0132_alt_slider_ctl_get;
5528 knew.put = ca0132_alt_effect_slider_put;
5529 knew.private_value =
5530 HDA_COMPOSE_AMP_VAL(nid, 1, 0, type);
5534 return snd_hda_ctl_add(codec, nid, snd_ctl_new1(&knew, codec));
5538 * Added FX: prefix for the alternative codecs, because otherwise the surround
5539 * effect would conflict with the Surround sound volume control. Also seems more
5540 * clear as to what the switches do. Left alone for others.
5542 static int add_fx_switch(struct hda_codec *codec, hda_nid_t nid,
5543 const char *pfx, int dir)
5545 struct ca0132_spec *spec = codec->spec;
5546 char namestr[SNDRV_CTL_ELEM_ID_NAME_MAXLEN];
5547 int type = dir ? HDA_INPUT : HDA_OUTPUT;
5548 struct snd_kcontrol_new knew =
5549 CA0132_CODEC_MUTE_MONO(namestr, nid, 1, type);
5550 /* If using alt_controls, add FX: prefix. But, don't add FX:
5551 * prefix to OutFX or InFX enable controls.
5553 if ((spec->use_alt_controls) && (nid <= IN_EFFECT_END_NID))
5554 sprintf(namestr, "FX: %s %s Switch", pfx, dirstr[dir]);
5556 sprintf(namestr, "%s %s Switch", pfx, dirstr[dir]);
5558 return snd_hda_ctl_add(codec, nid, snd_ctl_new1(&knew, codec));
5561 static int add_voicefx(struct hda_codec *codec)
5563 struct snd_kcontrol_new knew =
5564 HDA_CODEC_MUTE_MONO(ca0132_voicefx.name,
5565 VOICEFX, 1, 0, HDA_INPUT);
5566 knew.info = ca0132_voicefx_info;
5567 knew.get = ca0132_voicefx_get;
5568 knew.put = ca0132_voicefx_put;
5569 return snd_hda_ctl_add(codec, VOICEFX, snd_ctl_new1(&knew, codec));
5572 /* Create the EQ Preset control */
5573 static int add_ca0132_alt_eq_presets(struct hda_codec *codec)
5575 struct snd_kcontrol_new knew =
5576 HDA_CODEC_MUTE_MONO(ca0132_alt_eq_enum.name,
5577 EQ_PRESET_ENUM, 1, 0, HDA_OUTPUT);
5578 knew.info = ca0132_alt_eq_preset_info;
5579 knew.get = ca0132_alt_eq_preset_get;
5580 knew.put = ca0132_alt_eq_preset_put;
5581 return snd_hda_ctl_add(codec, EQ_PRESET_ENUM,
5582 snd_ctl_new1(&knew, codec));
5586 * Add enumerated control for the three different settings of the smart volume
5587 * output effect. Normal just uses the slider value, and loud and night are
5588 * their own things that ignore that value.
5590 static int ca0132_alt_add_svm_enum(struct hda_codec *codec)
5592 struct snd_kcontrol_new knew =
5593 HDA_CODEC_MUTE_MONO("FX: Smart Volume Setting",
5594 SMART_VOLUME_ENUM, 1, 0, HDA_OUTPUT);
5595 knew.info = ca0132_alt_svm_setting_info;
5596 knew.get = ca0132_alt_svm_setting_get;
5597 knew.put = ca0132_alt_svm_setting_put;
5598 return snd_hda_ctl_add(codec, SMART_VOLUME_ENUM,
5599 snd_ctl_new1(&knew, codec));
5604 * Create an Output Select enumerated control for codecs with surround
5607 static int ca0132_alt_add_output_enum(struct hda_codec *codec)
5609 struct snd_kcontrol_new knew =
5610 HDA_CODEC_MUTE_MONO("Output Select",
5611 OUTPUT_SOURCE_ENUM, 1, 0, HDA_OUTPUT);
5612 knew.info = ca0132_alt_output_select_get_info;
5613 knew.get = ca0132_alt_output_select_get;
5614 knew.put = ca0132_alt_output_select_put;
5615 return snd_hda_ctl_add(codec, OUTPUT_SOURCE_ENUM,
5616 snd_ctl_new1(&knew, codec));
5620 * Create an Input Source enumerated control for the alternate ca0132 codecs
5621 * because the front microphone has no auto-detect, and Line-in has to be set
5624 static int ca0132_alt_add_input_enum(struct hda_codec *codec)
5626 struct snd_kcontrol_new knew =
5627 HDA_CODEC_MUTE_MONO("Input Source",
5628 INPUT_SOURCE_ENUM, 1, 0, HDA_INPUT);
5629 knew.info = ca0132_alt_input_source_info;
5630 knew.get = ca0132_alt_input_source_get;
5631 knew.put = ca0132_alt_input_source_put;
5632 return snd_hda_ctl_add(codec, INPUT_SOURCE_ENUM,
5633 snd_ctl_new1(&knew, codec));
5637 * Add mic boost enumerated control. Switches through 0dB to 30dB. This adds
5638 * more control than the original mic boost, which is either full 30dB or off.
5640 static int ca0132_alt_add_mic_boost_enum(struct hda_codec *codec)
5642 struct snd_kcontrol_new knew =
5643 HDA_CODEC_MUTE_MONO("Mic Boost Capture Switch",
5644 MIC_BOOST_ENUM, 1, 0, HDA_INPUT);
5645 knew.info = ca0132_alt_mic_boost_info;
5646 knew.get = ca0132_alt_mic_boost_get;
5647 knew.put = ca0132_alt_mic_boost_put;
5648 return snd_hda_ctl_add(codec, MIC_BOOST_ENUM,
5649 snd_ctl_new1(&knew, codec));
5654 * Need to create slave controls for the alternate codecs that have surround
5657 static const char * const ca0132_alt_slave_pfxs[] = {
5658 "Front", "Surround", "Center", "LFE", NULL,
5662 * Also need special channel map, because the default one is incorrect.
5663 * I think this has to do with the pin for rear surround being 0x11,
5664 * and the center/lfe being 0x10. Usually the pin order is the opposite.
5666 const struct snd_pcm_chmap_elem ca0132_alt_chmaps[] = {
5668 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR } },
5670 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR,
5671 SNDRV_CHMAP_RL, SNDRV_CHMAP_RR } },
5673 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR,
5674 SNDRV_CHMAP_FC, SNDRV_CHMAP_LFE,
5675 SNDRV_CHMAP_RL, SNDRV_CHMAP_RR } },
5679 /* Add the correct chmap for streams with 6 channels. */
5680 static void ca0132_alt_add_chmap_ctls(struct hda_codec *codec)
5683 struct hda_pcm *pcm;
5685 list_for_each_entry(pcm, &codec->pcm_list_head, list) {
5686 struct hda_pcm_stream *hinfo =
5687 &pcm->stream[SNDRV_PCM_STREAM_PLAYBACK];
5688 struct snd_pcm_chmap *chmap;
5689 const struct snd_pcm_chmap_elem *elem;
5691 elem = ca0132_alt_chmaps;
5692 if (hinfo->channels_max == 6) {
5693 err = snd_pcm_add_chmap_ctls(pcm->pcm,
5694 SNDRV_PCM_STREAM_PLAYBACK,
5695 elem, hinfo->channels_max, 0, &chmap);
5697 codec_dbg(codec, "snd_pcm_add_chmap_ctls failed!");
5703 * When changing Node IDs for Mixer Controls below, make sure to update
5704 * Node IDs in ca0132_config() as well.
5706 static const struct snd_kcontrol_new ca0132_mixer[] = {
5707 CA0132_CODEC_VOL("Master Playback Volume", VNID_SPK, HDA_OUTPUT),
5708 CA0132_CODEC_MUTE("Master Playback Switch", VNID_SPK, HDA_OUTPUT),
5709 CA0132_CODEC_VOL("Capture Volume", VNID_MIC, HDA_INPUT),
5710 CA0132_CODEC_MUTE("Capture Switch", VNID_MIC, HDA_INPUT),
5711 HDA_CODEC_VOLUME("Analog-Mic2 Capture Volume", 0x08, 0, HDA_INPUT),
5712 HDA_CODEC_MUTE("Analog-Mic2 Capture Switch", 0x08, 0, HDA_INPUT),
5713 HDA_CODEC_VOLUME("What U Hear Capture Volume", 0x0a, 0, HDA_INPUT),
5714 HDA_CODEC_MUTE("What U Hear Capture Switch", 0x0a, 0, HDA_INPUT),
5715 CA0132_CODEC_MUTE_MONO("Mic1-Boost (30dB) Capture Switch",
5716 0x12, 1, HDA_INPUT),
5717 CA0132_CODEC_MUTE_MONO("HP/Speaker Playback Switch",
5718 VNID_HP_SEL, 1, HDA_OUTPUT),
5719 CA0132_CODEC_MUTE_MONO("AMic1/DMic Capture Switch",
5720 VNID_AMIC1_SEL, 1, HDA_INPUT),
5721 CA0132_CODEC_MUTE_MONO("HP/Speaker Auto Detect Playback Switch",
5722 VNID_HP_ASEL, 1, HDA_OUTPUT),
5723 CA0132_CODEC_MUTE_MONO("AMic1/DMic Auto Detect Capture Switch",
5724 VNID_AMIC1_ASEL, 1, HDA_INPUT),
5729 * SBZ specific control mixer. Removes auto-detect for mic, and adds surround
5730 * controls. Also sets both the Front Playback and Capture Volume controls to
5731 * alt so they set the DSP's decibel level.
5733 static const struct snd_kcontrol_new sbz_mixer[] = {
5734 CA0132_ALT_CODEC_VOL("Front Playback Volume", 0x02, HDA_OUTPUT),
5735 CA0132_CODEC_MUTE("Front Playback Switch", VNID_SPK, HDA_OUTPUT),
5736 HDA_CODEC_VOLUME("Surround Playback Volume", 0x04, 0, HDA_OUTPUT),
5737 HDA_CODEC_MUTE("Surround Playback Switch", 0x04, 0, HDA_OUTPUT),
5738 HDA_CODEC_VOLUME_MONO("Center Playback Volume", 0x03, 1, 0, HDA_OUTPUT),
5739 HDA_CODEC_MUTE_MONO("Center Playback Switch", 0x03, 1, 0, HDA_OUTPUT),
5740 HDA_CODEC_VOLUME_MONO("LFE Playback Volume", 0x03, 2, 0, HDA_OUTPUT),
5741 HDA_CODEC_MUTE_MONO("LFE Playback Switch", 0x03, 2, 0, HDA_OUTPUT),
5742 CA0132_ALT_CODEC_VOL("Capture Volume", 0x07, HDA_INPUT),
5743 CA0132_CODEC_MUTE("Capture Switch", VNID_MIC, HDA_INPUT),
5744 HDA_CODEC_VOLUME("What U Hear Capture Volume", 0x0a, 0, HDA_INPUT),
5745 HDA_CODEC_MUTE("What U Hear Capture Switch", 0x0a, 0, HDA_INPUT),
5746 CA0132_CODEC_MUTE_MONO("HP/Speaker Auto Detect Playback Switch",
5747 VNID_HP_ASEL, 1, HDA_OUTPUT),
5752 * Same as the Sound Blaster Z, except doesn't use the alt volume for capture
5753 * because it doesn't set decibel levels for the DSP for capture.
5755 static const struct snd_kcontrol_new r3di_mixer[] = {
5756 CA0132_ALT_CODEC_VOL("Front Playback Volume", 0x02, HDA_OUTPUT),
5757 CA0132_CODEC_MUTE("Front Playback Switch", VNID_SPK, HDA_OUTPUT),
5758 HDA_CODEC_VOLUME("Surround Playback Volume", 0x04, 0, HDA_OUTPUT),
5759 HDA_CODEC_MUTE("Surround Playback Switch", 0x04, 0, HDA_OUTPUT),
5760 HDA_CODEC_VOLUME_MONO("Center Playback Volume", 0x03, 1, 0, HDA_OUTPUT),
5761 HDA_CODEC_MUTE_MONO("Center Playback Switch", 0x03, 1, 0, HDA_OUTPUT),
5762 HDA_CODEC_VOLUME_MONO("LFE Playback Volume", 0x03, 2, 0, HDA_OUTPUT),
5763 HDA_CODEC_MUTE_MONO("LFE Playback Switch", 0x03, 2, 0, HDA_OUTPUT),
5764 CA0132_CODEC_VOL("Capture Volume", VNID_MIC, HDA_INPUT),
5765 CA0132_CODEC_MUTE("Capture Switch", VNID_MIC, HDA_INPUT),
5766 HDA_CODEC_VOLUME("What U Hear Capture Volume", 0x0a, 0, HDA_INPUT),
5767 HDA_CODEC_MUTE("What U Hear Capture Switch", 0x0a, 0, HDA_INPUT),
5768 CA0132_CODEC_MUTE_MONO("HP/Speaker Auto Detect Playback Switch",
5769 VNID_HP_ASEL, 1, HDA_OUTPUT),
5773 static int ca0132_build_controls(struct hda_codec *codec)
5775 struct ca0132_spec *spec = codec->spec;
5776 int i, num_fx, num_sliders;
5779 /* Add Mixer controls */
5780 for (i = 0; i < spec->num_mixers; i++) {
5781 err = snd_hda_add_new_ctls(codec, spec->mixers[i]);
5785 /* Setup vmaster with surround slaves for desktop ca0132 devices */
5786 if (spec->use_alt_functions) {
5787 snd_hda_set_vmaster_tlv(codec, spec->dacs[0], HDA_OUTPUT,
5789 snd_hda_add_vmaster(codec, "Master Playback Volume",
5790 spec->tlv, ca0132_alt_slave_pfxs,
5792 err = __snd_hda_add_vmaster(codec, "Master Playback Switch",
5793 NULL, ca0132_alt_slave_pfxs,
5795 true, &spec->vmaster_mute.sw_kctl);
5799 /* Add in and out effects controls.
5800 * VoiceFX, PE and CrystalVoice are added separately.
5802 num_fx = OUT_EFFECTS_COUNT + IN_EFFECTS_COUNT;
5803 for (i = 0; i < num_fx; i++) {
5804 /* SBZ breaks if Echo Cancellation is used */
5805 if (spec->quirk == QUIRK_SBZ) {
5806 if (i == (ECHO_CANCELLATION - IN_EFFECT_START_NID +
5811 err = add_fx_switch(codec, ca0132_effects[i].nid,
5812 ca0132_effects[i].name,
5813 ca0132_effects[i].direct);
5818 * If codec has use_alt_controls set to true, add effect level sliders,
5819 * EQ presets, and Smart Volume presets. Also, change names to add FX
5820 * prefix, and change PlayEnhancement and CrystalVoice to match.
5822 if (spec->use_alt_controls) {
5823 ca0132_alt_add_svm_enum(codec);
5824 add_ca0132_alt_eq_presets(codec);
5825 err = add_fx_switch(codec, PLAY_ENHANCEMENT,
5830 err = add_fx_switch(codec, CRYSTAL_VOICE,
5835 num_sliders = OUT_EFFECTS_COUNT - 1;
5836 for (i = 0; i < num_sliders; i++) {
5837 err = ca0132_alt_add_effect_slider(codec,
5838 ca0132_effects[i].nid,
5839 ca0132_effects[i].name,
5840 ca0132_effects[i].direct);
5845 err = ca0132_alt_add_effect_slider(codec, XBASS_XOVER,
5846 "X-Bass Crossover", EFX_DIR_OUT);
5851 err = add_fx_switch(codec, PLAY_ENHANCEMENT,
5852 "PlayEnhancement", 0);
5856 err = add_fx_switch(codec, CRYSTAL_VOICE,
5864 * If the codec uses alt_functions, you need the enumerated controls
5865 * to select the new outputs and inputs, plus add the new mic boost
5868 if (spec->use_alt_functions) {
5869 ca0132_alt_add_output_enum(codec);
5870 ca0132_alt_add_input_enum(codec);
5871 ca0132_alt_add_mic_boost_enum(codec);
5873 #ifdef ENABLE_TUNING_CONTROLS
5874 add_tuning_ctls(codec);
5877 err = snd_hda_jack_add_kctls(codec, &spec->autocfg);
5881 if (spec->dig_out) {
5882 err = snd_hda_create_spdif_out_ctls(codec, spec->dig_out,
5886 err = snd_hda_create_spdif_share_sw(codec, &spec->multiout);
5889 /* spec->multiout.share_spdif = 1; */
5893 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in);
5898 if (spec->use_alt_functions)
5899 ca0132_alt_add_chmap_ctls(codec);
5907 static const struct hda_pcm_stream ca0132_pcm_analog_playback = {
5912 .prepare = ca0132_playback_pcm_prepare,
5913 .cleanup = ca0132_playback_pcm_cleanup,
5914 .get_delay = ca0132_playback_pcm_delay,
5918 static const struct hda_pcm_stream ca0132_pcm_analog_capture = {
5923 .prepare = ca0132_capture_pcm_prepare,
5924 .cleanup = ca0132_capture_pcm_cleanup,
5925 .get_delay = ca0132_capture_pcm_delay,
5929 static const struct hda_pcm_stream ca0132_pcm_digital_playback = {
5934 .open = ca0132_dig_playback_pcm_open,
5935 .close = ca0132_dig_playback_pcm_close,
5936 .prepare = ca0132_dig_playback_pcm_prepare,
5937 .cleanup = ca0132_dig_playback_pcm_cleanup
5941 static const struct hda_pcm_stream ca0132_pcm_digital_capture = {
5947 static int ca0132_build_pcms(struct hda_codec *codec)
5949 struct ca0132_spec *spec = codec->spec;
5950 struct hda_pcm *info;
5952 info = snd_hda_codec_pcm_new(codec, "CA0132 Analog");
5955 if (spec->use_alt_functions) {
5956 info->own_chmap = true;
5957 info->stream[SNDRV_PCM_STREAM_PLAYBACK].chmap
5958 = ca0132_alt_chmaps;
5960 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = ca0132_pcm_analog_playback;
5961 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->dacs[0];
5962 info->stream[SNDRV_PCM_STREAM_PLAYBACK].channels_max =
5963 spec->multiout.max_channels;
5964 info->stream[SNDRV_PCM_STREAM_CAPTURE] = ca0132_pcm_analog_capture;
5965 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = 1;
5966 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adcs[0];
5968 /* With the DSP enabled, desktops don't use this ADC. */
5969 if (spec->use_alt_functions) {
5970 info = snd_hda_codec_pcm_new(codec, "CA0132 Analog Mic-In2");
5973 info->stream[SNDRV_PCM_STREAM_CAPTURE] =
5974 ca0132_pcm_analog_capture;
5975 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = 1;
5976 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adcs[1];
5979 info = snd_hda_codec_pcm_new(codec, "CA0132 What U Hear");
5982 info->stream[SNDRV_PCM_STREAM_CAPTURE] = ca0132_pcm_analog_capture;
5983 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = 1;
5984 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adcs[2];
5986 if (!spec->dig_out && !spec->dig_in)
5989 info = snd_hda_codec_pcm_new(codec, "CA0132 Digital");
5992 info->pcm_type = HDA_PCM_TYPE_SPDIF;
5993 if (spec->dig_out) {
5994 info->stream[SNDRV_PCM_STREAM_PLAYBACK] =
5995 ca0132_pcm_digital_playback;
5996 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->dig_out;
5999 info->stream[SNDRV_PCM_STREAM_CAPTURE] =
6000 ca0132_pcm_digital_capture;
6001 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in;
6007 static void init_output(struct hda_codec *codec, hda_nid_t pin, hda_nid_t dac)
6010 snd_hda_set_pin_ctl(codec, pin, PIN_HP);
6011 if (get_wcaps(codec, pin) & AC_WCAP_OUT_AMP)
6012 snd_hda_codec_write(codec, pin, 0,
6013 AC_VERB_SET_AMP_GAIN_MUTE,
6016 if (dac && (get_wcaps(codec, dac) & AC_WCAP_OUT_AMP))
6017 snd_hda_codec_write(codec, dac, 0,
6018 AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_ZERO);
6021 static void init_input(struct hda_codec *codec, hda_nid_t pin, hda_nid_t adc)
6024 snd_hda_set_pin_ctl(codec, pin, PIN_VREF80);
6025 if (get_wcaps(codec, pin) & AC_WCAP_IN_AMP)
6026 snd_hda_codec_write(codec, pin, 0,
6027 AC_VERB_SET_AMP_GAIN_MUTE,
6030 if (adc && (get_wcaps(codec, adc) & AC_WCAP_IN_AMP)) {
6031 snd_hda_codec_write(codec, adc, 0, AC_VERB_SET_AMP_GAIN_MUTE,
6034 /* init to 0 dB and unmute. */
6035 snd_hda_codec_amp_stereo(codec, adc, HDA_INPUT, 0,
6036 HDA_AMP_VOLMASK, 0x5a);
6037 snd_hda_codec_amp_stereo(codec, adc, HDA_INPUT, 0,
6042 static void refresh_amp_caps(struct hda_codec *codec, hda_nid_t nid, int dir)
6046 caps = snd_hda_param_read(codec, nid, dir == HDA_OUTPUT ?
6047 AC_PAR_AMP_OUT_CAP : AC_PAR_AMP_IN_CAP);
6048 snd_hda_override_amp_caps(codec, nid, dir, caps);
6052 * Switch between Digital built-in mic and analog mic.
6054 static void ca0132_set_dmic(struct hda_codec *codec, int enable)
6056 struct ca0132_spec *spec = codec->spec;
6059 unsigned int oldval;
6061 codec_dbg(codec, "ca0132_set_dmic: enable=%d\n", enable);
6063 oldval = stop_mic1(codec);
6064 ca0132_set_vipsource(codec, 0);
6066 /* set DMic input as 2-ch */
6068 dspio_set_uint_param(codec, 0x80, 0x00, tmp);
6070 val = spec->dmic_ctl;
6072 snd_hda_codec_write(codec, spec->input_pins[0], 0,
6073 VENDOR_CHIPIO_DMIC_CTL_SET, val);
6075 if (!(spec->dmic_ctl & 0x20))
6076 chipio_set_control_flag(codec, CONTROL_FLAG_DMIC, 1);
6078 /* set AMic input as mono */
6080 dspio_set_uint_param(codec, 0x80, 0x00, tmp);
6082 val = spec->dmic_ctl;
6083 /* clear bit7 and bit5 to disable dmic */
6085 snd_hda_codec_write(codec, spec->input_pins[0], 0,
6086 VENDOR_CHIPIO_DMIC_CTL_SET, val);
6088 if (!(spec->dmic_ctl & 0x20))
6089 chipio_set_control_flag(codec, CONTROL_FLAG_DMIC, 0);
6091 ca0132_set_vipsource(codec, 1);
6092 resume_mic1(codec, oldval);
6096 * Initialization for Digital Mic.
6098 static void ca0132_init_dmic(struct hda_codec *codec)
6100 struct ca0132_spec *spec = codec->spec;
6103 /* Setup Digital Mic here, but don't enable.
6104 * Enable based on jack detect.
6107 /* MCLK uses MPIO1, set to enable.
6108 * Bit 2-0: MPIO select
6109 * Bit 3: set to disable
6113 snd_hda_codec_write(codec, spec->input_pins[0], 0,
6114 VENDOR_CHIPIO_DMIC_MCLK_SET, val);
6116 /* Data1 uses MPIO3. Data2 not use
6117 * Bit 2-0: Data1 MPIO select
6118 * Bit 3: set disable Data1
6119 * Bit 6-4: Data2 MPIO select
6120 * Bit 7: set disable Data2
6123 snd_hda_codec_write(codec, spec->input_pins[0], 0,
6124 VENDOR_CHIPIO_DMIC_PIN_SET, val);
6126 /* Use Ch-0 and Ch-1. Rate is 48K, mode 1. Disable DMic first.
6127 * Bit 3-0: Channel mask
6128 * Bit 4: set for 48KHz, clear for 32KHz
6130 * Bit 6: set to select Data2, clear for Data1
6131 * Bit 7: set to enable DMic, clear for AMic
6134 /* keep a copy of dmic ctl val for enable/disable dmic purpuse */
6135 spec->dmic_ctl = val;
6136 snd_hda_codec_write(codec, spec->input_pins[0], 0,
6137 VENDOR_CHIPIO_DMIC_CTL_SET, val);
6141 * Initialization for Analog Mic 2
6143 static void ca0132_init_analog_mic2(struct hda_codec *codec)
6145 struct ca0132_spec *spec = codec->spec;
6147 mutex_lock(&spec->chipio_mutex);
6148 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
6149 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x20);
6150 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
6151 VENDOR_CHIPIO_8051_ADDRESS_HIGH, 0x19);
6152 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
6153 VENDOR_CHIPIO_8051_DATA_WRITE, 0x00);
6154 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
6155 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x2D);
6156 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
6157 VENDOR_CHIPIO_8051_ADDRESS_HIGH, 0x19);
6158 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
6159 VENDOR_CHIPIO_8051_DATA_WRITE, 0x00);
6160 mutex_unlock(&spec->chipio_mutex);
6163 static void ca0132_refresh_widget_caps(struct hda_codec *codec)
6165 struct ca0132_spec *spec = codec->spec;
6168 codec_dbg(codec, "ca0132_refresh_widget_caps.\n");
6169 snd_hda_codec_update_widgets(codec);
6171 for (i = 0; i < spec->multiout.num_dacs; i++)
6172 refresh_amp_caps(codec, spec->dacs[i], HDA_OUTPUT);
6174 for (i = 0; i < spec->num_outputs; i++)
6175 refresh_amp_caps(codec, spec->out_pins[i], HDA_OUTPUT);
6177 for (i = 0; i < spec->num_inputs; i++) {
6178 refresh_amp_caps(codec, spec->adcs[i], HDA_INPUT);
6179 refresh_amp_caps(codec, spec->input_pins[i], HDA_INPUT);
6184 * Recon3Di r3di_setup_defaults sub functions.
6187 static void r3di_dsp_scp_startup(struct hda_codec *codec)
6192 dspio_set_uint_param_no_source(codec, 0x80, 0x0A, tmp);
6195 dspio_set_uint_param_no_source(codec, 0x80, 0x0B, tmp);
6198 dspio_set_uint_param_no_source(codec, 0x80, 0x0C, tmp);
6201 dspio_set_uint_param_no_source(codec, 0x80, 0x0C, tmp);
6204 dspio_set_uint_param_no_source(codec, 0x80, 0x0C, tmp);
6208 static void r3di_dsp_initial_mic_setup(struct hda_codec *codec)
6213 chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_96_000);
6214 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_96_000);
6215 /* This ConnPointID is unique to Recon3Di. Haven't seen it elsewhere */
6216 chipio_set_conn_rate(codec, 0x0F, SR_96_000);
6218 dspio_set_uint_param(codec, 0x80, 0x00, tmp);
6220 /* Mic 2 Setup, even though it isn't connected on SBZ */
6221 chipio_set_conn_rate(codec, MEM_CONNID_MICIN2, SR_96_000);
6222 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT2, SR_96_000);
6223 chipio_set_conn_rate(codec, 0x0F, SR_96_000);
6225 dspio_set_uint_param(codec, 0x80, 0x01, tmp);
6229 * Initialize Sound Blaster Z analog microphones.
6231 static void sbz_init_analog_mics(struct hda_codec *codec)
6236 chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_96_000);
6237 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_96_000);
6239 dspio_set_uint_param(codec, 0x80, 0x00, tmp);
6241 /* Mic 2 Setup, even though it isn't connected on SBZ */
6242 chipio_set_conn_rate(codec, MEM_CONNID_MICIN2, SR_96_000);
6243 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT2, SR_96_000);
6245 dspio_set_uint_param(codec, 0x80, 0x01, tmp);
6250 * Sets the source of stream 0x14 to connpointID 0x48, and the destination
6251 * connpointID to 0x91. If this isn't done, the destination is 0x71, and
6252 * you get no sound. I'm guessing this has to do with the Sound Blaster Z
6253 * having an updated DAC, which changes the destination to that DAC.
6255 static void sbz_connect_streams(struct hda_codec *codec)
6257 struct ca0132_spec *spec = codec->spec;
6259 mutex_lock(&spec->chipio_mutex);
6261 codec_dbg(codec, "Connect Streams entered, mutex locked and loaded.\n");
6263 chipio_set_stream_channels(codec, 0x0C, 6);
6264 chipio_set_stream_control(codec, 0x0C, 1);
6266 /* This value is 0x43 for 96khz, and 0x83 for 192khz. */
6267 chipio_write_no_mutex(codec, 0x18a020, 0x00000043);
6269 /* Setup stream 0x14 with it's source and destination points */
6270 chipio_set_stream_source_dest(codec, 0x14, 0x48, 0x91);
6271 chipio_set_conn_rate_no_mutex(codec, 0x48, SR_96_000);
6272 chipio_set_conn_rate_no_mutex(codec, 0x91, SR_96_000);
6273 chipio_set_stream_channels(codec, 0x14, 2);
6274 chipio_set_stream_control(codec, 0x14, 1);
6276 codec_dbg(codec, "Connect Streams exited, mutex released.\n");
6278 mutex_unlock(&spec->chipio_mutex);
6283 * Write data through ChipIO to setup proper stream destinations.
6284 * Not sure how it exactly works, but it seems to direct data
6285 * to different destinations. Example is f8 to c0, e0 to c0.
6286 * All I know is, if you don't set these, you get no sound.
6288 static void sbz_chipio_startup_data(struct hda_codec *codec)
6290 struct ca0132_spec *spec = codec->spec;
6292 mutex_lock(&spec->chipio_mutex);
6293 codec_dbg(codec, "Startup Data entered, mutex locked and loaded.\n");
6295 /* These control audio output */
6296 chipio_write_no_mutex(codec, 0x190060, 0x0001f8c0);
6297 chipio_write_no_mutex(codec, 0x190064, 0x0001f9c1);
6298 chipio_write_no_mutex(codec, 0x190068, 0x0001fac6);
6299 chipio_write_no_mutex(codec, 0x19006c, 0x0001fbc7);
6300 /* Signal to update I think */
6301 chipio_write_no_mutex(codec, 0x19042c, 0x00000001);
6303 chipio_set_stream_channels(codec, 0x0C, 6);
6304 chipio_set_stream_control(codec, 0x0C, 1);
6305 /* No clue what these control */
6306 chipio_write_no_mutex(codec, 0x190030, 0x0001e0c0);
6307 chipio_write_no_mutex(codec, 0x190034, 0x0001e1c1);
6308 chipio_write_no_mutex(codec, 0x190038, 0x0001e4c2);
6309 chipio_write_no_mutex(codec, 0x19003c, 0x0001e5c3);
6310 chipio_write_no_mutex(codec, 0x190040, 0x0001e2c4);
6311 chipio_write_no_mutex(codec, 0x190044, 0x0001e3c5);
6312 chipio_write_no_mutex(codec, 0x190048, 0x0001e8c6);
6313 chipio_write_no_mutex(codec, 0x19004c, 0x0001e9c7);
6314 chipio_write_no_mutex(codec, 0x190050, 0x0001ecc8);
6315 chipio_write_no_mutex(codec, 0x190054, 0x0001edc9);
6316 chipio_write_no_mutex(codec, 0x190058, 0x0001eaca);
6317 chipio_write_no_mutex(codec, 0x19005c, 0x0001ebcb);
6319 chipio_write_no_mutex(codec, 0x19042c, 0x00000001);
6321 codec_dbg(codec, "Startup Data exited, mutex released.\n");
6322 mutex_unlock(&spec->chipio_mutex);
6326 * Sound Blaster Z uses these after DSP is loaded. Weird SCP commands
6327 * without a 0x20 source like normal.
6329 static void sbz_dsp_scp_startup(struct hda_codec *codec)
6334 dspio_set_uint_param_no_source(codec, 0x80, 0x0C, tmp);
6337 dspio_set_uint_param_no_source(codec, 0x80, 0x0A, tmp);
6340 dspio_set_uint_param_no_source(codec, 0x80, 0x0B, tmp);
6343 dspio_set_uint_param_no_source(codec, 0x80, 0x0C, tmp);
6346 dspio_set_uint_param_no_source(codec, 0x80, 0x0C, tmp);
6349 dspio_set_uint_param_no_source(codec, 0x80, 0x0C, tmp);
6353 static void sbz_dsp_initial_mic_setup(struct hda_codec *codec)
6357 chipio_set_stream_control(codec, 0x03, 0);
6358 chipio_set_stream_control(codec, 0x04, 0);
6360 chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_96_000);
6361 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_96_000);
6364 dspio_set_uint_param(codec, 0x80, 0x00, tmp);
6366 chipio_set_stream_control(codec, 0x03, 1);
6367 chipio_set_stream_control(codec, 0x04, 1);
6369 chipio_write(codec, 0x18b098, 0x0000000c);
6370 chipio_write(codec, 0x18b09C, 0x0000000c);
6374 * Setup default parameters for DSP
6376 static void ca0132_setup_defaults(struct hda_codec *codec)
6378 struct ca0132_spec *spec = codec->spec;
6383 if (spec->dsp_state != DSP_DOWNLOADED)
6386 /* out, in effects + voicefx */
6387 num_fx = OUT_EFFECTS_COUNT + IN_EFFECTS_COUNT + 1;
6388 for (idx = 0; idx < num_fx; idx++) {
6389 for (i = 0; i <= ca0132_effects[idx].params; i++) {
6390 dspio_set_uint_param(codec, ca0132_effects[idx].mid,
6391 ca0132_effects[idx].reqs[i],
6392 ca0132_effects[idx].def_vals[i]);
6396 /*remove DSP headroom*/
6398 dspio_set_uint_param(codec, 0x96, 0x3C, tmp);
6400 /*set speaker EQ bypass attenuation*/
6401 dspio_set_uint_param(codec, 0x8f, 0x01, tmp);
6403 /* set AMic1 and AMic2 as mono mic */
6405 dspio_set_uint_param(codec, 0x80, 0x00, tmp);
6406 dspio_set_uint_param(codec, 0x80, 0x01, tmp);
6408 /* set AMic1 as CrystalVoice input */
6410 dspio_set_uint_param(codec, 0x80, 0x05, tmp);
6412 /* set WUH source */
6414 dspio_set_uint_param(codec, 0x31, 0x00, tmp);
6418 * Setup default parameters for Recon3Di DSP.
6421 static void r3di_setup_defaults(struct hda_codec *codec)
6423 struct ca0132_spec *spec = codec->spec;
6428 if (spec->dsp_state != DSP_DOWNLOADED)
6431 r3di_dsp_scp_startup(codec);
6433 r3di_dsp_initial_mic_setup(codec);
6435 /*remove DSP headroom*/
6437 dspio_set_uint_param(codec, 0x96, 0x3C, tmp);
6439 /* set WUH source */
6441 dspio_set_uint_param(codec, 0x31, 0x00, tmp);
6442 chipio_set_conn_rate(codec, MEM_CONNID_WUH, SR_48_000);
6444 /* Set speaker source? */
6445 dspio_set_uint_param(codec, 0x32, 0x00, tmp);
6447 r3di_gpio_dsp_status_set(codec, R3DI_DSP_DOWNLOADED);
6449 /* Setup effect defaults */
6450 num_fx = OUT_EFFECTS_COUNT + IN_EFFECTS_COUNT + 1;
6451 for (idx = 0; idx < num_fx; idx++) {
6452 for (i = 0; i <= ca0132_effects[idx].params; i++) {
6453 dspio_set_uint_param(codec,
6454 ca0132_effects[idx].mid,
6455 ca0132_effects[idx].reqs[i],
6456 ca0132_effects[idx].def_vals[i]);
6463 * Setup default parameters for the Sound Blaster Z DSP. A lot more going on
6464 * than the Chromebook setup.
6466 static void sbz_setup_defaults(struct hda_codec *codec)
6468 struct ca0132_spec *spec = codec->spec;
6469 unsigned int tmp, stream_format;
6473 if (spec->dsp_state != DSP_DOWNLOADED)
6476 sbz_dsp_scp_startup(codec);
6478 sbz_init_analog_mics(codec);
6480 sbz_connect_streams(codec);
6482 sbz_chipio_startup_data(codec);
6484 chipio_set_stream_control(codec, 0x03, 1);
6485 chipio_set_stream_control(codec, 0x04, 1);
6488 * Sets internal input loopback to off, used to have a switch to
6489 * enable input loopback, but turned out to be way too buggy.
6492 dspio_set_uint_param(codec, 0x37, 0x08, tmp);
6493 dspio_set_uint_param(codec, 0x37, 0x10, tmp);
6495 /*remove DSP headroom*/
6497 dspio_set_uint_param(codec, 0x96, 0x3C, tmp);
6499 /* set WUH source */
6501 dspio_set_uint_param(codec, 0x31, 0x00, tmp);
6502 chipio_set_conn_rate(codec, MEM_CONNID_WUH, SR_48_000);
6504 /* Set speaker source? */
6505 dspio_set_uint_param(codec, 0x32, 0x00, tmp);
6507 sbz_dsp_initial_mic_setup(codec);
6510 /* out, in effects + voicefx */
6511 num_fx = OUT_EFFECTS_COUNT + IN_EFFECTS_COUNT + 1;
6512 for (idx = 0; idx < num_fx; idx++) {
6513 for (i = 0; i <= ca0132_effects[idx].params; i++) {
6514 dspio_set_uint_param(codec,
6515 ca0132_effects[idx].mid,
6516 ca0132_effects[idx].reqs[i],
6517 ca0132_effects[idx].def_vals[i]);
6522 * Have to make a stream to bind the sound output to, otherwise
6523 * you'll get dead audio. Before I did this, it would bind to an
6524 * audio input, and would never work
6526 stream_format = snd_hdac_calc_stream_format(48000, 2,
6527 SNDRV_PCM_FORMAT_S32_LE, 32, 0);
6529 snd_hda_codec_setup_stream(codec, spec->dacs[0], spec->dsp_stream_id,
6532 snd_hda_codec_cleanup_stream(codec, spec->dacs[0]);
6534 snd_hda_codec_setup_stream(codec, spec->dacs[0], spec->dsp_stream_id,
6537 snd_hda_codec_cleanup_stream(codec, spec->dacs[0]);
6541 * Initialization of flags in chip
6543 static void ca0132_init_flags(struct hda_codec *codec)
6545 struct ca0132_spec *spec = codec->spec;
6547 if (spec->use_alt_functions) {
6548 chipio_set_control_flag(codec, CONTROL_FLAG_DSP_96KHZ, 1);
6549 chipio_set_control_flag(codec, CONTROL_FLAG_DAC_96KHZ, 1);
6550 chipio_set_control_flag(codec, CONTROL_FLAG_ADC_B_96KHZ, 1);
6551 chipio_set_control_flag(codec, CONTROL_FLAG_ADC_C_96KHZ, 1);
6552 chipio_set_control_flag(codec, CONTROL_FLAG_SRC_RATE_96KHZ, 1);
6553 chipio_set_control_flag(codec, CONTROL_FLAG_IDLE_ENABLE, 0);
6554 chipio_set_control_flag(codec, CONTROL_FLAG_SPDIF2OUT, 0);
6555 chipio_set_control_flag(codec,
6556 CONTROL_FLAG_PORT_D_10KOHM_LOAD, 0);
6557 chipio_set_control_flag(codec,
6558 CONTROL_FLAG_PORT_A_10KOHM_LOAD, 1);
6560 chipio_set_control_flag(codec, CONTROL_FLAG_IDLE_ENABLE, 0);
6561 chipio_set_control_flag(codec,
6562 CONTROL_FLAG_PORT_A_COMMON_MODE, 0);
6563 chipio_set_control_flag(codec,
6564 CONTROL_FLAG_PORT_D_COMMON_MODE, 0);
6565 chipio_set_control_flag(codec,
6566 CONTROL_FLAG_PORT_A_10KOHM_LOAD, 0);
6567 chipio_set_control_flag(codec,
6568 CONTROL_FLAG_PORT_D_10KOHM_LOAD, 0);
6569 chipio_set_control_flag(codec, CONTROL_FLAG_ADC_C_HIGH_PASS, 1);
6574 * Initialization of parameters in chip
6576 static void ca0132_init_params(struct hda_codec *codec)
6578 struct ca0132_spec *spec = codec->spec;
6580 if (spec->use_alt_functions) {
6581 chipio_set_conn_rate(codec, MEM_CONNID_WUH, SR_48_000);
6582 chipio_set_conn_rate(codec, 0x0B, SR_48_000);
6583 chipio_set_control_param(codec, CONTROL_PARAM_SPDIF1_SOURCE, 0);
6584 chipio_set_control_param(codec, 0, 0);
6585 chipio_set_control_param(codec, CONTROL_PARAM_VIP_SOURCE, 0);
6588 chipio_set_control_param(codec, CONTROL_PARAM_PORTA_160OHM_GAIN, 6);
6589 chipio_set_control_param(codec, CONTROL_PARAM_PORTD_160OHM_GAIN, 6);
6592 static void ca0132_set_dsp_msr(struct hda_codec *codec, bool is96k)
6594 chipio_set_control_flag(codec, CONTROL_FLAG_DSP_96KHZ, is96k);
6595 chipio_set_control_flag(codec, CONTROL_FLAG_DAC_96KHZ, is96k);
6596 chipio_set_control_flag(codec, CONTROL_FLAG_SRC_RATE_96KHZ, is96k);
6597 chipio_set_control_flag(codec, CONTROL_FLAG_SRC_CLOCK_196MHZ, is96k);
6598 chipio_set_control_flag(codec, CONTROL_FLAG_ADC_B_96KHZ, is96k);
6599 chipio_set_control_flag(codec, CONTROL_FLAG_ADC_C_96KHZ, is96k);
6601 chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_96_000);
6602 chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_96_000);
6603 chipio_set_conn_rate(codec, MEM_CONNID_WUH, SR_48_000);
6606 static bool ca0132_download_dsp_images(struct hda_codec *codec)
6608 bool dsp_loaded = false;
6609 struct ca0132_spec *spec = codec->spec;
6610 const struct dsp_image_seg *dsp_os_image;
6611 const struct firmware *fw_entry;
6613 * Alternate firmwares for different variants. The Recon3Di apparently
6614 * can use the default firmware, but I'll leave the option in case
6615 * it needs it again.
6617 switch (spec->quirk) {
6619 if (request_firmware(&fw_entry, SBZ_EFX_FILE,
6620 codec->card->dev) != 0) {
6621 codec_dbg(codec, "SBZ alt firmware not detected. ");
6622 spec->alt_firmware_present = false;
6624 codec_dbg(codec, "Sound Blaster Z firmware selected.");
6625 spec->alt_firmware_present = true;
6629 if (request_firmware(&fw_entry, R3DI_EFX_FILE,
6630 codec->card->dev) != 0) {
6631 codec_dbg(codec, "Recon3Di alt firmware not detected.");
6632 spec->alt_firmware_present = false;
6634 codec_dbg(codec, "Recon3Di firmware selected.");
6635 spec->alt_firmware_present = true;
6639 spec->alt_firmware_present = false;
6643 * Use default ctefx.bin if no alt firmware is detected, or if none
6644 * exists for your particular codec.
6646 if (!spec->alt_firmware_present) {
6647 codec_dbg(codec, "Default firmware selected.");
6648 if (request_firmware(&fw_entry, EFX_FILE,
6649 codec->card->dev) != 0)
6653 dsp_os_image = (struct dsp_image_seg *)(fw_entry->data);
6654 if (dspload_image(codec, dsp_os_image, 0, 0, true, 0)) {
6655 codec_err(codec, "ca0132 DSP load image failed\n");
6659 dsp_loaded = dspload_wait_loaded(codec);
6662 release_firmware(fw_entry);
6667 static void ca0132_download_dsp(struct hda_codec *codec)
6669 struct ca0132_spec *spec = codec->spec;
6671 #ifndef CONFIG_SND_HDA_CODEC_CA0132_DSP
6675 if (spec->dsp_state == DSP_DOWNLOAD_FAILED)
6676 return; /* don't retry failures */
6678 chipio_enable_clocks(codec);
6679 if (spec->dsp_state != DSP_DOWNLOADED) {
6680 spec->dsp_state = DSP_DOWNLOADING;
6682 if (!ca0132_download_dsp_images(codec))
6683 spec->dsp_state = DSP_DOWNLOAD_FAILED;
6685 spec->dsp_state = DSP_DOWNLOADED;
6688 /* For codecs using alt functions, this is already done earlier */
6689 if (spec->dsp_state == DSP_DOWNLOADED && (!spec->use_alt_functions))
6690 ca0132_set_dsp_msr(codec, true);
6693 static void ca0132_process_dsp_response(struct hda_codec *codec,
6694 struct hda_jack_callback *callback)
6696 struct ca0132_spec *spec = codec->spec;
6698 codec_dbg(codec, "ca0132_process_dsp_response\n");
6699 if (spec->wait_scp) {
6700 if (dspio_get_response_data(codec) >= 0)
6704 dspio_clear_response_queue(codec);
6707 static void hp_callback(struct hda_codec *codec, struct hda_jack_callback *cb)
6709 struct ca0132_spec *spec = codec->spec;
6710 struct hda_jack_tbl *tbl;
6712 /* Delay enabling the HP amp, to let the mic-detection
6713 * state machine run.
6715 cancel_delayed_work_sync(&spec->unsol_hp_work);
6716 schedule_delayed_work(&spec->unsol_hp_work, msecs_to_jiffies(500));
6717 tbl = snd_hda_jack_tbl_get(codec, cb->nid);
6719 tbl->block_report = 1;
6722 static void amic_callback(struct hda_codec *codec, struct hda_jack_callback *cb)
6724 ca0132_select_mic(codec);
6727 static void ca0132_init_unsol(struct hda_codec *codec)
6729 struct ca0132_spec *spec = codec->spec;
6730 snd_hda_jack_detect_enable_callback(codec, spec->unsol_tag_hp, hp_callback);
6731 snd_hda_jack_detect_enable_callback(codec, spec->unsol_tag_amic1,
6733 snd_hda_jack_detect_enable_callback(codec, UNSOL_TAG_DSP,
6734 ca0132_process_dsp_response);
6735 /* Front headphone jack detection */
6736 if (spec->use_alt_functions)
6737 snd_hda_jack_detect_enable_callback(codec,
6738 spec->unsol_tag_front_hp, hp_callback);
6745 /* Sends before DSP download. */
6746 static struct hda_verb ca0132_base_init_verbs[] = {
6747 /*enable ct extension*/
6748 {0x15, VENDOR_CHIPIO_CT_EXTENSIONS_ENABLE, 0x1},
6753 static struct hda_verb ca0132_base_exit_verbs[] = {
6755 {0x01, AC_VERB_SET_POWER_STATE, 0x03},
6756 /*disable ct extension*/
6757 {0x15, VENDOR_CHIPIO_CT_EXTENSIONS_ENABLE, 0},
6761 /* Other verbs tables. Sends after DSP download. */
6763 static struct hda_verb ca0132_init_verbs0[] = {
6764 /* chip init verbs */
6765 {0x15, 0x70D, 0xF0},
6766 {0x15, 0x70E, 0xFE},
6767 {0x15, 0x707, 0x75},
6768 {0x15, 0x707, 0xD3},
6769 {0x15, 0x707, 0x09},
6770 {0x15, 0x707, 0x53},
6771 {0x15, 0x707, 0xD4},
6772 {0x15, 0x707, 0xEF},
6773 {0x15, 0x707, 0x75},
6774 {0x15, 0x707, 0xD3},
6775 {0x15, 0x707, 0x09},
6776 {0x15, 0x707, 0x02},
6777 {0x15, 0x707, 0x37},
6778 {0x15, 0x707, 0x78},
6779 {0x15, 0x53C, 0xCE},
6780 {0x15, 0x575, 0xC9},
6781 {0x15, 0x53D, 0xCE},
6782 {0x15, 0x5B7, 0xC9},
6783 {0x15, 0x70D, 0xE8},
6784 {0x15, 0x70E, 0xFE},
6785 {0x15, 0x707, 0x02},
6786 {0x15, 0x707, 0x68},
6787 {0x15, 0x707, 0x62},
6788 {0x15, 0x53A, 0xCE},
6789 {0x15, 0x546, 0xC9},
6790 {0x15, 0x53B, 0xCE},
6791 {0x15, 0x5E8, 0xC9},
6795 /* Extra init verbs for SBZ */
6796 static struct hda_verb sbz_init_verbs[] = {
6797 {0x15, 0x70D, 0x20},
6798 {0x15, 0x70E, 0x19},
6799 {0x15, 0x707, 0x00},
6800 {0x15, 0x539, 0xCE},
6801 {0x15, 0x546, 0xC9},
6802 {0x15, 0x70D, 0xB7},
6803 {0x15, 0x70E, 0x09},
6804 {0x15, 0x707, 0x10},
6805 {0x15, 0x70D, 0xAF},
6806 {0x15, 0x70E, 0x09},
6807 {0x15, 0x707, 0x01},
6808 {0x15, 0x707, 0x05},
6809 {0x15, 0x70D, 0x73},
6810 {0x15, 0x70E, 0x09},
6811 {0x15, 0x707, 0x14},
6812 {0x15, 0x6FF, 0xC4},
6816 static void ca0132_init_chip(struct hda_codec *codec)
6818 struct ca0132_spec *spec = codec->spec;
6823 mutex_init(&spec->chipio_mutex);
6825 spec->cur_out_type = SPEAKER_OUT;
6826 if (!spec->use_alt_functions)
6827 spec->cur_mic_type = DIGITAL_MIC;
6829 spec->cur_mic_type = REAR_MIC;
6831 spec->cur_mic_boost = 0;
6833 for (i = 0; i < VNODES_COUNT; i++) {
6834 spec->vnode_lvol[i] = 0x5a;
6835 spec->vnode_rvol[i] = 0x5a;
6836 spec->vnode_lswitch[i] = 0;
6837 spec->vnode_rswitch[i] = 0;
6841 * Default states for effects are in ca0132_effects[].
6843 num_fx = OUT_EFFECTS_COUNT + IN_EFFECTS_COUNT;
6844 for (i = 0; i < num_fx; i++) {
6845 on = (unsigned int)ca0132_effects[i].reqs[0];
6846 spec->effects_switch[i] = on ? 1 : 0;
6849 * Sets defaults for the effect slider controls, only for alternative
6850 * ca0132 codecs. Also sets x-bass crossover frequency to 80hz.
6852 if (spec->use_alt_controls) {
6853 spec->xbass_xover_freq = 8;
6854 for (i = 0; i < EFFECT_LEVEL_SLIDERS; i++)
6855 spec->fx_ctl_val[i] = effect_slider_defaults[i];
6858 spec->voicefx_val = 0;
6859 spec->effects_switch[PLAY_ENHANCEMENT - EFFECT_START_NID] = 1;
6860 spec->effects_switch[CRYSTAL_VOICE - EFFECT_START_NID] = 0;
6862 #ifdef ENABLE_TUNING_CONTROLS
6863 ca0132_init_tuning_defaults(codec);
6868 * Recon3Di exit specific commands.
6870 /* prevents popping noise on shutdown */
6871 static void r3di_gpio_shutdown(struct hda_codec *codec)
6873 snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_DATA, 0x00);
6877 * Sound Blaster Z exit specific commands.
6879 static void sbz_region2_exit(struct hda_codec *codec)
6881 struct ca0132_spec *spec = codec->spec;
6884 for (i = 0; i < 4; i++)
6885 writeb(0x0, spec->mem_base + 0x100);
6886 for (i = 0; i < 8; i++)
6887 writeb(0xb3, spec->mem_base + 0x304);
6889 * I believe these are GPIO, with the right most hex digit being the
6890 * gpio pin, and the second digit being on or off. We see this more in
6891 * the input/output select functions.
6893 writew(0x0000, spec->mem_base + 0x320);
6894 writew(0x0001, spec->mem_base + 0x320);
6895 writew(0x0104, spec->mem_base + 0x320);
6896 writew(0x0005, spec->mem_base + 0x320);
6897 writew(0x0007, spec->mem_base + 0x320);
6900 static void sbz_set_pin_ctl_default(struct hda_codec *codec)
6902 hda_nid_t pins[5] = {0x0B, 0x0C, 0x0E, 0x12, 0x13};
6905 snd_hda_codec_write(codec, 0x11, 0,
6906 AC_VERB_SET_PIN_WIDGET_CONTROL, 0x40);
6908 for (i = 0; i < 5; i++)
6909 snd_hda_codec_write(codec, pins[i], 0,
6910 AC_VERB_SET_PIN_WIDGET_CONTROL, 0x00);
6913 static void sbz_clear_unsolicited(struct hda_codec *codec)
6915 hda_nid_t pins[7] = {0x0B, 0x0E, 0x0F, 0x10, 0x11, 0x12, 0x13};
6918 for (i = 0; i < 7; i++) {
6919 snd_hda_codec_write(codec, pins[i], 0,
6920 AC_VERB_SET_UNSOLICITED_ENABLE, 0x00);
6924 /* On shutdown, sends commands in sets of three */
6925 static void sbz_gpio_shutdown_commands(struct hda_codec *codec, int dir,
6929 snd_hda_codec_write(codec, 0x01, 0,
6930 AC_VERB_SET_GPIO_DIRECTION, dir);
6932 snd_hda_codec_write(codec, 0x01, 0,
6933 AC_VERB_SET_GPIO_MASK, mask);
6936 snd_hda_codec_write(codec, 0x01, 0,
6937 AC_VERB_SET_GPIO_DATA, data);
6940 static void sbz_exit_chip(struct hda_codec *codec)
6942 chipio_set_stream_control(codec, 0x03, 0);
6943 chipio_set_stream_control(codec, 0x04, 0);
6945 /* Mess with GPIO */
6946 sbz_gpio_shutdown_commands(codec, 0x07, 0x07, -1);
6947 sbz_gpio_shutdown_commands(codec, 0x07, 0x07, 0x05);
6948 sbz_gpio_shutdown_commands(codec, 0x07, 0x07, 0x01);
6950 chipio_set_stream_control(codec, 0x14, 0);
6951 chipio_set_stream_control(codec, 0x0C, 0);
6953 chipio_set_conn_rate(codec, 0x41, SR_192_000);
6954 chipio_set_conn_rate(codec, 0x91, SR_192_000);
6956 chipio_write(codec, 0x18a020, 0x00000083);
6958 sbz_gpio_shutdown_commands(codec, 0x07, 0x07, 0x03);
6959 sbz_gpio_shutdown_commands(codec, 0x07, 0x07, 0x07);
6960 sbz_gpio_shutdown_commands(codec, 0x07, 0x07, 0x06);
6962 chipio_set_stream_control(codec, 0x0C, 0);
6964 chipio_set_control_param(codec, 0x0D, 0x24);
6966 sbz_clear_unsolicited(codec);
6967 sbz_set_pin_ctl_default(codec);
6969 snd_hda_codec_write(codec, 0x0B, 0,
6970 AC_VERB_SET_EAPD_BTLENABLE, 0x00);
6972 if (dspload_is_loaded(codec))
6975 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
6976 VENDOR_CHIPIO_CT_EXTENSIONS_ENABLE, 0x00);
6978 sbz_region2_exit(codec);
6981 static void ca0132_exit_chip(struct hda_codec *codec)
6983 /* put any chip cleanup stuffs here. */
6985 if (dspload_is_loaded(codec))
6990 * This fixes a problem that was hard to reproduce. Very rarely, I would
6991 * boot up, and there would be no sound, but the DSP indicated it had loaded
6992 * properly. I did a few memory dumps to see if anything was different, and
6993 * there were a few areas of memory uninitialized with a1a2a3a4. This function
6994 * checks if those areas are uninitialized, and if they are, it'll attempt to
6995 * reload the card 3 times. Usually it fixes by the second.
6997 static void sbz_dsp_startup_check(struct hda_codec *codec)
6999 struct ca0132_spec *spec = codec->spec;
7000 unsigned int dsp_data_check[4];
7001 unsigned int cur_address = 0x390;
7003 unsigned int failure = 0;
7004 unsigned int reload = 3;
7006 if (spec->startup_check_entered)
7009 spec->startup_check_entered = true;
7011 for (i = 0; i < 4; i++) {
7012 chipio_read(codec, cur_address, &dsp_data_check[i]);
7015 for (i = 0; i < 4; i++) {
7016 if (dsp_data_check[i] == 0xa1a2a3a4)
7020 codec_dbg(codec, "Startup Check: %d ", failure);
7022 codec_info(codec, "DSP not initialized properly. Attempting to fix.");
7024 * While the failure condition is true, and we haven't reached our
7025 * three reload limit, continue trying to reload the driver and
7028 while (failure && (reload != 0)) {
7029 codec_info(codec, "Reloading... Tries left: %d", reload);
7030 sbz_exit_chip(codec);
7031 spec->dsp_state = DSP_DOWNLOAD_INIT;
7032 codec->patch_ops.init(codec);
7034 for (i = 0; i < 4; i++) {
7035 chipio_read(codec, cur_address, &dsp_data_check[i]);
7038 for (i = 0; i < 4; i++) {
7039 if (dsp_data_check[i] == 0xa1a2a3a4)
7045 if (!failure && reload < 3)
7046 codec_info(codec, "DSP fixed.");
7051 codec_info(codec, "DSP failed to initialize properly. Either try a full shutdown or a suspend to clear the internal memory.");
7055 * This is for the extra volume verbs 0x797 (left) and 0x798 (right). These add
7056 * extra precision for decibel values. If you had the dB value in floating point
7057 * you would take the value after the decimal point, multiply by 64, and divide
7058 * by 2. So for 8.59, it's (59 * 64) / 100. Useful if someone wanted to
7059 * implement fixed point or floating point dB volumes. For now, I'll set them
7060 * to 0 just incase a value has lingered from a boot into Windows.
7062 static void ca0132_alt_vol_setup(struct hda_codec *codec)
7064 snd_hda_codec_write(codec, 0x02, 0, 0x797, 0x00);
7065 snd_hda_codec_write(codec, 0x02, 0, 0x798, 0x00);
7066 snd_hda_codec_write(codec, 0x03, 0, 0x797, 0x00);
7067 snd_hda_codec_write(codec, 0x03, 0, 0x798, 0x00);
7068 snd_hda_codec_write(codec, 0x04, 0, 0x797, 0x00);
7069 snd_hda_codec_write(codec, 0x04, 0, 0x798, 0x00);
7070 snd_hda_codec_write(codec, 0x07, 0, 0x797, 0x00);
7071 snd_hda_codec_write(codec, 0x07, 0, 0x798, 0x00);
7075 * Extra commands that don't really fit anywhere else.
7077 static void sbz_pre_dsp_setup(struct hda_codec *codec)
7079 struct ca0132_spec *spec = codec->spec;
7081 writel(0x00820680, spec->mem_base + 0x01C);
7082 writel(0x00820680, spec->mem_base + 0x01C);
7084 snd_hda_codec_write(codec, 0x15, 0, 0xd00, 0xfc);
7085 snd_hda_codec_write(codec, 0x15, 0, 0xd00, 0xfd);
7086 snd_hda_codec_write(codec, 0x15, 0, 0xd00, 0xfe);
7087 snd_hda_codec_write(codec, 0x15, 0, 0xd00, 0xff);
7089 chipio_write(codec, 0x18b0a4, 0x000000c2);
7091 snd_hda_codec_write(codec, 0x11, 0,
7092 AC_VERB_SET_PIN_WIDGET_CONTROL, 0x44);
7096 * Extra commands that don't really fit anywhere else.
7098 static void r3di_pre_dsp_setup(struct hda_codec *codec)
7100 chipio_write(codec, 0x18b0a4, 0x000000c2);
7102 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
7103 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x1E);
7104 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
7105 VENDOR_CHIPIO_8051_ADDRESS_HIGH, 0x1C);
7106 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
7107 VENDOR_CHIPIO_8051_DATA_WRITE, 0x5B);
7109 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
7110 VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x20);
7111 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
7112 VENDOR_CHIPIO_8051_ADDRESS_HIGH, 0x19);
7113 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
7114 VENDOR_CHIPIO_8051_DATA_WRITE, 0x00);
7115 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
7116 VENDOR_CHIPIO_8051_DATA_WRITE, 0x40);
7118 snd_hda_codec_write(codec, 0x11, 0,
7119 AC_VERB_SET_PIN_WIDGET_CONTROL, 0x04);
7124 * These are sent before the DSP is downloaded. Not sure
7125 * what they do, or if they're necessary. Could possibly
7126 * be removed. Figure they're better to leave in.
7128 static void sbz_region2_startup(struct hda_codec *codec)
7130 struct ca0132_spec *spec = codec->spec;
7132 writel(0x00000000, spec->mem_base + 0x400);
7133 writel(0x00000000, spec->mem_base + 0x408);
7134 writel(0x00000000, spec->mem_base + 0x40C);
7135 writel(0x00880680, spec->mem_base + 0x01C);
7136 writel(0x00000083, spec->mem_base + 0xC0C);
7137 writel(0x00000030, spec->mem_base + 0xC00);
7138 writel(0x00000000, spec->mem_base + 0xC04);
7139 writel(0x00000003, spec->mem_base + 0xC0C);
7140 writel(0x00000003, spec->mem_base + 0xC0C);
7141 writel(0x00000003, spec->mem_base + 0xC0C);
7142 writel(0x00000003, spec->mem_base + 0xC0C);
7143 writel(0x000000C1, spec->mem_base + 0xC08);
7144 writel(0x000000F1, spec->mem_base + 0xC08);
7145 writel(0x00000001, spec->mem_base + 0xC08);
7146 writel(0x000000C7, spec->mem_base + 0xC08);
7147 writel(0x000000C1, spec->mem_base + 0xC08);
7148 writel(0x00000080, spec->mem_base + 0xC04);
7152 * Extra init functions for alternative ca0132 codecs. Done
7153 * here so they don't clutter up the main ca0132_init function
7154 * anymore than they have to.
7156 static void ca0132_alt_init(struct hda_codec *codec)
7158 struct ca0132_spec *spec = codec->spec;
7160 ca0132_alt_vol_setup(codec);
7162 switch (spec->quirk) {
7164 codec_dbg(codec, "SBZ alt_init");
7165 ca0132_gpio_init(codec);
7166 sbz_pre_dsp_setup(codec);
7167 snd_hda_sequence_write(codec, spec->chip_init_verbs);
7168 snd_hda_sequence_write(codec, spec->sbz_init_verbs);
7171 codec_dbg(codec, "R3DI alt_init");
7172 ca0132_gpio_init(codec);
7173 ca0132_gpio_setup(codec);
7174 r3di_gpio_dsp_status_set(codec, R3DI_DSP_DOWNLOADING);
7175 r3di_pre_dsp_setup(codec);
7176 snd_hda_sequence_write(codec, spec->chip_init_verbs);
7177 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, 0x6FF, 0xC4);
7182 static int ca0132_init(struct hda_codec *codec)
7184 struct ca0132_spec *spec = codec->spec;
7185 struct auto_pin_cfg *cfg = &spec->autocfg;
7190 * If the DSP is already downloaded, and init has been entered again,
7191 * there's only two reasons for it. One, the codec has awaken from a
7192 * suspended state, and in that case dspload_is_loaded will return
7193 * false, and the init will be ran again. The other reason it gets
7194 * re entered is on startup for some reason it triggers a suspend and
7195 * resume state. In this case, it will check if the DSP is downloaded,
7196 * and not run the init function again. For codecs using alt_functions,
7197 * it will check if the DSP is loaded properly.
7199 if (spec->dsp_state == DSP_DOWNLOADED) {
7200 dsp_loaded = dspload_is_loaded(codec);
7202 spec->dsp_reload = true;
7203 spec->dsp_state = DSP_DOWNLOAD_INIT;
7205 if (spec->quirk == QUIRK_SBZ)
7206 sbz_dsp_startup_check(codec);
7211 if (spec->dsp_state != DSP_DOWNLOAD_FAILED)
7212 spec->dsp_state = DSP_DOWNLOAD_INIT;
7213 spec->curr_chip_addx = INVALID_CHIP_ADDRESS;
7215 if (spec->quirk == QUIRK_SBZ)
7216 sbz_region2_startup(codec);
7218 snd_hda_power_up_pm(codec);
7220 ca0132_init_unsol(codec);
7221 ca0132_init_params(codec);
7222 ca0132_init_flags(codec);
7224 snd_hda_sequence_write(codec, spec->base_init_verbs);
7226 if (spec->quirk != QUIRK_NONE)
7227 ca0132_alt_init(codec);
7229 ca0132_download_dsp(codec);
7231 ca0132_refresh_widget_caps(codec);
7233 if (spec->quirk == QUIRK_SBZ)
7234 writew(0x0107, spec->mem_base + 0x320);
7236 switch (spec->quirk) {
7238 r3di_setup_defaults(codec);
7241 case QUIRK_ALIENWARE:
7242 ca0132_setup_defaults(codec);
7243 ca0132_init_analog_mic2(codec);
7244 ca0132_init_dmic(codec);
7248 for (i = 0; i < spec->num_outputs; i++)
7249 init_output(codec, spec->out_pins[i], spec->dacs[0]);
7251 init_output(codec, cfg->dig_out_pins[0], spec->dig_out);
7253 for (i = 0; i < spec->num_inputs; i++)
7254 init_input(codec, spec->input_pins[i], spec->adcs[i]);
7256 init_input(codec, cfg->dig_in_pin, spec->dig_in);
7258 if (!spec->use_alt_functions) {
7259 snd_hda_sequence_write(codec, spec->chip_init_verbs);
7260 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
7261 VENDOR_CHIPIO_PARAM_EX_ID_SET, 0x0D);
7262 snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
7263 VENDOR_CHIPIO_PARAM_EX_VALUE_SET, 0x20);
7266 if (spec->quirk == QUIRK_SBZ)
7267 ca0132_gpio_setup(codec);
7269 snd_hda_sequence_write(codec, spec->spec_init_verbs);
7270 switch (spec->quirk) {
7272 sbz_setup_defaults(codec);
7273 ca0132_alt_select_out(codec);
7274 ca0132_alt_select_in(codec);
7277 ca0132_alt_select_out(codec);
7278 ca0132_alt_select_in(codec);
7281 ca0132_select_out(codec);
7282 ca0132_select_mic(codec);
7286 snd_hda_jack_report_sync(codec);
7289 * Re set the PlayEnhancement switch on a resume event, because the
7290 * controls will not be reloaded.
7292 if (spec->dsp_reload) {
7293 spec->dsp_reload = false;
7294 ca0132_pe_switch_set(codec);
7297 snd_hda_power_down_pm(codec);
7302 static void ca0132_free(struct hda_codec *codec)
7304 struct ca0132_spec *spec = codec->spec;
7306 cancel_delayed_work_sync(&spec->unsol_hp_work);
7307 snd_hda_power_up(codec);
7308 switch (spec->quirk) {
7310 sbz_exit_chip(codec);
7313 r3di_gpio_shutdown(codec);
7314 snd_hda_sequence_write(codec, spec->base_exit_verbs);
7315 ca0132_exit_chip(codec);
7318 snd_hda_sequence_write(codec, spec->base_exit_verbs);
7319 ca0132_exit_chip(codec);
7322 snd_hda_power_down(codec);
7324 iounmap(spec->mem_base);
7325 kfree(spec->spec_init_verbs);
7329 static void ca0132_reboot_notify(struct hda_codec *codec)
7331 codec->patch_ops.free(codec);
7334 static const struct hda_codec_ops ca0132_patch_ops = {
7335 .build_controls = ca0132_build_controls,
7336 .build_pcms = ca0132_build_pcms,
7337 .init = ca0132_init,
7338 .free = ca0132_free,
7339 .unsol_event = snd_hda_jack_unsol_event,
7340 .reboot_notify = ca0132_reboot_notify,
7343 static void ca0132_config(struct hda_codec *codec)
7345 struct ca0132_spec *spec = codec->spec;
7346 struct auto_pin_cfg *cfg = &spec->autocfg;
7348 spec->dacs[0] = 0x2;
7349 spec->dacs[1] = 0x3;
7350 spec->dacs[2] = 0x4;
7352 spec->multiout.dac_nids = spec->dacs;
7353 spec->multiout.num_dacs = 3;
7355 if (!spec->use_alt_functions)
7356 spec->multiout.max_channels = 2;
7358 spec->multiout.max_channels = 6;
7360 switch (spec->quirk) {
7361 case QUIRK_ALIENWARE:
7362 codec_dbg(codec, "ca0132_config: QUIRK_ALIENWARE applied.\n");
7363 snd_hda_apply_pincfgs(codec, alienware_pincfgs);
7365 spec->num_outputs = 2;
7366 spec->out_pins[0] = 0x0b; /* speaker out */
7367 spec->out_pins[1] = 0x0f;
7368 spec->shared_out_nid = 0x2;
7369 spec->unsol_tag_hp = 0x0f;
7371 spec->adcs[0] = 0x7; /* digital mic / analog mic1 */
7372 spec->adcs[1] = 0x8; /* analog mic2 */
7373 spec->adcs[2] = 0xa; /* what u hear */
7375 spec->num_inputs = 3;
7376 spec->input_pins[0] = 0x12;
7377 spec->input_pins[1] = 0x11;
7378 spec->input_pins[2] = 0x13;
7379 spec->shared_mic_nid = 0x7;
7380 spec->unsol_tag_amic1 = 0x11;
7383 codec_dbg(codec, "%s: QUIRK_SBZ applied.\n", __func__);
7384 snd_hda_apply_pincfgs(codec, sbz_pincfgs);
7386 spec->num_outputs = 2;
7387 spec->out_pins[0] = 0x0B; /* Line out */
7388 spec->out_pins[1] = 0x0F; /* Rear headphone out */
7389 spec->out_pins[2] = 0x10; /* Front Headphone / Center/LFE*/
7390 spec->out_pins[3] = 0x11; /* Rear surround */
7391 spec->shared_out_nid = 0x2;
7392 spec->unsol_tag_hp = spec->out_pins[1];
7393 spec->unsol_tag_front_hp = spec->out_pins[2];
7395 spec->adcs[0] = 0x7; /* Rear Mic / Line-in */
7396 spec->adcs[1] = 0x8; /* Front Mic, but only if no DSP */
7397 spec->adcs[2] = 0xa; /* what u hear */
7399 spec->num_inputs = 2;
7400 spec->input_pins[0] = 0x12; /* Rear Mic / Line-in */
7401 spec->input_pins[1] = 0x13; /* What U Hear */
7402 spec->shared_mic_nid = 0x7;
7403 spec->unsol_tag_amic1 = spec->input_pins[0];
7406 spec->dig_out = 0x05;
7407 spec->multiout.dig_out_nid = spec->dig_out;
7408 cfg->dig_out_pins[0] = 0x0c;
7410 cfg->dig_out_type[0] = HDA_PCM_TYPE_SPDIF;
7411 spec->dig_in = 0x09;
7412 cfg->dig_in_pin = 0x0e;
7413 cfg->dig_in_type = HDA_PCM_TYPE_SPDIF;
7416 codec_dbg(codec, "%s: QUIRK_R3DI applied.\n", __func__);
7417 snd_hda_apply_pincfgs(codec, r3di_pincfgs);
7419 spec->num_outputs = 2;
7420 spec->out_pins[0] = 0x0B; /* Line out */
7421 spec->out_pins[1] = 0x0F; /* Rear headphone out */
7422 spec->out_pins[2] = 0x10; /* Front Headphone / Center/LFE*/
7423 spec->out_pins[3] = 0x11; /* Rear surround */
7424 spec->shared_out_nid = 0x2;
7425 spec->unsol_tag_hp = spec->out_pins[1];
7426 spec->unsol_tag_front_hp = spec->out_pins[2];
7428 spec->adcs[0] = 0x07; /* Rear Mic / Line-in */
7429 spec->adcs[1] = 0x08; /* Front Mic, but only if no DSP */
7430 spec->adcs[2] = 0x0a; /* what u hear */
7432 spec->num_inputs = 2;
7433 spec->input_pins[0] = 0x12; /* Rear Mic / Line-in */
7434 spec->input_pins[1] = 0x13; /* What U Hear */
7435 spec->shared_mic_nid = 0x7;
7436 spec->unsol_tag_amic1 = spec->input_pins[0];
7439 spec->dig_out = 0x05;
7440 spec->multiout.dig_out_nid = spec->dig_out;
7441 cfg->dig_out_pins[0] = 0x0c;
7443 cfg->dig_out_type[0] = HDA_PCM_TYPE_SPDIF;
7446 spec->num_outputs = 2;
7447 spec->out_pins[0] = 0x0b; /* speaker out */
7448 spec->out_pins[1] = 0x10; /* headphone out */
7449 spec->shared_out_nid = 0x2;
7450 spec->unsol_tag_hp = spec->out_pins[1];
7452 spec->adcs[0] = 0x7; /* digital mic / analog mic1 */
7453 spec->adcs[1] = 0x8; /* analog mic2 */
7454 spec->adcs[2] = 0xa; /* what u hear */
7456 spec->num_inputs = 3;
7457 spec->input_pins[0] = 0x12;
7458 spec->input_pins[1] = 0x11;
7459 spec->input_pins[2] = 0x13;
7460 spec->shared_mic_nid = 0x7;
7461 spec->unsol_tag_amic1 = spec->input_pins[0];
7464 spec->dig_out = 0x05;
7465 spec->multiout.dig_out_nid = spec->dig_out;
7466 cfg->dig_out_pins[0] = 0x0c;
7468 cfg->dig_out_type[0] = HDA_PCM_TYPE_SPDIF;
7469 spec->dig_in = 0x09;
7470 cfg->dig_in_pin = 0x0e;
7471 cfg->dig_in_type = HDA_PCM_TYPE_SPDIF;
7476 static int ca0132_prepare_verbs(struct hda_codec *codec)
7478 /* Verbs + terminator (an empty element) */
7479 #define NUM_SPEC_VERBS 4
7480 struct ca0132_spec *spec = codec->spec;
7482 spec->chip_init_verbs = ca0132_init_verbs0;
7483 if (spec->quirk == QUIRK_SBZ)
7484 spec->sbz_init_verbs = sbz_init_verbs;
7485 spec->spec_init_verbs = kcalloc(NUM_SPEC_VERBS,
7486 sizeof(struct hda_verb),
7488 if (!spec->spec_init_verbs)
7491 /* HP jack autodetection */
7492 spec->spec_init_verbs[0].nid = spec->unsol_tag_hp;
7493 spec->spec_init_verbs[0].param = AC_VERB_SET_UNSOLICITED_ENABLE;
7494 spec->spec_init_verbs[0].verb = AC_USRSP_EN | spec->unsol_tag_hp;
7496 /* MIC1 jack autodetection */
7497 spec->spec_init_verbs[1].nid = spec->unsol_tag_amic1;
7498 spec->spec_init_verbs[1].param = AC_VERB_SET_UNSOLICITED_ENABLE;
7499 spec->spec_init_verbs[1].verb = AC_USRSP_EN | spec->unsol_tag_amic1;
7502 spec->spec_init_verbs[2].nid = 0x0b;
7503 spec->spec_init_verbs[2].param = 0x78D;
7504 spec->spec_init_verbs[2].verb = 0x00;
7506 /* Previously commented configuration */
7508 spec->spec_init_verbs[3].nid = 0x0b;
7509 spec->spec_init_verbs[3].param = AC_VERB_SET_EAPD_BTLENABLE;
7510 spec->spec_init_verbs[3].verb = 0x02;
7512 spec->spec_init_verbs[4].nid = 0x10;
7513 spec->spec_init_verbs[4].param = 0x78D;
7514 spec->spec_init_verbs[4].verb = 0x02;
7516 spec->spec_init_verbs[5].nid = 0x10;
7517 spec->spec_init_verbs[5].param = AC_VERB_SET_EAPD_BTLENABLE;
7518 spec->spec_init_verbs[5].verb = 0x02;
7521 /* Terminator: spec->spec_init_verbs[NUM_SPEC_VERBS-1] */
7525 static int patch_ca0132(struct hda_codec *codec)
7527 struct ca0132_spec *spec;
7529 const struct snd_pci_quirk *quirk;
7531 codec_dbg(codec, "patch_ca0132\n");
7533 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
7537 spec->codec = codec;
7539 codec->patch_ops = ca0132_patch_ops;
7540 codec->pcm_format_first = 1;
7541 codec->no_sticky_stream = 1;
7543 /* Detect codec quirk */
7544 quirk = snd_pci_quirk_lookup(codec->bus->pci, ca0132_quirks);
7546 spec->quirk = quirk->value;
7548 spec->quirk = QUIRK_NONE;
7550 /* Setup BAR Region 2 for Sound Blaster Z */
7551 if (spec->quirk == QUIRK_SBZ) {
7552 spec->mem_base = pci_iomap(codec->bus->pci, 2, 0xC20);
7553 if (spec->mem_base == NULL) {
7554 codec_warn(codec, "pci_iomap failed!");
7555 codec_info(codec, "perhaps this is not an SBZ?");
7556 spec->quirk = QUIRK_NONE;
7560 spec->dsp_state = DSP_DOWNLOAD_INIT;
7561 spec->num_mixers = 1;
7563 /* Set which mixers each quirk uses. */
7564 switch (spec->quirk) {
7566 spec->mixers[0] = sbz_mixer;
7567 snd_hda_codec_set_name(codec, "Sound Blaster Z");
7570 spec->mixers[0] = r3di_mixer;
7571 snd_hda_codec_set_name(codec, "Recon3Di");
7574 spec->mixers[0] = ca0132_mixer;
7578 /* Setup whether or not to use alt functions/controls */
7579 switch (spec->quirk) {
7582 spec->use_alt_controls = true;
7583 spec->use_alt_functions = true;
7586 spec->use_alt_controls = false;
7587 spec->use_alt_functions = false;
7591 spec->base_init_verbs = ca0132_base_init_verbs;
7592 spec->base_exit_verbs = ca0132_base_exit_verbs;
7594 INIT_DELAYED_WORK(&spec->unsol_hp_work, ca0132_unsol_hp_delayed);
7596 ca0132_init_chip(codec);
7598 ca0132_config(codec);
7600 err = ca0132_prepare_verbs(codec);
7604 err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL);
7618 static struct hda_device_id snd_hda_id_ca0132[] = {
7619 HDA_CODEC_ENTRY(0x11020011, "CA0132", patch_ca0132),
7622 MODULE_DEVICE_TABLE(hdaudio, snd_hda_id_ca0132);
7624 MODULE_LICENSE("GPL");
7625 MODULE_DESCRIPTION("Creative Sound Core3D codec");
7627 static struct hda_codec_driver ca0132_driver = {
7628 .id = snd_hda_id_ca0132,
7631 module_hda_codec_driver(ca0132_driver);