sound/pci/hda/hda_intel.c

   1 /*
   2  *
   3  *  hda_intel.c - Implementation of primary alsa driver code base
   4  *                for Intel HD Audio.
   5  *
   6  *  Copyright(c) 2004 Intel Corporation. All rights reserved.
   7  *
   8  *  Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
   9  *                     PeiSen Hou <pshou@realtek.com.tw>
  10  *
  11  *  This program is free software; you can redistribute it and/or modify it
  12  *  under the terms of the GNU General Public License as published by the Free
  13  *  Software Foundation; either version 2 of the License, or (at your option)
  14  *  any later version.
  15  *
  16  *  This program is distributed in the hope that it will be useful, but WITHOUT
  17  *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  18  *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  19  *  more details.
  20  *
  21  *  You should have received a copy of the GNU General Public License along with
  22  *  this program; if not, write to the Free Software Foundation, Inc., 59
  23  *  Temple Place - Suite 330, Boston, MA  02111-1307, USA.
  24  *
  25  *  CONTACTS:
  26  *
  27  *  Matt Jared          matt.jared@intel.com
  28  *  Andy Kopp           andy.kopp@intel.com
  29  *  Dan Kogan           dan.d.kogan@intel.com
  30  *
  31  *  CHANGES:
  32  *
  33  *  2004.12.01  Major rewrite by tiwai, merged the work of pshou
  34  *
  35  */
  36
  37 #include <linux/delay.h>
  38 #include <linux/interrupt.h>
  39 #include <linux/kernel.h>
  40 #include <linux/module.h>
  41 #include <linux/dma-mapping.h>
  42 #include <linux/moduleparam.h>
  43 #include <linux/init.h>
  44 #include <linux/slab.h>
  45 #include <linux/pci.h>
  46 #include <linux/mutex.h>
  47 #include <linux/reboot.h>
  48 #include <linux/io.h>
  49 #include <linux/pm_runtime.h>
  50 #include <linux/clocksource.h>
  51 #include <linux/time.h>
  52 #include <linux/completion.h>
  53
  54 #ifdef CONFIG_X86
  55 /* for snoop control */
  56 #include <asm/pgtable.h>
  57 #include <asm/cacheflush.h>
  58 #endif
  59 #include <sound/core.h>
  60 #include <sound/initval.h>
  61 #include <linux/vgaarb.h>
  62 #include <linux/vga_switcheroo.h>
  63 #include <linux/firmware.h>
  64 #include "hda_codec.h"
  65 #include "hda_i915.h"
  66 #include "hda_controller.h"
  67 #include "hda_priv.h"
  68
  69
  70 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
  71 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
  72 static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
  73 static char *model[SNDRV_CARDS];
  74 static int position_fix[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = -1};
  75 static int bdl_pos_adj[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = -1};
  76 static int probe_mask[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = -1};
  77 static int probe_only[SNDRV_CARDS];
  78 static int jackpoll_ms[SNDRV_CARDS];
  79 static bool single_cmd;
  80 static int enable_msi = -1;
  81 #ifdef CONFIG_SND_HDA_PATCH_LOADER
  82 static char *patch[SNDRV_CARDS];
  83 #endif
  84 #ifdef CONFIG_SND_HDA_INPUT_BEEP
  85 static bool beep_mode[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] =
  86                                         CONFIG_SND_HDA_INPUT_BEEP_MODE};
  87 #endif
  88
  89 module_param_array(index, int, NULL, 0444);
  90 MODULE_PARM_DESC(index, "Index value for Intel HD audio interface.");
  91 module_param_array(id, charp, NULL, 0444);
  92 MODULE_PARM_DESC(id, "ID string for Intel HD audio interface.");
  93 module_param_array(enable, bool, NULL, 0444);
  94 MODULE_PARM_DESC(enable, "Enable Intel HD audio interface.");
  95 module_param_array(model, charp, NULL, 0444);
  96 MODULE_PARM_DESC(model, "Use the given board model.");
  97 module_param_array(position_fix, int, NULL, 0444);
  98 MODULE_PARM_DESC(position_fix, "DMA pointer read method."
  99                  "(-1 = system default, 0 = auto, 1 = LPIB, 2 = POSBUF, 3 = VIACOMBO, 4 = COMBO).");
 100 module_param_array(bdl_pos_adj, int, NULL, 0644);
 101 MODULE_PARM_DESC(bdl_pos_adj, "BDL position adjustment offset.");
 102 module_param_array(probe_mask, int, NULL, 0444);
 103 MODULE_PARM_DESC(probe_mask, "Bitmask to probe codecs (default = -1).");
 104 module_param_array(probe_only, int, NULL, 0444);
 105 MODULE_PARM_DESC(probe_only, "Only probing and no codec initialization.");
 106 module_param_array(jackpoll_ms, int, NULL, 0444);
 107 MODULE_PARM_DESC(jackpoll_ms, "Ms between polling for jack events (default = 0, using unsol events only)");
 108 module_param(single_cmd, bool, 0444);
 109 MODULE_PARM_DESC(single_cmd, "Use single command to communicate with codecs "
 110                  "(for debugging only).");
 111 module_param(enable_msi, bint, 0444);
 112 MODULE_PARM_DESC(enable_msi, "Enable Message Signaled Interrupt (MSI)");
 113 #ifdef CONFIG_SND_HDA_PATCH_LOADER
 114 module_param_array(patch, charp, NULL, 0444);
 115 MODULE_PARM_DESC(patch, "Patch file for Intel HD audio interface.");
 116 #endif
 117 #ifdef CONFIG_SND_HDA_INPUT_BEEP
 118 module_param_array(beep_mode, bool, NULL, 0444);
 119 MODULE_PARM_DESC(beep_mode, "Select HDA Beep registration mode "
 120                             "(0=off, 1=on) (default=1).");
 121 #endif
 122
 123 #ifdef CONFIG_PM
 124 static int param_set_xint(const char *val, const struct kernel_param *kp);
 125 static struct kernel_param_ops param_ops_xint = {
 126         .set = param_set_xint,
 127         .get = param_get_int,
 128 };
 129 #define param_check_xint param_check_int
 130
 131 static int power_save = CONFIG_SND_HDA_POWER_SAVE_DEFAULT;
 132 static int *power_save_addr = &power_save;
 133 module_param(power_save, xint, 0644);
 134 MODULE_PARM_DESC(power_save, "Automatic power-saving timeout "
 135                  "(in second, 0 = disable).");
 136
 137 /* reset the HD-audio controller in power save mode.
 138  * this may give more power-saving, but will take longer time to
 139  * wake up.
 140  */
 141 static bool power_save_controller = 1;
 142 module_param(power_save_controller, bool, 0644);
 143 MODULE_PARM_DESC(power_save_controller, "Reset controller in power save mode.");
 144 #else
 145 static int *power_save_addr;
 146 #endif /* CONFIG_PM */
 147
 148 static int align_buffer_size = -1;
 149 module_param(align_buffer_size, bint, 0644);
 150 MODULE_PARM_DESC(align_buffer_size,
 151                 "Force buffer and period sizes to be multiple of 128 bytes.");
 152
 153 #ifdef CONFIG_X86
 154 static bool hda_snoop = true;
 155 module_param_named(snoop, hda_snoop, bool, 0444);
 156 MODULE_PARM_DESC(snoop, "Enable/disable snooping");
 157 #else
 158 #define hda_snoop               true
 159 #endif
 160
 161
 162 MODULE_LICENSE("GPL");
 163 MODULE_SUPPORTED_DEVICE("{{Intel, ICH6},"
 164                          "{Intel, ICH6M},"
 165                          "{Intel, ICH7},"
 166                          "{Intel, ESB2},"
 167                          "{Intel, ICH8},"
 168                          "{Intel, ICH9},"
 169                          "{Intel, ICH10},"
 170                          "{Intel, PCH},"
 171                          "{Intel, CPT},"
 172                          "{Intel, PPT},"
 173                          "{Intel, LPT},"
 174                          "{Intel, LPT_LP},"
 175                          "{Intel, WPT_LP},"
 176                          "{Intel, HPT},"
 177                          "{Intel, PBG},"
 178                          "{Intel, SCH},"
 179                          "{ATI, SB450},"
 180                          "{ATI, SB600},"
 181                          "{ATI, RS600},"
 182                          "{ATI, RS690},"
 183                          "{ATI, RS780},"
 184                          "{ATI, R600},"
 185                          "{ATI, RV630},"
 186                          "{ATI, RV610},"
 187                          "{ATI, RV670},"
 188                          "{ATI, RV635},"
 189                          "{ATI, RV620},"
 190                          "{ATI, RV770},"
 191                          "{VIA, VT8251},"
 192                          "{VIA, VT8237A},"
 193                          "{SiS, SIS966},"
 194                          "{ULI, M5461}}");
 195 MODULE_DESCRIPTION("Intel HDA driver");
 196
 197 #if defined(CONFIG_PM) && defined(CONFIG_VGA_SWITCHEROO)
 198 #if IS_ENABLED(CONFIG_SND_HDA_CODEC_HDMI)
 199 #define SUPPORT_VGA_SWITCHEROO
 200 #endif
 201 #endif
 202
 203
 204 /*
 205  */
 206
 207 /* driver types */
 208 enum {
 209         AZX_DRIVER_ICH,
 210         AZX_DRIVER_PCH,
 211         AZX_DRIVER_SCH,
 212         AZX_DRIVER_HDMI,
 213         AZX_DRIVER_ATI,
 214         AZX_DRIVER_ATIHDMI,
 215         AZX_DRIVER_ATIHDMI_NS,
 216         AZX_DRIVER_VIA,
 217         AZX_DRIVER_SIS,
 218         AZX_DRIVER_ULI,
 219         AZX_DRIVER_NVIDIA,
 220         AZX_DRIVER_TERA,
 221         AZX_DRIVER_CTX,
 222         AZX_DRIVER_CTHDA,
 223         AZX_DRIVER_GENERIC,
 224         AZX_NUM_DRIVERS, /* keep this as last entry */
 225 };
 226
 227 /* quirks for Intel PCH */
 228 #define AZX_DCAPS_INTEL_PCH_NOPM \
 229         (AZX_DCAPS_SCH_SNOOP | AZX_DCAPS_BUFSIZE | \
 230          AZX_DCAPS_COUNT_LPIB_DELAY)
 231
 232 #define AZX_DCAPS_INTEL_PCH \
 233         (AZX_DCAPS_INTEL_PCH_NOPM | AZX_DCAPS_PM_RUNTIME)
 234
 235 #define AZX_DCAPS_INTEL_HASWELL \
 236         (AZX_DCAPS_SCH_SNOOP | AZX_DCAPS_ALIGN_BUFSIZE | \
 237          AZX_DCAPS_COUNT_LPIB_DELAY | AZX_DCAPS_PM_RUNTIME | \
 238          AZX_DCAPS_I915_POWERWELL)
 239
 240 /* quirks for ATI SB / AMD Hudson */
 241 #define AZX_DCAPS_PRESET_ATI_SB \
 242         (AZX_DCAPS_ATI_SNOOP | AZX_DCAPS_NO_TCSEL | \
 243          AZX_DCAPS_SYNC_WRITE | AZX_DCAPS_POSFIX_LPIB)
 244
 245 /* quirks for ATI/AMD HDMI */
 246 #define AZX_DCAPS_PRESET_ATI_HDMI \
 247         (AZX_DCAPS_NO_TCSEL | AZX_DCAPS_SYNC_WRITE | AZX_DCAPS_POSFIX_LPIB)
 248
 249 /* quirks for Nvidia */
 250 #define AZX_DCAPS_PRESET_NVIDIA \
 251         (AZX_DCAPS_NVIDIA_SNOOP | AZX_DCAPS_RIRB_DELAY | AZX_DCAPS_NO_MSI |\
 252          AZX_DCAPS_ALIGN_BUFSIZE | AZX_DCAPS_NO_64BIT)
 253
 254 #define AZX_DCAPS_PRESET_CTHDA \
 255         (AZX_DCAPS_NO_MSI | AZX_DCAPS_POSFIX_LPIB | AZX_DCAPS_4K_BDLE_BOUNDARY)
 256
 257 /*
 258  * VGA-switcher support
 259  */
 260 #ifdef SUPPORT_VGA_SWITCHEROO
 261 #define use_vga_switcheroo(chip)        ((chip)->use_vga_switcheroo)
 262 #else
 263 #define use_vga_switcheroo(chip)        0
 264 #endif
 265
 266 static char *driver_short_names[] = {
 267         [AZX_DRIVER_ICH] = "HDA Intel",
 268         [AZX_DRIVER_PCH] = "HDA Intel PCH",
 269         [AZX_DRIVER_SCH] = "HDA Intel MID",
 270         [AZX_DRIVER_HDMI] = "HDA Intel HDMI",
 271         [AZX_DRIVER_ATI] = "HDA ATI SB",
 272         [AZX_DRIVER_ATIHDMI] = "HDA ATI HDMI",
 273         [AZX_DRIVER_ATIHDMI_NS] = "HDA ATI HDMI",
 274         [AZX_DRIVER_VIA] = "HDA VIA VT82xx",
 275         [AZX_DRIVER_SIS] = "HDA SIS966",
 276         [AZX_DRIVER_ULI] = "HDA ULI M5461",
 277         [AZX_DRIVER_NVIDIA] = "HDA NVidia",
 278         [AZX_DRIVER_TERA] = "HDA Teradici",
 279         [AZX_DRIVER_CTX] = "HDA Creative",
 280         [AZX_DRIVER_CTHDA] = "HDA Creative",
 281         [AZX_DRIVER_GENERIC] = "HD-Audio Generic",
 282 };
 283
 284 #ifdef CONFIG_X86
 285 static void __mark_pages_wc(struct azx *chip, struct snd_dma_buffer *dmab, bool on)
 286 {
 287         int pages;
 288
 289         if (azx_snoop(chip))
 290                 return;
 291         if (!dmab || !dmab->area || !dmab->bytes)
 292                 return;
 293
 294 #ifdef CONFIG_SND_DMA_SGBUF
 295         if (dmab->dev.type == SNDRV_DMA_TYPE_DEV_SG) {
 296                 struct snd_sg_buf *sgbuf = dmab->private_data;
 297                 if (on)
 298                         set_pages_array_wc(sgbuf->page_table, sgbuf->pages);
 299                 else
 300                         set_pages_array_wb(sgbuf->page_table, sgbuf->pages);
 301                 return;
 302         }
 303 #endif
 304
 305         pages = (dmab->bytes + PAGE_SIZE - 1) >> PAGE_SHIFT;
 306         if (on)
 307                 set_memory_wc((unsigned long)dmab->area, pages);
 308         else
 309                 set_memory_wb((unsigned long)dmab->area, pages);
 310 }
 311
 312 static inline void mark_pages_wc(struct azx *chip, struct snd_dma_buffer *buf,
 313                                  bool on)
 314 {
 315         __mark_pages_wc(chip, buf, on);
 316 }
 317 static inline void mark_runtime_wc(struct azx *chip, struct azx_dev *azx_dev,
 318                                    struct snd_pcm_substream *substream, bool on)
 319 {
 320         if (azx_dev->wc_marked != on) {
 321                 __mark_pages_wc(chip, snd_pcm_get_dma_buf(substream), on);
 322                 azx_dev->wc_marked = on;
 323         }
 324 }
 325 #else
 326 /* NOP for other archs */
 327 static inline void mark_pages_wc(struct azx *chip, struct snd_dma_buffer *buf,
 328                                  bool on)
 329 {
 330 }
 331 static inline void mark_runtime_wc(struct azx *chip, struct azx_dev *azx_dev,
 332                                    struct snd_pcm_substream *substream, bool on)
 333 {
 334 }
 335 #endif
 336
 337 static int azx_acquire_irq(struct azx *chip, int do_disconnect);
 338
 339 #ifdef CONFIG_PM
 340 static void azx_power_notify(struct hda_bus *bus, bool power_up);
 341 #endif
 342
 343 /*
 344  * initialize the PCI registers
 345  */
 346 /* update bits in a PCI register byte */
 347 static void update_pci_byte(struct pci_dev *pci, unsigned int reg,
 348                             unsigned char mask, unsigned char val)
 349 {
 350         unsigned char data;
 351
 352         pci_read_config_byte(pci, reg, &data);
 353         data &= ~mask;
 354         data |= (val & mask);
 355         pci_write_config_byte(pci, reg, data);
 356 }
 357
 358 static void azx_init_pci(struct azx *chip)
 359 {
 360         /* Clear bits 0-2 of PCI register TCSEL (at offset 0x44)
 361          * TCSEL == Traffic Class Select Register, which sets PCI express QOS
 362          * Ensuring these bits are 0 clears playback static on some HD Audio
 363          * codecs.
 364          * The PCI register TCSEL is defined in the Intel manuals.
 365          */
 366         if (!(chip->driver_caps & AZX_DCAPS_NO_TCSEL)) {
 367                 dev_dbg(chip->card->dev, "Clearing TCSEL\n");
 368                 update_pci_byte(chip->pci, ICH6_PCIREG_TCSEL, 0x07, 0);
 369         }
 370
 371         /* For ATI SB450/600/700/800/900 and AMD Hudson azalia HD audio,
 372          * we need to enable snoop.
 373          */
 374         if (chip->driver_caps & AZX_DCAPS_ATI_SNOOP) {
 375                 dev_dbg(chip->card->dev, "Setting ATI snoop: %d\n",
 376                         azx_snoop(chip));
 377                 update_pci_byte(chip->pci,
 378                                 ATI_SB450_HDAUDIO_MISC_CNTR2_ADDR, 0x07,
 379                                 azx_snoop(chip) ? ATI_SB450_HDAUDIO_ENABLE_SNOOP : 0);
 380         }
 381
 382         /* For NVIDIA HDA, enable snoop */
 383         if (chip->driver_caps & AZX_DCAPS_NVIDIA_SNOOP) {
 384                 dev_dbg(chip->card->dev, "Setting Nvidia snoop: %d\n",
 385                         azx_snoop(chip));
 386                 update_pci_byte(chip->pci,
 387                                 NVIDIA_HDA_TRANSREG_ADDR,
 388                                 0x0f, NVIDIA_HDA_ENABLE_COHBITS);
 389                 update_pci_byte(chip->pci,
 390                                 NVIDIA_HDA_ISTRM_COH,
 391                                 0x01, NVIDIA_HDA_ENABLE_COHBIT);
 392                 update_pci_byte(chip->pci,
 393                                 NVIDIA_HDA_OSTRM_COH,
 394                                 0x01, NVIDIA_HDA_ENABLE_COHBIT);
 395         }
 396
 397         /* Enable SCH/PCH snoop if needed */
 398         if (chip->driver_caps & AZX_DCAPS_SCH_SNOOP) {
 399                 unsigned short snoop;
 400                 pci_read_config_word(chip->pci, INTEL_SCH_HDA_DEVC, &snoop);
 401                 if ((!azx_snoop(chip) && !(snoop & INTEL_SCH_HDA_DEVC_NOSNOOP)) ||
 402                     (azx_snoop(chip) && (snoop & INTEL_SCH_HDA_DEVC_NOSNOOP))) {
 403                         snoop &= ~INTEL_SCH_HDA_DEVC_NOSNOOP;
 404                         if (!azx_snoop(chip))
 405                                 snoop |= INTEL_SCH_HDA_DEVC_NOSNOOP;
 406                         pci_write_config_word(chip->pci, INTEL_SCH_HDA_DEVC, snoop);
 407                         pci_read_config_word(chip->pci,
 408                                 INTEL_SCH_HDA_DEVC, &snoop);
 409                 }
 410                 dev_dbg(chip->card->dev, "SCH snoop: %s\n",
 411                         (snoop & INTEL_SCH_HDA_DEVC_NOSNOOP) ?
 412                         "Disabled" : "Enabled");
 413         }
 414 }
 415
 416 static int azx_position_ok(struct azx *chip, struct azx_dev *azx_dev);
 417
 418 /* called from IRQ */
 419 static int azx_position_check(struct azx *chip, struct azx_dev *azx_dev)
 420 {
 421         int ok;
 422
 423         ok = azx_position_ok(chip, azx_dev);
 424         if (ok == 1) {
 425                 azx_dev->irq_pending = 0;
 426                 return ok;
 427         } else if (ok == 0 && chip->bus && chip->bus->workq) {
 428                 /* bogus IRQ, process it later */
 429                 azx_dev->irq_pending = 1;
 430                 queue_work(chip->bus->workq, &chip->irq_pending_work);
 431         }
 432         return 0;
 433 }
 434
 435 /*
 436  * Probe the given codec address
 437  */
 438 static int probe_codec(struct azx *chip, int addr)
 439 {
 440         unsigned int cmd = (addr << 28) | (AC_NODE_ROOT << 20) |
 441                 (AC_VERB_PARAMETERS << 8) | AC_PAR_VENDOR_ID;
 442         unsigned int res;
 443
 444         mutex_lock(&chip->bus->cmd_mutex);
 445         chip->probing = 1;
 446         azx_send_cmd(chip->bus, cmd);
 447         res = azx_get_response(chip->bus, addr);
 448         chip->probing = 0;
 449         mutex_unlock(&chip->bus->cmd_mutex);
 450         if (res == -1)
 451                 return -EIO;
 452         dev_dbg(chip->card->dev, "codec #%d probed OK\n", addr);
 453         return 0;
 454 }
 455
 456 static void azx_bus_reset(struct hda_bus *bus)
 457 {
 458         struct azx *chip = bus->private_data;
 459
 460         bus->in_reset = 1;
 461         azx_stop_chip(chip);
 462         azx_init_chip(chip, 1);
 463 #ifdef CONFIG_PM
 464         if (chip->initialized) {
 465                 struct azx_pcm *p;
 466                 list_for_each_entry(p, &chip->pcm_list, list)
 467                         snd_pcm_suspend_all(p->pcm);
 468                 snd_hda_suspend(chip->bus);
 469                 snd_hda_resume(chip->bus);
 470         }
 471 #endif
 472         bus->in_reset = 0;
 473 }
 474
 475 static int get_jackpoll_interval(struct azx *chip)
 476 {
 477         int i;
 478         unsigned int j;
 479
 480         if (!chip->jackpoll_ms)
 481                 return 0;
 482
 483         i = chip->jackpoll_ms[chip->dev_index];
 484         if (i == 0)
 485                 return 0;
 486         if (i < 50 || i > 60000)
 487                 j = 0;
 488         else
 489                 j = msecs_to_jiffies(i);
 490         if (j == 0)
 491                 dev_warn(chip->card->dev,
 492                          "jackpoll_ms value out of range: %d\n", i);
 493         return j;
 494 }
 495
 496 /*
 497  * Codec initialization
 498  */
 499
 500 static int azx_codec_create(struct azx *chip, const char *model,
 501                             unsigned int max_slots,
 502                             int *power_save_to)
 503 {
 504         struct hda_bus_template bus_temp;
 505         int c, codecs, err;
 506
 507         memset(&bus_temp, 0, sizeof(bus_temp));
 508         bus_temp.private_data = chip;
 509         bus_temp.modelname = model;
 510         bus_temp.pci = chip->pci;
 511         bus_temp.ops.command = azx_send_cmd;
 512         bus_temp.ops.get_response = azx_get_response;
 513         bus_temp.ops.attach_pcm = azx_attach_pcm_stream;
 514         bus_temp.ops.bus_reset = azx_bus_reset;
 515 #ifdef CONFIG_PM
 516         bus_temp.power_save = power_save_to;
 517         bus_temp.ops.pm_notify = azx_power_notify;
 518 #endif
 519 #ifdef CONFIG_SND_HDA_DSP_LOADER
 520         bus_temp.ops.load_dsp_prepare = azx_load_dsp_prepare;
 521         bus_temp.ops.load_dsp_trigger = azx_load_dsp_trigger;
 522         bus_temp.ops.load_dsp_cleanup = azx_load_dsp_cleanup;
 523 #endif
 524
 525         err = snd_hda_bus_new(chip->card, &bus_temp, &chip->bus);
 526         if (err < 0)
 527                 return err;
 528
 529         if (chip->driver_caps & AZX_DCAPS_RIRB_DELAY) {
 530                 dev_dbg(chip->card->dev, "Enable delay in RIRB handling\n");
 531                 chip->bus->needs_damn_long_delay = 1;
 532         }
 533
 534         codecs = 0;
 535         if (!max_slots)
 536                 max_slots = AZX_DEFAULT_CODECS;
 537
 538         /* First try to probe all given codec slots */
 539         for (c = 0; c < max_slots; c++) {
 540                 if ((chip->codec_mask & (1 << c)) & chip->codec_probe_mask) {
 541                         if (probe_codec(chip, c) < 0) {
 542                                 /* Some BIOSen give you wrong codec addresses
 543                                  * that don't exist
 544                                  */
 545                                 dev_warn(chip->card->dev,
 546                                          "Codec #%d probe error; disabling it...\n", c);
 547                                 chip->codec_mask &= ~(1 << c);
 548                                 /* More badly, accessing to a non-existing
 549                                  * codec often screws up the controller chip,
 550                                  * and disturbs the further communications.
 551                                  * Thus if an error occurs during probing,
 552                                  * better to reset the controller chip to
 553                                  * get back to the sanity state.
 554                                  */
 555                                 azx_stop_chip(chip);
 556                                 azx_init_chip(chip, 1);
 557                         }
 558                 }
 559         }
 560
 561         /* AMD chipsets often cause the communication stalls upon certain
 562          * sequence like the pin-detection.  It seems that forcing the synced
 563          * access works around the stall.  Grrr...
 564          */
 565         if (chip->driver_caps & AZX_DCAPS_SYNC_WRITE) {
 566                 dev_dbg(chip->card->dev, "Enable sync_write for stable communication\n");
 567                 chip->bus->sync_write = 1;
 568                 chip->bus->allow_bus_reset = 1;
 569         }
 570
 571         /* Then create codec instances */
 572         for (c = 0; c < max_slots; c++) {
 573                 if ((chip->codec_mask & (1 << c)) & chip->codec_probe_mask) {
 574                         struct hda_codec *codec;
 575                         err = snd_hda_codec_new(chip->bus, c, &codec);
 576                         if (err < 0)
 577                                 continue;
 578                         codec->jackpoll_interval = get_jackpoll_interval(chip);
 579                         codec->beep_mode = chip->beep_mode;
 580                         codecs++;
 581                 }
 582         }
 583         if (!codecs) {
 584                 dev_err(chip->card->dev, "no codecs initialized\n");
 585                 return -ENXIO;
 586         }
 587         return 0;
 588 }
 589
 590 /* configure each codec instance */
 591 static int azx_codec_configure(struct azx *chip)
 592 {
 593         struct hda_codec *codec;
 594         list_for_each_entry(codec, &chip->bus->codec_list, list) {
 595                 snd_hda_codec_configure(codec);
 596         }
 597         return 0;
 598 }
 599
 600 /*
 601  * Check whether the current DMA position is acceptable for updating
 602  * periods.  Returns non-zero if it's OK.
 603  *
 604  * Many HD-audio controllers appear pretty inaccurate about
 605  * the update-IRQ timing.  The IRQ is issued before actually the
 606  * data is processed.  So, we need to process it afterwords in a
 607  * workqueue.
 608  */
 609 static int azx_position_ok(struct azx *chip, struct azx_dev *azx_dev)
 610 {
 611         u32 wallclk;
 612         unsigned int pos;
 613
 614         wallclk = azx_readl(chip, WALLCLK) - azx_dev->start_wallclk;
 615         if (wallclk < (azx_dev->period_wallclk * 2) / 3)
 616                 return -1;      /* bogus (too early) interrupt */
 617
 618         pos = azx_get_position(chip, azx_dev, true);
 619
 620         if (WARN_ONCE(!azx_dev->period_bytes,
 621                       "hda-intel: zero azx_dev->period_bytes"))
 622                 return -1; /* this shouldn't happen! */
 623         if (wallclk < (azx_dev->period_wallclk * 5) / 4 &&
 624             pos % azx_dev->period_bytes > azx_dev->period_bytes / 2)
 625                 /* NG - it's below the first next period boundary */
 626                 return chip->bdl_pos_adj[chip->dev_index] ? 0 : -1;
 627         azx_dev->start_wallclk += wallclk;
 628         return 1; /* OK, it's fine */
 629 }
 630
 631 /*
 632  * The work for pending PCM period updates.
 633  */
 634 static void azx_irq_pending_work(struct work_struct *work)
 635 {
 636         struct azx *chip = container_of(work, struct azx, irq_pending_work);
 637         int i, pending, ok;
 638
 639         if (!chip->irq_pending_warned) {
 640                 dev_info(chip->card->dev,
 641                          "IRQ timing workaround is activated for card #%d. Suggest a bigger bdl_pos_adj.\n",
 642                          chip->card->number);
 643                 chip->irq_pending_warned = 1;
 644         }
 645
 646         for (;;) {
 647                 pending = 0;
 648                 spin_lock_irq(&chip->reg_lock);
 649                 for (i = 0; i < chip->num_streams; i++) {
 650                         struct azx_dev *azx_dev = &chip->azx_dev[i];
 651                         if (!azx_dev->irq_pending ||
 652                             !azx_dev->substream ||
 653                             !azx_dev->running)
 654                                 continue;
 655                         ok = azx_position_ok(chip, azx_dev);
 656                         if (ok > 0) {
 657                                 azx_dev->irq_pending = 0;
 658                                 spin_unlock(&chip->reg_lock);
 659                                 snd_pcm_period_elapsed(azx_dev->substream);
 660                                 spin_lock(&chip->reg_lock);
 661                         } else if (ok < 0) {
 662                                 pending = 0;    /* too early */
 663                         } else
 664                                 pending++;
 665                 }
 666                 spin_unlock_irq(&chip->reg_lock);
 667                 if (!pending)
 668                         return;
 669                 msleep(1);
 670         }
 671 }
 672
 673 /* clear irq_pending flags and assure no on-going workq */
 674 static void azx_clear_irq_pending(struct azx *chip)
 675 {
 676         int i;
 677
 678         spin_lock_irq(&chip->reg_lock);
 679         for (i = 0; i < chip->num_streams; i++)
 680                 chip->azx_dev[i].irq_pending = 0;
 681         spin_unlock_irq(&chip->reg_lock);
 682 }
 683
 684 /*
 685  * mixer creation - all stuff is implemented in hda module
 686  */
 687 static int azx_mixer_create(struct azx *chip)
 688 {
 689         return snd_hda_build_controls(chip->bus);
 690 }
 691
 692
 693 /*
 694  * initialize SD streams
 695  */
 696 static int azx_init_stream(struct azx *chip)
 697 {
 698         int i;
 699
 700         /* initialize each stream (aka device)
 701          * assign the starting bdl address to each stream (device)
 702          * and initialize
 703          */
 704         for (i = 0; i < chip->num_streams; i++) {
 705                 struct azx_dev *azx_dev = &chip->azx_dev[i];
 706                 azx_dev->posbuf = (u32 __iomem *)(chip->posbuf.area + i * 8);
 707                 /* offset: SDI0=0x80, SDI1=0xa0, ... SDO3=0x160 */
 708                 azx_dev->sd_addr = chip->remap_addr + (0x20 * i + 0x80);
 709                 /* int mask: SDI0=0x01, SDI1=0x02, ... SDO3=0x80 */
 710                 azx_dev->sd_int_sta_mask = 1 << i;
 711                 /* stream tag: must be non-zero and unique */
 712                 azx_dev->index = i;
 713                 azx_dev->stream_tag = i + 1;
 714         }
 715
 716         return 0;
 717 }
 718
 719 static int azx_acquire_irq(struct azx *chip, int do_disconnect)
 720 {
 721         if (request_irq(chip->pci->irq, azx_interrupt,
 722                         chip->msi ? 0 : IRQF_SHARED,
 723                         KBUILD_MODNAME, chip)) {
 724                 dev_err(chip->card->dev,
 725                         "unable to grab IRQ %d, disabling device\n",
 726                         chip->pci->irq);
 727                 if (do_disconnect)
 728                         snd_card_disconnect(chip->card);
 729                 return -1;
 730         }
 731         chip->irq = chip->pci->irq;
 732         pci_intx(chip->pci, !chip->msi);
 733         return 0;
 734 }
 735
 736 #ifdef CONFIG_PM
 737 /* power-up/down the controller */
 738 static void azx_power_notify(struct hda_bus *bus, bool power_up)
 739 {
 740         struct azx *chip = bus->private_data;
 741
 742         if (!(chip->driver_caps & AZX_DCAPS_PM_RUNTIME))
 743                 return;
 744
 745         if (power_up)
 746                 pm_runtime_get_sync(chip->card->dev);
 747         else
 748                 pm_runtime_put_sync(chip->card->dev);
 749 }
 750
 751 static DEFINE_MUTEX(card_list_lock);
 752 static LIST_HEAD(card_list);
 753
 754 static void azx_add_card_list(struct azx *chip)
 755 {
 756         mutex_lock(&card_list_lock);
 757         list_add(&chip->list, &card_list);
 758         mutex_unlock(&card_list_lock);
 759 }
 760
 761 static void azx_del_card_list(struct azx *chip)
 762 {
 763         mutex_lock(&card_list_lock);
 764         list_del_init(&chip->list);
 765         mutex_unlock(&card_list_lock);
 766 }
 767
 768 /* trigger power-save check at writing parameter */
 769 static int param_set_xint(const char *val, const struct kernel_param *kp)
 770 {
 771         struct azx *chip;
 772         struct hda_codec *c;
 773         int prev = power_save;
 774         int ret = param_set_int(val, kp);
 775
 776         if (ret || prev == power_save)
 777                 return ret;
 778
 779         mutex_lock(&card_list_lock);
 780         list_for_each_entry(chip, &card_list, list) {
 781                 if (!chip->bus || chip->disabled)
 782                         continue;
 783                 list_for_each_entry(c, &chip->bus->codec_list, list)
 784                         snd_hda_power_sync(c);
 785         }
 786         mutex_unlock(&card_list_lock);
 787         return 0;
 788 }
 789 #else
 790 #define azx_add_card_list(chip) /* NOP */
 791 #define azx_del_card_list(chip) /* NOP */
 792 #endif /* CONFIG_PM */
 793
 794 #if defined(CONFIG_PM_SLEEP) || defined(SUPPORT_VGA_SWITCHEROO)
 795 /*
 796  * power management
 797  */
 798 static int azx_suspend(struct device *dev)
 799 {
 800         struct pci_dev *pci = to_pci_dev(dev);
 801         struct snd_card *card = dev_get_drvdata(dev);
 802         struct azx *chip = card->private_data;
 803         struct azx_pcm *p;
 804
 805         if (chip->disabled)
 806                 return 0;
 807
 808         snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
 809         azx_clear_irq_pending(chip);
 810         list_for_each_entry(p, &chip->pcm_list, list)
 811                 snd_pcm_suspend_all(p->pcm);
 812         if (chip->initialized)
 813                 snd_hda_suspend(chip->bus);
 814         azx_stop_chip(chip);
 815         azx_enter_link_reset(chip);
 816         if (chip->irq >= 0) {
 817                 free_irq(chip->irq, chip);
 818                 chip->irq = -1;
 819         }
 820         if (chip->msi)
 821                 pci_disable_msi(chip->pci);
 822         pci_disable_device(pci);
 823         pci_save_state(pci);
 824         pci_set_power_state(pci, PCI_D3hot);
 825         if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
 826                 hda_display_power(false);
 827         return 0;
 828 }
 829
 830 static int azx_resume(struct device *dev)
 831 {
 832         struct pci_dev *pci = to_pci_dev(dev);
 833         struct snd_card *card = dev_get_drvdata(dev);
 834         struct azx *chip = card->private_data;
 835
 836         if (chip->disabled)
 837                 return 0;
 838
 839         if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
 840                 hda_display_power(true);
 841         pci_set_power_state(pci, PCI_D0);
 842         pci_restore_state(pci);
 843         if (pci_enable_device(pci) < 0) {
 844                 dev_err(chip->card->dev,
 845                         "pci_enable_device failed, disabling device\n");
 846                 snd_card_disconnect(card);
 847                 return -EIO;
 848         }
 849         pci_set_master(pci);
 850         if (chip->msi)
 851                 if (pci_enable_msi(pci) < 0)
 852                         chip->msi = 0;
 853         if (azx_acquire_irq(chip, 1) < 0)
 854                 return -EIO;
 855         azx_init_pci(chip);
 856
 857         azx_init_chip(chip, 1);
 858
 859         snd_hda_resume(chip->bus);
 860         snd_power_change_state(card, SNDRV_CTL_POWER_D0);
 861         return 0;
 862 }
 863 #endif /* CONFIG_PM_SLEEP || SUPPORT_VGA_SWITCHEROO */
 864
 865 #ifdef CONFIG_PM_RUNTIME
 866 static int azx_runtime_suspend(struct device *dev)
 867 {
 868         struct snd_card *card = dev_get_drvdata(dev);
 869         struct azx *chip = card->private_data;
 870
 871         if (chip->disabled)
 872                 return 0;
 873
 874         if (!(chip->driver_caps & AZX_DCAPS_PM_RUNTIME))
 875                 return 0;
 876
 877         /* enable controller wake up event */
 878         azx_writew(chip, WAKEEN, azx_readw(chip, WAKEEN) |
 879                   STATESTS_INT_MASK);
 880
 881         azx_stop_chip(chip);
 882         azx_enter_link_reset(chip);
 883         azx_clear_irq_pending(chip);
 884         if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
 885                 hda_display_power(false);
 886         return 0;
 887 }
 888
 889 static int azx_runtime_resume(struct device *dev)
 890 {
 891         struct snd_card *card = dev_get_drvdata(dev);
 892         struct azx *chip = card->private_data;
 893         struct hda_bus *bus;
 894         struct hda_codec *codec;
 895         int status;
 896
 897         if (chip->disabled)
 898                 return 0;
 899
 900         if (!(chip->driver_caps & AZX_DCAPS_PM_RUNTIME))
 901                 return 0;
 902
 903         if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
 904                 hda_display_power(true);
 905
 906         /* Read STATESTS before controller reset */
 907         status = azx_readw(chip, STATESTS);
 908
 909         azx_init_pci(chip);
 910         azx_init_chip(chip, 1);
 911
 912         bus = chip->bus;
 913         if (status && bus) {
 914                 list_for_each_entry(codec, &bus->codec_list, list)
 915                         if (status & (1 << codec->addr))
 916                                 queue_delayed_work(codec->bus->workq,
 917                                                    &codec->jackpoll_work, codec->jackpoll_interval);
 918         }
 919
 920         /* disable controller Wake Up event*/
 921         azx_writew(chip, WAKEEN, azx_readw(chip, WAKEEN) &
 922                         ~STATESTS_INT_MASK);
 923
 924         return 0;
 925 }
 926
 927 static int azx_runtime_idle(struct device *dev)
 928 {
 929         struct snd_card *card = dev_get_drvdata(dev);
 930         struct azx *chip = card->private_data;
 931
 932         if (chip->disabled)
 933                 return 0;
 934
 935         if (!power_save_controller ||
 936             !(chip->driver_caps & AZX_DCAPS_PM_RUNTIME))
 937                 return -EBUSY;
 938
 939         return 0;
 940 }
 941
 942 #endif /* CONFIG_PM_RUNTIME */
 943
 944 #ifdef CONFIG_PM
 945 static const struct dev_pm_ops azx_pm = {
 946         SET_SYSTEM_SLEEP_PM_OPS(azx_suspend, azx_resume)
 947         SET_RUNTIME_PM_OPS(azx_runtime_suspend, azx_runtime_resume, azx_runtime_idle)
 948 };
 949
 950 #define AZX_PM_OPS      &azx_pm
 951 #else
 952 #define AZX_PM_OPS      NULL
 953 #endif /* CONFIG_PM */
 954
 955
 956 /*
 957  * reboot notifier for hang-up problem at power-down
 958  */
 959 static int azx_halt(struct notifier_block *nb, unsigned long event, void *buf)
 960 {
 961         struct azx *chip = container_of(nb, struct azx, reboot_notifier);
 962         snd_hda_bus_reboot_notify(chip->bus);
 963         azx_stop_chip(chip);
 964         return NOTIFY_OK;
 965 }
 966
 967 static void azx_notifier_register(struct azx *chip)
 968 {
 969         chip->reboot_notifier.notifier_call = azx_halt;
 970         register_reboot_notifier(&chip->reboot_notifier);
 971 }
 972
 973 static void azx_notifier_unregister(struct azx *chip)
 974 {
 975         if (chip->reboot_notifier.notifier_call)
 976                 unregister_reboot_notifier(&chip->reboot_notifier);
 977 }
 978
 979 static int azx_probe_continue(struct azx *chip);
 980
 981 #ifdef SUPPORT_VGA_SWITCHEROO
 982 static struct pci_dev *get_bound_vga(struct pci_dev *pci);
 983
 984 static void azx_vs_set_state(struct pci_dev *pci,
 985                              enum vga_switcheroo_state state)
 986 {
 987         struct snd_card *card = pci_get_drvdata(pci);
 988         struct azx *chip = card->private_data;
 989         bool disabled;
 990
 991         wait_for_completion(&chip->probe_wait);
 992         if (chip->init_failed)
 993                 return;
 994
 995         disabled = (state == VGA_SWITCHEROO_OFF);
 996         if (chip->disabled == disabled)
 997                 return;
 998
 999         if (!chip->bus) {
1000                 chip->disabled = disabled;
1001                 if (!disabled) {
1002                         dev_info(chip->card->dev,
1003                                  "Start delayed initialization\n");
1004                         if (azx_probe_continue(chip) < 0) {
1005                                 dev_err(chip->card->dev, "initialization error\n");
1006                                 chip->init_failed = true;
1007                         }
1008                 }
1009         } else {
1010                 dev_info(chip->card->dev, "%s via VGA-switcheroo\n",
1011                          disabled ? "Disabling" : "Enabling");
1012                 if (disabled) {
1013                         pm_runtime_put_sync_suspend(card->dev);
1014                         azx_suspend(card->dev);
1015                         /* when we get suspended by vga switcheroo we end up in D3cold,
1016                          * however we have no ACPI handle, so pci/acpi can't put us there,
1017                          * put ourselves there */
1018                         pci->current_state = PCI_D3cold;
1019                         chip->disabled = true;
1020                         if (snd_hda_lock_devices(chip->bus))
1021                                 dev_warn(chip->card->dev,
1022                                          "Cannot lock devices!\n");
1023                 } else {
1024                         snd_hda_unlock_devices(chip->bus);
1025                         pm_runtime_get_noresume(card->dev);
1026                         chip->disabled = false;
1027                         azx_resume(card->dev);
1028                 }
1029         }
1030 }
1031
1032 static bool azx_vs_can_switch(struct pci_dev *pci)
1033 {
1034         struct snd_card *card = pci_get_drvdata(pci);
1035         struct azx *chip = card->private_data;
1036
1037         wait_for_completion(&chip->probe_wait);
1038         if (chip->init_failed)
1039                 return false;
1040         if (chip->disabled || !chip->bus)
1041                 return true;
1042         if (snd_hda_lock_devices(chip->bus))
1043                 return false;
1044         snd_hda_unlock_devices(chip->bus);
1045         return true;
1046 }
1047
1048 static void init_vga_switcheroo(struct azx *chip)
1049 {
1050         struct pci_dev *p = get_bound_vga(chip->pci);
1051         if (p) {
1052                 dev_info(chip->card->dev,
1053                          "Handle VGA-switcheroo audio client\n");
1054                 chip->use_vga_switcheroo = 1;
1055                 pci_dev_put(p);
1056         }
1057 }
1058
1059 static const struct vga_switcheroo_client_ops azx_vs_ops = {
1060         .set_gpu_state = azx_vs_set_state,
1061         .can_switch = azx_vs_can_switch,
1062 };
1063
1064 static int register_vga_switcheroo(struct azx *chip)
1065 {
1066         int err;
1067
1068         if (!chip->use_vga_switcheroo)
1069                 return 0;
1070         /* FIXME: currently only handling DIS controller
1071          * is there any machine with two switchable HDMI audio controllers?
1072          */
1073         err = vga_switcheroo_register_audio_client(chip->pci, &azx_vs_ops,
1074                                                     VGA_SWITCHEROO_DIS,
1075                                                     chip->bus != NULL);
1076         if (err < 0)
1077                 return err;
1078         chip->vga_switcheroo_registered = 1;
1079
1080         /* register as an optimus hdmi audio power domain */
1081         vga_switcheroo_init_domain_pm_optimus_hdmi_audio(chip->card->dev,
1082                                                          &chip->hdmi_pm_domain);
1083         return 0;
1084 }
1085 #else
1086 #define init_vga_switcheroo(chip)               /* NOP */
1087 #define register_vga_switcheroo(chip)           0
1088 #define check_hdmi_disabled(pci)        false
1089 #endif /* SUPPORT_VGA_SWITCHER */
1090
1091 /*
1092  * destructor
1093  */
1094 static int azx_free(struct azx *chip)
1095 {
1096         struct pci_dev *pci = chip->pci;
1097         int i;
1098
1099         if ((chip->driver_caps & AZX_DCAPS_PM_RUNTIME)
1100                         && chip->running)
1101                 pm_runtime_get_noresume(&pci->dev);
1102
1103         azx_del_card_list(chip);
1104
1105         azx_notifier_unregister(chip);
1106
1107         chip->init_failed = 1; /* to be sure */
1108         complete_all(&chip->probe_wait);
1109
1110         if (use_vga_switcheroo(chip)) {
1111                 if (chip->disabled && chip->bus)
1112                         snd_hda_unlock_devices(chip->bus);
1113                 if (chip->vga_switcheroo_registered)
1114                         vga_switcheroo_unregister_client(chip->pci);
1115         }
1116
1117         if (chip->initialized) {
1118                 azx_clear_irq_pending(chip);
1119                 for (i = 0; i < chip->num_streams; i++)
1120                         azx_stream_stop(chip, &chip->azx_dev[i]);
1121                 azx_stop_chip(chip);
1122         }
1123
1124         if (chip->irq >= 0)
1125                 free_irq(chip->irq, (void*)chip);
1126         if (chip->msi)
1127                 pci_disable_msi(chip->pci);
1128         if (chip->remap_addr)
1129                 iounmap(chip->remap_addr);
1130
1131         azx_free_stream_pages(chip);
1132         if (chip->region_requested)
1133                 pci_release_regions(chip->pci);
1134         pci_disable_device(chip->pci);
1135         kfree(chip->azx_dev);
1136 #ifdef CONFIG_SND_HDA_PATCH_LOADER
1137         if (chip->fw)
1138                 release_firmware(chip->fw);
1139 #endif
1140         if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) {
1141                 hda_display_power(false);
1142                 hda_i915_exit();
1143         }
1144         kfree(chip);
1145
1146         return 0;
1147 }
1148
1149 static int azx_dev_free(struct snd_device *device)
1150 {
1151         return azx_free(device->device_data);
1152 }
1153
1154 #ifdef SUPPORT_VGA_SWITCHEROO
1155 /*
1156  * Check of disabled HDMI controller by vga-switcheroo
1157  */
1158 static struct pci_dev *get_bound_vga(struct pci_dev *pci)
1159 {
1160         struct pci_dev *p;
1161
1162         /* check only discrete GPU */
1163         switch (pci->vendor) {
1164         case PCI_VENDOR_ID_ATI:
1165         case PCI_VENDOR_ID_AMD:
1166         case PCI_VENDOR_ID_NVIDIA:
1167                 if (pci->devfn == 1) {
1168                         p = pci_get_domain_bus_and_slot(pci_domain_nr(pci->bus),
1169                                                         pci->bus->number, 0);
1170                         if (p) {
1171                                 if ((p->class >> 8) == PCI_CLASS_DISPLAY_VGA)
1172                                         return p;
1173                                 pci_dev_put(p);
1174                         }
1175                 }
1176                 break;
1177         }
1178         return NULL;
1179 }
1180
1181 static bool check_hdmi_disabled(struct pci_dev *pci)
1182 {
1183         bool vga_inactive = false;
1184         struct pci_dev *p = get_bound_vga(pci);
1185
1186         if (p) {
1187                 if (vga_switcheroo_get_client_state(p) == VGA_SWITCHEROO_OFF)
1188                         vga_inactive = true;
1189                 pci_dev_put(p);
1190         }
1191         return vga_inactive;
1192 }
1193 #endif /* SUPPORT_VGA_SWITCHEROO */
1194
1195 /*
1196  * white/black-listing for position_fix
1197  */
1198 static struct snd_pci_quirk position_fix_list[] = {
1199         SND_PCI_QUIRK(0x1028, 0x01cc, "Dell D820", POS_FIX_LPIB),
1200         SND_PCI_QUIRK(0x1028, 0x01de, "Dell Precision 390", POS_FIX_LPIB),
1201         SND_PCI_QUIRK(0x103c, 0x306d, "HP dv3", POS_FIX_LPIB),
1202         SND_PCI_QUIRK(0x1043, 0x813d, "ASUS P5AD2", POS_FIX_LPIB),
1203         SND_PCI_QUIRK(0x1043, 0x81b3, "ASUS", POS_FIX_LPIB),
1204         SND_PCI_QUIRK(0x1043, 0x81e7, "ASUS M2V", POS_FIX_LPIB),
1205         SND_PCI_QUIRK(0x104d, 0x9069, "Sony VPCS11V9E", POS_FIX_LPIB),
1206         SND_PCI_QUIRK(0x10de, 0xcb89, "Macbook Pro 7,1", POS_FIX_LPIB),
1207         SND_PCI_QUIRK(0x1297, 0x3166, "Shuttle", POS_FIX_LPIB),
1208         SND_PCI_QUIRK(0x1458, 0xa022, "ga-ma770-ud3", POS_FIX_LPIB),
1209         SND_PCI_QUIRK(0x1462, 0x1002, "MSI Wind U115", POS_FIX_LPIB),
1210         SND_PCI_QUIRK(0x1565, 0x8218, "Biostar Microtech", POS_FIX_LPIB),
1211         SND_PCI_QUIRK(0x1849, 0x0888, "775Dual-VSTA", POS_FIX_LPIB),
1212         SND_PCI_QUIRK(0x8086, 0x2503, "DG965OT AAD63733-203", POS_FIX_LPIB),
1213         {}
1214 };
1215
1216 static int check_position_fix(struct azx *chip, int fix)
1217 {
1218         const struct snd_pci_quirk *q;
1219
1220         switch (fix) {
1221         case POS_FIX_AUTO:
1222         case POS_FIX_LPIB:
1223         case POS_FIX_POSBUF:
1224         case POS_FIX_VIACOMBO:
1225         case POS_FIX_COMBO:
1226                 return fix;
1227         }
1228
1229         q = snd_pci_quirk_lookup(chip->pci, position_fix_list);
1230         if (q) {
1231                 dev_info(chip->card->dev,
1232                          "position_fix set to %d for device %04x:%04x\n",
1233                          q->value, q->subvendor, q->subdevice);
1234                 return q->value;
1235         }
1236
1237         /* Check VIA/ATI HD Audio Controller exist */
1238         if (chip->driver_caps & AZX_DCAPS_POSFIX_VIA) {
1239                 dev_dbg(chip->card->dev, "Using VIACOMBO position fix\n");
1240                 return POS_FIX_VIACOMBO;
1241         }
1242         if (chip->driver_caps & AZX_DCAPS_POSFIX_LPIB) {
1243                 dev_dbg(chip->card->dev, "Using LPIB position fix\n");
1244                 return POS_FIX_LPIB;
1245         }
1246         return POS_FIX_AUTO;
1247 }
1248
1249 /*
1250  * black-lists for probe_mask
1251  */
1252 static struct snd_pci_quirk probe_mask_list[] = {
1253         /* Thinkpad often breaks the controller communication when accessing
1254          * to the non-working (or non-existing) modem codec slot.
1255          */
1256         SND_PCI_QUIRK(0x1014, 0x05b7, "Thinkpad Z60", 0x01),
1257         SND_PCI_QUIRK(0x17aa, 0x2010, "Thinkpad X/T/R60", 0x01),
1258         SND_PCI_QUIRK(0x17aa, 0x20ac, "Thinkpad X/T/R61", 0x01),
1259         /* broken BIOS */
1260         SND_PCI_QUIRK(0x1028, 0x20ac, "Dell Studio Desktop", 0x01),
1261         /* including bogus ALC268 in slot#2 that conflicts with ALC888 */
1262         SND_PCI_QUIRK(0x17c0, 0x4085, "Medion MD96630", 0x01),
1263         /* forced codec slots */
1264         SND_PCI_QUIRK(0x1043, 0x1262, "ASUS W5Fm", 0x103),
1265         SND_PCI_QUIRK(0x1046, 0x1262, "ASUS W5F", 0x103),
1266         /* WinFast VP200 H (Teradici) user reported broken communication */
1267         SND_PCI_QUIRK(0x3a21, 0x040d, "WinFast VP200 H", 0x101),
1268         {}
1269 };
1270
1271 #define AZX_FORCE_CODEC_MASK    0x100
1272
1273 static void check_probe_mask(struct azx *chip, int dev)
1274 {
1275         const struct snd_pci_quirk *q;
1276
1277         chip->codec_probe_mask = probe_mask[dev];
1278         if (chip->codec_probe_mask == -1) {
1279                 q = snd_pci_quirk_lookup(chip->pci, probe_mask_list);
1280                 if (q) {
1281                         dev_info(chip->card->dev,
1282                                  "probe_mask set to 0x%x for device %04x:%04x\n",
1283                                  q->value, q->subvendor, q->subdevice);
1284                         chip->codec_probe_mask = q->value;
1285                 }
1286         }
1287
1288         /* check forced option */
1289         if (chip->codec_probe_mask != -1 &&
1290             (chip->codec_probe_mask & AZX_FORCE_CODEC_MASK)) {
1291                 chip->codec_mask = chip->codec_probe_mask & 0xff;
1292                 dev_info(chip->card->dev, "codec_mask forced to 0x%x\n",
1293                          chip->codec_mask);
1294         }
1295 }
1296
1297 /*
1298  * white/black-list for enable_msi
1299  */
1300 static struct snd_pci_quirk msi_black_list[] = {
1301         SND_PCI_QUIRK(0x103c, 0x2191, "HP", 0), /* AMD Hudson */
1302         SND_PCI_QUIRK(0x103c, 0x2192, "HP", 0), /* AMD Hudson */
1303         SND_PCI_QUIRK(0x103c, 0x21f7, "HP", 0), /* AMD Hudson */
1304         SND_PCI_QUIRK(0x103c, 0x21fa, "HP", 0), /* AMD Hudson */
1305         SND_PCI_QUIRK(0x1043, 0x81f2, "ASUS", 0), /* Athlon64 X2 + nvidia */
1306         SND_PCI_QUIRK(0x1043, 0x81f6, "ASUS", 0), /* nvidia */
1307         SND_PCI_QUIRK(0x1043, 0x822d, "ASUS", 0), /* Athlon64 X2 + nvidia MCP55 */
1308         SND_PCI_QUIRK(0x1179, 0xfb44, "Toshiba Satellite C870", 0), /* AMD Hudson */
1309         SND_PCI_QUIRK(0x1849, 0x0888, "ASRock", 0), /* Athlon64 X2 + nvidia */
1310         SND_PCI_QUIRK(0xa0a0, 0x0575, "Aopen MZ915-M", 0), /* ICH6 */
1311         {}
1312 };
1313
1314 static void check_msi(struct azx *chip)
1315 {
1316         const struct snd_pci_quirk *q;
1317
1318         if (enable_msi >= 0) {
1319                 chip->msi = !!enable_msi;
1320                 return;
1321         }
1322         chip->msi = 1;  /* enable MSI as default */
1323         q = snd_pci_quirk_lookup(chip->pci, msi_black_list);
1324         if (q) {
1325                 dev_info(chip->card->dev,
1326                          "msi for device %04x:%04x set to %d\n",
1327                          q->subvendor, q->subdevice, q->value);
1328                 chip->msi = q->value;
1329                 return;
1330         }
1331
1332         /* NVidia chipsets seem to cause troubles with MSI */
1333         if (chip->driver_caps & AZX_DCAPS_NO_MSI) {
1334                 dev_info(chip->card->dev, "Disabling MSI\n");
1335                 chip->msi = 0;
1336         }
1337 }
1338
1339 /* check the snoop mode availability */
1340 static void azx_check_snoop_available(struct azx *chip)
1341 {
1342         bool snoop = chip->snoop;
1343
1344         switch (chip->driver_type) {
1345         case AZX_DRIVER_VIA:
1346                 /* force to non-snoop mode for a new VIA controller
1347                  * when BIOS is set
1348                  */
1349                 if (snoop) {
1350                         u8 val;
1351                         pci_read_config_byte(chip->pci, 0x42, &val);
1352                         if (!(val & 0x80) && chip->pci->revision == 0x30)
1353                                 snoop = false;
1354                 }
1355                 break;
1356         case AZX_DRIVER_ATIHDMI_NS:
1357                 /* new ATI HDMI requires non-snoop */
1358                 snoop = false;
1359                 break;
1360         case AZX_DRIVER_CTHDA:
1361                 snoop = false;
1362                 break;
1363         }
1364
1365         if (snoop != chip->snoop) {
1366                 dev_info(chip->card->dev, "Force to %s mode\n",
1367                          snoop ? "snoop" : "non-snoop");
1368                 chip->snoop = snoop;
1369         }
1370 }
1371
1372 static void azx_probe_work(struct work_struct *work)
1373 {
1374         azx_probe_continue(container_of(work, struct azx, probe_work));
1375 }
1376
1377 /*
1378  * constructor
1379  */
1380 static int azx_create(struct snd_card *card, struct pci_dev *pci,
1381                       int dev, unsigned int driver_caps,
1382                       const struct hda_controller_ops *hda_ops,
1383                       struct azx **rchip)
1384 {
1385         static struct snd_device_ops ops = {
1386                 .dev_free = azx_dev_free,
1387         };
1388         struct azx *chip;
1389         int err;
1390
1391         *rchip = NULL;
1392
1393         err = pci_enable_device(pci);
1394         if (err < 0)
1395                 return err;
1396
1397         chip = kzalloc(sizeof(*chip), GFP_KERNEL);
1398         if (!chip) {
1399                 dev_err(card->dev, "Cannot allocate chip\n");
1400                 pci_disable_device(pci);
1401                 return -ENOMEM;
1402         }
1403
1404         spin_lock_init(&chip->reg_lock);
1405         mutex_init(&chip->open_mutex);
1406         chip->card = card;
1407         chip->pci = pci;
1408         chip->ops = hda_ops;
1409         chip->irq = -1;
1410         chip->driver_caps = driver_caps;
1411         chip->driver_type = driver_caps & 0xff;
1412         check_msi(chip);
1413         chip->dev_index = dev;
1414         chip->jackpoll_ms = jackpoll_ms;
1415         INIT_WORK(&chip->irq_pending_work, azx_irq_pending_work);
1416         INIT_LIST_HEAD(&chip->pcm_list);
1417         INIT_LIST_HEAD(&chip->list);
1418         init_vga_switcheroo(chip);
1419         init_completion(&chip->probe_wait);
1420
1421         chip->position_fix[0] = chip->position_fix[1] =
1422                 check_position_fix(chip, position_fix[dev]);
1423         /* combo mode uses LPIB for playback */
1424         if (chip->position_fix[0] == POS_FIX_COMBO) {
1425                 chip->position_fix[0] = POS_FIX_LPIB;
1426                 chip->position_fix[1] = POS_FIX_AUTO;
1427         }
1428
1429         check_probe_mask(chip, dev);
1430
1431         chip->single_cmd = single_cmd;
1432         chip->snoop = hda_snoop;
1433         azx_check_snoop_available(chip);
1434
1435         if (bdl_pos_adj[dev] < 0) {
1436                 switch (chip->driver_type) {
1437                 case AZX_DRIVER_ICH:
1438                 case AZX_DRIVER_PCH:
1439                         bdl_pos_adj[dev] = 1;
1440                         break;
1441                 default:
1442                         bdl_pos_adj[dev] = 32;
1443                         break;
1444                 }
1445         }
1446         chip->bdl_pos_adj = bdl_pos_adj;
1447
1448         err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops);
1449         if (err < 0) {
1450                 dev_err(card->dev, "Error creating device [card]!\n");
1451                 azx_free(chip);
1452                 return err;
1453         }
1454
1455         /* continue probing in work context as may trigger request module */
1456         INIT_WORK(&chip->probe_work, azx_probe_work);
1457
1458         *rchip = chip;
1459
1460         return 0;
1461 }
1462
1463 static int azx_first_init(struct azx *chip)
1464 {
1465         int dev = chip->dev_index;
1466         struct pci_dev *pci = chip->pci;
1467         struct snd_card *card = chip->card;
1468         int err;
1469         unsigned short gcap;
1470
1471 #if BITS_PER_LONG != 64
1472         /* Fix up base address on ULI M5461 */
1473         if (chip->driver_type == AZX_DRIVER_ULI) {
1474                 u16 tmp3;
1475                 pci_read_config_word(pci, 0x40, &tmp3);
1476                 pci_write_config_word(pci, 0x40, tmp3 | 0x10);
1477                 pci_write_config_dword(pci, PCI_BASE_ADDRESS_1, 0);
1478         }
1479 #endif
1480
1481         err = pci_request_regions(pci, "ICH HD audio");
1482         if (err < 0)
1483                 return err;
1484         chip->region_requested = 1;
1485
1486         chip->addr = pci_resource_start(pci, 0);
1487         chip->remap_addr = pci_ioremap_bar(pci, 0);
1488         if (chip->remap_addr == NULL) {
1489                 dev_err(card->dev, "ioremap error\n");
1490                 return -ENXIO;
1491         }
1492
1493         if (chip->msi)
1494                 if (pci_enable_msi(pci) < 0)
1495                         chip->msi = 0;
1496
1497         if (azx_acquire_irq(chip, 0) < 0)
1498                 return -EBUSY;
1499
1500         pci_set_master(pci);
1501         synchronize_irq(chip->irq);
1502
1503         gcap = azx_readw(chip, GCAP);
1504         dev_dbg(card->dev, "chipset global capabilities = 0x%x\n", gcap);
1505
1506         /* disable SB600 64bit support for safety */
1507         if (chip->pci->vendor == PCI_VENDOR_ID_ATI) {
1508                 struct pci_dev *p_smbus;
1509                 p_smbus = pci_get_device(PCI_VENDOR_ID_ATI,
1510                                          PCI_DEVICE_ID_ATI_SBX00_SMBUS,
1511                                          NULL);
1512                 if (p_smbus) {
1513                         if (p_smbus->revision < 0x30)
1514                                 gcap &= ~ICH6_GCAP_64OK;
1515                         pci_dev_put(p_smbus);
1516                 }
1517         }
1518
1519         /* disable 64bit DMA address on some devices */
1520         if (chip->driver_caps & AZX_DCAPS_NO_64BIT) {
1521                 dev_dbg(card->dev, "Disabling 64bit DMA\n");
1522                 gcap &= ~ICH6_GCAP_64OK;
1523         }
1524
1525         /* disable buffer size rounding to 128-byte multiples if supported */
1526         if (align_buffer_size >= 0)
1527                 chip->align_buffer_size = !!align_buffer_size;
1528         else {
1529                 if (chip->driver_caps & AZX_DCAPS_BUFSIZE)
1530                         chip->align_buffer_size = 0;
1531                 else if (chip->driver_caps & AZX_DCAPS_ALIGN_BUFSIZE)
1532                         chip->align_buffer_size = 1;
1533                 else
1534                         chip->align_buffer_size = 1;
1535         }
1536
1537         /* allow 64bit DMA address if supported by H/W */
1538         if ((gcap & ICH6_GCAP_64OK) && !pci_set_dma_mask(pci, DMA_BIT_MASK(64)))
1539                 pci_set_consistent_dma_mask(pci, DMA_BIT_MASK(64));
1540         else {
1541                 pci_set_dma_mask(pci, DMA_BIT_MASK(32));
1542                 pci_set_consistent_dma_mask(pci, DMA_BIT_MASK(32));
1543         }
1544
1545         /* read number of streams from GCAP register instead of using
1546          * hardcoded value
1547          */
1548         chip->capture_streams = (gcap >> 8) & 0x0f;
1549         chip->playback_streams = (gcap >> 12) & 0x0f;
1550         if (!chip->playback_streams && !chip->capture_streams) {
1551                 /* gcap didn't give any info, switching to old method */
1552
1553                 switch (chip->driver_type) {
1554                 case AZX_DRIVER_ULI:
1555                         chip->playback_streams = ULI_NUM_PLAYBACK;
1556                         chip->capture_streams = ULI_NUM_CAPTURE;
1557                         break;
1558                 case AZX_DRIVER_ATIHDMI:
1559                 case AZX_DRIVER_ATIHDMI_NS:
1560                         chip->playback_streams = ATIHDMI_NUM_PLAYBACK;
1561                         chip->capture_streams = ATIHDMI_NUM_CAPTURE;
1562                         break;
1563                 case AZX_DRIVER_GENERIC:
1564                 default:
1565                         chip->playback_streams = ICH6_NUM_PLAYBACK;
1566                         chip->capture_streams = ICH6_NUM_CAPTURE;
1567                         break;
1568                 }
1569         }
1570         chip->capture_index_offset = 0;
1571         chip->playback_index_offset = chip->capture_streams;
1572         chip->num_streams = chip->playback_streams + chip->capture_streams;
1573         chip->azx_dev = kcalloc(chip->num_streams, sizeof(*chip->azx_dev),
1574                                 GFP_KERNEL);
1575         if (!chip->azx_dev) {
1576                 dev_err(card->dev, "cannot malloc azx_dev\n");
1577                 return -ENOMEM;
1578         }
1579
1580         err = azx_alloc_stream_pages(chip);
1581         if (err < 0)
1582                 return err;
1583
1584         /* initialize streams */
1585         azx_init_stream(chip);
1586
1587         /* initialize chip */
1588         azx_init_pci(chip);
1589         azx_init_chip(chip, (probe_only[dev] & 2) == 0);
1590
1591         /* codec detection */
1592         if (!chip->codec_mask) {
1593                 dev_err(card->dev, "no codecs found!\n");
1594                 return -ENODEV;
1595         }
1596
1597         strcpy(card->driver, "HDA-Intel");
1598         strlcpy(card->shortname, driver_short_names[chip->driver_type],
1599                 sizeof(card->shortname));
1600         snprintf(card->longname, sizeof(card->longname),
1601                  "%s at 0x%lx irq %i",
1602                  card->shortname, chip->addr, chip->irq);
1603
1604         return 0;
1605 }
1606
1607 static void power_down_all_codecs(struct azx *chip)
1608 {
1609 #ifdef CONFIG_PM
1610         /* The codecs were powered up in snd_hda_codec_new().
1611          * Now all initialization done, so turn them down if possible
1612          */
1613         struct hda_codec *codec;
1614         list_for_each_entry(codec, &chip->bus->codec_list, list) {
1615                 snd_hda_power_down(codec);
1616         }
1617 #endif
1618 }
1619
1620 #ifdef CONFIG_SND_HDA_PATCH_LOADER
1621 /* callback from request_firmware_nowait() */
1622 static void azx_firmware_cb(const struct firmware *fw, void *context)
1623 {
1624         struct snd_card *card = context;
1625         struct azx *chip = card->private_data;
1626         struct pci_dev *pci = chip->pci;
1627
1628         if (!fw) {
1629                 dev_err(card->dev, "Cannot load firmware, aborting\n");
1630                 goto error;
1631         }
1632
1633         chip->fw = fw;
1634         if (!chip->disabled) {
1635                 /* continue probing */
1636                 if (azx_probe_continue(chip))
1637                         goto error;
1638         }
1639         return; /* OK */
1640
1641  error:
1642         snd_card_free(card);
1643         pci_set_drvdata(pci, NULL);
1644 }
1645 #endif
1646
1647 /*
1648  * HDA controller ops.
1649  */
1650
1651 /* PCI register access. */
1652 static void pci_azx_writel(u32 value, u32 *addr)
1653 {
1654         writel(value, addr);
1655 }
1656
1657 static u32 pci_azx_readl(u32 *addr)
1658 {
1659         return readl(addr);
1660 }
1661
1662 static void pci_azx_writew(u16 value, u16 *addr)
1663 {
1664         writew(value, addr);
1665 }
1666
1667 static u16 pci_azx_readw(u16 *addr)
1668 {
1669         return readw(addr);
1670 }
1671
1672 static void pci_azx_writeb(u8 value, u8 *addr)
1673 {
1674         writeb(value, addr);
1675 }
1676
1677 static u8 pci_azx_readb(u8 *addr)
1678 {
1679         return readb(addr);
1680 }
1681
1682 static int disable_msi_reset_irq(struct azx *chip)
1683 {
1684         int err;
1685
1686         free_irq(chip->irq, chip);
1687         chip->irq = -1;
1688         pci_disable_msi(chip->pci);
1689         chip->msi = 0;
1690         err = azx_acquire_irq(chip, 1);
1691         if (err < 0)
1692                 return err;
1693
1694         return 0;
1695 }
1696
1697 /* DMA page allocation helpers.  */
1698 static int dma_alloc_pages(struct azx *chip,
1699                            int type,
1700                            size_t size,
1701                            struct snd_dma_buffer *buf)
1702 {
1703         int err;
1704
1705         err = snd_dma_alloc_pages(type,
1706                                   chip->card->dev,
1707                                   size, buf);
1708         if (err < 0)
1709                 return err;
1710         mark_pages_wc(chip, buf, true);
1711         return 0;
1712 }
1713
1714 static void dma_free_pages(struct azx *chip, struct snd_dma_buffer *buf)
1715 {
1716         mark_pages_wc(chip, buf, false);
1717         snd_dma_free_pages(buf);
1718 }
1719
1720 static int substream_alloc_pages(struct azx *chip,
1721                                  struct snd_pcm_substream *substream,
1722                                  size_t size)
1723 {
1724         struct azx_dev *azx_dev = get_azx_dev(substream);
1725         int ret;
1726
1727         mark_runtime_wc(chip, azx_dev, substream, false);
1728         azx_dev->bufsize = 0;
1729         azx_dev->period_bytes = 0;
1730         azx_dev->format_val = 0;
1731         ret = snd_pcm_lib_malloc_pages(substream, size);
1732         if (ret < 0)
1733                 return ret;
1734         mark_runtime_wc(chip, azx_dev, substream, true);
1735         return 0;
1736 }
1737
1738 static int substream_free_pages(struct azx *chip,
1739                                 struct snd_pcm_substream *substream)
1740 {
1741         struct azx_dev *azx_dev = get_azx_dev(substream);
1742         mark_runtime_wc(chip, azx_dev, substream, false);
1743         return snd_pcm_lib_free_pages(substream);
1744 }
1745
1746 static void pcm_mmap_prepare(struct snd_pcm_substream *substream,
1747                              struct vm_area_struct *area)
1748 {
1749 #ifdef CONFIG_X86
1750         struct azx_pcm *apcm = snd_pcm_substream_chip(substream);
1751         struct azx *chip = apcm->chip;
1752         if (!azx_snoop(chip))
1753                 area->vm_page_prot = pgprot_writecombine(area->vm_page_prot);
1754 #endif
1755 }
1756
1757 static const struct hda_controller_ops pci_hda_ops = {
1758         .writel = pci_azx_writel,
1759         .readl = pci_azx_readl,
1760         .writew = pci_azx_writew,
1761         .readw = pci_azx_readw,
1762         .writeb = pci_azx_writeb,
1763         .readb = pci_azx_readb,
1764         .disable_msi_reset_irq = disable_msi_reset_irq,
1765         .dma_alloc_pages = dma_alloc_pages,
1766         .dma_free_pages = dma_free_pages,
1767         .substream_alloc_pages = substream_alloc_pages,
1768         .substream_free_pages = substream_free_pages,
1769         .pcm_mmap_prepare = pcm_mmap_prepare,
1770         .position_check = azx_position_check,
1771 };
1772
1773 static int azx_probe(struct pci_dev *pci,
1774                      const struct pci_device_id *pci_id)
1775 {
1776         static int dev;
1777         struct snd_card *card;
1778         struct azx *chip;
1779         bool schedule_probe;
1780         int err;
1781
1782         if (dev >= SNDRV_CARDS)
1783                 return -ENODEV;
1784         if (!enable[dev]) {
1785                 dev++;
1786                 return -ENOENT;
1787         }
1788
1789         err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
1790                            0, &card);
1791         if (err < 0) {
1792                 dev_err(&pci->dev, "Error creating card!\n");
1793                 return err;
1794         }
1795
1796         err = azx_create(card, pci, dev, pci_id->driver_data,
1797                          &pci_hda_ops, &chip);
1798         if (err < 0)
1799                 goto out_free;
1800         card->private_data = chip;
1801
1802         pci_set_drvdata(pci, card);
1803
1804         err = register_vga_switcheroo(chip);
1805         if (err < 0) {
1806                 dev_err(card->dev, "Error registering VGA-switcheroo client\n");
1807                 goto out_free;
1808         }
1809
1810         if (check_hdmi_disabled(pci)) {
1811                 dev_info(card->dev, "VGA controller is disabled\n");
1812                 dev_info(card->dev, "Delaying initialization\n");
1813                 chip->disabled = true;
1814         }
1815
1816         schedule_probe = !chip->disabled;
1817
1818 #ifdef CONFIG_SND_HDA_PATCH_LOADER
1819         if (patch[dev] && *patch[dev]) {
1820                 dev_info(card->dev, "Applying patch firmware '%s'\n",
1821                          patch[dev]);
1822                 err = request_firmware_nowait(THIS_MODULE, true, patch[dev],
1823                                               &pci->dev, GFP_KERNEL, card,
1824                                               azx_firmware_cb);
1825                 if (err < 0)
1826                         goto out_free;
1827                 schedule_probe = false; /* continued in azx_firmware_cb() */
1828         }
1829 #endif /* CONFIG_SND_HDA_PATCH_LOADER */
1830
1831 #ifndef CONFIG_SND_HDA_I915
1832         if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
1833                 dev_err(card->dev, "Haswell must build in CONFIG_SND_HDA_I915\n");
1834 #endif
1835
1836         if (schedule_probe)
1837                 schedule_work(&chip->probe_work);
1838
1839         dev++;
1840         if (chip->disabled)
1841                 complete_all(&chip->probe_wait);
1842         return 0;
1843
1844 out_free:
1845         snd_card_free(card);
1846         return err;
1847 }
1848
1849 /* number of codec slots for each chipset: 0 = default slots (i.e. 4) */
1850 static unsigned int azx_max_codecs[AZX_NUM_DRIVERS] = {
1851         [AZX_DRIVER_NVIDIA] = 8,
1852         [AZX_DRIVER_TERA] = 1,
1853 };
1854
1855 static int azx_probe_continue(struct azx *chip)
1856 {
1857         struct pci_dev *pci = chip->pci;
1858         int dev = chip->dev_index;
1859         int err;
1860
1861         /* Request power well for Haswell HDA controller and codec */
1862         if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) {
1863 #ifdef CONFIG_SND_HDA_I915
1864                 err = hda_i915_init();
1865                 if (err < 0) {
1866                         dev_err(chip->card->dev,
1867                                 "Error request power-well from i915\n");
1868                         goto out_free;
1869                 }
1870 #endif
1871                 hda_display_power(true);
1872         }
1873
1874         err = azx_first_init(chip);
1875         if (err < 0)
1876                 goto out_free;
1877
1878 #ifdef CONFIG_SND_HDA_INPUT_BEEP
1879         chip->beep_mode = beep_mode[dev];
1880 #endif
1881
1882         /* create codec instances */
1883         err = azx_codec_create(chip, model[dev],
1884                                azx_max_codecs[chip->driver_type],
1885                                power_save_addr);
1886
1887         if (err < 0)
1888                 goto out_free;
1889 #ifdef CONFIG_SND_HDA_PATCH_LOADER
1890         if (chip->fw) {
1891                 err = snd_hda_load_patch(chip->bus, chip->fw->size,
1892                                          chip->fw->data);
1893                 if (err < 0)
1894                         goto out_free;
1895 #ifndef CONFIG_PM
1896                 release_firmware(chip->fw); /* no longer needed */
1897                 chip->fw = NULL;
1898 #endif
1899         }
1900 #endif
1901         if ((probe_only[dev] & 1) == 0) {
1902                 err = azx_codec_configure(chip);
1903                 if (err < 0)
1904                         goto out_free;
1905         }
1906
1907         /* create PCM streams */
1908         err = snd_hda_build_pcms(chip->bus);
1909         if (err < 0)
1910                 goto out_free;
1911
1912         /* create mixer controls */
1913         err = azx_mixer_create(chip);
1914         if (err < 0)
1915                 goto out_free;
1916
1917         err = snd_card_register(chip->card);
1918         if (err < 0)
1919                 goto out_free;
1920
1921         chip->running = 1;
1922         power_down_all_codecs(chip);
1923         azx_notifier_register(chip);
1924         azx_add_card_list(chip);
1925         if ((chip->driver_caps & AZX_DCAPS_PM_RUNTIME) || chip->use_vga_switcheroo)
1926                 pm_runtime_put_noidle(&pci->dev);
1927
1928 out_free:
1929         if (err < 0)
1930                 chip->init_failed = 1;
1931         complete_all(&chip->probe_wait);
1932         return err;
1933 }
1934
1935 static void azx_remove(struct pci_dev *pci)
1936 {
1937         struct snd_card *card = pci_get_drvdata(pci);
1938
1939         if (card)
1940                 snd_card_free(card);
1941 }
1942
1943 /* PCI IDs */
1944 static DEFINE_PCI_DEVICE_TABLE(azx_ids) = {
1945         /* CPT */
1946         { PCI_DEVICE(0x8086, 0x1c20),
1947           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH_NOPM },
1948         /* PBG */
1949         { PCI_DEVICE(0x8086, 0x1d20),
1950           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH_NOPM },
1951         /* Panther Point */
1952         { PCI_DEVICE(0x8086, 0x1e20),
1953           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
1954         /* Lynx Point */
1955         { PCI_DEVICE(0x8086, 0x8c20),
1956           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
1957         /* Wellsburg */
1958         { PCI_DEVICE(0x8086, 0x8d20),
1959           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
1960         { PCI_DEVICE(0x8086, 0x8d21),
1961           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
1962         /* Lynx Point-LP */
1963         { PCI_DEVICE(0x8086, 0x9c20),
1964           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
1965         /* Lynx Point-LP */
1966         { PCI_DEVICE(0x8086, 0x9c21),
1967           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
1968         /* Wildcat Point-LP */
1969         { PCI_DEVICE(0x8086, 0x9ca0),
1970           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
1971         /* Haswell */
1972         { PCI_DEVICE(0x8086, 0x0a0c),
1973           .driver_data = AZX_DRIVER_HDMI | AZX_DCAPS_INTEL_HASWELL },
1974         { PCI_DEVICE(0x8086, 0x0c0c),
1975           .driver_data = AZX_DRIVER_HDMI | AZX_DCAPS_INTEL_HASWELL },
1976         { PCI_DEVICE(0x8086, 0x0d0c),
1977           .driver_data = AZX_DRIVER_HDMI | AZX_DCAPS_INTEL_HASWELL },
1978         /* Broadwell */
1979         { PCI_DEVICE(0x8086, 0x160c),
1980           .driver_data = AZX_DRIVER_HDMI | AZX_DCAPS_INTEL_HASWELL },
1981         /* 5 Series/3400 */
1982         { PCI_DEVICE(0x8086, 0x3b56),
1983           .driver_data = AZX_DRIVER_SCH | AZX_DCAPS_INTEL_PCH_NOPM },
1984         /* Poulsbo */
1985         { PCI_DEVICE(0x8086, 0x811b),
1986           .driver_data = AZX_DRIVER_SCH | AZX_DCAPS_INTEL_PCH_NOPM },
1987         /* Oaktrail */
1988         { PCI_DEVICE(0x8086, 0x080a),
1989           .driver_data = AZX_DRIVER_SCH | AZX_DCAPS_INTEL_PCH_NOPM },
1990         /* BayTrail */
1991         { PCI_DEVICE(0x8086, 0x0f04),
1992           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH_NOPM },
1993         /* ICH */
1994         { PCI_DEVICE(0x8086, 0x2668),
1995           .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_OLD_SSYNC |
1996           AZX_DCAPS_BUFSIZE },  /* ICH6 */
1997         { PCI_DEVICE(0x8086, 0x27d8),
1998           .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_OLD_SSYNC |
1999           AZX_DCAPS_BUFSIZE },  /* ICH7 */
2000         { PCI_DEVICE(0x8086, 0x269a),
2001           .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_OLD_SSYNC |
2002           AZX_DCAPS_BUFSIZE },  /* ESB2 */
2003         { PCI_DEVICE(0x8086, 0x284b),
2004           .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_OLD_SSYNC |
2005           AZX_DCAPS_BUFSIZE },  /* ICH8 */
2006         { PCI_DEVICE(0x8086, 0x293e),
2007           .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_OLD_SSYNC |
2008           AZX_DCAPS_BUFSIZE },  /* ICH9 */
2009         { PCI_DEVICE(0x8086, 0x293f),
2010           .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_OLD_SSYNC |
2011           AZX_DCAPS_BUFSIZE },  /* ICH9 */
2012         { PCI_DEVICE(0x8086, 0x3a3e),
2013           .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_OLD_SSYNC |
2014           AZX_DCAPS_BUFSIZE },  /* ICH10 */
2015         { PCI_DEVICE(0x8086, 0x3a6e),
2016           .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_OLD_SSYNC |
2017           AZX_DCAPS_BUFSIZE },  /* ICH10 */
2018         /* Generic Intel */
2019         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_ANY_ID),
2020           .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
2021           .class_mask = 0xffffff,
2022           .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_BUFSIZE },
2023         /* ATI SB 450/600/700/800/900 */
2024         { PCI_DEVICE(0x1002, 0x437b),
2025           .driver_data = AZX_DRIVER_ATI | AZX_DCAPS_PRESET_ATI_SB },
2026         { PCI_DEVICE(0x1002, 0x4383),
2027           .driver_data = AZX_DRIVER_ATI | AZX_DCAPS_PRESET_ATI_SB },
2028         /* AMD Hudson */
2029         { PCI_DEVICE(0x1022, 0x780d),
2030           .driver_data = AZX_DRIVER_GENERIC | AZX_DCAPS_PRESET_ATI_SB },
2031         /* ATI HDMI */
2032         { PCI_DEVICE(0x1002, 0x793b),
2033           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2034         { PCI_DEVICE(0x1002, 0x7919),
2035           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2036         { PCI_DEVICE(0x1002, 0x960f),
2037           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2038         { PCI_DEVICE(0x1002, 0x970f),
2039           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2040         { PCI_DEVICE(0x1002, 0xaa00),
2041           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2042         { PCI_DEVICE(0x1002, 0xaa08),
2043           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2044         { PCI_DEVICE(0x1002, 0xaa10),
2045           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2046         { PCI_DEVICE(0x1002, 0xaa18),
2047           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2048         { PCI_DEVICE(0x1002, 0xaa20),
2049           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2050         { PCI_DEVICE(0x1002, 0xaa28),
2051           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2052         { PCI_DEVICE(0x1002, 0xaa30),
2053           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2054         { PCI_DEVICE(0x1002, 0xaa38),
2055           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2056         { PCI_DEVICE(0x1002, 0xaa40),
2057           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2058         { PCI_DEVICE(0x1002, 0xaa48),
2059           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2060         { PCI_DEVICE(0x1002, 0xaa50),
2061           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2062         { PCI_DEVICE(0x1002, 0xaa58),
2063           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2064         { PCI_DEVICE(0x1002, 0xaa60),
2065           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2066         { PCI_DEVICE(0x1002, 0xaa68),
2067           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2068         { PCI_DEVICE(0x1002, 0xaa80),
2069           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2070         { PCI_DEVICE(0x1002, 0xaa88),
2071           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2072         { PCI_DEVICE(0x1002, 0xaa90),
2073           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2074         { PCI_DEVICE(0x1002, 0xaa98),
2075           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2076         { PCI_DEVICE(0x1002, 0x9902),
2077           .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI },
2078         { PCI_DEVICE(0x1002, 0xaaa0),
2079           .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI },
2080         { PCI_DEVICE(0x1002, 0xaaa8),
2081           .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI },
2082         { PCI_DEVICE(0x1002, 0xaab0),
2083           .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI },
2084         /* VIA VT8251/VT8237A */
2085         { PCI_DEVICE(0x1106, 0x3288),
2086           .driver_data = AZX_DRIVER_VIA | AZX_DCAPS_POSFIX_VIA },
2087         /* VIA GFX VT7122/VX900 */
2088         { PCI_DEVICE(0x1106, 0x9170), .driver_data = AZX_DRIVER_GENERIC },
2089         /* VIA GFX VT6122/VX11 */
2090         { PCI_DEVICE(0x1106, 0x9140), .driver_data = AZX_DRIVER_GENERIC },
2091         /* SIS966 */
2092         { PCI_DEVICE(0x1039, 0x7502), .driver_data = AZX_DRIVER_SIS },
2093         /* ULI M5461 */
2094         { PCI_DEVICE(0x10b9, 0x5461), .driver_data = AZX_DRIVER_ULI },
2095         /* NVIDIA MCP */
2096         { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
2097           .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
2098           .class_mask = 0xffffff,
2099           .driver_data = AZX_DRIVER_NVIDIA | AZX_DCAPS_PRESET_NVIDIA },
2100         /* Teradici */
2101         { PCI_DEVICE(0x6549, 0x1200),
2102           .driver_data = AZX_DRIVER_TERA | AZX_DCAPS_NO_64BIT },
2103         { PCI_DEVICE(0x6549, 0x2200),
2104           .driver_data = AZX_DRIVER_TERA | AZX_DCAPS_NO_64BIT },
2105         /* Creative X-Fi (CA0110-IBG) */
2106         /* CTHDA chips */
2107         { PCI_DEVICE(0x1102, 0x0010),
2108           .driver_data = AZX_DRIVER_CTHDA | AZX_DCAPS_PRESET_CTHDA },
2109         { PCI_DEVICE(0x1102, 0x0012),
2110           .driver_data = AZX_DRIVER_CTHDA | AZX_DCAPS_PRESET_CTHDA },
2111 #if !IS_ENABLED(CONFIG_SND_CTXFI)
2112         /* the following entry conflicts with snd-ctxfi driver,
2113          * as ctxfi driver mutates from HD-audio to native mode with
2114          * a special command sequence.
2115          */
2116         { PCI_DEVICE(PCI_VENDOR_ID_CREATIVE, PCI_ANY_ID),
2117           .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
2118           .class_mask = 0xffffff,
2119           .driver_data = AZX_DRIVER_CTX | AZX_DCAPS_CTX_WORKAROUND |
2120           AZX_DCAPS_RIRB_PRE_DELAY | AZX_DCAPS_POSFIX_LPIB },
2121 #else
2122         /* this entry seems still valid -- i.e. without emu20kx chip */
2123         { PCI_DEVICE(0x1102, 0x0009),
2124           .driver_data = AZX_DRIVER_CTX | AZX_DCAPS_CTX_WORKAROUND |
2125           AZX_DCAPS_RIRB_PRE_DELAY | AZX_DCAPS_POSFIX_LPIB },
2126 #endif
2127         /* Vortex86MX */
2128         { PCI_DEVICE(0x17f3, 0x3010), .driver_data = AZX_DRIVER_GENERIC },
2129         /* VMware HDAudio */
2130         { PCI_DEVICE(0x15ad, 0x1977), .driver_data = AZX_DRIVER_GENERIC },
2131         /* AMD/ATI Generic, PCI class code and Vendor ID for HD Audio */
2132         { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_ANY_ID),
2133           .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
2134           .class_mask = 0xffffff,
2135           .driver_data = AZX_DRIVER_GENERIC | AZX_DCAPS_PRESET_ATI_HDMI },
2136         { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_ANY_ID),
2137           .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
2138           .class_mask = 0xffffff,
2139           .driver_data = AZX_DRIVER_GENERIC | AZX_DCAPS_PRESET_ATI_HDMI },
2140         { 0, }
2141 };
2142 MODULE_DEVICE_TABLE(pci, azx_ids);
2143
2144 /* pci_driver definition */
2145 static struct pci_driver azx_driver = {
2146         .name = KBUILD_MODNAME,
2147         .id_table = azx_ids,
2148         .probe = azx_probe,
2149         .remove = azx_remove,
2150         .driver = {
2151                 .pm = AZX_PM_OPS,
2152         },
2153 };
2154
2155 module_pci_driver(azx_driver);