3 * hda_intel.c - Implementation of primary alsa driver code base
6 * Copyright(c) 2004 Intel Corporation. All rights reserved.
8 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
9 * PeiSen Hou <pshou@realtek.com.tw>
11 * This program is free software; you can redistribute it and/or modify it
12 * under the terms of the GNU General Public License as published by the Free
13 * Software Foundation; either version 2 of the License, or (at your option)
16 * This program is distributed in the hope that it will be useful, but WITHOUT
17 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
18 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
21 * You should have received a copy of the GNU General Public License along with
22 * this program; if not, write to the Free Software Foundation, Inc., 59
23 * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
27 * Matt Jared matt.jared@intel.com
28 * Andy Kopp andy.kopp@intel.com
29 * Dan Kogan dan.d.kogan@intel.com
33 * 2004.12.01 Major rewrite by tiwai, merged the work of pshou
37 #include <linux/delay.h>
38 #include <linux/interrupt.h>
39 #include <linux/kernel.h>
40 #include <linux/module.h>
41 #include <linux/dma-mapping.h>
42 #include <linux/moduleparam.h>
43 #include <linux/init.h>
44 #include <linux/slab.h>
45 #include <linux/pci.h>
46 #include <linux/mutex.h>
48 #include <linux/pm_runtime.h>
49 #include <linux/clocksource.h>
50 #include <linux/time.h>
51 #include <linux/completion.h>
54 /* for snoop control */
55 #include <asm/pgtable.h>
56 #include <asm/cacheflush.h>
58 #include <sound/core.h>
59 #include <sound/initval.h>
60 #include <linux/vgaarb.h>
61 #include <linux/vga_switcheroo.h>
62 #include <linux/firmware.h>
63 #include "hda_codec.h"
64 #include "hda_controller.h"
65 #include "hda_intel.h"
67 /* position fix mode */
76 /* Defines for ATI HD Audio support in SB450 south bridge */
77 #define ATI_SB450_HDAUDIO_MISC_CNTR2_ADDR 0x42
78 #define ATI_SB450_HDAUDIO_ENABLE_SNOOP 0x02
80 /* Defines for Nvidia HDA support */
81 #define NVIDIA_HDA_TRANSREG_ADDR 0x4e
82 #define NVIDIA_HDA_ENABLE_COHBITS 0x0f
83 #define NVIDIA_HDA_ISTRM_COH 0x4d
84 #define NVIDIA_HDA_OSTRM_COH 0x4c
85 #define NVIDIA_HDA_ENABLE_COHBIT 0x01
87 /* Defines for Intel SCH HDA snoop control */
88 #define INTEL_SCH_HDA_DEVC 0x78
89 #define INTEL_SCH_HDA_DEVC_NOSNOOP (0x1<<11)
91 /* Define IN stream 0 FIFO size offset in VIA controller */
92 #define VIA_IN_STREAM0_FIFO_SIZE_OFFSET 0x90
93 /* Define VIA HD Audio Device ID*/
94 #define VIA_HDAC_DEVICE_ID 0x3288
96 /* max number of SDs */
97 /* ICH, ATI and VIA have 4 playback and 4 capture */
98 #define ICH6_NUM_CAPTURE 4
99 #define ICH6_NUM_PLAYBACK 4
101 /* ULI has 6 playback and 5 capture */
102 #define ULI_NUM_CAPTURE 5
103 #define ULI_NUM_PLAYBACK 6
105 /* ATI HDMI may have up to 8 playbacks and 0 capture */
106 #define ATIHDMI_NUM_CAPTURE 0
107 #define ATIHDMI_NUM_PLAYBACK 8
109 /* TERA has 4 playback and 3 capture */
110 #define TERA_NUM_CAPTURE 3
111 #define TERA_NUM_PLAYBACK 4
114 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
115 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
116 static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
117 static char *model[SNDRV_CARDS];
118 static int position_fix[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = -1};
119 static int bdl_pos_adj[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = -1};
120 static int probe_mask[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = -1};
121 static int probe_only[SNDRV_CARDS];
122 static int jackpoll_ms[SNDRV_CARDS];
123 static bool single_cmd;
124 static int enable_msi = -1;
125 #ifdef CONFIG_SND_HDA_PATCH_LOADER
126 static char *patch[SNDRV_CARDS];
128 #ifdef CONFIG_SND_HDA_INPUT_BEEP
129 static bool beep_mode[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] =
130 CONFIG_SND_HDA_INPUT_BEEP_MODE};
133 module_param_array(index, int, NULL, 0444);
134 MODULE_PARM_DESC(index, "Index value for Intel HD audio interface.");
135 module_param_array(id, charp, NULL, 0444);
136 MODULE_PARM_DESC(id, "ID string for Intel HD audio interface.");
137 module_param_array(enable, bool, NULL, 0444);
138 MODULE_PARM_DESC(enable, "Enable Intel HD audio interface.");
139 module_param_array(model, charp, NULL, 0444);
140 MODULE_PARM_DESC(model, "Use the given board model.");
141 module_param_array(position_fix, int, NULL, 0444);
142 MODULE_PARM_DESC(position_fix, "DMA pointer read method."
143 "(-1 = system default, 0 = auto, 1 = LPIB, 2 = POSBUF, 3 = VIACOMBO, 4 = COMBO).");
144 module_param_array(bdl_pos_adj, int, NULL, 0644);
145 MODULE_PARM_DESC(bdl_pos_adj, "BDL position adjustment offset.");
146 module_param_array(probe_mask, int, NULL, 0444);
147 MODULE_PARM_DESC(probe_mask, "Bitmask to probe codecs (default = -1).");
148 module_param_array(probe_only, int, NULL, 0444);
149 MODULE_PARM_DESC(probe_only, "Only probing and no codec initialization.");
150 module_param_array(jackpoll_ms, int, NULL, 0444);
151 MODULE_PARM_DESC(jackpoll_ms, "Ms between polling for jack events (default = 0, using unsol events only)");
152 module_param(single_cmd, bool, 0444);
153 MODULE_PARM_DESC(single_cmd, "Use single command to communicate with codecs "
154 "(for debugging only).");
155 module_param(enable_msi, bint, 0444);
156 MODULE_PARM_DESC(enable_msi, "Enable Message Signaled Interrupt (MSI)");
157 #ifdef CONFIG_SND_HDA_PATCH_LOADER
158 module_param_array(patch, charp, NULL, 0444);
159 MODULE_PARM_DESC(patch, "Patch file for Intel HD audio interface.");
161 #ifdef CONFIG_SND_HDA_INPUT_BEEP
162 module_param_array(beep_mode, bool, NULL, 0444);
163 MODULE_PARM_DESC(beep_mode, "Select HDA Beep registration mode "
164 "(0=off, 1=on) (default=1).");
168 static int param_set_xint(const char *val, const struct kernel_param *kp);
169 static struct kernel_param_ops param_ops_xint = {
170 .set = param_set_xint,
171 .get = param_get_int,
173 #define param_check_xint param_check_int
175 static int power_save = CONFIG_SND_HDA_POWER_SAVE_DEFAULT;
176 module_param(power_save, xint, 0644);
177 MODULE_PARM_DESC(power_save, "Automatic power-saving timeout "
178 "(in second, 0 = disable).");
180 /* reset the HD-audio controller in power save mode.
181 * this may give more power-saving, but will take longer time to
184 static bool power_save_controller = 1;
185 module_param(power_save_controller, bool, 0644);
186 MODULE_PARM_DESC(power_save_controller, "Reset controller in power save mode.");
189 #endif /* CONFIG_PM */
191 static int align_buffer_size = -1;
192 module_param(align_buffer_size, bint, 0644);
193 MODULE_PARM_DESC(align_buffer_size,
194 "Force buffer and period sizes to be multiple of 128 bytes.");
197 static int hda_snoop = -1;
198 module_param_named(snoop, hda_snoop, bint, 0444);
199 MODULE_PARM_DESC(snoop, "Enable/disable snooping");
201 #define hda_snoop true
205 MODULE_LICENSE("GPL");
206 MODULE_SUPPORTED_DEVICE("{{Intel, ICH6},"
240 MODULE_DESCRIPTION("Intel HDA driver");
242 #if defined(CONFIG_PM) && defined(CONFIG_VGA_SWITCHEROO)
243 #if IS_ENABLED(CONFIG_SND_HDA_CODEC_HDMI)
244 #define SUPPORT_VGA_SWITCHEROO
260 AZX_DRIVER_ATIHDMI_NS,
270 AZX_NUM_DRIVERS, /* keep this as last entry */
273 #define azx_get_snoop_type(chip) \
274 (((chip)->driver_caps & AZX_DCAPS_SNOOP_MASK) >> 10)
275 #define AZX_DCAPS_SNOOP_TYPE(type) ((AZX_SNOOP_TYPE_ ## type) << 10)
277 /* quirks for old Intel chipsets */
278 #define AZX_DCAPS_INTEL_ICH \
279 (AZX_DCAPS_OLD_SSYNC | AZX_DCAPS_NO_ALIGN_BUFSIZE)
281 /* quirks for Intel PCH */
282 #define AZX_DCAPS_INTEL_PCH_NOPM \
283 (AZX_DCAPS_NO_ALIGN_BUFSIZE | AZX_DCAPS_COUNT_LPIB_DELAY |\
284 AZX_DCAPS_REVERSE_ASSIGN | AZX_DCAPS_SNOOP_TYPE(SCH))
286 #define AZX_DCAPS_INTEL_PCH \
287 (AZX_DCAPS_INTEL_PCH_NOPM | AZX_DCAPS_PM_RUNTIME)
289 #define AZX_DCAPS_INTEL_HASWELL \
290 (/*AZX_DCAPS_ALIGN_BUFSIZE |*/ AZX_DCAPS_COUNT_LPIB_DELAY |\
291 AZX_DCAPS_PM_RUNTIME | AZX_DCAPS_I915_POWERWELL |\
292 AZX_DCAPS_SNOOP_TYPE(SCH))
294 /* Broadwell HDMI can't use position buffer reliably, force to use LPIB */
295 #define AZX_DCAPS_INTEL_BROADWELL \
296 (/*AZX_DCAPS_ALIGN_BUFSIZE |*/ AZX_DCAPS_POSFIX_LPIB |\
297 AZX_DCAPS_PM_RUNTIME | AZX_DCAPS_I915_POWERWELL |\
298 AZX_DCAPS_SNOOP_TYPE(SCH))
300 #define AZX_DCAPS_INTEL_BAYTRAIL \
301 (AZX_DCAPS_INTEL_PCH_NOPM | AZX_DCAPS_I915_POWERWELL)
303 #define AZX_DCAPS_INTEL_BRASWELL \
304 (AZX_DCAPS_INTEL_PCH | AZX_DCAPS_I915_POWERWELL)
306 #define AZX_DCAPS_INTEL_SKYLAKE \
307 (AZX_DCAPS_INTEL_PCH | AZX_DCAPS_SEPARATE_STREAM_TAG |\
308 AZX_DCAPS_I915_POWERWELL)
310 /* quirks for ATI SB / AMD Hudson */
311 #define AZX_DCAPS_PRESET_ATI_SB \
312 (AZX_DCAPS_NO_TCSEL | AZX_DCAPS_SYNC_WRITE | AZX_DCAPS_POSFIX_LPIB |\
313 AZX_DCAPS_SNOOP_TYPE(ATI))
315 /* quirks for ATI/AMD HDMI */
316 #define AZX_DCAPS_PRESET_ATI_HDMI \
317 (AZX_DCAPS_NO_TCSEL | AZX_DCAPS_SYNC_WRITE | AZX_DCAPS_POSFIX_LPIB|\
320 /* quirks for ATI HDMI with snoop off */
321 #define AZX_DCAPS_PRESET_ATI_HDMI_NS \
322 (AZX_DCAPS_PRESET_ATI_HDMI | AZX_DCAPS_SNOOP_OFF)
324 /* quirks for Nvidia */
325 #define AZX_DCAPS_PRESET_NVIDIA \
326 (AZX_DCAPS_RIRB_DELAY | AZX_DCAPS_NO_MSI | /*AZX_DCAPS_ALIGN_BUFSIZE |*/ \
327 AZX_DCAPS_NO_64BIT | AZX_DCAPS_CORBRP_SELF_CLEAR |\
328 AZX_DCAPS_SNOOP_TYPE(NVIDIA))
330 #define AZX_DCAPS_PRESET_CTHDA \
331 (AZX_DCAPS_NO_MSI | AZX_DCAPS_POSFIX_LPIB |\
332 AZX_DCAPS_4K_BDLE_BOUNDARY | AZX_DCAPS_SNOOP_OFF)
335 * VGA-switcher support
337 #ifdef SUPPORT_VGA_SWITCHEROO
338 #define use_vga_switcheroo(chip) ((chip)->use_vga_switcheroo)
340 #define use_vga_switcheroo(chip) 0
343 #define CONTROLLER_IN_GPU(pci) (((pci)->device == 0x0a0c) || \
344 ((pci)->device == 0x0c0c) || \
345 ((pci)->device == 0x0d0c) || \
346 ((pci)->device == 0x160c))
348 static char *driver_short_names[] = {
349 [AZX_DRIVER_ICH] = "HDA Intel",
350 [AZX_DRIVER_PCH] = "HDA Intel PCH",
351 [AZX_DRIVER_SCH] = "HDA Intel MID",
352 [AZX_DRIVER_HDMI] = "HDA Intel HDMI",
353 [AZX_DRIVER_ATI] = "HDA ATI SB",
354 [AZX_DRIVER_ATIHDMI] = "HDA ATI HDMI",
355 [AZX_DRIVER_ATIHDMI_NS] = "HDA ATI HDMI",
356 [AZX_DRIVER_VIA] = "HDA VIA VT82xx",
357 [AZX_DRIVER_SIS] = "HDA SIS966",
358 [AZX_DRIVER_ULI] = "HDA ULI M5461",
359 [AZX_DRIVER_NVIDIA] = "HDA NVidia",
360 [AZX_DRIVER_TERA] = "HDA Teradici",
361 [AZX_DRIVER_CTX] = "HDA Creative",
362 [AZX_DRIVER_CTHDA] = "HDA Creative",
363 [AZX_DRIVER_CMEDIA] = "HDA C-Media",
364 [AZX_DRIVER_GENERIC] = "HD-Audio Generic",
368 static void __mark_pages_wc(struct azx *chip, struct snd_dma_buffer *dmab, bool on)
374 if (!dmab || !dmab->area || !dmab->bytes)
377 #ifdef CONFIG_SND_DMA_SGBUF
378 if (dmab->dev.type == SNDRV_DMA_TYPE_DEV_SG) {
379 struct snd_sg_buf *sgbuf = dmab->private_data;
380 if (chip->driver_type == AZX_DRIVER_CMEDIA)
381 return; /* deal with only CORB/RIRB buffers */
383 set_pages_array_wc(sgbuf->page_table, sgbuf->pages);
385 set_pages_array_wb(sgbuf->page_table, sgbuf->pages);
390 pages = (dmab->bytes + PAGE_SIZE - 1) >> PAGE_SHIFT;
392 set_memory_wc((unsigned long)dmab->area, pages);
394 set_memory_wb((unsigned long)dmab->area, pages);
397 static inline void mark_pages_wc(struct azx *chip, struct snd_dma_buffer *buf,
400 __mark_pages_wc(chip, buf, on);
402 static inline void mark_runtime_wc(struct azx *chip, struct azx_dev *azx_dev,
403 struct snd_pcm_substream *substream, bool on)
405 if (azx_dev->wc_marked != on) {
406 __mark_pages_wc(chip, snd_pcm_get_dma_buf(substream), on);
407 azx_dev->wc_marked = on;
411 /* NOP for other archs */
412 static inline void mark_pages_wc(struct azx *chip, struct snd_dma_buffer *buf,
416 static inline void mark_runtime_wc(struct azx *chip, struct azx_dev *azx_dev,
417 struct snd_pcm_substream *substream, bool on)
422 static int azx_acquire_irq(struct azx *chip, int do_disconnect);
425 * initialize the PCI registers
427 /* update bits in a PCI register byte */
428 static void update_pci_byte(struct pci_dev *pci, unsigned int reg,
429 unsigned char mask, unsigned char val)
433 pci_read_config_byte(pci, reg, &data);
435 data |= (val & mask);
436 pci_write_config_byte(pci, reg, data);
439 static void azx_init_pci(struct azx *chip)
441 int snoop_type = azx_get_snoop_type(chip);
443 /* Clear bits 0-2 of PCI register TCSEL (at offset 0x44)
444 * TCSEL == Traffic Class Select Register, which sets PCI express QOS
445 * Ensuring these bits are 0 clears playback static on some HD Audio
447 * The PCI register TCSEL is defined in the Intel manuals.
449 if (!(chip->driver_caps & AZX_DCAPS_NO_TCSEL)) {
450 dev_dbg(chip->card->dev, "Clearing TCSEL\n");
451 update_pci_byte(chip->pci, AZX_PCIREG_TCSEL, 0x07, 0);
454 /* For ATI SB450/600/700/800/900 and AMD Hudson azalia HD audio,
455 * we need to enable snoop.
457 if (snoop_type == AZX_SNOOP_TYPE_ATI) {
458 dev_dbg(chip->card->dev, "Setting ATI snoop: %d\n",
460 update_pci_byte(chip->pci,
461 ATI_SB450_HDAUDIO_MISC_CNTR2_ADDR, 0x07,
462 azx_snoop(chip) ? ATI_SB450_HDAUDIO_ENABLE_SNOOP : 0);
465 /* For NVIDIA HDA, enable snoop */
466 if (snoop_type == AZX_SNOOP_TYPE_NVIDIA) {
467 dev_dbg(chip->card->dev, "Setting Nvidia snoop: %d\n",
469 update_pci_byte(chip->pci,
470 NVIDIA_HDA_TRANSREG_ADDR,
471 0x0f, NVIDIA_HDA_ENABLE_COHBITS);
472 update_pci_byte(chip->pci,
473 NVIDIA_HDA_ISTRM_COH,
474 0x01, NVIDIA_HDA_ENABLE_COHBIT);
475 update_pci_byte(chip->pci,
476 NVIDIA_HDA_OSTRM_COH,
477 0x01, NVIDIA_HDA_ENABLE_COHBIT);
480 /* Enable SCH/PCH snoop if needed */
481 if (snoop_type == AZX_SNOOP_TYPE_SCH) {
482 unsigned short snoop;
483 pci_read_config_word(chip->pci, INTEL_SCH_HDA_DEVC, &snoop);
484 if ((!azx_snoop(chip) && !(snoop & INTEL_SCH_HDA_DEVC_NOSNOOP)) ||
485 (azx_snoop(chip) && (snoop & INTEL_SCH_HDA_DEVC_NOSNOOP))) {
486 snoop &= ~INTEL_SCH_HDA_DEVC_NOSNOOP;
487 if (!azx_snoop(chip))
488 snoop |= INTEL_SCH_HDA_DEVC_NOSNOOP;
489 pci_write_config_word(chip->pci, INTEL_SCH_HDA_DEVC, snoop);
490 pci_read_config_word(chip->pci,
491 INTEL_SCH_HDA_DEVC, &snoop);
493 dev_dbg(chip->card->dev, "SCH snoop: %s\n",
494 (snoop & INTEL_SCH_HDA_DEVC_NOSNOOP) ?
495 "Disabled" : "Enabled");
499 /* calculate runtime delay from LPIB */
500 static int azx_get_delay_from_lpib(struct azx *chip, struct azx_dev *azx_dev,
503 struct snd_pcm_substream *substream = azx_dev->substream;
504 int stream = substream->stream;
505 unsigned int lpib_pos = azx_get_pos_lpib(chip, azx_dev);
508 if (stream == SNDRV_PCM_STREAM_PLAYBACK)
509 delay = pos - lpib_pos;
511 delay = lpib_pos - pos;
513 if (delay >= azx_dev->delay_negative_threshold)
516 delay += azx_dev->bufsize;
519 if (delay >= azx_dev->period_bytes) {
520 dev_info(chip->card->dev,
521 "Unstable LPIB (%d >= %d); disabling LPIB delay counting\n",
522 delay, azx_dev->period_bytes);
524 chip->driver_caps &= ~AZX_DCAPS_COUNT_LPIB_DELAY;
525 chip->get_delay[stream] = NULL;
528 return bytes_to_frames(substream->runtime, delay);
531 static int azx_position_ok(struct azx *chip, struct azx_dev *azx_dev);
533 /* called from IRQ */
534 static int azx_position_check(struct azx *chip, struct azx_dev *azx_dev)
536 struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
539 ok = azx_position_ok(chip, azx_dev);
541 azx_dev->irq_pending = 0;
543 } else if (ok == 0) {
544 /* bogus IRQ, process it later */
545 azx_dev->irq_pending = 1;
546 schedule_work(&hda->irq_pending_work);
552 * Check whether the current DMA position is acceptable for updating
553 * periods. Returns non-zero if it's OK.
555 * Many HD-audio controllers appear pretty inaccurate about
556 * the update-IRQ timing. The IRQ is issued before actually the
557 * data is processed. So, we need to process it afterwords in a
560 static int azx_position_ok(struct azx *chip, struct azx_dev *azx_dev)
562 struct snd_pcm_substream *substream = azx_dev->substream;
563 int stream = substream->stream;
567 wallclk = azx_readl(chip, WALLCLK) - azx_dev->start_wallclk;
568 if (wallclk < (azx_dev->period_wallclk * 2) / 3)
569 return -1; /* bogus (too early) interrupt */
571 if (chip->get_position[stream])
572 pos = chip->get_position[stream](chip, azx_dev);
573 else { /* use the position buffer as default */
574 pos = azx_get_pos_posbuf(chip, azx_dev);
575 if (!pos || pos == (u32)-1) {
576 dev_info(chip->card->dev,
577 "Invalid position buffer, using LPIB read method instead.\n");
578 chip->get_position[stream] = azx_get_pos_lpib;
579 pos = azx_get_pos_lpib(chip, azx_dev);
580 chip->get_delay[stream] = NULL;
582 chip->get_position[stream] = azx_get_pos_posbuf;
583 if (chip->driver_caps & AZX_DCAPS_COUNT_LPIB_DELAY)
584 chip->get_delay[stream] = azx_get_delay_from_lpib;
588 if (pos >= azx_dev->bufsize)
591 if (WARN_ONCE(!azx_dev->period_bytes,
592 "hda-intel: zero azx_dev->period_bytes"))
593 return -1; /* this shouldn't happen! */
594 if (wallclk < (azx_dev->period_wallclk * 5) / 4 &&
595 pos % azx_dev->period_bytes > azx_dev->period_bytes / 2)
596 /* NG - it's below the first next period boundary */
597 return chip->bdl_pos_adj[chip->dev_index] ? 0 : -1;
598 azx_dev->start_wallclk += wallclk;
599 return 1; /* OK, it's fine */
603 * The work for pending PCM period updates.
605 static void azx_irq_pending_work(struct work_struct *work)
607 struct hda_intel *hda = container_of(work, struct hda_intel, irq_pending_work);
608 struct azx *chip = &hda->chip;
611 if (!hda->irq_pending_warned) {
612 dev_info(chip->card->dev,
613 "IRQ timing workaround is activated for card #%d. Suggest a bigger bdl_pos_adj.\n",
615 hda->irq_pending_warned = 1;
620 spin_lock_irq(&chip->reg_lock);
621 for (i = 0; i < chip->num_streams; i++) {
622 struct azx_dev *azx_dev = &chip->azx_dev[i];
623 if (!azx_dev->irq_pending ||
624 !azx_dev->substream ||
627 ok = azx_position_ok(chip, azx_dev);
629 azx_dev->irq_pending = 0;
630 spin_unlock(&chip->reg_lock);
631 snd_pcm_period_elapsed(azx_dev->substream);
632 spin_lock(&chip->reg_lock);
634 pending = 0; /* too early */
638 spin_unlock_irq(&chip->reg_lock);
645 /* clear irq_pending flags and assure no on-going workq */
646 static void azx_clear_irq_pending(struct azx *chip)
650 spin_lock_irq(&chip->reg_lock);
651 for (i = 0; i < chip->num_streams; i++)
652 chip->azx_dev[i].irq_pending = 0;
653 spin_unlock_irq(&chip->reg_lock);
656 static int azx_acquire_irq(struct azx *chip, int do_disconnect)
658 if (request_irq(chip->pci->irq, azx_interrupt,
659 chip->msi ? 0 : IRQF_SHARED,
660 KBUILD_MODNAME, chip)) {
661 dev_err(chip->card->dev,
662 "unable to grab IRQ %d, disabling device\n",
665 snd_card_disconnect(chip->card);
668 chip->irq = chip->pci->irq;
669 pci_intx(chip->pci, !chip->msi);
673 /* get the current DMA position with correction on VIA chips */
674 static unsigned int azx_via_get_position(struct azx *chip,
675 struct azx_dev *azx_dev)
677 unsigned int link_pos, mini_pos, bound_pos;
678 unsigned int mod_link_pos, mod_dma_pos, mod_mini_pos;
679 unsigned int fifo_size;
681 link_pos = azx_sd_readl(chip, azx_dev, SD_LPIB);
682 if (azx_dev->substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
683 /* Playback, no problem using link position */
689 * use mod to get the DMA position just like old chipset
691 mod_dma_pos = le32_to_cpu(*azx_dev->posbuf);
692 mod_dma_pos %= azx_dev->period_bytes;
694 /* azx_dev->fifo_size can't get FIFO size of in stream.
695 * Get from base address + offset.
697 fifo_size = readw(chip->remap_addr + VIA_IN_STREAM0_FIFO_SIZE_OFFSET);
699 if (azx_dev->insufficient) {
700 /* Link position never gather than FIFO size */
701 if (link_pos <= fifo_size)
704 azx_dev->insufficient = 0;
707 if (link_pos <= fifo_size)
708 mini_pos = azx_dev->bufsize + link_pos - fifo_size;
710 mini_pos = link_pos - fifo_size;
712 /* Find nearest previous boudary */
713 mod_mini_pos = mini_pos % azx_dev->period_bytes;
714 mod_link_pos = link_pos % azx_dev->period_bytes;
715 if (mod_link_pos >= fifo_size)
716 bound_pos = link_pos - mod_link_pos;
717 else if (mod_dma_pos >= mod_mini_pos)
718 bound_pos = mini_pos - mod_mini_pos;
720 bound_pos = mini_pos - mod_mini_pos + azx_dev->period_bytes;
721 if (bound_pos >= azx_dev->bufsize)
725 /* Calculate real DMA position we want */
726 return bound_pos + mod_dma_pos;
730 static DEFINE_MUTEX(card_list_lock);
731 static LIST_HEAD(card_list);
733 static void azx_add_card_list(struct azx *chip)
735 struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
736 mutex_lock(&card_list_lock);
737 list_add(&hda->list, &card_list);
738 mutex_unlock(&card_list_lock);
741 static void azx_del_card_list(struct azx *chip)
743 struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
744 mutex_lock(&card_list_lock);
745 list_del_init(&hda->list);
746 mutex_unlock(&card_list_lock);
749 /* trigger power-save check at writing parameter */
750 static int param_set_xint(const char *val, const struct kernel_param *kp)
752 struct hda_intel *hda;
754 int prev = power_save;
755 int ret = param_set_int(val, kp);
757 if (ret || prev == power_save)
760 mutex_lock(&card_list_lock);
761 list_for_each_entry(hda, &card_list, list) {
763 if (!chip->bus || chip->disabled)
765 snd_hda_set_power_save(chip->bus, power_save * 1000);
767 mutex_unlock(&card_list_lock);
771 #define azx_add_card_list(chip) /* NOP */
772 #define azx_del_card_list(chip) /* NOP */
773 #endif /* CONFIG_PM */
775 #if defined(CONFIG_PM_SLEEP) || defined(SUPPORT_VGA_SWITCHEROO)
779 static int azx_suspend(struct device *dev)
781 struct snd_card *card = dev_get_drvdata(dev);
783 struct hda_intel *hda;
788 chip = card->private_data;
789 hda = container_of(chip, struct hda_intel, chip);
790 if (chip->disabled || hda->init_failed)
793 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
794 azx_clear_irq_pending(chip);
796 azx_enter_link_reset(chip);
797 if (chip->irq >= 0) {
798 free_irq(chip->irq, chip);
803 pci_disable_msi(chip->pci);
804 if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
805 hda_display_power(hda, false);
809 static int azx_resume(struct device *dev)
811 struct pci_dev *pci = to_pci_dev(dev);
812 struct snd_card *card = dev_get_drvdata(dev);
814 struct hda_intel *hda;
819 chip = card->private_data;
820 hda = container_of(chip, struct hda_intel, chip);
821 if (chip->disabled || hda->init_failed)
824 if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) {
825 hda_display_power(hda, true);
826 haswell_set_bclk(hda);
829 if (pci_enable_msi(pci) < 0)
831 if (azx_acquire_irq(chip, 1) < 0)
835 azx_init_chip(chip, true);
837 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
840 #endif /* CONFIG_PM_SLEEP || SUPPORT_VGA_SWITCHEROO */
843 static int azx_runtime_suspend(struct device *dev)
845 struct snd_card *card = dev_get_drvdata(dev);
847 struct hda_intel *hda;
852 chip = card->private_data;
853 hda = container_of(chip, struct hda_intel, chip);
854 if (chip->disabled || hda->init_failed)
857 if (!azx_has_pm_runtime(chip))
860 /* enable controller wake up event */
861 azx_writew(chip, WAKEEN, azx_readw(chip, WAKEEN) |
865 azx_enter_link_reset(chip);
866 azx_clear_irq_pending(chip);
867 if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
868 hda_display_power(hda, false);
873 static int azx_runtime_resume(struct device *dev)
875 struct snd_card *card = dev_get_drvdata(dev);
877 struct hda_intel *hda;
879 struct hda_codec *codec;
885 chip = card->private_data;
886 hda = container_of(chip, struct hda_intel, chip);
887 if (chip->disabled || hda->init_failed)
890 if (!azx_has_pm_runtime(chip))
893 if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) {
894 hda_display_power(hda, true);
895 haswell_set_bclk(hda);
898 /* Read STATESTS before controller reset */
899 status = azx_readw(chip, STATESTS);
902 azx_init_chip(chip, true);
906 list_for_each_codec(codec, bus)
907 if (status & (1 << codec->addr))
908 schedule_delayed_work(&codec->jackpoll_work,
909 codec->jackpoll_interval);
912 /* disable controller Wake Up event*/
913 azx_writew(chip, WAKEEN, azx_readw(chip, WAKEEN) &
919 static int azx_runtime_idle(struct device *dev)
921 struct snd_card *card = dev_get_drvdata(dev);
923 struct hda_intel *hda;
928 chip = card->private_data;
929 hda = container_of(chip, struct hda_intel, chip);
930 if (chip->disabled || hda->init_failed)
933 if (!power_save_controller || !azx_has_pm_runtime(chip) ||
934 chip->bus->core.codec_powered)
940 static const struct dev_pm_ops azx_pm = {
941 SET_SYSTEM_SLEEP_PM_OPS(azx_suspend, azx_resume)
942 SET_RUNTIME_PM_OPS(azx_runtime_suspend, azx_runtime_resume, azx_runtime_idle)
945 #define AZX_PM_OPS &azx_pm
947 #define AZX_PM_OPS NULL
948 #endif /* CONFIG_PM */
951 static int azx_probe_continue(struct azx *chip);
953 #ifdef SUPPORT_VGA_SWITCHEROO
954 static struct pci_dev *get_bound_vga(struct pci_dev *pci);
956 static void azx_vs_set_state(struct pci_dev *pci,
957 enum vga_switcheroo_state state)
959 struct snd_card *card = pci_get_drvdata(pci);
960 struct azx *chip = card->private_data;
961 struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
964 wait_for_completion(&hda->probe_wait);
965 if (hda->init_failed)
968 disabled = (state == VGA_SWITCHEROO_OFF);
969 if (chip->disabled == disabled)
973 chip->disabled = disabled;
975 dev_info(chip->card->dev,
976 "Start delayed initialization\n");
977 if (azx_probe_continue(chip) < 0) {
978 dev_err(chip->card->dev, "initialization error\n");
979 hda->init_failed = true;
983 dev_info(chip->card->dev, "%s via VGA-switcheroo\n",
984 disabled ? "Disabling" : "Enabling");
986 pm_runtime_put_sync_suspend(card->dev);
987 azx_suspend(card->dev);
988 /* when we get suspended by vga switcheroo we end up in D3cold,
989 * however we have no ACPI handle, so pci/acpi can't put us there,
990 * put ourselves there */
991 pci->current_state = PCI_D3cold;
992 chip->disabled = true;
993 if (snd_hda_lock_devices(chip->bus))
994 dev_warn(chip->card->dev,
995 "Cannot lock devices!\n");
997 snd_hda_unlock_devices(chip->bus);
998 pm_runtime_get_noresume(card->dev);
999 chip->disabled = false;
1000 azx_resume(card->dev);
1005 static bool azx_vs_can_switch(struct pci_dev *pci)
1007 struct snd_card *card = pci_get_drvdata(pci);
1008 struct azx *chip = card->private_data;
1009 struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
1011 wait_for_completion(&hda->probe_wait);
1012 if (hda->init_failed)
1014 if (chip->disabled || !chip->bus)
1016 if (snd_hda_lock_devices(chip->bus))
1018 snd_hda_unlock_devices(chip->bus);
1022 static void init_vga_switcheroo(struct azx *chip)
1024 struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
1025 struct pci_dev *p = get_bound_vga(chip->pci);
1027 dev_info(chip->card->dev,
1028 "Handle VGA-switcheroo audio client\n");
1029 hda->use_vga_switcheroo = 1;
1034 static const struct vga_switcheroo_client_ops azx_vs_ops = {
1035 .set_gpu_state = azx_vs_set_state,
1036 .can_switch = azx_vs_can_switch,
1039 static int register_vga_switcheroo(struct azx *chip)
1041 struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
1044 if (!hda->use_vga_switcheroo)
1046 /* FIXME: currently only handling DIS controller
1047 * is there any machine with two switchable HDMI audio controllers?
1049 err = vga_switcheroo_register_audio_client(chip->pci, &azx_vs_ops,
1054 hda->vga_switcheroo_registered = 1;
1056 /* register as an optimus hdmi audio power domain */
1057 vga_switcheroo_init_domain_pm_optimus_hdmi_audio(chip->card->dev,
1058 &hda->hdmi_pm_domain);
1062 #define init_vga_switcheroo(chip) /* NOP */
1063 #define register_vga_switcheroo(chip) 0
1064 #define check_hdmi_disabled(pci) false
1065 #endif /* SUPPORT_VGA_SWITCHER */
1070 static int azx_free(struct azx *chip)
1072 struct pci_dev *pci = chip->pci;
1073 struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
1076 if (azx_has_pm_runtime(chip) && chip->running)
1077 pm_runtime_get_noresume(&pci->dev);
1079 azx_del_card_list(chip);
1081 hda->init_failed = 1; /* to be sure */
1082 complete_all(&hda->probe_wait);
1084 if (use_vga_switcheroo(hda)) {
1085 if (chip->disabled && chip->bus)
1086 snd_hda_unlock_devices(chip->bus);
1087 if (hda->vga_switcheroo_registered)
1088 vga_switcheroo_unregister_client(chip->pci);
1091 if (chip->initialized) {
1092 azx_clear_irq_pending(chip);
1093 for (i = 0; i < chip->num_streams; i++)
1094 azx_stream_stop(chip, &chip->azx_dev[i]);
1095 azx_stop_chip(chip);
1099 free_irq(chip->irq, (void*)chip);
1101 pci_disable_msi(chip->pci);
1102 iounmap(chip->remap_addr);
1104 azx_free_stream_pages(chip);
1105 if (chip->region_requested)
1106 pci_release_regions(chip->pci);
1107 pci_disable_device(chip->pci);
1108 kfree(chip->azx_dev);
1109 #ifdef CONFIG_SND_HDA_PATCH_LOADER
1110 release_firmware(chip->fw);
1112 if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) {
1113 hda_display_power(hda, false);
1121 static int azx_dev_free(struct snd_device *device)
1123 return azx_free(device->device_data);
1126 #ifdef SUPPORT_VGA_SWITCHEROO
1128 * Check of disabled HDMI controller by vga-switcheroo
1130 static struct pci_dev *get_bound_vga(struct pci_dev *pci)
1134 /* check only discrete GPU */
1135 switch (pci->vendor) {
1136 case PCI_VENDOR_ID_ATI:
1137 case PCI_VENDOR_ID_AMD:
1138 case PCI_VENDOR_ID_NVIDIA:
1139 if (pci->devfn == 1) {
1140 p = pci_get_domain_bus_and_slot(pci_domain_nr(pci->bus),
1141 pci->bus->number, 0);
1143 if ((p->class >> 8) == PCI_CLASS_DISPLAY_VGA)
1153 static bool check_hdmi_disabled(struct pci_dev *pci)
1155 bool vga_inactive = false;
1156 struct pci_dev *p = get_bound_vga(pci);
1159 if (vga_switcheroo_get_client_state(p) == VGA_SWITCHEROO_OFF)
1160 vga_inactive = true;
1163 return vga_inactive;
1165 #endif /* SUPPORT_VGA_SWITCHEROO */
1168 * white/black-listing for position_fix
1170 static struct snd_pci_quirk position_fix_list[] = {
1171 SND_PCI_QUIRK(0x1028, 0x01cc, "Dell D820", POS_FIX_LPIB),
1172 SND_PCI_QUIRK(0x1028, 0x01de, "Dell Precision 390", POS_FIX_LPIB),
1173 SND_PCI_QUIRK(0x103c, 0x306d, "HP dv3", POS_FIX_LPIB),
1174 SND_PCI_QUIRK(0x1043, 0x813d, "ASUS P5AD2", POS_FIX_LPIB),
1175 SND_PCI_QUIRK(0x1043, 0x81b3, "ASUS", POS_FIX_LPIB),
1176 SND_PCI_QUIRK(0x1043, 0x81e7, "ASUS M2V", POS_FIX_LPIB),
1177 SND_PCI_QUIRK(0x104d, 0x9069, "Sony VPCS11V9E", POS_FIX_LPIB),
1178 SND_PCI_QUIRK(0x10de, 0xcb89, "Macbook Pro 7,1", POS_FIX_LPIB),
1179 SND_PCI_QUIRK(0x1297, 0x3166, "Shuttle", POS_FIX_LPIB),
1180 SND_PCI_QUIRK(0x1458, 0xa022, "ga-ma770-ud3", POS_FIX_LPIB),
1181 SND_PCI_QUIRK(0x1462, 0x1002, "MSI Wind U115", POS_FIX_LPIB),
1182 SND_PCI_QUIRK(0x1565, 0x8218, "Biostar Microtech", POS_FIX_LPIB),
1183 SND_PCI_QUIRK(0x1849, 0x0888, "775Dual-VSTA", POS_FIX_LPIB),
1184 SND_PCI_QUIRK(0x8086, 0x2503, "DG965OT AAD63733-203", POS_FIX_LPIB),
1188 static int check_position_fix(struct azx *chip, int fix)
1190 const struct snd_pci_quirk *q;
1195 case POS_FIX_POSBUF:
1196 case POS_FIX_VIACOMBO:
1201 q = snd_pci_quirk_lookup(chip->pci, position_fix_list);
1203 dev_info(chip->card->dev,
1204 "position_fix set to %d for device %04x:%04x\n",
1205 q->value, q->subvendor, q->subdevice);
1209 /* Check VIA/ATI HD Audio Controller exist */
1210 if (chip->driver_caps & AZX_DCAPS_POSFIX_VIA) {
1211 dev_dbg(chip->card->dev, "Using VIACOMBO position fix\n");
1212 return POS_FIX_VIACOMBO;
1214 if (chip->driver_caps & AZX_DCAPS_POSFIX_LPIB) {
1215 dev_dbg(chip->card->dev, "Using LPIB position fix\n");
1216 return POS_FIX_LPIB;
1218 return POS_FIX_AUTO;
1221 static void assign_position_fix(struct azx *chip, int fix)
1223 static azx_get_pos_callback_t callbacks[] = {
1224 [POS_FIX_AUTO] = NULL,
1225 [POS_FIX_LPIB] = azx_get_pos_lpib,
1226 [POS_FIX_POSBUF] = azx_get_pos_posbuf,
1227 [POS_FIX_VIACOMBO] = azx_via_get_position,
1228 [POS_FIX_COMBO] = azx_get_pos_lpib,
1231 chip->get_position[0] = chip->get_position[1] = callbacks[fix];
1233 /* combo mode uses LPIB only for playback */
1234 if (fix == POS_FIX_COMBO)
1235 chip->get_position[1] = NULL;
1237 if (fix == POS_FIX_POSBUF &&
1238 (chip->driver_caps & AZX_DCAPS_COUNT_LPIB_DELAY)) {
1239 chip->get_delay[0] = chip->get_delay[1] =
1240 azx_get_delay_from_lpib;
1246 * black-lists for probe_mask
1248 static struct snd_pci_quirk probe_mask_list[] = {
1249 /* Thinkpad often breaks the controller communication when accessing
1250 * to the non-working (or non-existing) modem codec slot.
1252 SND_PCI_QUIRK(0x1014, 0x05b7, "Thinkpad Z60", 0x01),
1253 SND_PCI_QUIRK(0x17aa, 0x2010, "Thinkpad X/T/R60", 0x01),
1254 SND_PCI_QUIRK(0x17aa, 0x20ac, "Thinkpad X/T/R61", 0x01),
1256 SND_PCI_QUIRK(0x1028, 0x20ac, "Dell Studio Desktop", 0x01),
1257 /* including bogus ALC268 in slot#2 that conflicts with ALC888 */
1258 SND_PCI_QUIRK(0x17c0, 0x4085, "Medion MD96630", 0x01),
1259 /* forced codec slots */
1260 SND_PCI_QUIRK(0x1043, 0x1262, "ASUS W5Fm", 0x103),
1261 SND_PCI_QUIRK(0x1046, 0x1262, "ASUS W5F", 0x103),
1262 /* WinFast VP200 H (Teradici) user reported broken communication */
1263 SND_PCI_QUIRK(0x3a21, 0x040d, "WinFast VP200 H", 0x101),
1267 #define AZX_FORCE_CODEC_MASK 0x100
1269 static void check_probe_mask(struct azx *chip, int dev)
1271 const struct snd_pci_quirk *q;
1273 chip->codec_probe_mask = probe_mask[dev];
1274 if (chip->codec_probe_mask == -1) {
1275 q = snd_pci_quirk_lookup(chip->pci, probe_mask_list);
1277 dev_info(chip->card->dev,
1278 "probe_mask set to 0x%x for device %04x:%04x\n",
1279 q->value, q->subvendor, q->subdevice);
1280 chip->codec_probe_mask = q->value;
1284 /* check forced option */
1285 if (chip->codec_probe_mask != -1 &&
1286 (chip->codec_probe_mask & AZX_FORCE_CODEC_MASK)) {
1287 chip->codec_mask = chip->codec_probe_mask & 0xff;
1288 dev_info(chip->card->dev, "codec_mask forced to 0x%x\n",
1294 * white/black-list for enable_msi
1296 static struct snd_pci_quirk msi_black_list[] = {
1297 SND_PCI_QUIRK(0x103c, 0x2191, "HP", 0), /* AMD Hudson */
1298 SND_PCI_QUIRK(0x103c, 0x2192, "HP", 0), /* AMD Hudson */
1299 SND_PCI_QUIRK(0x103c, 0x21f7, "HP", 0), /* AMD Hudson */
1300 SND_PCI_QUIRK(0x103c, 0x21fa, "HP", 0), /* AMD Hudson */
1301 SND_PCI_QUIRK(0x1043, 0x81f2, "ASUS", 0), /* Athlon64 X2 + nvidia */
1302 SND_PCI_QUIRK(0x1043, 0x81f6, "ASUS", 0), /* nvidia */
1303 SND_PCI_QUIRK(0x1043, 0x822d, "ASUS", 0), /* Athlon64 X2 + nvidia MCP55 */
1304 SND_PCI_QUIRK(0x1179, 0xfb44, "Toshiba Satellite C870", 0), /* AMD Hudson */
1305 SND_PCI_QUIRK(0x1849, 0x0888, "ASRock", 0), /* Athlon64 X2 + nvidia */
1306 SND_PCI_QUIRK(0xa0a0, 0x0575, "Aopen MZ915-M", 0), /* ICH6 */
1310 static void check_msi(struct azx *chip)
1312 const struct snd_pci_quirk *q;
1314 if (enable_msi >= 0) {
1315 chip->msi = !!enable_msi;
1318 chip->msi = 1; /* enable MSI as default */
1319 q = snd_pci_quirk_lookup(chip->pci, msi_black_list);
1321 dev_info(chip->card->dev,
1322 "msi for device %04x:%04x set to %d\n",
1323 q->subvendor, q->subdevice, q->value);
1324 chip->msi = q->value;
1328 /* NVidia chipsets seem to cause troubles with MSI */
1329 if (chip->driver_caps & AZX_DCAPS_NO_MSI) {
1330 dev_info(chip->card->dev, "Disabling MSI\n");
1335 /* check the snoop mode availability */
1336 static void azx_check_snoop_available(struct azx *chip)
1338 int snoop = hda_snoop;
1341 dev_info(chip->card->dev, "Force to %s mode by module option\n",
1342 snoop ? "snoop" : "non-snoop");
1343 chip->snoop = snoop;
1348 if (azx_get_snoop_type(chip) == AZX_SNOOP_TYPE_NONE &&
1349 chip->driver_type == AZX_DRIVER_VIA) {
1350 /* force to non-snoop mode for a new VIA controller
1354 pci_read_config_byte(chip->pci, 0x42, &val);
1355 if (!(val & 0x80) && chip->pci->revision == 0x30)
1359 if (chip->driver_caps & AZX_DCAPS_SNOOP_OFF)
1362 chip->snoop = snoop;
1364 dev_info(chip->card->dev, "Force to non-snoop mode\n");
1367 static void azx_probe_work(struct work_struct *work)
1369 struct hda_intel *hda = container_of(work, struct hda_intel, probe_work);
1370 azx_probe_continue(&hda->chip);
1376 static int azx_create(struct snd_card *card, struct pci_dev *pci,
1377 int dev, unsigned int driver_caps,
1378 const struct hda_controller_ops *hda_ops,
1381 static struct snd_device_ops ops = {
1382 .dev_free = azx_dev_free,
1384 struct hda_intel *hda;
1390 err = pci_enable_device(pci);
1394 hda = kzalloc(sizeof(*hda), GFP_KERNEL);
1396 pci_disable_device(pci);
1401 spin_lock_init(&chip->reg_lock);
1402 mutex_init(&chip->open_mutex);
1405 chip->ops = hda_ops;
1407 chip->driver_caps = driver_caps;
1408 chip->driver_type = driver_caps & 0xff;
1410 chip->dev_index = dev;
1411 chip->jackpoll_ms = jackpoll_ms;
1412 INIT_LIST_HEAD(&chip->pcm_list);
1413 INIT_WORK(&hda->irq_pending_work, azx_irq_pending_work);
1414 INIT_LIST_HEAD(&hda->list);
1415 init_vga_switcheroo(chip);
1416 init_completion(&hda->probe_wait);
1418 assign_position_fix(chip, check_position_fix(chip, position_fix[dev]));
1420 check_probe_mask(chip, dev);
1422 chip->single_cmd = single_cmd;
1423 azx_check_snoop_available(chip);
1425 if (bdl_pos_adj[dev] < 0) {
1426 switch (chip->driver_type) {
1427 case AZX_DRIVER_ICH:
1428 case AZX_DRIVER_PCH:
1429 bdl_pos_adj[dev] = 1;
1432 bdl_pos_adj[dev] = 32;
1436 chip->bdl_pos_adj = bdl_pos_adj;
1438 err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops);
1440 dev_err(card->dev, "Error creating device [card]!\n");
1445 /* continue probing in work context as may trigger request module */
1446 INIT_WORK(&hda->probe_work, azx_probe_work);
1453 static int azx_first_init(struct azx *chip)
1455 int dev = chip->dev_index;
1456 struct pci_dev *pci = chip->pci;
1457 struct snd_card *card = chip->card;
1459 unsigned short gcap;
1460 unsigned int dma_bits = 64;
1462 #if BITS_PER_LONG != 64
1463 /* Fix up base address on ULI M5461 */
1464 if (chip->driver_type == AZX_DRIVER_ULI) {
1466 pci_read_config_word(pci, 0x40, &tmp3);
1467 pci_write_config_word(pci, 0x40, tmp3 | 0x10);
1468 pci_write_config_dword(pci, PCI_BASE_ADDRESS_1, 0);
1472 err = pci_request_regions(pci, "ICH HD audio");
1475 chip->region_requested = 1;
1477 chip->addr = pci_resource_start(pci, 0);
1478 chip->remap_addr = pci_ioremap_bar(pci, 0);
1479 if (chip->remap_addr == NULL) {
1480 dev_err(card->dev, "ioremap error\n");
1485 if (chip->driver_caps & AZX_DCAPS_NO_MSI64) {
1486 dev_dbg(card->dev, "Disabling 64bit MSI\n");
1487 pci->no_64bit_msi = true;
1489 if (pci_enable_msi(pci) < 0)
1493 if (azx_acquire_irq(chip, 0) < 0)
1496 pci_set_master(pci);
1497 synchronize_irq(chip->irq);
1499 gcap = azx_readw(chip, GCAP);
1500 dev_dbg(card->dev, "chipset global capabilities = 0x%x\n", gcap);
1502 /* AMD devices support 40 or 48bit DMA, take the safe one */
1503 if (chip->pci->vendor == PCI_VENDOR_ID_AMD)
1506 /* disable SB600 64bit support for safety */
1507 if (chip->pci->vendor == PCI_VENDOR_ID_ATI) {
1508 struct pci_dev *p_smbus;
1510 p_smbus = pci_get_device(PCI_VENDOR_ID_ATI,
1511 PCI_DEVICE_ID_ATI_SBX00_SMBUS,
1514 if (p_smbus->revision < 0x30)
1515 gcap &= ~AZX_GCAP_64OK;
1516 pci_dev_put(p_smbus);
1520 /* disable 64bit DMA address on some devices */
1521 if (chip->driver_caps & AZX_DCAPS_NO_64BIT) {
1522 dev_dbg(card->dev, "Disabling 64bit DMA\n");
1523 gcap &= ~AZX_GCAP_64OK;
1526 /* disable buffer size rounding to 128-byte multiples if supported */
1527 if (align_buffer_size >= 0)
1528 chip->align_buffer_size = !!align_buffer_size;
1530 if (chip->driver_caps & AZX_DCAPS_NO_ALIGN_BUFSIZE)
1531 chip->align_buffer_size = 0;
1533 chip->align_buffer_size = 1;
1536 /* allow 64bit DMA address if supported by H/W */
1537 if (!(gcap & AZX_GCAP_64OK))
1539 if (!pci_set_dma_mask(pci, DMA_BIT_MASK(dma_bits))) {
1540 pci_set_consistent_dma_mask(pci, DMA_BIT_MASK(dma_bits));
1542 pci_set_dma_mask(pci, DMA_BIT_MASK(32));
1543 pci_set_consistent_dma_mask(pci, DMA_BIT_MASK(32));
1546 /* read number of streams from GCAP register instead of using
1549 chip->capture_streams = (gcap >> 8) & 0x0f;
1550 chip->playback_streams = (gcap >> 12) & 0x0f;
1551 if (!chip->playback_streams && !chip->capture_streams) {
1552 /* gcap didn't give any info, switching to old method */
1554 switch (chip->driver_type) {
1555 case AZX_DRIVER_ULI:
1556 chip->playback_streams = ULI_NUM_PLAYBACK;
1557 chip->capture_streams = ULI_NUM_CAPTURE;
1559 case AZX_DRIVER_ATIHDMI:
1560 case AZX_DRIVER_ATIHDMI_NS:
1561 chip->playback_streams = ATIHDMI_NUM_PLAYBACK;
1562 chip->capture_streams = ATIHDMI_NUM_CAPTURE;
1564 case AZX_DRIVER_GENERIC:
1566 chip->playback_streams = ICH6_NUM_PLAYBACK;
1567 chip->capture_streams = ICH6_NUM_CAPTURE;
1571 chip->capture_index_offset = 0;
1572 chip->playback_index_offset = chip->capture_streams;
1573 chip->num_streams = chip->playback_streams + chip->capture_streams;
1574 chip->azx_dev = kcalloc(chip->num_streams, sizeof(*chip->azx_dev),
1579 err = azx_alloc_stream_pages(chip);
1583 /* initialize streams */
1584 azx_init_stream(chip);
1586 /* initialize chip */
1589 if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) {
1590 struct hda_intel *hda;
1592 hda = container_of(chip, struct hda_intel, chip);
1593 haswell_set_bclk(hda);
1596 azx_init_chip(chip, (probe_only[dev] & 2) == 0);
1598 /* codec detection */
1599 if (!chip->codec_mask) {
1600 dev_err(card->dev, "no codecs found!\n");
1604 strcpy(card->driver, "HDA-Intel");
1605 strlcpy(card->shortname, driver_short_names[chip->driver_type],
1606 sizeof(card->shortname));
1607 snprintf(card->longname, sizeof(card->longname),
1608 "%s at 0x%lx irq %i",
1609 card->shortname, chip->addr, chip->irq);
1614 #ifdef CONFIG_SND_HDA_PATCH_LOADER
1615 /* callback from request_firmware_nowait() */
1616 static void azx_firmware_cb(const struct firmware *fw, void *context)
1618 struct snd_card *card = context;
1619 struct azx *chip = card->private_data;
1620 struct pci_dev *pci = chip->pci;
1623 dev_err(card->dev, "Cannot load firmware, aborting\n");
1628 if (!chip->disabled) {
1629 /* continue probing */
1630 if (azx_probe_continue(chip))
1636 snd_card_free(card);
1637 pci_set_drvdata(pci, NULL);
1642 * HDA controller ops.
1645 /* PCI register access. */
1646 static void pci_azx_writel(u32 value, u32 __iomem *addr)
1648 writel(value, addr);
1651 static u32 pci_azx_readl(u32 __iomem *addr)
1656 static void pci_azx_writew(u16 value, u16 __iomem *addr)
1658 writew(value, addr);
1661 static u16 pci_azx_readw(u16 __iomem *addr)
1666 static void pci_azx_writeb(u8 value, u8 __iomem *addr)
1668 writeb(value, addr);
1671 static u8 pci_azx_readb(u8 __iomem *addr)
1676 static int disable_msi_reset_irq(struct azx *chip)
1680 free_irq(chip->irq, chip);
1682 pci_disable_msi(chip->pci);
1684 err = azx_acquire_irq(chip, 1);
1691 /* DMA page allocation helpers. */
1692 static int dma_alloc_pages(struct azx *chip,
1695 struct snd_dma_buffer *buf)
1699 err = snd_dma_alloc_pages(type,
1704 mark_pages_wc(chip, buf, true);
1708 static void dma_free_pages(struct azx *chip, struct snd_dma_buffer *buf)
1710 mark_pages_wc(chip, buf, false);
1711 snd_dma_free_pages(buf);
1714 static int substream_alloc_pages(struct azx *chip,
1715 struct snd_pcm_substream *substream,
1718 struct azx_dev *azx_dev = get_azx_dev(substream);
1721 mark_runtime_wc(chip, azx_dev, substream, false);
1722 azx_dev->bufsize = 0;
1723 azx_dev->period_bytes = 0;
1724 azx_dev->format_val = 0;
1725 ret = snd_pcm_lib_malloc_pages(substream, size);
1728 mark_runtime_wc(chip, azx_dev, substream, true);
1732 static int substream_free_pages(struct azx *chip,
1733 struct snd_pcm_substream *substream)
1735 struct azx_dev *azx_dev = get_azx_dev(substream);
1736 mark_runtime_wc(chip, azx_dev, substream, false);
1737 return snd_pcm_lib_free_pages(substream);
1740 static void pcm_mmap_prepare(struct snd_pcm_substream *substream,
1741 struct vm_area_struct *area)
1744 struct azx_pcm *apcm = snd_pcm_substream_chip(substream);
1745 struct azx *chip = apcm->chip;
1746 if (!azx_snoop(chip) && chip->driver_type != AZX_DRIVER_CMEDIA)
1747 area->vm_page_prot = pgprot_writecombine(area->vm_page_prot);
1751 static const struct hda_controller_ops pci_hda_ops = {
1752 .reg_writel = pci_azx_writel,
1753 .reg_readl = pci_azx_readl,
1754 .reg_writew = pci_azx_writew,
1755 .reg_readw = pci_azx_readw,
1756 .reg_writeb = pci_azx_writeb,
1757 .reg_readb = pci_azx_readb,
1758 .disable_msi_reset_irq = disable_msi_reset_irq,
1759 .dma_alloc_pages = dma_alloc_pages,
1760 .dma_free_pages = dma_free_pages,
1761 .substream_alloc_pages = substream_alloc_pages,
1762 .substream_free_pages = substream_free_pages,
1763 .pcm_mmap_prepare = pcm_mmap_prepare,
1764 .position_check = azx_position_check,
1767 static int azx_probe(struct pci_dev *pci,
1768 const struct pci_device_id *pci_id)
1771 struct snd_card *card;
1772 struct hda_intel *hda;
1774 bool schedule_probe;
1777 if (dev >= SNDRV_CARDS)
1784 err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
1787 dev_err(&pci->dev, "Error creating card!\n");
1791 err = azx_create(card, pci, dev, pci_id->driver_data,
1792 &pci_hda_ops, &chip);
1795 card->private_data = chip;
1796 hda = container_of(chip, struct hda_intel, chip);
1798 pci_set_drvdata(pci, card);
1800 err = register_vga_switcheroo(chip);
1802 dev_err(card->dev, "Error registering VGA-switcheroo client\n");
1806 if (check_hdmi_disabled(pci)) {
1807 dev_info(card->dev, "VGA controller is disabled\n");
1808 dev_info(card->dev, "Delaying initialization\n");
1809 chip->disabled = true;
1812 schedule_probe = !chip->disabled;
1814 #ifdef CONFIG_SND_HDA_PATCH_LOADER
1815 if (patch[dev] && *patch[dev]) {
1816 dev_info(card->dev, "Applying patch firmware '%s'\n",
1818 err = request_firmware_nowait(THIS_MODULE, true, patch[dev],
1819 &pci->dev, GFP_KERNEL, card,
1823 schedule_probe = false; /* continued in azx_firmware_cb() */
1825 #endif /* CONFIG_SND_HDA_PATCH_LOADER */
1827 #ifndef CONFIG_SND_HDA_I915
1828 if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
1829 dev_err(card->dev, "Haswell must build in CONFIG_SND_HDA_I915\n");
1833 schedule_work(&hda->probe_work);
1837 complete_all(&hda->probe_wait);
1841 snd_card_free(card);
1845 /* number of codec slots for each chipset: 0 = default slots (i.e. 4) */
1846 static unsigned int azx_max_codecs[AZX_NUM_DRIVERS] = {
1847 [AZX_DRIVER_NVIDIA] = 8,
1848 [AZX_DRIVER_TERA] = 1,
1851 static int azx_probe_continue(struct azx *chip)
1853 struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
1854 struct pci_dev *pci = chip->pci;
1855 int dev = chip->dev_index;
1858 /* Request power well for Haswell HDA controller and codec */
1859 if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) {
1860 #ifdef CONFIG_SND_HDA_I915
1861 err = hda_i915_init(hda);
1863 /* if the controller is bound only with HDMI/DP
1864 * (for HSW and BDW), we need to abort the probe;
1865 * for other chips, still continue probing as other
1866 * codecs can be on the same link.
1868 if (CONTROLLER_IN_GPU(pci))
1873 err = hda_display_power(hda, true);
1875 dev_err(chip->card->dev,
1876 "Cannot turn on display power on i915\n");
1883 err = azx_first_init(chip);
1887 #ifdef CONFIG_SND_HDA_INPUT_BEEP
1888 chip->beep_mode = beep_mode[dev];
1891 /* create codec instances */
1892 err = azx_bus_create(chip, model[dev]);
1896 err = azx_probe_codecs(chip, azx_max_codecs[chip->driver_type]);
1900 #ifdef CONFIG_SND_HDA_PATCH_LOADER
1902 err = snd_hda_load_patch(chip->bus, chip->fw->size,
1907 release_firmware(chip->fw); /* no longer needed */
1912 if ((probe_only[dev] & 1) == 0) {
1913 err = azx_codec_configure(chip);
1918 err = snd_card_register(chip->card);
1923 azx_add_card_list(chip);
1924 snd_hda_set_power_save(chip->bus, power_save * 1000);
1925 if (azx_has_pm_runtime(chip) || hda->use_vga_switcheroo)
1926 pm_runtime_put_noidle(&pci->dev);
1930 hda->init_failed = 1;
1931 complete_all(&hda->probe_wait);
1935 static void azx_remove(struct pci_dev *pci)
1937 struct snd_card *card = pci_get_drvdata(pci);
1940 snd_card_free(card);
1943 static void azx_shutdown(struct pci_dev *pci)
1945 struct snd_card *card = pci_get_drvdata(pci);
1950 chip = card->private_data;
1951 if (chip && chip->running)
1952 azx_stop_chip(chip);
1956 static const struct pci_device_id azx_ids[] = {
1958 { PCI_DEVICE(0x8086, 0x1c20),
1959 .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH_NOPM },
1961 { PCI_DEVICE(0x8086, 0x1d20),
1962 .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH_NOPM },
1964 { PCI_DEVICE(0x8086, 0x1e20),
1965 .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH_NOPM },
1967 { PCI_DEVICE(0x8086, 0x8c20),
1968 .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
1970 { PCI_DEVICE(0x8086, 0x8ca0),
1971 .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
1973 { PCI_DEVICE(0x8086, 0x8d20),
1974 .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
1975 { PCI_DEVICE(0x8086, 0x8d21),
1976 .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
1978 { PCI_DEVICE(0x8086, 0x9c20),
1979 .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
1981 { PCI_DEVICE(0x8086, 0x9c21),
1982 .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
1983 /* Wildcat Point-LP */
1984 { PCI_DEVICE(0x8086, 0x9ca0),
1985 .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
1987 { PCI_DEVICE(0x8086, 0xa170),
1988 .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_SKYLAKE },
1989 /* Sunrise Point-LP */
1990 { PCI_DEVICE(0x8086, 0x9d70),
1991 .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_SKYLAKE },
1993 { PCI_DEVICE(0x8086, 0x0a0c),
1994 .driver_data = AZX_DRIVER_HDMI | AZX_DCAPS_INTEL_HASWELL },
1995 { PCI_DEVICE(0x8086, 0x0c0c),
1996 .driver_data = AZX_DRIVER_HDMI | AZX_DCAPS_INTEL_HASWELL },
1997 { PCI_DEVICE(0x8086, 0x0d0c),
1998 .driver_data = AZX_DRIVER_HDMI | AZX_DCAPS_INTEL_HASWELL },
2000 { PCI_DEVICE(0x8086, 0x160c),
2001 .driver_data = AZX_DRIVER_HDMI | AZX_DCAPS_INTEL_BROADWELL },
2003 { PCI_DEVICE(0x8086, 0x3b56),
2004 .driver_data = AZX_DRIVER_SCH | AZX_DCAPS_INTEL_PCH_NOPM },
2006 { PCI_DEVICE(0x8086, 0x811b),
2007 .driver_data = AZX_DRIVER_SCH | AZX_DCAPS_INTEL_PCH_NOPM },
2009 { PCI_DEVICE(0x8086, 0x080a),
2010 .driver_data = AZX_DRIVER_SCH | AZX_DCAPS_INTEL_PCH_NOPM },
2012 { PCI_DEVICE(0x8086, 0x0f04),
2013 .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_BAYTRAIL },
2015 { PCI_DEVICE(0x8086, 0x2284),
2016 .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_BRASWELL },
2018 { PCI_DEVICE(0x8086, 0x2668),
2019 .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_INTEL_ICH },
2021 { PCI_DEVICE(0x8086, 0x27d8),
2022 .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_INTEL_ICH },
2024 { PCI_DEVICE(0x8086, 0x269a),
2025 .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_INTEL_ICH },
2027 { PCI_DEVICE(0x8086, 0x284b),
2028 .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_INTEL_ICH },
2030 { PCI_DEVICE(0x8086, 0x293e),
2031 .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_INTEL_ICH },
2033 { PCI_DEVICE(0x8086, 0x293f),
2034 .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_INTEL_ICH },
2036 { PCI_DEVICE(0x8086, 0x3a3e),
2037 .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_INTEL_ICH },
2039 { PCI_DEVICE(0x8086, 0x3a6e),
2040 .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_INTEL_ICH },
2042 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_ANY_ID),
2043 .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
2044 .class_mask = 0xffffff,
2045 .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_NO_ALIGN_BUFSIZE },
2046 /* ATI SB 450/600/700/800/900 */
2047 { PCI_DEVICE(0x1002, 0x437b),
2048 .driver_data = AZX_DRIVER_ATI | AZX_DCAPS_PRESET_ATI_SB },
2049 { PCI_DEVICE(0x1002, 0x4383),
2050 .driver_data = AZX_DRIVER_ATI | AZX_DCAPS_PRESET_ATI_SB },
2052 { PCI_DEVICE(0x1022, 0x780d),
2053 .driver_data = AZX_DRIVER_GENERIC | AZX_DCAPS_PRESET_ATI_SB },
2055 { PCI_DEVICE(0x1002, 0x793b),
2056 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2057 { PCI_DEVICE(0x1002, 0x7919),
2058 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2059 { PCI_DEVICE(0x1002, 0x960f),
2060 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2061 { PCI_DEVICE(0x1002, 0x970f),
2062 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2063 { PCI_DEVICE(0x1002, 0xaa00),
2064 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2065 { PCI_DEVICE(0x1002, 0xaa08),
2066 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2067 { PCI_DEVICE(0x1002, 0xaa10),
2068 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2069 { PCI_DEVICE(0x1002, 0xaa18),
2070 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2071 { PCI_DEVICE(0x1002, 0xaa20),
2072 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2073 { PCI_DEVICE(0x1002, 0xaa28),
2074 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2075 { PCI_DEVICE(0x1002, 0xaa30),
2076 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2077 { PCI_DEVICE(0x1002, 0xaa38),
2078 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2079 { PCI_DEVICE(0x1002, 0xaa40),
2080 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2081 { PCI_DEVICE(0x1002, 0xaa48),
2082 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2083 { PCI_DEVICE(0x1002, 0xaa50),
2084 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2085 { PCI_DEVICE(0x1002, 0xaa58),
2086 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2087 { PCI_DEVICE(0x1002, 0xaa60),
2088 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2089 { PCI_DEVICE(0x1002, 0xaa68),
2090 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2091 { PCI_DEVICE(0x1002, 0xaa80),
2092 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2093 { PCI_DEVICE(0x1002, 0xaa88),
2094 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2095 { PCI_DEVICE(0x1002, 0xaa90),
2096 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2097 { PCI_DEVICE(0x1002, 0xaa98),
2098 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2099 { PCI_DEVICE(0x1002, 0x9902),
2100 .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2101 { PCI_DEVICE(0x1002, 0xaaa0),
2102 .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2103 { PCI_DEVICE(0x1002, 0xaaa8),
2104 .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2105 { PCI_DEVICE(0x1002, 0xaab0),
2106 .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2107 { PCI_DEVICE(0x1002, 0xaac8),
2108 .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2109 /* VIA VT8251/VT8237A */
2110 { PCI_DEVICE(0x1106, 0x3288),
2111 .driver_data = AZX_DRIVER_VIA | AZX_DCAPS_POSFIX_VIA },
2112 /* VIA GFX VT7122/VX900 */
2113 { PCI_DEVICE(0x1106, 0x9170), .driver_data = AZX_DRIVER_GENERIC },
2114 /* VIA GFX VT6122/VX11 */
2115 { PCI_DEVICE(0x1106, 0x9140), .driver_data = AZX_DRIVER_GENERIC },
2117 { PCI_DEVICE(0x1039, 0x7502), .driver_data = AZX_DRIVER_SIS },
2119 { PCI_DEVICE(0x10b9, 0x5461), .driver_data = AZX_DRIVER_ULI },
2121 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
2122 .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
2123 .class_mask = 0xffffff,
2124 .driver_data = AZX_DRIVER_NVIDIA | AZX_DCAPS_PRESET_NVIDIA },
2126 { PCI_DEVICE(0x6549, 0x1200),
2127 .driver_data = AZX_DRIVER_TERA | AZX_DCAPS_NO_64BIT },
2128 { PCI_DEVICE(0x6549, 0x2200),
2129 .driver_data = AZX_DRIVER_TERA | AZX_DCAPS_NO_64BIT },
2130 /* Creative X-Fi (CA0110-IBG) */
2132 { PCI_DEVICE(0x1102, 0x0010),
2133 .driver_data = AZX_DRIVER_CTHDA | AZX_DCAPS_PRESET_CTHDA },
2134 { PCI_DEVICE(0x1102, 0x0012),
2135 .driver_data = AZX_DRIVER_CTHDA | AZX_DCAPS_PRESET_CTHDA },
2136 #if !IS_ENABLED(CONFIG_SND_CTXFI)
2137 /* the following entry conflicts with snd-ctxfi driver,
2138 * as ctxfi driver mutates from HD-audio to native mode with
2139 * a special command sequence.
2141 { PCI_DEVICE(PCI_VENDOR_ID_CREATIVE, PCI_ANY_ID),
2142 .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
2143 .class_mask = 0xffffff,
2144 .driver_data = AZX_DRIVER_CTX | AZX_DCAPS_CTX_WORKAROUND |
2145 AZX_DCAPS_RIRB_PRE_DELAY | AZX_DCAPS_POSFIX_LPIB },
2147 /* this entry seems still valid -- i.e. without emu20kx chip */
2148 { PCI_DEVICE(0x1102, 0x0009),
2149 .driver_data = AZX_DRIVER_CTX | AZX_DCAPS_CTX_WORKAROUND |
2150 AZX_DCAPS_RIRB_PRE_DELAY | AZX_DCAPS_POSFIX_LPIB },
2153 { PCI_DEVICE(0x13f6, 0x5011),
2154 .driver_data = AZX_DRIVER_CMEDIA |
2155 AZX_DCAPS_NO_MSI | AZX_DCAPS_POSFIX_LPIB | AZX_DCAPS_SNOOP_OFF },
2157 { PCI_DEVICE(0x17f3, 0x3010), .driver_data = AZX_DRIVER_GENERIC },
2158 /* VMware HDAudio */
2159 { PCI_DEVICE(0x15ad, 0x1977), .driver_data = AZX_DRIVER_GENERIC },
2160 /* AMD/ATI Generic, PCI class code and Vendor ID for HD Audio */
2161 { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_ANY_ID),
2162 .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
2163 .class_mask = 0xffffff,
2164 .driver_data = AZX_DRIVER_GENERIC | AZX_DCAPS_PRESET_ATI_HDMI },
2165 { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_ANY_ID),
2166 .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
2167 .class_mask = 0xffffff,
2168 .driver_data = AZX_DRIVER_GENERIC | AZX_DCAPS_PRESET_ATI_HDMI },
2171 MODULE_DEVICE_TABLE(pci, azx_ids);
2173 /* pci_driver definition */
2174 static struct pci_driver azx_driver = {
2175 .name = KBUILD_MODNAME,
2176 .id_table = azx_ids,
2178 .remove = azx_remove,
2179 .shutdown = azx_shutdown,
2185 module_pci_driver(azx_driver);