sound/pci/hda/cs35l41_hda.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 //
   3 // CS35l41 ALSA HDA audio driver
   4 //
   5 // Copyright 2021 Cirrus Logic, Inc.
   6 //
   7 // Author: Lucas Tanure <tanureal@opensource.cirrus.com>
   8
   9 #include <linux/acpi.h>
  10 #include <linux/module.h>
  11 #include <sound/hda_codec.h>
  12 #include "hda_local.h"
  13 #include "hda_auto_parser.h"
  14 #include "hda_jack.h"
  15 #include "hda_generic.h"
  16 #include "hda_component.h"
  17 #include "cs35l41_hda.h"
  18
  19 static const struct reg_sequence cs35l41_hda_config[] = {
  20         { CS35L41_PLL_CLK_CTRL,         0x00000430 }, // 3072000Hz, BCLK Input, PLL_REFCLK_EN = 1
  21         { CS35L41_GLOBAL_CLK_CTRL,      0x00000003 }, // GLOBAL_FS = 48 kHz
  22         { CS35L41_SP_ENABLES,           0x00010000 }, // ASP_RX1_EN = 1
  23         { CS35L41_SP_RATE_CTRL,         0x00000021 }, // ASP_BCLK_FREQ = 3.072 MHz
  24         { CS35L41_SP_FORMAT,            0x20200200 }, // 32 bits RX/TX slots, I2S, clk consumer
  25         { CS35L41_DAC_PCM1_SRC,         0x00000008 }, // DACPCM1_SRC = ASPRX1
  26         { CS35L41_AMP_DIG_VOL_CTRL,     0x00000000 }, // AMP_VOL_PCM  0.0 dB
  27         { CS35L41_AMP_GAIN_CTRL,        0x00000084 }, // AMP_GAIN_PCM 4.5 dB
  28         { CS35L41_PWR_CTRL2,            0x00000001 }, // AMP_EN = 1
  29 };
  30
  31 static const struct reg_sequence cs35l41_hda_start_bst[] = {
  32         { CS35L41_PWR_CTRL2,            0x00000021 }, // BST_EN = 10, AMP_EN = 1
  33         { CS35L41_PWR_CTRL1,            0x00000001, 3000}, // set GLOBAL_EN = 1
  34 };
  35
  36 static const struct reg_sequence cs35l41_hda_stop_bst[] = {
  37         { CS35L41_PWR_CTRL1,            0x00000000, 3000}, // set GLOBAL_EN = 0
  38 };
  39
  40 // only on amps where GPIO1 is used to control ext. VSPK switch
  41 static const struct reg_sequence cs35l41_start_ext_vspk[] = {
  42         { 0x00000040,                   0x00000055 },
  43         { 0x00000040,                   0x000000AA },
  44         { 0x00007438,                   0x00585941 },
  45         { 0x00007414,                   0x08C82222 },
  46         { 0x0000742C,                   0x00000009 },
  47         { 0x00011008,                   0x00008001 },
  48         { 0x0000742C,                   0x0000000F },
  49         { 0x0000742C,                   0x00000079 },
  50         { 0x00007438,                   0x00585941 },
  51         { CS35L41_PWR_CTRL1,            0x00000001, 3000}, // set GLOBAL_EN = 1
  52         { 0x0000742C,                   0x000000F9 },
  53         { 0x00007438,                   0x00580941 },
  54         { 0x00000040,                   0x000000CC },
  55         { 0x00000040,                   0x00000033 },
  56 };
  57
  58 //only on amps where GPIO1 is used to control ext. VSPK switch
  59 static const struct reg_sequence cs35l41_stop_ext_vspk[] = {
  60         { 0x00000040,                   0x00000055 },
  61         { 0x00000040,                   0x000000AA },
  62         { 0x00007438,                   0x00585941 },
  63         { 0x00002014,                   0x00000000, 3000}, // set GLOBAL_EN = 0
  64         { 0x0000742C,                   0x00000009 },
  65         { 0x00007438,                   0x00580941 },
  66         { 0x00011008,                   0x00000001 },
  67         { 0x0000393C,                   0x000000C0, 6000},
  68         { 0x0000393C,                   0x00000000 },
  69         { 0x00007414,                   0x00C82222 },
  70         { 0x0000742C,                   0x00000000 },
  71         { 0x00000040,                   0x000000CC },
  72         { 0x00000040,                   0x00000033 },
  73 };
  74
  75 static const struct reg_sequence cs35l41_safe_to_active[] = {
  76         { 0x00000040,                   0x00000055 },
  77         { 0x00000040,                   0x000000AA },
  78         { 0x0000742C,                   0x0000000F },
  79         { 0x0000742C,                   0x00000079 },
  80         { 0x00007438,                   0x00585941 },
  81         { CS35L41_PWR_CTRL1,            0x00000001, 2000 }, // GLOBAL_EN = 1
  82         { 0x0000742C,                   0x000000F9 },
  83         { 0x00007438,                   0x00580941 },
  84         { 0x00000040,                   0x000000CC },
  85         { 0x00000040,                   0x00000033 },
  86 };
  87
  88 static const struct reg_sequence cs35l41_active_to_safe[] = {
  89         { 0x00000040,                   0x00000055 },
  90         { 0x00000040,                   0x000000AA },
  91         { 0x00007438,                   0x00585941 },
  92         { CS35L41_AMP_DIG_VOL_CTRL,     0x0000A678 }, // AMP_VOL_PCM Mute
  93         { CS35L41_PWR_CTRL2,            0x00000000 }, // AMP_EN = 0
  94         { CS35L41_PWR_CTRL1,            0x00000000 },
  95         { 0x0000742C,                   0x00000009, 2000 },
  96         { 0x00007438,                   0x00580941 },
  97         { 0x00000040,                   0x000000CC },
  98         { 0x00000040,                   0x00000033 },
  99 };
 100
 101 static const struct reg_sequence cs35l41_reset_to_safe[] = {
 102         { 0x00000040,                   0x00000055 },
 103         { 0x00000040,                   0x000000AA },
 104         { 0x00007438,                   0x00585941 },
 105         { 0x00007414,                   0x08C82222 },
 106         { 0x0000742C,                   0x00000009 },
 107         { 0x00000040,                   0x000000CC },
 108         { 0x00000040,                   0x00000033 },
 109 };
 110
 111 static const struct cs35l41_hda_reg_sequence cs35l41_hda_reg_seq_no_bst = {
 112         .probe          = cs35l41_reset_to_safe,
 113         .num_probe      = ARRAY_SIZE(cs35l41_reset_to_safe),
 114         .prepare        = cs35l41_safe_to_active,
 115         .num_prepare    = ARRAY_SIZE(cs35l41_safe_to_active),
 116         .cleanup        = cs35l41_active_to_safe,
 117         .num_cleanup    = ARRAY_SIZE(cs35l41_active_to_safe),
 118 };
 119
 120 static const struct cs35l41_hda_reg_sequence cs35l41_hda_reg_seq_ext_bst = {
 121         .prepare        = cs35l41_start_ext_vspk,
 122         .num_prepare    = ARRAY_SIZE(cs35l41_start_ext_vspk),
 123         .cleanup        = cs35l41_stop_ext_vspk,
 124         .num_cleanup    = ARRAY_SIZE(cs35l41_stop_ext_vspk),
 125 };
 126
 127 static const struct cs35l41_hda_reg_sequence cs35l41_hda_reg_seq_int_bst = {
 128         .prepare        = cs35l41_hda_start_bst,
 129         .num_prepare    = ARRAY_SIZE(cs35l41_hda_start_bst),
 130         .cleanup        = cs35l41_hda_stop_bst,
 131         .num_cleanup    = ARRAY_SIZE(cs35l41_hda_stop_bst),
 132 };
 133
 134 static void cs35l41_hda_playback_hook(struct device *dev, int action)
 135 {
 136         struct cs35l41_hda *cs35l41 = dev_get_drvdata(dev);
 137         const struct cs35l41_hda_reg_sequence *reg_seq = cs35l41->reg_seq;
 138         struct regmap *reg = cs35l41->regmap;
 139         int ret = 0;
 140
 141         switch (action) {
 142         case HDA_GEN_PCM_ACT_OPEN:
 143                 ret = regmap_multi_reg_write(reg, cs35l41_hda_config,
 144                                              ARRAY_SIZE(cs35l41_hda_config));
 145                 break;
 146         case HDA_GEN_PCM_ACT_PREPARE:
 147                 if (reg_seq->prepare)
 148                         ret = regmap_multi_reg_write(reg, reg_seq->prepare, reg_seq->num_prepare);
 149                 break;
 150         case HDA_GEN_PCM_ACT_CLEANUP:
 151                 if (reg_seq->cleanup)
 152                         ret = regmap_multi_reg_write(reg, reg_seq->cleanup, reg_seq->num_cleanup);
 153                 break;
 154         case HDA_GEN_PCM_ACT_CLOSE:
 155                 if (reg_seq->close)
 156                         ret = regmap_multi_reg_write(reg, reg_seq->close, reg_seq->num_close);
 157                 break;
 158         default:
 159                 ret = -EINVAL;
 160                 break;
 161         }
 162
 163         if (ret)
 164                 dev_warn(cs35l41->dev, "Failed to apply multi reg write: %d\n", ret);
 165 }
 166
 167 static int cs35l41_hda_channel_map(struct device *dev, unsigned int tx_num, unsigned int *tx_slot,
 168                                     unsigned int rx_num, unsigned int *rx_slot)
 169 {
 170         struct cs35l41_hda *cs35l41 = dev_get_drvdata(dev);
 171
 172         return cs35l41_set_channels(cs35l41->dev, cs35l41->regmap, tx_num, tx_slot, rx_num,
 173                                     rx_slot);
 174 }
 175
 176 static int cs35l41_hda_bind(struct device *dev, struct device *master, void *master_data)
 177 {
 178         struct cs35l41_hda *cs35l41 = dev_get_drvdata(dev);
 179         struct hda_component *comps = master_data;
 180
 181         if (!comps || cs35l41->index < 0 || cs35l41->index >= HDA_MAX_COMPONENTS)
 182                 return -EINVAL;
 183
 184         comps = &comps[cs35l41->index];
 185         if (comps->dev)
 186                 return -EBUSY;
 187
 188         comps->dev = dev;
 189         strscpy(comps->name, dev_name(dev), sizeof(comps->name));
 190         comps->playback_hook = cs35l41_hda_playback_hook;
 191         comps->set_channel_map = cs35l41_hda_channel_map;
 192
 193         return 0;
 194 }
 195
 196 static void cs35l41_hda_unbind(struct device *dev, struct device *master, void *master_data)
 197 {
 198         struct cs35l41_hda *cs35l41 = dev_get_drvdata(dev);
 199         struct hda_component *comps = master_data;
 200
 201         if (comps[cs35l41->index].dev == dev)
 202                 memset(&comps[cs35l41->index], 0, sizeof(*comps));
 203 }
 204
 205 static const struct component_ops cs35l41_hda_comp_ops = {
 206         .bind = cs35l41_hda_bind,
 207         .unbind = cs35l41_hda_unbind,
 208 };
 209
 210 static int cs35l41_hda_apply_properties(struct cs35l41_hda *cs35l41)
 211 {
 212         struct cs35l41_hw_cfg *hw_cfg = &cs35l41->hw_cfg;
 213         bool internal_boost = false;
 214         int ret;
 215
 216         if (!cs35l41->hw_cfg.valid)
 217                 return -EINVAL;
 218
 219         if (hw_cfg->vspk_always_on) {
 220                 cs35l41->reg_seq = &cs35l41_hda_reg_seq_no_bst;
 221                 return 0;
 222         }
 223
 224         if (hw_cfg->bst_ind > 0 || hw_cfg->bst_cap > 0 || hw_cfg->bst_ipk > 0)
 225                 internal_boost = true;
 226
 227         if (hw_cfg->gpio1.valid) {
 228                 switch (hw_cfg->gpio1.func) {
 229                 case CS35L41_NOT_USED:
 230                         break;
 231                 case CS35l41_VSPK_SWITCH:
 232                         hw_cfg->gpio1.func = CS35L41_GPIO1_GPIO;
 233                         hw_cfg->gpio1.out_en = true;
 234                         break;
 235                 case CS35l41_SYNC:
 236                         hw_cfg->gpio1.func = CS35L41_GPIO1_MDSYNC;
 237                         break;
 238                 default:
 239                         dev_err(cs35l41->dev, "Invalid function %d for GPIO1\n",
 240                                 hw_cfg->gpio1.func);
 241                         return -EINVAL;
 242                 }
 243         }
 244
 245         if (hw_cfg->gpio2.valid) {
 246                 switch (hw_cfg->gpio2.func) {
 247                 case CS35L41_NOT_USED:
 248                         break;
 249                 case CS35L41_INTERRUPT:
 250                         break;
 251                 default:
 252                         dev_err(cs35l41->dev, "Invalid GPIO2 function %d\n", hw_cfg->gpio2.func);
 253                         return -EINVAL;
 254                 }
 255         }
 256
 257         cs35l41_gpio_config(cs35l41->regmap, hw_cfg);
 258
 259         if (internal_boost) {
 260                 cs35l41->reg_seq = &cs35l41_hda_reg_seq_int_bst;
 261                 ret = cs35l41_boost_config(cs35l41->dev, cs35l41->regmap,
 262                                            hw_cfg->bst_ind, hw_cfg->bst_cap, hw_cfg->bst_ipk);
 263                 if (ret)
 264                         return ret;
 265         } else {
 266                 cs35l41->reg_seq = &cs35l41_hda_reg_seq_ext_bst;
 267         }
 268
 269         return cs35l41_hda_channel_map(cs35l41->dev, 0, NULL, 1, &hw_cfg->spk_pos);
 270 }
 271
 272 static int cs35l41_hda_read_acpi(struct cs35l41_hda *cs35l41, const char *hid, int id)
 273 {
 274         struct cs35l41_hw_cfg *hw_cfg = &cs35l41->hw_cfg;
 275         u32 values[HDA_MAX_COMPONENTS];
 276         struct acpi_device *adev;
 277         struct device *physdev;
 278         char *property;
 279         size_t nval;
 280         int i, ret;
 281
 282         adev = acpi_dev_get_first_match_dev(hid, NULL, -1);
 283         if (!adev) {
 284                 dev_err(cs35l41->dev, "Failed to find an ACPI device for %s\n", hid);
 285                 return -ENODEV;
 286         }
 287
 288         physdev = get_device(acpi_get_first_physical_node(adev));
 289         acpi_dev_put(adev);
 290
 291         property = "cirrus,dev-index";
 292         ret = device_property_count_u32(physdev, property);
 293         if (ret <= 0)
 294                 goto no_acpi_dsd;
 295
 296         if (ret > ARRAY_SIZE(values)) {
 297                 ret = -EINVAL;
 298                 goto err;
 299         }
 300         nval = ret;
 301
 302         ret = device_property_read_u32_array(physdev, property, values, nval);
 303         if (ret)
 304                 goto err;
 305
 306         cs35l41->index = -1;
 307         for (i = 0; i < nval; i++) {
 308                 if (values[i] == id) {
 309                         cs35l41->index = i;
 310                         break;
 311                 }
 312         }
 313         if (cs35l41->index == -1) {
 314                 dev_err(cs35l41->dev, "No index found in %s\n", property);
 315                 ret = -ENODEV;
 316                 goto err;
 317         }
 318
 319         /* To use the same release code for all laptop variants we can't use devm_ version of
 320          * gpiod_get here, as CLSA010* don't have a fully functional bios with an _DSD node
 321          */
 322         cs35l41->reset_gpio = fwnode_gpiod_get_index(&adev->fwnode, "reset", cs35l41->index,
 323                                                      GPIOD_OUT_LOW, "cs35l41-reset");
 324
 325         property = "cirrus,speaker-position";
 326         ret = device_property_read_u32_array(physdev, property, values, nval);
 327         if (ret)
 328                 goto err;
 329         hw_cfg->spk_pos = values[cs35l41->index];
 330
 331         property = "cirrus,gpio1-func";
 332         ret = device_property_read_u32_array(physdev, property, values, nval);
 333         if (ret)
 334                 goto err;
 335         hw_cfg->gpio1.func = values[cs35l41->index];
 336         hw_cfg->gpio1.valid = true;
 337
 338         property = "cirrus,gpio2-func";
 339         ret = device_property_read_u32_array(physdev, property, values, nval);
 340         if (ret)
 341                 goto err;
 342         hw_cfg->gpio2.func = values[cs35l41->index];
 343         hw_cfg->gpio2.valid = true;
 344
 345         property = "cirrus,boost-peak-milliamp";
 346         ret = device_property_read_u32_array(physdev, property, values, nval);
 347         if (ret == 0)
 348                 hw_cfg->bst_ipk = values[cs35l41->index];
 349         else
 350                 hw_cfg->bst_ipk = -1;
 351
 352         property = "cirrus,boost-ind-nanohenry";
 353         ret = device_property_read_u32_array(physdev, property, values, nval);
 354         if (ret == 0)
 355                 hw_cfg->bst_ind = values[cs35l41->index];
 356         else
 357                 hw_cfg->bst_ind = -1;
 358
 359         property = "cirrus,boost-cap-microfarad";
 360         ret = device_property_read_u32_array(physdev, property, values, nval);
 361         if (ret == 0)
 362                 hw_cfg->bst_cap = values[cs35l41->index];
 363         else
 364                 hw_cfg->bst_cap = -1;
 365
 366         hw_cfg->valid = true;
 367         put_device(physdev);
 368
 369         return 0;
 370
 371 err:
 372         put_device(physdev);
 373         dev_err(cs35l41->dev, "Failed property %s: %d\n", property, ret);
 374
 375         return ret;
 376
 377 no_acpi_dsd:
 378         /*
 379          * Device CLSA0100 doesn't have _DSD so a gpiod_get by the label reset won't work.
 380          * And devices created by i2c-multi-instantiate don't have their device struct pointing to
 381          * the correct fwnode, so acpi_dev must be used here.
 382          * And devm functions expect that the device requesting the resource has the correct
 383          * fwnode.
 384          */
 385         if (strncmp(hid, "CLSA0100", 8) != 0)
 386                 return -EINVAL;
 387
 388         /* check I2C address to assign the index */
 389         cs35l41->index = id == 0x40 ? 0 : 1;
 390         cs35l41->reset_gpio = gpiod_get_index(physdev, NULL, 0, GPIOD_OUT_HIGH);
 391         cs35l41->hw_cfg.vspk_always_on = true;
 392         cs35l41->hw_cfg.valid = true;
 393         put_device(physdev);
 394
 395         return 0;
 396 }
 397
 398 int cs35l41_hda_probe(struct device *dev, const char *device_name, int id, int irq,
 399                       struct regmap *regmap)
 400 {
 401         unsigned int int_sts, regid, reg_revid, mtl_revid, chipid, int_status;
 402         struct cs35l41_hda *cs35l41;
 403         int ret;
 404
 405         if (IS_ERR(regmap))
 406                 return PTR_ERR(regmap);
 407
 408         cs35l41 = devm_kzalloc(dev, sizeof(*cs35l41), GFP_KERNEL);
 409         if (!cs35l41)
 410                 return -ENOMEM;
 411
 412         cs35l41->dev = dev;
 413         cs35l41->irq = irq;
 414         cs35l41->regmap = regmap;
 415         dev_set_drvdata(dev, cs35l41);
 416
 417         ret = cs35l41_hda_read_acpi(cs35l41, device_name, id);
 418         if (ret) {
 419                 dev_err_probe(cs35l41->dev, ret, "Platform not supported %d\n", ret);
 420                 return ret;
 421         }
 422
 423         if (IS_ERR(cs35l41->reset_gpio)) {
 424                 ret = PTR_ERR(cs35l41->reset_gpio);
 425                 cs35l41->reset_gpio = NULL;
 426                 if (ret == -EBUSY) {
 427                         dev_info(cs35l41->dev, "Reset line busy, assuming shared reset\n");
 428                 } else {
 429                         dev_err_probe(cs35l41->dev, ret, "Failed to get reset GPIO: %d\n", ret);
 430                         goto err;
 431                 }
 432         }
 433         if (cs35l41->reset_gpio) {
 434                 usleep_range(2000, 2100);
 435                 gpiod_set_value_cansleep(cs35l41->reset_gpio, 1);
 436         }
 437
 438         usleep_range(2000, 2100);
 439
 440         ret = regmap_read_poll_timeout(cs35l41->regmap, CS35L41_IRQ1_STATUS4, int_status,
 441                                        int_status & CS35L41_OTP_BOOT_DONE, 1000, 100000);
 442         if (ret) {
 443                 dev_err(cs35l41->dev, "Failed waiting for OTP_BOOT_DONE: %d\n", ret);
 444                 goto err;
 445         }
 446
 447         ret = regmap_read(cs35l41->regmap, CS35L41_IRQ1_STATUS3, &int_sts);
 448         if (ret || (int_sts & CS35L41_OTP_BOOT_ERR)) {
 449                 dev_err(cs35l41->dev, "OTP Boot status %x error: %d\n",
 450                         int_sts & CS35L41_OTP_BOOT_ERR, ret);
 451                 ret = -EIO;
 452                 goto err;
 453         }
 454
 455         ret = regmap_read(cs35l41->regmap, CS35L41_DEVID, &regid);
 456         if (ret) {
 457                 dev_err(cs35l41->dev, "Get Device ID failed: %d\n", ret);
 458                 goto err;
 459         }
 460
 461         ret = regmap_read(cs35l41->regmap, CS35L41_REVID, &reg_revid);
 462         if (ret) {
 463                 dev_err(cs35l41->dev, "Get Revision ID failed: %d\n", ret);
 464                 goto err;
 465         }
 466
 467         mtl_revid = reg_revid & CS35L41_MTLREVID_MASK;
 468
 469         chipid = (mtl_revid % 2) ? CS35L41R_CHIP_ID : CS35L41_CHIP_ID;
 470         if (regid != chipid) {
 471                 dev_err(cs35l41->dev, "CS35L41 Device ID (%X). Expected ID %X\n", regid, chipid);
 472                 ret = -ENODEV;
 473                 goto err;
 474         }
 475
 476         ret = cs35l41_test_key_unlock(cs35l41->dev, cs35l41->regmap);
 477         if (ret)
 478                 goto err;
 479
 480         ret = cs35l41_register_errata_patch(cs35l41->dev, cs35l41->regmap, reg_revid);
 481         if (ret)
 482                 goto err;
 483
 484         ret = cs35l41_otp_unpack(cs35l41->dev, cs35l41->regmap);
 485         if (ret) {
 486                 dev_err(cs35l41->dev, "OTP Unpack failed: %d\n", ret);
 487                 goto err;
 488         }
 489
 490         ret = cs35l41_test_key_lock(cs35l41->dev, cs35l41->regmap);
 491         if (ret)
 492                 goto err;
 493
 494         ret = cs35l41_hda_apply_properties(cs35l41);
 495         if (ret)
 496                 goto err;
 497
 498         if (cs35l41->reg_seq->probe) {
 499                 ret = regmap_multi_reg_write(cs35l41->regmap, cs35l41->reg_seq->probe,
 500                                              cs35l41->reg_seq->num_probe);
 501                 if (ret) {
 502                         dev_err(cs35l41->dev, "Fail to apply probe reg patch: %d\n", ret);
 503                         goto err;
 504                 }
 505         }
 506
 507         ret = component_add(cs35l41->dev, &cs35l41_hda_comp_ops);
 508         if (ret) {
 509                 dev_err(cs35l41->dev, "Register component failed: %d\n", ret);
 510                 goto err;
 511         }
 512
 513         dev_info(cs35l41->dev, "Cirrus Logic CS35L41 (%x), Revision: %02X\n", regid, reg_revid);
 514
 515         return 0;
 516
 517 err:
 518         if (!cs35l41->hw_cfg.vspk_always_on)
 519                 gpiod_set_value_cansleep(cs35l41->reset_gpio, 0);
 520         gpiod_put(cs35l41->reset_gpio);
 521
 522         return ret;
 523 }
 524 EXPORT_SYMBOL_NS_GPL(cs35l41_hda_probe, SND_HDA_SCODEC_CS35L41);
 525
 526 void cs35l41_hda_remove(struct device *dev)
 527 {
 528         struct cs35l41_hda *cs35l41 = dev_get_drvdata(dev);
 529
 530         component_del(cs35l41->dev, &cs35l41_hda_comp_ops);
 531
 532         if (!cs35l41->hw_cfg.vspk_always_on)
 533                 gpiod_set_value_cansleep(cs35l41->reset_gpio, 0);
 534         gpiod_put(cs35l41->reset_gpio);
 535 }
 536 EXPORT_SYMBOL_NS_GPL(cs35l41_hda_remove, SND_HDA_SCODEC_CS35L41);
 537
 538 MODULE_DESCRIPTION("CS35L41 HDA Driver");
 539 MODULE_AUTHOR("Lucas Tanure, Cirrus Logic Inc, <tanureal@opensource.cirrus.com>");
 540 MODULE_LICENSE("GPL");