sound/firewire/motu/motu-protocol-v2.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * motu-protocol-v2.c - a part of driver for MOTU FireWire series
   4  *
   5  * Copyright (c) 2015-2017 Takashi Sakamoto <o-takashi@sakamocchi.jp>
   6  */
   7
   8 #include "motu.h"
   9
  10 #define V2_CLOCK_STATUS_OFFSET                  0x0b14
  11 #define  V2_CLOCK_RATE_MASK                     0x00000038
  12 #define  V2_CLOCK_RATE_SHIFT                    3
  13 #define  V2_CLOCK_SRC_MASK                      0x00000007
  14 #define  V2_CLOCK_SRC_SHIFT                     0
  15 #define  V2_CLOCK_TRAVELER_FETCH_DISABLE        0x04000000
  16 #define  V2_CLOCK_TRAVELER_FETCH_ENABLE         0x03000000
  17 #define  V2_CLOCK_8PRE_FETCH_DISABLE            0x02000000
  18 #define  V2_CLOCK_8PRE_FETCH_ENABLE             0x00000000
  19
  20 #define V2_IN_OUT_CONF_OFFSET                   0x0c04
  21 #define  V2_OPT_OUT_IFACE_MASK                  0x00000c00
  22 #define  V2_OPT_OUT_IFACE_SHIFT                 10
  23 #define  V2_OPT_IN_IFACE_MASK                   0x00000300
  24 #define  V2_OPT_IN_IFACE_SHIFT                  8
  25 #define  V2_OPT_IFACE_MODE_NONE                 0
  26 #define  V2_OPT_IFACE_MODE_ADAT                 1
  27 #define  V2_OPT_IFACE_MODE_SPDIF                2
  28
  29 static int get_clock_rate(u32 data, unsigned int *rate)
  30 {
  31         unsigned int index = (data & V2_CLOCK_RATE_MASK) >> V2_CLOCK_RATE_SHIFT;
  32         if (index >= ARRAY_SIZE(snd_motu_clock_rates))
  33                 return -EIO;
  34
  35         *rate = snd_motu_clock_rates[index];
  36
  37         return 0;
  38 }
  39
  40 static int v2_get_clock_rate(struct snd_motu *motu, unsigned int *rate)
  41 {
  42         __be32 reg;
  43         int err;
  44
  45         err = snd_motu_transaction_read(motu, V2_CLOCK_STATUS_OFFSET, &reg,
  46                                         sizeof(reg));
  47         if (err < 0)
  48                 return err;
  49
  50         return get_clock_rate(be32_to_cpu(reg), rate);
  51 }
  52
  53 static int v2_set_clock_rate(struct snd_motu *motu, unsigned int rate)
  54 {
  55         __be32 reg;
  56         u32 data;
  57         int i;
  58         int err;
  59
  60         for (i = 0; i < ARRAY_SIZE(snd_motu_clock_rates); ++i) {
  61                 if (snd_motu_clock_rates[i] == rate)
  62                         break;
  63         }
  64         if (i == ARRAY_SIZE(snd_motu_clock_rates))
  65                 return -EINVAL;
  66
  67         err = snd_motu_transaction_read(motu, V2_CLOCK_STATUS_OFFSET, &reg,
  68                                         sizeof(reg));
  69         if (err < 0)
  70                 return err;
  71         data = be32_to_cpu(reg);
  72
  73         data &= ~V2_CLOCK_RATE_MASK;
  74         data |= i << V2_CLOCK_RATE_SHIFT;
  75
  76         if (motu->spec == &snd_motu_spec_traveler) {
  77                 data &= ~V2_CLOCK_TRAVELER_FETCH_ENABLE;
  78                 data |= V2_CLOCK_TRAVELER_FETCH_DISABLE;
  79         }
  80
  81         reg = cpu_to_be32(data);
  82         return snd_motu_transaction_write(motu, V2_CLOCK_STATUS_OFFSET, &reg,
  83                                           sizeof(reg));
  84 }
  85
  86 static int get_clock_source(struct snd_motu *motu, u32 data,
  87                             enum snd_motu_clock_source *src)
  88 {
  89         unsigned int index = data & V2_CLOCK_SRC_MASK;
  90         if (index > 5)
  91                 return -EIO;
  92
  93         switch (index) {
  94         case 0:
  95                 *src = SND_MOTU_CLOCK_SOURCE_INTERNAL;
  96                 break;
  97         case 1:
  98         {
  99                 __be32 reg;
 100
 101                 // To check the configuration of optical interface.
 102                 int err = snd_motu_transaction_read(motu, V2_IN_OUT_CONF_OFFSET,
 103                                                     &reg, sizeof(reg));
 104                 if (err < 0)
 105                         return err;
 106
 107                 if (be32_to_cpu(reg) & 0x00000200)
 108                         *src = SND_MOTU_CLOCK_SOURCE_SPDIF_ON_OPT;
 109                 else
 110                         *src = SND_MOTU_CLOCK_SOURCE_ADAT_ON_OPT;
 111                 break;
 112         }
 113         case 2:
 114                 *src = SND_MOTU_CLOCK_SOURCE_SPDIF_ON_COAX;
 115                 break;
 116         case 3:
 117                 *src = SND_MOTU_CLOCK_SOURCE_SPH;
 118                 break;
 119         case 4:
 120                 *src = SND_MOTU_CLOCK_SOURCE_WORD_ON_BNC;
 121                 break;
 122         case 5:
 123                 *src = SND_MOTU_CLOCK_SOURCE_ADAT_ON_DSUB;
 124                 break;
 125         default:
 126                 return -EIO;
 127         }
 128
 129         return 0;
 130 }
 131
 132 static int v2_get_clock_source(struct snd_motu *motu,
 133                                enum snd_motu_clock_source *src)
 134 {
 135         __be32 reg;
 136         int err;
 137
 138         err = snd_motu_transaction_read(motu, V2_CLOCK_STATUS_OFFSET, &reg,
 139                                         sizeof(reg));
 140         if (err < 0)
 141                 return err;
 142
 143         return get_clock_source(motu, be32_to_cpu(reg), src);
 144 }
 145
 146 static int v2_switch_fetching_mode(struct snd_motu *motu, bool enable)
 147 {
 148         __be32 reg;
 149         u32 data;
 150         int err = 0;
 151
 152         if (motu->spec == &snd_motu_spec_traveler ||
 153             motu->spec == &snd_motu_spec_8pre) {
 154                 err = snd_motu_transaction_read(motu, V2_CLOCK_STATUS_OFFSET,
 155                                                 &reg, sizeof(reg));
 156                 if (err < 0)
 157                         return err;
 158                 data = be32_to_cpu(reg);
 159
 160                 if (motu->spec == &snd_motu_spec_traveler) {
 161                         data &= ~(V2_CLOCK_TRAVELER_FETCH_DISABLE |
 162                                   V2_CLOCK_TRAVELER_FETCH_ENABLE);
 163
 164                         if (enable)
 165                                 data |= V2_CLOCK_TRAVELER_FETCH_ENABLE;
 166                         else
 167                                 data |= V2_CLOCK_TRAVELER_FETCH_DISABLE;
 168                 } else if (motu->spec == &snd_motu_spec_8pre) {
 169                         data &= ~(V2_CLOCK_8PRE_FETCH_DISABLE |
 170                                   V2_CLOCK_8PRE_FETCH_ENABLE);
 171
 172                         if (enable)
 173                                 data |= V2_CLOCK_8PRE_FETCH_DISABLE;
 174                         else
 175                                 data |= V2_CLOCK_8PRE_FETCH_ENABLE;
 176                 }
 177
 178                 reg = cpu_to_be32(data);
 179                 err = snd_motu_transaction_write(motu, V2_CLOCK_STATUS_OFFSET,
 180                                                  &reg, sizeof(reg));
 181         }
 182
 183         return err;
 184 }
 185
 186 static void calculate_fixed_part(struct snd_motu_packet_format *formats,
 187                                  enum amdtp_stream_direction dir,
 188                                  enum snd_motu_spec_flags flags,
 189                                  unsigned char analog_ports)
 190 {
 191         unsigned char pcm_chunks[3] = {0, 0, 0};
 192
 193         formats->msg_chunks = 2;
 194
 195         pcm_chunks[0] = analog_ports;
 196         pcm_chunks[1] = analog_ports;
 197         if (flags & SND_MOTU_SPEC_SUPPORT_CLOCK_X4)
 198                 pcm_chunks[2] = analog_ports;
 199
 200         if (dir == AMDTP_IN_STREAM) {
 201                 if (flags & SND_MOTU_SPEC_TX_MICINST_CHUNK) {
 202                         pcm_chunks[0] += 2;
 203                         pcm_chunks[1] += 2;
 204                 }
 205                 if (flags & SND_MOTU_SPEC_TX_RETURN_CHUNK) {
 206                         pcm_chunks[0] += 2;
 207                         pcm_chunks[1] += 2;
 208                 }
 209         } else {
 210                 if (flags & SND_MOTU_SPEC_RX_SEPARATED_MAIN) {
 211                         pcm_chunks[0] += 2;
 212                         pcm_chunks[1] += 2;
 213                 }
 214
 215                 // Packets to v2 units include 2 chunks for phone 1/2, except
 216                 // for 176.4/192.0 kHz.
 217                 pcm_chunks[0] += 2;
 218                 pcm_chunks[1] += 2;
 219         }
 220
 221         if (flags & SND_MOTU_SPEC_HAS_AESEBU_IFACE) {
 222                 pcm_chunks[0] += 2;
 223                 pcm_chunks[1] += 2;
 224         }
 225
 226         /*
 227          * All of v2 models have a pair of coaxial interfaces for digital in/out
 228          * port. At 44.1/48.0/88.2/96.0 kHz, packets includes PCM from these
 229          * ports.
 230          */
 231         pcm_chunks[0] += 2;
 232         pcm_chunks[1] += 2;
 233
 234         formats->fixed_part_pcm_chunks[0] = pcm_chunks[0];
 235         formats->fixed_part_pcm_chunks[1] = pcm_chunks[1];
 236         formats->fixed_part_pcm_chunks[2] = pcm_chunks[2];
 237 }
 238
 239 static void calculate_differed_part(struct snd_motu_packet_format *formats,
 240                                     enum snd_motu_spec_flags flags,
 241                                     u32 data, u32 mask, u32 shift)
 242 {
 243         unsigned char pcm_chunks[2] = {0, 0};
 244
 245         /*
 246          * When optical interfaces are configured for S/PDIF (TOSLINK),
 247          * the above PCM frames come from them, instead of coaxial
 248          * interfaces.
 249          */
 250         data = (data & mask) >> shift;
 251         if (data == V2_OPT_IFACE_MODE_ADAT) {
 252                 if (flags & SND_MOTU_SPEC_HAS_OPT_IFACE_A) {
 253                         pcm_chunks[0] += 8;
 254                         pcm_chunks[1] += 4;
 255                 }
 256                 // 8pre has two sets of optical interface and doesn't reduce
 257                 // chunks for ADAT signals.
 258                 if (flags & SND_MOTU_SPEC_HAS_OPT_IFACE_B) {
 259                         pcm_chunks[1] += 4;
 260                 }
 261         }
 262
 263         /* At mode x4, no data chunks are supported in this part. */
 264         formats->differed_part_pcm_chunks[0] = pcm_chunks[0];
 265         formats->differed_part_pcm_chunks[1] = pcm_chunks[1];
 266 }
 267
 268 static int v2_cache_packet_formats(struct snd_motu *motu)
 269 {
 270         __be32 reg;
 271         u32 data;
 272         int err;
 273
 274         err = snd_motu_transaction_read(motu, V2_IN_OUT_CONF_OFFSET, &reg,
 275                                         sizeof(reg));
 276         if (err < 0)
 277                 return err;
 278         data = be32_to_cpu(reg);
 279
 280         calculate_fixed_part(&motu->tx_packet_formats, AMDTP_IN_STREAM,
 281                              motu->spec->flags, motu->spec->analog_in_ports);
 282         calculate_differed_part(&motu->tx_packet_formats, motu->spec->flags,
 283                         data, V2_OPT_IN_IFACE_MASK, V2_OPT_IN_IFACE_SHIFT);
 284
 285         calculate_fixed_part(&motu->rx_packet_formats, AMDTP_OUT_STREAM,
 286                              motu->spec->flags, motu->spec->analog_out_ports);
 287         calculate_differed_part(&motu->rx_packet_formats, motu->spec->flags,
 288                         data, V2_OPT_OUT_IFACE_MASK, V2_OPT_OUT_IFACE_SHIFT);
 289
 290         motu->tx_packet_formats.pcm_byte_offset = 10;
 291         motu->rx_packet_formats.pcm_byte_offset = 10;
 292
 293         return 0;
 294 }
 295
 296 const struct snd_motu_protocol snd_motu_protocol_v2 = {
 297         .get_clock_rate         = v2_get_clock_rate,
 298         .set_clock_rate         = v2_set_clock_rate,
 299         .get_clock_source       = v2_get_clock_source,
 300         .switch_fetching_mode   = v2_switch_fetching_mode,
 301         .cache_packet_formats   = v2_cache_packet_formats,
 302 };