1 // SPDX-License-Identifier: GPL-2.0-only
3 * Audio and Music Data Transmission Protocol (IEC 61883-6) streams
4 * with Common Isochronous Packet (IEC 61883-1) headers
6 * Copyright (c) Clemens Ladisch <clemens@ladisch.de>
9 #include <linux/device.h>
10 #include <linux/err.h>
11 #include <linux/firewire.h>
12 #include <linux/module.h>
13 #include <linux/slab.h>
14 #include <sound/pcm.h>
15 #include <sound/pcm_params.h>
16 #include "amdtp-stream.h"
18 #define TICKS_PER_CYCLE 3072
19 #define CYCLES_PER_SECOND 8000
20 #define TICKS_PER_SECOND (TICKS_PER_CYCLE * CYCLES_PER_SECOND)
22 /* Always support Linux tracing subsystem. */
23 #define CREATE_TRACE_POINTS
24 #include "amdtp-stream-trace.h"
26 #define TRANSFER_DELAY_TICKS 0x2e00 /* 479.17 microseconds */
28 /* isochronous header parameters */
29 #define ISO_DATA_LENGTH_SHIFT 16
30 #define TAG_NO_CIP_HEADER 0
33 /* common isochronous packet header parameters */
34 #define CIP_EOH_SHIFT 31
35 #define CIP_EOH (1u << CIP_EOH_SHIFT)
36 #define CIP_EOH_MASK 0x80000000
37 #define CIP_SID_SHIFT 24
38 #define CIP_SID_MASK 0x3f000000
39 #define CIP_DBS_MASK 0x00ff0000
40 #define CIP_DBS_SHIFT 16
41 #define CIP_SPH_MASK 0x00000400
42 #define CIP_SPH_SHIFT 10
43 #define CIP_DBC_MASK 0x000000ff
44 #define CIP_FMT_SHIFT 24
45 #define CIP_FMT_MASK 0x3f000000
46 #define CIP_FDF_MASK 0x00ff0000
47 #define CIP_FDF_SHIFT 16
48 #define CIP_SYT_MASK 0x0000ffff
49 #define CIP_SYT_NO_INFO 0xffff
51 /* Audio and Music transfer protocol specific parameters */
52 #define CIP_FMT_AM 0x10
53 #define AMDTP_FDF_NO_DATA 0xff
55 // For iso header, tstamp and 2 CIP header.
56 #define IR_CTX_HEADER_SIZE_CIP 16
57 // For iso header and tstamp.
58 #define IR_CTX_HEADER_SIZE_NO_CIP 8
59 #define HEADER_TSTAMP_MASK 0x0000ffff
61 #define IT_PKT_HEADER_SIZE_CIP 8 // For 2 CIP header.
62 #define IT_PKT_HEADER_SIZE_NO_CIP 0 // Nothing.
64 static void pcm_period_tasklet(unsigned long data);
67 * amdtp_stream_init - initialize an AMDTP stream structure
68 * @s: the AMDTP stream to initialize
69 * @unit: the target of the stream
70 * @dir: the direction of stream
71 * @flags: the packet transmission method to use
72 * @fmt: the value of fmt field in CIP header
73 * @process_ctx_payloads: callback handler to process payloads of isoc context
74 * @protocol_size: the size to allocate newly for protocol
76 int amdtp_stream_init(struct amdtp_stream *s, struct fw_unit *unit,
77 enum amdtp_stream_direction dir, enum cip_flags flags,
79 amdtp_stream_process_ctx_payloads_t process_ctx_payloads,
80 unsigned int protocol_size)
82 if (process_ctx_payloads == NULL)
85 s->protocol = kzalloc(protocol_size, GFP_KERNEL);
92 s->context = ERR_PTR(-1);
93 mutex_init(&s->mutex);
94 tasklet_init(&s->period_tasklet, pcm_period_tasklet, (unsigned long)s);
97 init_waitqueue_head(&s->callback_wait);
98 s->callbacked = false;
101 s->process_ctx_payloads = process_ctx_payloads;
103 if (dir == AMDTP_OUT_STREAM)
104 s->ctx_data.rx.syt_override = -1;
108 EXPORT_SYMBOL(amdtp_stream_init);
111 * amdtp_stream_destroy - free stream resources
112 * @s: the AMDTP stream to destroy
114 void amdtp_stream_destroy(struct amdtp_stream *s)
116 /* Not initialized. */
117 if (s->protocol == NULL)
120 WARN_ON(amdtp_stream_running(s));
122 mutex_destroy(&s->mutex);
124 EXPORT_SYMBOL(amdtp_stream_destroy);
126 const unsigned int amdtp_syt_intervals[CIP_SFC_COUNT] = {
130 [CIP_SFC_88200] = 16,
131 [CIP_SFC_96000] = 16,
132 [CIP_SFC_176400] = 32,
133 [CIP_SFC_192000] = 32,
135 EXPORT_SYMBOL(amdtp_syt_intervals);
137 const unsigned int amdtp_rate_table[CIP_SFC_COUNT] = {
138 [CIP_SFC_32000] = 32000,
139 [CIP_SFC_44100] = 44100,
140 [CIP_SFC_48000] = 48000,
141 [CIP_SFC_88200] = 88200,
142 [CIP_SFC_96000] = 96000,
143 [CIP_SFC_176400] = 176400,
144 [CIP_SFC_192000] = 192000,
146 EXPORT_SYMBOL(amdtp_rate_table);
148 static int apply_constraint_to_size(struct snd_pcm_hw_params *params,
149 struct snd_pcm_hw_rule *rule)
151 struct snd_interval *s = hw_param_interval(params, rule->var);
152 const struct snd_interval *r =
153 hw_param_interval_c(params, SNDRV_PCM_HW_PARAM_RATE);
154 struct snd_interval t = {0};
155 unsigned int step = 0;
158 for (i = 0; i < CIP_SFC_COUNT; ++i) {
159 if (snd_interval_test(r, amdtp_rate_table[i]))
160 step = max(step, amdtp_syt_intervals[i]);
163 t.min = roundup(s->min, step);
164 t.max = rounddown(s->max, step);
167 return snd_interval_refine(s, &t);
171 * amdtp_stream_add_pcm_hw_constraints - add hw constraints for PCM substream
172 * @s: the AMDTP stream, which must be initialized.
173 * @runtime: the PCM substream runtime
175 int amdtp_stream_add_pcm_hw_constraints(struct amdtp_stream *s,
176 struct snd_pcm_runtime *runtime)
178 struct snd_pcm_hardware *hw = &runtime->hw;
181 hw->info = SNDRV_PCM_INFO_BATCH |
182 SNDRV_PCM_INFO_BLOCK_TRANSFER |
183 SNDRV_PCM_INFO_INTERLEAVED |
184 SNDRV_PCM_INFO_JOINT_DUPLEX |
185 SNDRV_PCM_INFO_MMAP |
186 SNDRV_PCM_INFO_MMAP_VALID;
188 /* SNDRV_PCM_INFO_BATCH */
190 hw->periods_max = UINT_MAX;
192 /* bytes for a frame */
193 hw->period_bytes_min = 4 * hw->channels_max;
195 /* Just to prevent from allocating much pages. */
196 hw->period_bytes_max = hw->period_bytes_min * 2048;
197 hw->buffer_bytes_max = hw->period_bytes_max * hw->periods_min;
200 * Currently firewire-lib processes 16 packets in one software
201 * interrupt callback. This equals to 2msec but actually the
202 * interval of the interrupts has a jitter.
203 * Additionally, even if adding a constraint to fit period size to
204 * 2msec, actual calculated frames per period doesn't equal to 2msec,
205 * depending on sampling rate.
206 * Anyway, the interval to call snd_pcm_period_elapsed() cannot 2msec.
207 * Here let us use 5msec for safe period interrupt.
209 err = snd_pcm_hw_constraint_minmax(runtime,
210 SNDRV_PCM_HW_PARAM_PERIOD_TIME,
215 /* Non-Blocking stream has no more constraints */
216 if (!(s->flags & CIP_BLOCKING))
220 * One AMDTP packet can include some frames. In blocking mode, the
221 * number equals to SYT_INTERVAL. So the number is 8, 16 or 32,
222 * depending on its sampling rate. For accurate period interrupt, it's
223 * preferrable to align period/buffer sizes to current SYT_INTERVAL.
225 err = snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE,
226 apply_constraint_to_size, NULL,
227 SNDRV_PCM_HW_PARAM_PERIOD_SIZE,
228 SNDRV_PCM_HW_PARAM_RATE, -1);
231 err = snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_SIZE,
232 apply_constraint_to_size, NULL,
233 SNDRV_PCM_HW_PARAM_BUFFER_SIZE,
234 SNDRV_PCM_HW_PARAM_RATE, -1);
240 EXPORT_SYMBOL(amdtp_stream_add_pcm_hw_constraints);
243 * amdtp_stream_set_parameters - set stream parameters
244 * @s: the AMDTP stream to configure
245 * @rate: the sample rate
246 * @data_block_quadlets: the size of a data block in quadlet unit
248 * The parameters must be set before the stream is started, and must not be
249 * changed while the stream is running.
251 int amdtp_stream_set_parameters(struct amdtp_stream *s, unsigned int rate,
252 unsigned int data_block_quadlets)
256 for (sfc = 0; sfc < ARRAY_SIZE(amdtp_rate_table); ++sfc) {
257 if (amdtp_rate_table[sfc] == rate)
260 if (sfc == ARRAY_SIZE(amdtp_rate_table))
264 s->data_block_quadlets = data_block_quadlets;
265 s->syt_interval = amdtp_syt_intervals[sfc];
267 // default buffering in the device.
268 if (s->direction == AMDTP_OUT_STREAM) {
269 s->ctx_data.rx.transfer_delay =
270 TRANSFER_DELAY_TICKS - TICKS_PER_CYCLE;
272 if (s->flags & CIP_BLOCKING) {
273 // additional buffering needed to adjust for no-data
275 s->ctx_data.rx.transfer_delay +=
276 TICKS_PER_SECOND * s->syt_interval / rate;
282 EXPORT_SYMBOL(amdtp_stream_set_parameters);
285 * amdtp_stream_get_max_payload - get the stream's packet size
286 * @s: the AMDTP stream
288 * This function must not be called before the stream has been configured
289 * with amdtp_stream_set_parameters().
291 unsigned int amdtp_stream_get_max_payload(struct amdtp_stream *s)
293 unsigned int multiplier = 1;
294 unsigned int cip_header_size = 0;
296 if (s->flags & CIP_JUMBO_PAYLOAD)
298 if (!(s->flags & CIP_NO_HEADER))
299 cip_header_size = sizeof(__be32) * 2;
301 return cip_header_size +
302 s->syt_interval * s->data_block_quadlets * sizeof(__be32) * multiplier;
304 EXPORT_SYMBOL(amdtp_stream_get_max_payload);
307 * amdtp_stream_pcm_prepare - prepare PCM device for running
308 * @s: the AMDTP stream
310 * This function should be called from the PCM device's .prepare callback.
312 void amdtp_stream_pcm_prepare(struct amdtp_stream *s)
314 tasklet_kill(&s->period_tasklet);
315 s->pcm_buffer_pointer = 0;
316 s->pcm_period_pointer = 0;
318 EXPORT_SYMBOL(amdtp_stream_pcm_prepare);
320 static unsigned int calculate_data_blocks(struct amdtp_stream *s,
323 unsigned int phase, data_blocks;
326 if (s->flags & CIP_BLOCKING) {
327 /* This module generate empty packet for 'no data'. */
328 if (syt == CIP_SYT_NO_INFO)
331 data_blocks = s->syt_interval;
332 /* Non-blocking mode. */
334 if (!cip_sfc_is_base_44100(s->sfc)) {
335 // Sample_rate / 8000 is an integer, and precomputed.
336 data_blocks = s->ctx_data.rx.data_block_state;
338 phase = s->ctx_data.rx.data_block_state;
341 * This calculates the number of data blocks per packet so that
342 * 1) the overall rate is correct and exactly synchronized to
344 * 2) packets with a rounded-up number of blocks occur as early
345 * as possible in the sequence (to prevent underruns of the
348 if (s->sfc == CIP_SFC_44100)
349 /* 6 6 5 6 5 6 5 ... */
350 data_blocks = 5 + ((phase & 1) ^
351 (phase == 0 || phase >= 40));
353 /* 12 11 11 11 11 ... or 23 22 22 22 22 ... */
354 data_blocks = 11 * (s->sfc >> 1) + (phase == 0);
355 if (++phase >= (80 >> (s->sfc >> 1)))
357 s->ctx_data.rx.data_block_state = phase;
364 static unsigned int calculate_syt(struct amdtp_stream *s,
367 unsigned int syt_offset, phase, index, syt;
369 if (s->ctx_data.rx.last_syt_offset < TICKS_PER_CYCLE) {
370 if (!cip_sfc_is_base_44100(s->sfc))
371 syt_offset = s->ctx_data.rx.last_syt_offset +
372 s->ctx_data.rx.syt_offset_state;
375 * The time, in ticks, of the n'th SYT_INTERVAL sample is:
376 * n * SYT_INTERVAL * 24576000 / sample_rate
377 * Modulo TICKS_PER_CYCLE, the difference between successive
378 * elements is about 1386.23. Rounding the results of this
379 * formula to the SYT precision results in a sequence of
380 * differences that begins with:
381 * 1386 1386 1387 1386 1386 1386 1387 1386 1386 1386 1387 ...
382 * This code generates _exactly_ the same sequence.
384 phase = s->ctx_data.rx.syt_offset_state;
386 syt_offset = s->ctx_data.rx.last_syt_offset;
387 syt_offset += 1386 + ((index && !(index & 3)) ||
391 s->ctx_data.rx.syt_offset_state = phase;
394 syt_offset = s->ctx_data.rx.last_syt_offset - TICKS_PER_CYCLE;
395 s->ctx_data.rx.last_syt_offset = syt_offset;
397 if (syt_offset < TICKS_PER_CYCLE) {
398 syt_offset += s->ctx_data.rx.transfer_delay;
399 syt = (cycle + syt_offset / TICKS_PER_CYCLE) << 12;
400 syt += syt_offset % TICKS_PER_CYCLE;
402 return syt & CIP_SYT_MASK;
404 return CIP_SYT_NO_INFO;
408 static void update_pcm_pointers(struct amdtp_stream *s,
409 struct snd_pcm_substream *pcm,
414 ptr = s->pcm_buffer_pointer + frames;
415 if (ptr >= pcm->runtime->buffer_size)
416 ptr -= pcm->runtime->buffer_size;
417 WRITE_ONCE(s->pcm_buffer_pointer, ptr);
419 s->pcm_period_pointer += frames;
420 if (s->pcm_period_pointer >= pcm->runtime->period_size) {
421 s->pcm_period_pointer -= pcm->runtime->period_size;
422 tasklet_hi_schedule(&s->period_tasklet);
426 static void pcm_period_tasklet(unsigned long data)
428 struct amdtp_stream *s = (void *)data;
429 struct snd_pcm_substream *pcm = READ_ONCE(s->pcm);
432 snd_pcm_period_elapsed(pcm);
435 static int queue_packet(struct amdtp_stream *s, struct fw_iso_packet *params,
440 params->interrupt = sched_irq;
441 params->tag = s->tag;
444 err = fw_iso_context_queue(s->context, params, &s->buffer.iso_buffer,
445 s->buffer.packets[s->packet_index].offset);
447 dev_err(&s->unit->device, "queueing error: %d\n", err);
451 if (++s->packet_index >= s->queue_size)
457 static inline int queue_out_packet(struct amdtp_stream *s,
458 struct fw_iso_packet *params, bool sched_irq)
461 !!(params->header_length == 0 && params->payload_length == 0);
462 return queue_packet(s, params, sched_irq);
465 static inline int queue_in_packet(struct amdtp_stream *s,
466 struct fw_iso_packet *params, bool sched_irq)
468 // Queue one packet for IR context.
469 params->header_length = s->ctx_data.tx.ctx_header_size;
470 params->payload_length = s->ctx_data.tx.max_ctx_payload_length;
471 params->skip = false;
472 return queue_packet(s, params, sched_irq);
475 static void generate_cip_header(struct amdtp_stream *s, __be32 cip_header[2],
476 unsigned int data_block_counter, unsigned int syt)
478 cip_header[0] = cpu_to_be32(READ_ONCE(s->source_node_id_field) |
479 (s->data_block_quadlets << CIP_DBS_SHIFT) |
480 ((s->sph << CIP_SPH_SHIFT) & CIP_SPH_MASK) |
482 cip_header[1] = cpu_to_be32(CIP_EOH |
483 ((s->fmt << CIP_FMT_SHIFT) & CIP_FMT_MASK) |
484 ((s->ctx_data.rx.fdf << CIP_FDF_SHIFT) & CIP_FDF_MASK) |
485 (syt & CIP_SYT_MASK));
488 static void build_it_pkt_header(struct amdtp_stream *s, unsigned int cycle,
489 struct fw_iso_packet *params,
490 unsigned int data_blocks,
491 unsigned int data_block_counter,
492 unsigned int syt, unsigned int index)
494 unsigned int payload_length;
497 payload_length = data_blocks * sizeof(__be32) * s->data_block_quadlets;
498 params->payload_length = payload_length;
500 if (!(s->flags & CIP_NO_HEADER)) {
501 cip_header = (__be32 *)params->header;
502 generate_cip_header(s, cip_header, data_block_counter, syt);
503 params->header_length = 2 * sizeof(__be32);
504 payload_length += params->header_length;
509 trace_amdtp_packet(s, cycle, cip_header, payload_length, data_blocks,
510 data_block_counter, index);
513 static int check_cip_header(struct amdtp_stream *s, const __be32 *buf,
514 unsigned int payload_length,
515 unsigned int *data_blocks,
516 unsigned int *data_block_counter, unsigned int *syt)
525 cip_header[0] = be32_to_cpu(buf[0]);
526 cip_header[1] = be32_to_cpu(buf[1]);
529 * This module supports 'Two-quadlet CIP header with SYT field'.
530 * For convenience, also check FMT field is AM824 or not.
532 if ((((cip_header[0] & CIP_EOH_MASK) == CIP_EOH) ||
533 ((cip_header[1] & CIP_EOH_MASK) != CIP_EOH)) &&
534 (!(s->flags & CIP_HEADER_WITHOUT_EOH))) {
535 dev_info_ratelimited(&s->unit->device,
536 "Invalid CIP header for AMDTP: %08X:%08X\n",
537 cip_header[0], cip_header[1]);
541 /* Check valid protocol or not. */
542 sph = (cip_header[0] & CIP_SPH_MASK) >> CIP_SPH_SHIFT;
543 fmt = (cip_header[1] & CIP_FMT_MASK) >> CIP_FMT_SHIFT;
544 if (sph != s->sph || fmt != s->fmt) {
545 dev_info_ratelimited(&s->unit->device,
546 "Detect unexpected protocol: %08x %08x\n",
547 cip_header[0], cip_header[1]);
551 /* Calculate data blocks */
552 fdf = (cip_header[1] & CIP_FDF_MASK) >> CIP_FDF_SHIFT;
553 if (payload_length < sizeof(__be32) * 2 ||
554 (fmt == CIP_FMT_AM && fdf == AMDTP_FDF_NO_DATA)) {
557 unsigned int data_block_quadlets =
558 (cip_header[0] & CIP_DBS_MASK) >> CIP_DBS_SHIFT;
559 /* avoid division by zero */
560 if (data_block_quadlets == 0) {
561 dev_err(&s->unit->device,
562 "Detect invalid value in dbs field: %08X\n",
566 if (s->flags & CIP_WRONG_DBS)
567 data_block_quadlets = s->data_block_quadlets;
569 *data_blocks = (payload_length / sizeof(__be32) - 2) /
573 /* Check data block counter continuity */
574 dbc = cip_header[0] & CIP_DBC_MASK;
575 if (*data_blocks == 0 && (s->flags & CIP_EMPTY_HAS_WRONG_DBC) &&
576 *data_block_counter != UINT_MAX)
577 dbc = *data_block_counter;
579 if ((dbc == 0x00 && (s->flags & CIP_SKIP_DBC_ZERO_CHECK)) ||
580 *data_block_counter == UINT_MAX) {
582 } else if (!(s->flags & CIP_DBC_IS_END_EVENT)) {
583 lost = dbc != *data_block_counter;
585 unsigned int dbc_interval;
587 if (*data_blocks > 0 && s->ctx_data.tx.dbc_interval > 0)
588 dbc_interval = s->ctx_data.tx.dbc_interval;
590 dbc_interval = *data_blocks;
592 lost = dbc != ((*data_block_counter + dbc_interval) & 0xff);
596 dev_err(&s->unit->device,
597 "Detect discontinuity of CIP: %02X %02X\n",
598 *data_block_counter, dbc);
602 *data_block_counter = dbc;
604 *syt = cip_header[1] & CIP_SYT_MASK;
609 static int parse_ir_ctx_header(struct amdtp_stream *s, unsigned int cycle,
610 const __be32 *ctx_header,
611 unsigned int *payload_length,
612 unsigned int *data_blocks,
613 unsigned int *data_block_counter,
614 unsigned int *syt, unsigned int index)
616 const __be32 *cip_header;
619 *payload_length = be32_to_cpu(ctx_header[0]) >> ISO_DATA_LENGTH_SHIFT;
620 if (*payload_length > s->ctx_data.tx.ctx_header_size +
621 s->ctx_data.tx.max_ctx_payload_length) {
622 dev_err(&s->unit->device,
623 "Detect jumbo payload: %04x %04x\n",
624 *payload_length, s->ctx_data.tx.max_ctx_payload_length);
628 if (!(s->flags & CIP_NO_HEADER)) {
629 cip_header = ctx_header + 2;
630 err = check_cip_header(s, cip_header, *payload_length,
631 data_blocks, data_block_counter, syt);
637 *data_blocks = *payload_length / sizeof(__be32) /
638 s->data_block_quadlets;
641 if (*data_block_counter == UINT_MAX)
642 *data_block_counter = 0;
645 trace_amdtp_packet(s, cycle, cip_header, *payload_length, *data_blocks,
646 *data_block_counter, index);
651 // In CYCLE_TIMER register of IEEE 1394, 7 bits are used to represent second. On
652 // the other hand, in DMA descriptors of 1394 OHCI, 3 bits are used to represent
653 // it. Thus, via Linux firewire subsystem, we can get the 3 bits for second.
654 static inline u32 compute_cycle_count(__be32 ctx_header_tstamp)
656 u32 tstamp = be32_to_cpu(ctx_header_tstamp) & HEADER_TSTAMP_MASK;
657 return (((tstamp >> 13) & 0x07) * 8000) + (tstamp & 0x1fff);
660 static inline u32 increment_cycle_count(u32 cycle, unsigned int addend)
663 if (cycle >= 8 * CYCLES_PER_SECOND)
664 cycle -= 8 * CYCLES_PER_SECOND;
668 // Align to actual cycle count for the packet which is going to be scheduled.
669 // This module queued the same number of isochronous cycle as the size of queue
670 // to kip isochronous cycle, therefore it's OK to just increment the cycle by
671 // the size of queue for scheduled cycle.
672 static inline u32 compute_it_cycle(const __be32 ctx_header_tstamp,
673 unsigned int queue_size)
675 u32 cycle = compute_cycle_count(ctx_header_tstamp);
676 return increment_cycle_count(cycle, queue_size);
679 static int generate_device_pkt_descs(struct amdtp_stream *s,
680 struct pkt_desc *descs,
681 const __be32 *ctx_header,
682 unsigned int packets)
684 unsigned int dbc = s->data_block_counter;
688 for (i = 0; i < packets; ++i) {
689 struct pkt_desc *desc = descs + i;
690 unsigned int index = (s->packet_index + i) % s->queue_size;
692 unsigned int payload_length;
693 unsigned int data_blocks;
696 cycle = compute_cycle_count(ctx_header[1]);
698 err = parse_ir_ctx_header(s, cycle, ctx_header, &payload_length,
699 &data_blocks, &dbc, &syt, i);
705 desc->data_blocks = data_blocks;
706 desc->data_block_counter = dbc;
707 desc->ctx_payload = s->buffer.packets[index].buffer;
709 if (!(s->flags & CIP_DBC_IS_END_EVENT))
710 dbc = (dbc + desc->data_blocks) & 0xff;
713 s->ctx_data.tx.ctx_header_size / sizeof(*ctx_header);
716 s->data_block_counter = dbc;
721 static void generate_ideal_pkt_descs(struct amdtp_stream *s,
722 struct pkt_desc *descs,
723 const __be32 *ctx_header,
724 unsigned int packets)
726 unsigned int dbc = s->data_block_counter;
729 for (i = 0; i < packets; ++i) {
730 struct pkt_desc *desc = descs + i;
731 unsigned int index = (s->packet_index + i) % s->queue_size;
733 desc->cycle = compute_it_cycle(*ctx_header, s->queue_size);
734 desc->syt = calculate_syt(s, desc->cycle);
735 desc->data_blocks = calculate_data_blocks(s, desc->syt);
737 if (s->flags & CIP_DBC_IS_END_EVENT)
738 dbc = (dbc + desc->data_blocks) & 0xff;
740 desc->data_block_counter = dbc;
742 if (!(s->flags & CIP_DBC_IS_END_EVENT))
743 dbc = (dbc + desc->data_blocks) & 0xff;
745 desc->ctx_payload = s->buffer.packets[index].buffer;
750 s->data_block_counter = dbc;
753 static inline void cancel_stream(struct amdtp_stream *s)
755 s->packet_index = -1;
757 amdtp_stream_pcm_abort(s);
758 WRITE_ONCE(s->pcm_buffer_pointer, SNDRV_PCM_POS_XRUN);
761 static void process_ctx_payloads(struct amdtp_stream *s,
762 const struct pkt_desc *descs,
763 unsigned int packets)
765 struct snd_pcm_substream *pcm;
766 unsigned int pcm_frames;
768 pcm = READ_ONCE(s->pcm);
769 pcm_frames = s->process_ctx_payloads(s, descs, packets, pcm);
771 update_pcm_pointers(s, pcm, pcm_frames);
774 static void out_stream_callback(struct fw_iso_context *context, u32 tstamp,
775 size_t header_length, void *header,
778 struct amdtp_stream *s = private_data;
779 const __be32 *ctx_header = header;
780 unsigned int events_per_period = s->events_per_period;
781 unsigned int event_count = s->event_count;
782 unsigned int packets;
785 if (s->packet_index < 0)
788 // Calculate the number of packets in buffer and check XRUN.
789 packets = header_length / sizeof(*ctx_header);
791 generate_ideal_pkt_descs(s, s->pkt_descs, ctx_header, packets);
793 process_ctx_payloads(s, s->pkt_descs, packets);
795 for (i = 0; i < packets; ++i) {
796 const struct pkt_desc *desc = s->pkt_descs + i;
799 struct fw_iso_packet params;
800 __be32 header[IT_PKT_HEADER_SIZE_CIP / sizeof(__be32)];
801 } template = { {0}, {0} };
802 bool sched_irq = false;
804 if (s->ctx_data.rx.syt_override < 0)
807 syt = s->ctx_data.rx.syt_override;
809 build_it_pkt_header(s, desc->cycle, &template.params,
810 desc->data_blocks, desc->data_block_counter,
813 event_count += desc->data_blocks;
814 if (event_count >= events_per_period) {
815 event_count -= events_per_period;
819 if (queue_out_packet(s, &template.params, sched_irq) < 0) {
825 s->event_count = event_count;
827 fw_iso_context_queue_flush(s->context);
830 static void in_stream_callback(struct fw_iso_context *context, u32 tstamp,
831 size_t header_length, void *header,
834 struct amdtp_stream *s = private_data;
835 __be32 *ctx_header = header;
836 unsigned int events_per_period = s->events_per_period;
837 unsigned int event_count = s->event_count;
838 unsigned int packets;
842 if (s->packet_index < 0)
845 // Calculate the number of packets in buffer and check XRUN.
846 packets = header_length / s->ctx_data.tx.ctx_header_size;
848 err = generate_device_pkt_descs(s, s->pkt_descs, ctx_header, packets);
850 if (err != -EAGAIN) {
855 process_ctx_payloads(s, s->pkt_descs, packets);
858 for (i = 0; i < packets; ++i) {
859 const struct pkt_desc *desc = s->pkt_descs + i;
860 struct fw_iso_packet params = {0};
861 bool sched_irq = false;
864 event_count += desc->data_blocks;
865 if (event_count >= events_per_period) {
866 event_count -= events_per_period;
871 !((s->packet_index + 1) % s->idle_irq_interval);
874 if (queue_in_packet(s, ¶ms, sched_irq) < 0) {
880 s->event_count = event_count;
882 fw_iso_context_queue_flush(s->context);
885 /* this is executed one time */
886 static void amdtp_stream_first_callback(struct fw_iso_context *context,
887 u32 tstamp, size_t header_length,
888 void *header, void *private_data)
890 struct amdtp_stream *s = private_data;
891 const __be32 *ctx_header = header;
895 * For in-stream, first packet has come.
896 * For out-stream, prepared to transmit first packet
898 s->callbacked = true;
899 wake_up(&s->callback_wait);
901 if (s->direction == AMDTP_IN_STREAM) {
902 cycle = compute_cycle_count(ctx_header[1]);
904 context->callback.sc = in_stream_callback;
906 cycle = compute_it_cycle(*ctx_header, s->queue_size);
908 context->callback.sc = out_stream_callback;
911 s->start_cycle = cycle;
913 context->callback.sc(context, tstamp, header_length, header, s);
917 * amdtp_stream_start - start transferring packets
918 * @s: the AMDTP stream to start
919 * @channel: the isochronous channel on the bus
920 * @speed: firewire speed code
922 * The stream cannot be started until it has been configured with
923 * amdtp_stream_set_parameters() and it must be started before any PCM or MIDI
924 * device can be started.
926 static int amdtp_stream_start(struct amdtp_stream *s, int channel, int speed,
927 struct amdtp_domain *d)
929 static const struct {
930 unsigned int data_block;
931 unsigned int syt_offset;
932 } *entry, initial_state[] = {
933 [CIP_SFC_32000] = { 4, 3072 },
934 [CIP_SFC_48000] = { 6, 1024 },
935 [CIP_SFC_96000] = { 12, 1024 },
936 [CIP_SFC_192000] = { 24, 1024 },
937 [CIP_SFC_44100] = { 0, 67 },
938 [CIP_SFC_88200] = { 0, 67 },
939 [CIP_SFC_176400] = { 0, 67 },
941 unsigned int events_per_buffer = d->events_per_buffer;
942 unsigned int events_per_period = d->events_per_period;
943 unsigned int ctx_header_size;
944 unsigned int max_ctx_payload_size;
945 enum dma_data_direction dir;
948 mutex_lock(&s->mutex);
950 if (WARN_ON(amdtp_stream_running(s) ||
951 (s->data_block_quadlets < 1))) {
956 if (s->direction == AMDTP_IN_STREAM) {
957 s->data_block_counter = UINT_MAX;
959 entry = &initial_state[s->sfc];
961 s->data_block_counter = 0;
962 s->ctx_data.rx.data_block_state = entry->data_block;
963 s->ctx_data.rx.syt_offset_state = entry->syt_offset;
964 s->ctx_data.rx.last_syt_offset = TICKS_PER_CYCLE;
967 /* initialize packet buffer */
968 if (s->direction == AMDTP_IN_STREAM) {
969 dir = DMA_FROM_DEVICE;
970 type = FW_ISO_CONTEXT_RECEIVE;
971 if (!(s->flags & CIP_NO_HEADER))
972 ctx_header_size = IR_CTX_HEADER_SIZE_CIP;
974 ctx_header_size = IR_CTX_HEADER_SIZE_NO_CIP;
976 max_ctx_payload_size = amdtp_stream_get_max_payload(s) -
980 type = FW_ISO_CONTEXT_TRANSMIT;
981 ctx_header_size = 0; // No effect for IT context.
983 max_ctx_payload_size = amdtp_stream_get_max_payload(s);
984 if (!(s->flags & CIP_NO_HEADER))
985 max_ctx_payload_size -= IT_PKT_HEADER_SIZE_CIP;
988 // This is a case that AMDTP streams in domain run just for MIDI
989 // substream. Use the number of events equivalent to 10 msec as
990 // interval of hardware IRQ.
991 if (events_per_period == 0)
992 events_per_period = amdtp_rate_table[s->sfc] / 100;
993 if (events_per_buffer == 0)
994 events_per_buffer = events_per_period * 3;
996 s->idle_irq_interval =
997 DIV_ROUND_UP(CYCLES_PER_SECOND * events_per_period,
998 amdtp_rate_table[s->sfc]);
999 s->queue_size = DIV_ROUND_UP(CYCLES_PER_SECOND * events_per_buffer,
1000 amdtp_rate_table[s->sfc]);
1001 s->events_per_period = events_per_period;
1004 err = iso_packets_buffer_init(&s->buffer, s->unit, s->queue_size,
1005 max_ctx_payload_size, dir);
1009 s->context = fw_iso_context_create(fw_parent_device(s->unit)->card,
1010 type, channel, speed, ctx_header_size,
1011 amdtp_stream_first_callback, s);
1012 if (IS_ERR(s->context)) {
1013 err = PTR_ERR(s->context);
1015 dev_err(&s->unit->device,
1016 "no free stream on this controller\n");
1020 amdtp_stream_update(s);
1022 if (s->direction == AMDTP_IN_STREAM) {
1023 s->ctx_data.tx.max_ctx_payload_length = max_ctx_payload_size;
1024 s->ctx_data.tx.ctx_header_size = ctx_header_size;
1027 if (s->flags & CIP_NO_HEADER)
1028 s->tag = TAG_NO_CIP_HEADER;
1032 s->pkt_descs = kcalloc(s->queue_size, sizeof(*s->pkt_descs),
1034 if (!s->pkt_descs) {
1039 s->packet_index = 0;
1041 struct fw_iso_packet params;
1044 sched_irq = !((s->packet_index + 1) % s->idle_irq_interval);
1045 if (s->direction == AMDTP_IN_STREAM) {
1046 err = queue_in_packet(s, ¶ms, sched_irq);
1048 params.header_length = 0;
1049 params.payload_length = 0;
1050 err = queue_out_packet(s, ¶ms, sched_irq);
1054 } while (s->packet_index > 0);
1056 /* NOTE: TAG1 matches CIP. This just affects in stream. */
1057 tag = FW_ISO_CONTEXT_MATCH_TAG1;
1058 if ((s->flags & CIP_EMPTY_WITH_TAG0) || (s->flags & CIP_NO_HEADER))
1059 tag |= FW_ISO_CONTEXT_MATCH_TAG0;
1061 s->callbacked = false;
1062 err = fw_iso_context_start(s->context, -1, 0, tag);
1066 mutex_unlock(&s->mutex);
1070 kfree(s->pkt_descs);
1072 fw_iso_context_destroy(s->context);
1073 s->context = ERR_PTR(-1);
1075 iso_packets_buffer_destroy(&s->buffer, s->unit);
1077 mutex_unlock(&s->mutex);
1083 * amdtp_stream_pcm_pointer - get the PCM buffer position
1084 * @s: the AMDTP stream that transports the PCM data
1086 * Returns the current buffer position, in frames.
1088 unsigned long amdtp_stream_pcm_pointer(struct amdtp_stream *s)
1091 * This function is called in software IRQ context of period_tasklet or
1094 * When the software IRQ context was scheduled by software IRQ context
1095 * of IR/IT contexts, queued packets were already handled. Therefore,
1096 * no need to flush the queue in buffer anymore.
1098 * When the process context reach here, some packets will be already
1099 * queued in the buffer. These packets should be handled immediately
1100 * to keep better granularity of PCM pointer.
1102 * Later, the process context will sometimes schedules software IRQ
1103 * context of the period_tasklet. Then, no need to flush the queue by
1104 * the same reason as described for IR/IT contexts.
1106 if (!in_interrupt() && amdtp_stream_running(s))
1107 fw_iso_context_flush_completions(s->context);
1109 return READ_ONCE(s->pcm_buffer_pointer);
1111 EXPORT_SYMBOL(amdtp_stream_pcm_pointer);
1114 * amdtp_stream_pcm_ack - acknowledge queued PCM frames
1115 * @s: the AMDTP stream that transfers the PCM frames
1117 * Returns zero always.
1119 int amdtp_stream_pcm_ack(struct amdtp_stream *s)
1122 * Process isochronous packets for recent isochronous cycle to handle
1123 * queued PCM frames.
1125 if (amdtp_stream_running(s))
1126 fw_iso_context_flush_completions(s->context);
1130 EXPORT_SYMBOL(amdtp_stream_pcm_ack);
1133 * amdtp_stream_update - update the stream after a bus reset
1134 * @s: the AMDTP stream
1136 void amdtp_stream_update(struct amdtp_stream *s)
1139 WRITE_ONCE(s->source_node_id_field,
1140 (fw_parent_device(s->unit)->card->node_id << CIP_SID_SHIFT) & CIP_SID_MASK);
1142 EXPORT_SYMBOL(amdtp_stream_update);
1145 * amdtp_stream_stop - stop sending packets
1146 * @s: the AMDTP stream to stop
1148 * All PCM and MIDI devices of the stream must be stopped before the stream
1149 * itself can be stopped.
1151 static void amdtp_stream_stop(struct amdtp_stream *s)
1153 mutex_lock(&s->mutex);
1155 if (!amdtp_stream_running(s)) {
1156 mutex_unlock(&s->mutex);
1160 tasklet_kill(&s->period_tasklet);
1161 fw_iso_context_stop(s->context);
1162 fw_iso_context_destroy(s->context);
1163 s->context = ERR_PTR(-1);
1164 iso_packets_buffer_destroy(&s->buffer, s->unit);
1165 kfree(s->pkt_descs);
1167 s->callbacked = false;
1169 mutex_unlock(&s->mutex);
1173 * amdtp_stream_pcm_abort - abort the running PCM device
1174 * @s: the AMDTP stream about to be stopped
1176 * If the isochronous stream needs to be stopped asynchronously, call this
1177 * function first to stop the PCM device.
1179 void amdtp_stream_pcm_abort(struct amdtp_stream *s)
1181 struct snd_pcm_substream *pcm;
1183 pcm = READ_ONCE(s->pcm);
1185 snd_pcm_stop_xrun(pcm);
1187 EXPORT_SYMBOL(amdtp_stream_pcm_abort);
1190 * amdtp_domain_init - initialize an AMDTP domain structure
1191 * @d: the AMDTP domain to initialize.
1193 int amdtp_domain_init(struct amdtp_domain *d)
1195 INIT_LIST_HEAD(&d->streams);
1197 d->events_per_period = 0;
1201 EXPORT_SYMBOL_GPL(amdtp_domain_init);
1204 * amdtp_domain_destroy - destroy an AMDTP domain structure
1205 * @d: the AMDTP domain to destroy.
1207 void amdtp_domain_destroy(struct amdtp_domain *d)
1209 // At present nothing to do.
1212 EXPORT_SYMBOL_GPL(amdtp_domain_destroy);
1215 * amdtp_domain_add_stream - register isoc context into the domain.
1216 * @d: the AMDTP domain.
1217 * @s: the AMDTP stream.
1218 * @channel: the isochronous channel on the bus.
1219 * @speed: firewire speed code.
1221 int amdtp_domain_add_stream(struct amdtp_domain *d, struct amdtp_stream *s,
1222 int channel, int speed)
1224 struct amdtp_stream *tmp;
1226 list_for_each_entry(tmp, &d->streams, list) {
1231 list_add(&s->list, &d->streams);
1233 s->channel = channel;
1238 EXPORT_SYMBOL_GPL(amdtp_domain_add_stream);
1241 * amdtp_domain_start - start sending packets for isoc context in the domain.
1242 * @d: the AMDTP domain.
1244 int amdtp_domain_start(struct amdtp_domain *d)
1246 struct amdtp_stream *s;
1249 list_for_each_entry(s, &d->streams, list) {
1250 err = amdtp_stream_start(s, s->channel, s->speed, d);
1256 list_for_each_entry(s, &d->streams, list)
1257 amdtp_stream_stop(s);
1262 EXPORT_SYMBOL_GPL(amdtp_domain_start);
1265 * amdtp_domain_stop - stop sending packets for isoc context in the same domain.
1266 * @d: the AMDTP domain to which the isoc contexts belong.
1268 void amdtp_domain_stop(struct amdtp_domain *d)
1270 struct amdtp_stream *s, *next;
1272 list_for_each_entry_safe(s, next, &d->streams, list) {
1275 amdtp_stream_stop(s);
1278 d->events_per_period = 0;
1280 EXPORT_SYMBOL_GPL(amdtp_domain_stop);