include/ufs/ufs.h

   1 /* SPDX-License-Identifier: GPL-2.0-or-later */
   2 /*
   3  * Universal Flash Storage Host controller driver
   4  * Copyright (C) 2011-2013 Samsung India Software Operations
   5  *
   6  * Authors:
   7  *      Santosh Yaraganavi <santosh.sy@samsung.com>
   8  *      Vinayak Holikatti <h.vinayak@samsung.com>
   9  */
  10
  11 #ifndef _UFS_H
  12 #define _UFS_H
  13
  14 #include <linux/mutex.h>
  15 #include <linux/types.h>
  16 #include <uapi/scsi/scsi_bsg_ufs.h>
  17
  18 #define GENERAL_UPIU_REQUEST_SIZE (sizeof(struct utp_upiu_req))
  19 #define QUERY_DESC_MAX_SIZE       255
  20 #define QUERY_DESC_MIN_SIZE       2
  21 #define QUERY_DESC_HDR_SIZE       2
  22 #define QUERY_OSF_SIZE            (GENERAL_UPIU_REQUEST_SIZE - \
  23                                         (sizeof(struct utp_upiu_header)))
  24 #define UFS_SENSE_SIZE  18
  25
  26 #define UPIU_HEADER_DWORD(byte3, byte2, byte1, byte0)\
  27                         cpu_to_be32((byte3 << 24) | (byte2 << 16) |\
  28                          (byte1 << 8) | (byte0))
  29 /*
  30  * UFS device may have standard LUs and LUN id could be from 0x00 to
  31  * 0x7F. Standard LUs use "Peripheral Device Addressing Format".
  32  * UFS device may also have the Well Known LUs (also referred as W-LU)
  33  * which again could be from 0x00 to 0x7F. For W-LUs, device only use
  34  * the "Extended Addressing Format" which means the W-LUNs would be
  35  * from 0xc100 (SCSI_W_LUN_BASE) onwards.
  36  * This means max. LUN number reported from UFS device could be 0xC17F.
  37  */
  38 #define UFS_UPIU_MAX_UNIT_NUM_ID        0x7F
  39 #define UFS_MAX_LUNS            (SCSI_W_LUN_BASE + UFS_UPIU_MAX_UNIT_NUM_ID)
  40 #define UFS_UPIU_WLUN_ID        (1 << 7)
  41
  42 /* WriteBooster buffer is available only for the logical unit from 0 to 7 */
  43 #define UFS_UPIU_MAX_WB_LUN_ID  8
  44
  45 /*
  46  * WriteBooster buffer lifetime has a limit setted by vendor.
  47  * If it is over the limit, WriteBooster feature will be disabled.
  48  */
  49 #define UFS_WB_EXCEED_LIFETIME          0x0B
  50
  51 /*
  52  * In UFS Spec, the Extra Header Segment (EHS) starts from byte 32 in UPIU request/response packet
  53  */
  54 #define EHS_OFFSET_IN_RESPONSE 32
  55
  56 /* Well known logical unit id in LUN field of UPIU */
  57 enum {
  58         UFS_UPIU_REPORT_LUNS_WLUN       = 0x81,
  59         UFS_UPIU_UFS_DEVICE_WLUN        = 0xD0,
  60         UFS_UPIU_BOOT_WLUN              = 0xB0,
  61         UFS_UPIU_RPMB_WLUN              = 0xC4,
  62 };
  63
  64 /*
  65  * UFS Protocol Information Unit related definitions
  66  */
  67
  68 /* Task management functions */
  69 enum {
  70         UFS_ABORT_TASK          = 0x01,
  71         UFS_ABORT_TASK_SET      = 0x02,
  72         UFS_CLEAR_TASK_SET      = 0x04,
  73         UFS_LOGICAL_RESET       = 0x08,
  74         UFS_QUERY_TASK          = 0x80,
  75         UFS_QUERY_TASK_SET      = 0x81,
  76 };
  77
  78 /* UTP UPIU Transaction Codes Initiator to Target */
  79 enum {
  80         UPIU_TRANSACTION_NOP_OUT        = 0x00,
  81         UPIU_TRANSACTION_COMMAND        = 0x01,
  82         UPIU_TRANSACTION_DATA_OUT       = 0x02,
  83         UPIU_TRANSACTION_TASK_REQ       = 0x04,
  84         UPIU_TRANSACTION_QUERY_REQ      = 0x16,
  85 };
  86
  87 /* UTP UPIU Transaction Codes Target to Initiator */
  88 enum {
  89         UPIU_TRANSACTION_NOP_IN         = 0x20,
  90         UPIU_TRANSACTION_RESPONSE       = 0x21,
  91         UPIU_TRANSACTION_DATA_IN        = 0x22,
  92         UPIU_TRANSACTION_TASK_RSP       = 0x24,
  93         UPIU_TRANSACTION_READY_XFER     = 0x31,
  94         UPIU_TRANSACTION_QUERY_RSP      = 0x36,
  95         UPIU_TRANSACTION_REJECT_UPIU    = 0x3F,
  96 };
  97
  98 /* UPIU Read/Write flags */
  99 enum {
 100         UPIU_CMD_FLAGS_NONE     = 0x00,
 101         UPIU_CMD_FLAGS_WRITE    = 0x20,
 102         UPIU_CMD_FLAGS_READ     = 0x40,
 103 };
 104
 105 /* UPIU Task Attributes */
 106 enum {
 107         UPIU_TASK_ATTR_SIMPLE   = 0x00,
 108         UPIU_TASK_ATTR_ORDERED  = 0x01,
 109         UPIU_TASK_ATTR_HEADQ    = 0x02,
 110         UPIU_TASK_ATTR_ACA      = 0x03,
 111 };
 112
 113 /* UPIU Query request function */
 114 enum {
 115         UPIU_QUERY_FUNC_STANDARD_READ_REQUEST           = 0x01,
 116         UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST          = 0x81,
 117 };
 118
 119 /* Flag idn for Query Requests*/
 120 enum flag_idn {
 121         QUERY_FLAG_IDN_FDEVICEINIT                      = 0x01,
 122         QUERY_FLAG_IDN_PERMANENT_WPE                    = 0x02,
 123         QUERY_FLAG_IDN_PWR_ON_WPE                       = 0x03,
 124         QUERY_FLAG_IDN_BKOPS_EN                         = 0x04,
 125         QUERY_FLAG_IDN_LIFE_SPAN_MODE_ENABLE            = 0x05,
 126         QUERY_FLAG_IDN_PURGE_ENABLE                     = 0x06,
 127         QUERY_FLAG_IDN_RESERVED2                        = 0x07,
 128         QUERY_FLAG_IDN_FPHYRESOURCEREMOVAL              = 0x08,
 129         QUERY_FLAG_IDN_BUSY_RTC                         = 0x09,
 130         QUERY_FLAG_IDN_RESERVED3                        = 0x0A,
 131         QUERY_FLAG_IDN_PERMANENTLY_DISABLE_FW_UPDATE    = 0x0B,
 132         QUERY_FLAG_IDN_WB_EN                            = 0x0E,
 133         QUERY_FLAG_IDN_WB_BUFF_FLUSH_EN                 = 0x0F,
 134         QUERY_FLAG_IDN_WB_BUFF_FLUSH_DURING_HIBERN8     = 0x10,
 135         QUERY_FLAG_IDN_HPB_RESET                        = 0x11,
 136         QUERY_FLAG_IDN_HPB_EN                           = 0x12,
 137 };
 138
 139 /* Attribute idn for Query requests */
 140 enum attr_idn {
 141         QUERY_ATTR_IDN_BOOT_LU_EN               = 0x00,
 142         QUERY_ATTR_IDN_MAX_HPB_SINGLE_CMD       = 0x01,
 143         QUERY_ATTR_IDN_POWER_MODE               = 0x02,
 144         QUERY_ATTR_IDN_ACTIVE_ICC_LVL           = 0x03,
 145         QUERY_ATTR_IDN_OOO_DATA_EN              = 0x04,
 146         QUERY_ATTR_IDN_BKOPS_STATUS             = 0x05,
 147         QUERY_ATTR_IDN_PURGE_STATUS             = 0x06,
 148         QUERY_ATTR_IDN_MAX_DATA_IN              = 0x07,
 149         QUERY_ATTR_IDN_MAX_DATA_OUT             = 0x08,
 150         QUERY_ATTR_IDN_DYN_CAP_NEEDED           = 0x09,
 151         QUERY_ATTR_IDN_REF_CLK_FREQ             = 0x0A,
 152         QUERY_ATTR_IDN_CONF_DESC_LOCK           = 0x0B,
 153         QUERY_ATTR_IDN_MAX_NUM_OF_RTT           = 0x0C,
 154         QUERY_ATTR_IDN_EE_CONTROL               = 0x0D,
 155         QUERY_ATTR_IDN_EE_STATUS                = 0x0E,
 156         QUERY_ATTR_IDN_SECONDS_PASSED           = 0x0F,
 157         QUERY_ATTR_IDN_CNTX_CONF                = 0x10,
 158         QUERY_ATTR_IDN_CORR_PRG_BLK_NUM         = 0x11,
 159         QUERY_ATTR_IDN_RESERVED2                = 0x12,
 160         QUERY_ATTR_IDN_RESERVED3                = 0x13,
 161         QUERY_ATTR_IDN_FFU_STATUS               = 0x14,
 162         QUERY_ATTR_IDN_PSA_STATE                = 0x15,
 163         QUERY_ATTR_IDN_PSA_DATA_SIZE            = 0x16,
 164         QUERY_ATTR_IDN_REF_CLK_GATING_WAIT_TIME = 0x17,
 165         QUERY_ATTR_IDN_CASE_ROUGH_TEMP          = 0x18,
 166         QUERY_ATTR_IDN_HIGH_TEMP_BOUND          = 0x19,
 167         QUERY_ATTR_IDN_LOW_TEMP_BOUND           = 0x1A,
 168         QUERY_ATTR_IDN_WB_FLUSH_STATUS          = 0x1C,
 169         QUERY_ATTR_IDN_AVAIL_WB_BUFF_SIZE       = 0x1D,
 170         QUERY_ATTR_IDN_WB_BUFF_LIFE_TIME_EST    = 0x1E,
 171         QUERY_ATTR_IDN_CURR_WB_BUFF_SIZE        = 0x1F,
 172         QUERY_ATTR_IDN_EXT_IID_EN               = 0x2A,
 173 };
 174
 175 /* Descriptor idn for Query requests */
 176 enum desc_idn {
 177         QUERY_DESC_IDN_DEVICE           = 0x0,
 178         QUERY_DESC_IDN_CONFIGURATION    = 0x1,
 179         QUERY_DESC_IDN_UNIT             = 0x2,
 180         QUERY_DESC_IDN_RFU_0            = 0x3,
 181         QUERY_DESC_IDN_INTERCONNECT     = 0x4,
 182         QUERY_DESC_IDN_STRING           = 0x5,
 183         QUERY_DESC_IDN_RFU_1            = 0x6,
 184         QUERY_DESC_IDN_GEOMETRY         = 0x7,
 185         QUERY_DESC_IDN_POWER            = 0x8,
 186         QUERY_DESC_IDN_HEALTH           = 0x9,
 187         QUERY_DESC_IDN_MAX,
 188 };
 189
 190 enum desc_header_offset {
 191         QUERY_DESC_LENGTH_OFFSET        = 0x00,
 192         QUERY_DESC_DESC_TYPE_OFFSET     = 0x01,
 193 };
 194
 195 /* Unit descriptor parameters offsets in bytes*/
 196 enum unit_desc_param {
 197         UNIT_DESC_PARAM_LEN                     = 0x0,
 198         UNIT_DESC_PARAM_TYPE                    = 0x1,
 199         UNIT_DESC_PARAM_UNIT_INDEX              = 0x2,
 200         UNIT_DESC_PARAM_LU_ENABLE               = 0x3,
 201         UNIT_DESC_PARAM_BOOT_LUN_ID             = 0x4,
 202         UNIT_DESC_PARAM_LU_WR_PROTECT           = 0x5,
 203         UNIT_DESC_PARAM_LU_Q_DEPTH              = 0x6,
 204         UNIT_DESC_PARAM_PSA_SENSITIVE           = 0x7,
 205         UNIT_DESC_PARAM_MEM_TYPE                = 0x8,
 206         UNIT_DESC_PARAM_DATA_RELIABILITY        = 0x9,
 207         UNIT_DESC_PARAM_LOGICAL_BLK_SIZE        = 0xA,
 208         UNIT_DESC_PARAM_LOGICAL_BLK_COUNT       = 0xB,
 209         UNIT_DESC_PARAM_ERASE_BLK_SIZE          = 0x13,
 210         UNIT_DESC_PARAM_PROVISIONING_TYPE       = 0x17,
 211         UNIT_DESC_PARAM_PHY_MEM_RSRC_CNT        = 0x18,
 212         UNIT_DESC_PARAM_CTX_CAPABILITIES        = 0x20,
 213         UNIT_DESC_PARAM_LARGE_UNIT_SIZE_M1      = 0x22,
 214         UNIT_DESC_PARAM_HPB_LU_MAX_ACTIVE_RGNS  = 0x23,
 215         UNIT_DESC_PARAM_HPB_PIN_RGN_START_OFF   = 0x25,
 216         UNIT_DESC_PARAM_HPB_NUM_PIN_RGNS        = 0x27,
 217         UNIT_DESC_PARAM_WB_BUF_ALLOC_UNITS      = 0x29,
 218 };
 219
 220 /* RPMB Unit descriptor parameters offsets in bytes*/
 221 enum rpmb_unit_desc_param {
 222         RPMB_UNIT_DESC_PARAM_LEN                = 0x0,
 223         RPMB_UNIT_DESC_PARAM_TYPE               = 0x1,
 224         RPMB_UNIT_DESC_PARAM_UNIT_INDEX         = 0x2,
 225         RPMB_UNIT_DESC_PARAM_LU_ENABLE          = 0x3,
 226         RPMB_UNIT_DESC_PARAM_BOOT_LUN_ID        = 0x4,
 227         RPMB_UNIT_DESC_PARAM_LU_WR_PROTECT      = 0x5,
 228         RPMB_UNIT_DESC_PARAM_LU_Q_DEPTH         = 0x6,
 229         RPMB_UNIT_DESC_PARAM_PSA_SENSITIVE      = 0x7,
 230         RPMB_UNIT_DESC_PARAM_MEM_TYPE           = 0x8,
 231         RPMB_UNIT_DESC_PARAM_REGION_EN          = 0x9,
 232         RPMB_UNIT_DESC_PARAM_LOGICAL_BLK_SIZE   = 0xA,
 233         RPMB_UNIT_DESC_PARAM_LOGICAL_BLK_COUNT  = 0xB,
 234         RPMB_UNIT_DESC_PARAM_REGION0_SIZE       = 0x13,
 235         RPMB_UNIT_DESC_PARAM_REGION1_SIZE       = 0x14,
 236         RPMB_UNIT_DESC_PARAM_REGION2_SIZE       = 0x15,
 237         RPMB_UNIT_DESC_PARAM_REGION3_SIZE       = 0x16,
 238         RPMB_UNIT_DESC_PARAM_PROVISIONING_TYPE  = 0x17,
 239         RPMB_UNIT_DESC_PARAM_PHY_MEM_RSRC_CNT   = 0x18,
 240 };
 241
 242 /* Device descriptor parameters offsets in bytes*/
 243 enum device_desc_param {
 244         DEVICE_DESC_PARAM_LEN                   = 0x0,
 245         DEVICE_DESC_PARAM_TYPE                  = 0x1,
 246         DEVICE_DESC_PARAM_DEVICE_TYPE           = 0x2,
 247         DEVICE_DESC_PARAM_DEVICE_CLASS          = 0x3,
 248         DEVICE_DESC_PARAM_DEVICE_SUB_CLASS      = 0x4,
 249         DEVICE_DESC_PARAM_PRTCL                 = 0x5,
 250         DEVICE_DESC_PARAM_NUM_LU                = 0x6,
 251         DEVICE_DESC_PARAM_NUM_WLU               = 0x7,
 252         DEVICE_DESC_PARAM_BOOT_ENBL             = 0x8,
 253         DEVICE_DESC_PARAM_DESC_ACCSS_ENBL       = 0x9,
 254         DEVICE_DESC_PARAM_INIT_PWR_MODE         = 0xA,
 255         DEVICE_DESC_PARAM_HIGH_PR_LUN           = 0xB,
 256         DEVICE_DESC_PARAM_SEC_RMV_TYPE          = 0xC,
 257         DEVICE_DESC_PARAM_SEC_LU                = 0xD,
 258         DEVICE_DESC_PARAM_BKOP_TERM_LT          = 0xE,
 259         DEVICE_DESC_PARAM_ACTVE_ICC_LVL         = 0xF,
 260         DEVICE_DESC_PARAM_SPEC_VER              = 0x10,
 261         DEVICE_DESC_PARAM_MANF_DATE             = 0x12,
 262         DEVICE_DESC_PARAM_MANF_NAME             = 0x14,
 263         DEVICE_DESC_PARAM_PRDCT_NAME            = 0x15,
 264         DEVICE_DESC_PARAM_SN                    = 0x16,
 265         DEVICE_DESC_PARAM_OEM_ID                = 0x17,
 266         DEVICE_DESC_PARAM_MANF_ID               = 0x18,
 267         DEVICE_DESC_PARAM_UD_OFFSET             = 0x1A,
 268         DEVICE_DESC_PARAM_UD_LEN                = 0x1B,
 269         DEVICE_DESC_PARAM_RTT_CAP               = 0x1C,
 270         DEVICE_DESC_PARAM_FRQ_RTC               = 0x1D,
 271         DEVICE_DESC_PARAM_UFS_FEAT              = 0x1F,
 272         DEVICE_DESC_PARAM_FFU_TMT               = 0x20,
 273         DEVICE_DESC_PARAM_Q_DPTH                = 0x21,
 274         DEVICE_DESC_PARAM_DEV_VER               = 0x22,
 275         DEVICE_DESC_PARAM_NUM_SEC_WPA           = 0x24,
 276         DEVICE_DESC_PARAM_PSA_MAX_DATA          = 0x25,
 277         DEVICE_DESC_PARAM_PSA_TMT               = 0x29,
 278         DEVICE_DESC_PARAM_PRDCT_REV             = 0x2A,
 279         DEVICE_DESC_PARAM_HPB_VER               = 0x40,
 280         DEVICE_DESC_PARAM_HPB_CONTROL           = 0x42,
 281         DEVICE_DESC_PARAM_EXT_UFS_FEATURE_SUP   = 0x4F,
 282         DEVICE_DESC_PARAM_WB_PRESRV_USRSPC_EN   = 0x53,
 283         DEVICE_DESC_PARAM_WB_TYPE               = 0x54,
 284         DEVICE_DESC_PARAM_WB_SHARED_ALLOC_UNITS = 0x55,
 285 };
 286
 287 /* Interconnect descriptor parameters offsets in bytes*/
 288 enum interconnect_desc_param {
 289         INTERCONNECT_DESC_PARAM_LEN             = 0x0,
 290         INTERCONNECT_DESC_PARAM_TYPE            = 0x1,
 291         INTERCONNECT_DESC_PARAM_UNIPRO_VER      = 0x2,
 292         INTERCONNECT_DESC_PARAM_MPHY_VER        = 0x4,
 293 };
 294
 295 /* Geometry descriptor parameters offsets in bytes*/
 296 enum geometry_desc_param {
 297         GEOMETRY_DESC_PARAM_LEN                 = 0x0,
 298         GEOMETRY_DESC_PARAM_TYPE                = 0x1,
 299         GEOMETRY_DESC_PARAM_DEV_CAP             = 0x4,
 300         GEOMETRY_DESC_PARAM_MAX_NUM_LUN         = 0xC,
 301         GEOMETRY_DESC_PARAM_SEG_SIZE            = 0xD,
 302         GEOMETRY_DESC_PARAM_ALLOC_UNIT_SIZE     = 0x11,
 303         GEOMETRY_DESC_PARAM_MIN_BLK_SIZE        = 0x12,
 304         GEOMETRY_DESC_PARAM_OPT_RD_BLK_SIZE     = 0x13,
 305         GEOMETRY_DESC_PARAM_OPT_WR_BLK_SIZE     = 0x14,
 306         GEOMETRY_DESC_PARAM_MAX_IN_BUF_SIZE     = 0x15,
 307         GEOMETRY_DESC_PARAM_MAX_OUT_BUF_SIZE    = 0x16,
 308         GEOMETRY_DESC_PARAM_RPMB_RW_SIZE        = 0x17,
 309         GEOMETRY_DESC_PARAM_DYN_CAP_RSRC_PLC    = 0x18,
 310         GEOMETRY_DESC_PARAM_DATA_ORDER          = 0x19,
 311         GEOMETRY_DESC_PARAM_MAX_NUM_CTX         = 0x1A,
 312         GEOMETRY_DESC_PARAM_TAG_UNIT_SIZE       = 0x1B,
 313         GEOMETRY_DESC_PARAM_TAG_RSRC_SIZE       = 0x1C,
 314         GEOMETRY_DESC_PARAM_SEC_RM_TYPES        = 0x1D,
 315         GEOMETRY_DESC_PARAM_MEM_TYPES           = 0x1E,
 316         GEOMETRY_DESC_PARAM_SCM_MAX_NUM_UNITS   = 0x20,
 317         GEOMETRY_DESC_PARAM_SCM_CAP_ADJ_FCTR    = 0x24,
 318         GEOMETRY_DESC_PARAM_NPM_MAX_NUM_UNITS   = 0x26,
 319         GEOMETRY_DESC_PARAM_NPM_CAP_ADJ_FCTR    = 0x2A,
 320         GEOMETRY_DESC_PARAM_ENM1_MAX_NUM_UNITS  = 0x2C,
 321         GEOMETRY_DESC_PARAM_ENM1_CAP_ADJ_FCTR   = 0x30,
 322         GEOMETRY_DESC_PARAM_ENM2_MAX_NUM_UNITS  = 0x32,
 323         GEOMETRY_DESC_PARAM_ENM2_CAP_ADJ_FCTR   = 0x36,
 324         GEOMETRY_DESC_PARAM_ENM3_MAX_NUM_UNITS  = 0x38,
 325         GEOMETRY_DESC_PARAM_ENM3_CAP_ADJ_FCTR   = 0x3C,
 326         GEOMETRY_DESC_PARAM_ENM4_MAX_NUM_UNITS  = 0x3E,
 327         GEOMETRY_DESC_PARAM_ENM4_CAP_ADJ_FCTR   = 0x42,
 328         GEOMETRY_DESC_PARAM_OPT_LOG_BLK_SIZE    = 0x44,
 329         GEOMETRY_DESC_PARAM_HPB_REGION_SIZE     = 0x48,
 330         GEOMETRY_DESC_PARAM_HPB_NUMBER_LU       = 0x49,
 331         GEOMETRY_DESC_PARAM_HPB_SUBREGION_SIZE  = 0x4A,
 332         GEOMETRY_DESC_PARAM_HPB_MAX_ACTIVE_REGS = 0x4B,
 333         GEOMETRY_DESC_PARAM_WB_MAX_ALLOC_UNITS  = 0x4F,
 334         GEOMETRY_DESC_PARAM_WB_MAX_WB_LUNS      = 0x53,
 335         GEOMETRY_DESC_PARAM_WB_BUFF_CAP_ADJ     = 0x54,
 336         GEOMETRY_DESC_PARAM_WB_SUP_RED_TYPE     = 0x55,
 337         GEOMETRY_DESC_PARAM_WB_SUP_WB_TYPE      = 0x56,
 338 };
 339
 340 /* Health descriptor parameters offsets in bytes*/
 341 enum health_desc_param {
 342         HEALTH_DESC_PARAM_LEN                   = 0x0,
 343         HEALTH_DESC_PARAM_TYPE                  = 0x1,
 344         HEALTH_DESC_PARAM_EOL_INFO              = 0x2,
 345         HEALTH_DESC_PARAM_LIFE_TIME_EST_A       = 0x3,
 346         HEALTH_DESC_PARAM_LIFE_TIME_EST_B       = 0x4,
 347 };
 348
 349 /* WriteBooster buffer mode */
 350 enum {
 351         WB_BUF_MODE_LU_DEDICATED        = 0x0,
 352         WB_BUF_MODE_SHARED              = 0x1,
 353 };
 354
 355 /*
 356  * Logical Unit Write Protect
 357  * 00h: LU not write protected
 358  * 01h: LU write protected when fPowerOnWPEn =1
 359  * 02h: LU permanently write protected when fPermanentWPEn =1
 360  */
 361 enum ufs_lu_wp_type {
 362         UFS_LU_NO_WP            = 0x00,
 363         UFS_LU_POWER_ON_WP      = 0x01,
 364         UFS_LU_PERM_WP          = 0x02,
 365 };
 366
 367 /* bActiveICCLevel parameter current units */
 368 enum {
 369         UFSHCD_NANO_AMP         = 0,
 370         UFSHCD_MICRO_AMP        = 1,
 371         UFSHCD_MILI_AMP         = 2,
 372         UFSHCD_AMP              = 3,
 373 };
 374
 375 /* Possible values for dExtendedUFSFeaturesSupport */
 376 enum {
 377         UFS_DEV_LOW_TEMP_NOTIF          = BIT(4),
 378         UFS_DEV_HIGH_TEMP_NOTIF         = BIT(5),
 379         UFS_DEV_EXT_TEMP_NOTIF          = BIT(6),
 380         UFS_DEV_HPB_SUPPORT             = BIT(7),
 381         UFS_DEV_WRITE_BOOSTER_SUP       = BIT(8),
 382         UFS_DEV_EXT_IID_SUP             = BIT(16),
 383 };
 384 #define UFS_DEV_HPB_SUPPORT_VERSION             0x310
 385
 386 #define POWER_DESC_MAX_ACTV_ICC_LVLS            16
 387
 388 /* Attribute  bActiveICCLevel parameter bit masks definitions */
 389 #define ATTR_ICC_LVL_UNIT_OFFSET        14
 390 #define ATTR_ICC_LVL_UNIT_MASK          (0x3 << ATTR_ICC_LVL_UNIT_OFFSET)
 391 #define ATTR_ICC_LVL_VALUE_MASK         0x3FF
 392
 393 /* Power descriptor parameters offsets in bytes */
 394 enum power_desc_param_offset {
 395         PWR_DESC_LEN                    = 0x0,
 396         PWR_DESC_TYPE                   = 0x1,
 397         PWR_DESC_ACTIVE_LVLS_VCC_0      = 0x2,
 398         PWR_DESC_ACTIVE_LVLS_VCCQ_0     = 0x22,
 399         PWR_DESC_ACTIVE_LVLS_VCCQ2_0    = 0x42,
 400 };
 401
 402 /* Exception event mask values */
 403 enum {
 404         MASK_EE_STATUS                  = 0xFFFF,
 405         MASK_EE_DYNCAP_EVENT            = BIT(0),
 406         MASK_EE_SYSPOOL_EVENT           = BIT(1),
 407         MASK_EE_URGENT_BKOPS            = BIT(2),
 408         MASK_EE_TOO_HIGH_TEMP           = BIT(3),
 409         MASK_EE_TOO_LOW_TEMP            = BIT(4),
 410         MASK_EE_WRITEBOOSTER_EVENT      = BIT(5),
 411         MASK_EE_PERFORMANCE_THROTTLING  = BIT(6),
 412 };
 413 #define MASK_EE_URGENT_TEMP (MASK_EE_TOO_HIGH_TEMP | MASK_EE_TOO_LOW_TEMP)
 414
 415 /* Background operation status */
 416 enum bkops_status {
 417         BKOPS_STATUS_NO_OP               = 0x0,
 418         BKOPS_STATUS_NON_CRITICAL        = 0x1,
 419         BKOPS_STATUS_PERF_IMPACT         = 0x2,
 420         BKOPS_STATUS_CRITICAL            = 0x3,
 421         BKOPS_STATUS_MAX                 = BKOPS_STATUS_CRITICAL,
 422 };
 423
 424 /* UTP QUERY Transaction Specific Fields OpCode */
 425 enum query_opcode {
 426         UPIU_QUERY_OPCODE_NOP           = 0x0,
 427         UPIU_QUERY_OPCODE_READ_DESC     = 0x1,
 428         UPIU_QUERY_OPCODE_WRITE_DESC    = 0x2,
 429         UPIU_QUERY_OPCODE_READ_ATTR     = 0x3,
 430         UPIU_QUERY_OPCODE_WRITE_ATTR    = 0x4,
 431         UPIU_QUERY_OPCODE_READ_FLAG     = 0x5,
 432         UPIU_QUERY_OPCODE_SET_FLAG      = 0x6,
 433         UPIU_QUERY_OPCODE_CLEAR_FLAG    = 0x7,
 434         UPIU_QUERY_OPCODE_TOGGLE_FLAG   = 0x8,
 435 };
 436
 437 /* bRefClkFreq attribute values */
 438 enum ufs_ref_clk_freq {
 439         REF_CLK_FREQ_19_2_MHZ   = 0,
 440         REF_CLK_FREQ_26_MHZ     = 1,
 441         REF_CLK_FREQ_38_4_MHZ   = 2,
 442         REF_CLK_FREQ_52_MHZ     = 3,
 443         REF_CLK_FREQ_INVAL      = -1,
 444 };
 445
 446 /* Query response result code */
 447 enum {
 448         QUERY_RESULT_SUCCESS                    = 0x00,
 449         QUERY_RESULT_NOT_READABLE               = 0xF6,
 450         QUERY_RESULT_NOT_WRITEABLE              = 0xF7,
 451         QUERY_RESULT_ALREADY_WRITTEN            = 0xF8,
 452         QUERY_RESULT_INVALID_LENGTH             = 0xF9,
 453         QUERY_RESULT_INVALID_VALUE              = 0xFA,
 454         QUERY_RESULT_INVALID_SELECTOR           = 0xFB,
 455         QUERY_RESULT_INVALID_INDEX              = 0xFC,
 456         QUERY_RESULT_INVALID_IDN                = 0xFD,
 457         QUERY_RESULT_INVALID_OPCODE             = 0xFE,
 458         QUERY_RESULT_GENERAL_FAILURE            = 0xFF,
 459 };
 460
 461 /* UTP Transfer Request Command Type (CT) */
 462 enum {
 463         UPIU_COMMAND_SET_TYPE_SCSI      = 0x0,
 464         UPIU_COMMAND_SET_TYPE_UFS       = 0x1,
 465         UPIU_COMMAND_SET_TYPE_QUERY     = 0x2,
 466 };
 467
 468 /* UTP Transfer Request Command Offset */
 469 #define UPIU_COMMAND_TYPE_OFFSET        28
 470
 471 /* Offset of the response code in the UPIU header */
 472 #define UPIU_RSP_CODE_OFFSET            8
 473
 474 enum {
 475         MASK_SCSI_STATUS                = 0xFF,
 476         MASK_TASK_RESPONSE              = 0xFF00,
 477         MASK_RSP_UPIU_RESULT            = 0xFFFF,
 478         MASK_QUERY_DATA_SEG_LEN         = 0xFFFF,
 479         MASK_RSP_UPIU_DATA_SEG_LEN      = 0xFFFF,
 480         MASK_RSP_EXCEPTION_EVENT        = 0x10000,
 481         MASK_TM_SERVICE_RESP            = 0xFF,
 482         MASK_TM_FUNC                    = 0xFF,
 483 };
 484
 485 /* Task management service response */
 486 enum {
 487         UPIU_TASK_MANAGEMENT_FUNC_COMPL         = 0x00,
 488         UPIU_TASK_MANAGEMENT_FUNC_NOT_SUPPORTED = 0x04,
 489         UPIU_TASK_MANAGEMENT_FUNC_SUCCEEDED     = 0x08,
 490         UPIU_TASK_MANAGEMENT_FUNC_FAILED        = 0x05,
 491         UPIU_INCORRECT_LOGICAL_UNIT_NO          = 0x09,
 492 };
 493
 494 /* UFS device power modes */
 495 enum ufs_dev_pwr_mode {
 496         UFS_ACTIVE_PWR_MODE     = 1,
 497         UFS_SLEEP_PWR_MODE      = 2,
 498         UFS_POWERDOWN_PWR_MODE  = 3,
 499         UFS_DEEPSLEEP_PWR_MODE  = 4,
 500 };
 501
 502 #define UFS_WB_BUF_REMAIN_PERCENT(val) ((val) / 10)
 503
 504 /**
 505  * struct utp_cmd_rsp - Response UPIU structure
 506  * @residual_transfer_count: Residual transfer count DW-3
 507  * @reserved: Reserved double words DW-4 to DW-7
 508  * @sense_data_len: Sense data length DW-8 U16
 509  * @sense_data: Sense data field DW-8 to DW-12
 510  */
 511 struct utp_cmd_rsp {
 512         __be32 residual_transfer_count;
 513         __be32 reserved[4];
 514         __be16 sense_data_len;
 515         u8 sense_data[UFS_SENSE_SIZE];
 516 };
 517
 518 struct ufshpb_active_field {
 519         __be16 active_rgn;
 520         __be16 active_srgn;
 521 };
 522 #define HPB_ACT_FIELD_SIZE 4
 523
 524 /**
 525  * struct utp_hpb_rsp - Response UPIU structure
 526  * @residual_transfer_count: Residual transfer count DW-3
 527  * @reserved1: Reserved double words DW-4 to DW-7
 528  * @sense_data_len: Sense data length DW-8 U16
 529  * @desc_type: Descriptor type of sense data
 530  * @additional_len: Additional length of sense data
 531  * @hpb_op: HPB operation type
 532  * @lun: LUN of response UPIU
 533  * @active_rgn_cnt: Active region count
 534  * @inactive_rgn_cnt: Inactive region count
 535  * @hpb_active_field: Recommended to read HPB region and subregion
 536  * @hpb_inactive_field: To be inactivated HPB region and subregion
 537  */
 538 struct utp_hpb_rsp {
 539         __be32 residual_transfer_count;
 540         __be32 reserved1[4];
 541         __be16 sense_data_len;
 542         u8 desc_type;
 543         u8 additional_len;
 544         u8 hpb_op;
 545         u8 lun;
 546         u8 active_rgn_cnt;
 547         u8 inactive_rgn_cnt;
 548         struct ufshpb_active_field hpb_active_field[2];
 549         __be16 hpb_inactive_field[2];
 550 };
 551 #define UTP_HPB_RSP_SIZE 40
 552
 553 /**
 554  * struct utp_upiu_rsp - general upiu response structure
 555  * @header: UPIU header structure DW-0 to DW-2
 556  * @sr: fields structure for scsi command DW-3 to DW-12
 557  * @qr: fields structure for query request DW-3 to DW-7
 558  */
 559 struct utp_upiu_rsp {
 560         struct utp_upiu_header header;
 561         union {
 562                 struct utp_cmd_rsp sr;
 563                 struct utp_hpb_rsp hr;
 564                 struct utp_upiu_query qr;
 565         };
 566 };
 567
 568 /**
 569  * struct ufs_query_req - parameters for building a query request
 570  * @query_func: UPIU header query function
 571  * @upiu_req: the query request data
 572  */
 573 struct ufs_query_req {
 574         u8 query_func;
 575         struct utp_upiu_query upiu_req;
 576 };
 577
 578 /**
 579  * struct ufs_query_resp - UPIU QUERY
 580  * @response: device response code
 581  * @upiu_res: query response data
 582  */
 583 struct ufs_query_res {
 584         u8 response;
 585         struct utp_upiu_query upiu_res;
 586 };
 587
 588 /*
 589  * VCCQ & VCCQ2 current requirement when UFS device is in sleep state
 590  * and link is in Hibern8 state.
 591  */
 592 #define UFS_VREG_LPM_LOAD_UA    1000 /* uA */
 593
 594 struct ufs_vreg {
 595         struct regulator *reg;
 596         const char *name;
 597         bool always_on;
 598         bool enabled;
 599         int max_uA;
 600 };
 601
 602 struct ufs_vreg_info {
 603         struct ufs_vreg *vcc;
 604         struct ufs_vreg *vccq;
 605         struct ufs_vreg *vccq2;
 606         struct ufs_vreg *vdd_hba;
 607 };
 608
 609 struct ufs_dev_info {
 610         bool    f_power_on_wp_en;
 611         /* Keeps information if any of the LU is power on write protected */
 612         bool    is_lu_power_on_wp;
 613         /* Maximum number of general LU supported by the UFS device */
 614         u8      max_lu_supported;
 615         u16     wmanufacturerid;
 616         /*UFS device Product Name */
 617         u8      *model;
 618         u16     wspecversion;
 619         u32     clk_gating_wait_us;
 620         /* Stores the depth of queue in UFS device */
 621         u8      bqueuedepth;
 622
 623         /* UFS HPB related flag */
 624         bool    hpb_enabled;
 625
 626         /* UFS WB related flags */
 627         bool    wb_enabled;
 628         bool    wb_buf_flush_enabled;
 629         u8      wb_dedicated_lu;
 630         u8      wb_buffer_type;
 631
 632         bool    b_rpm_dev_flush_capable;
 633         u8      b_presrv_uspc_en;
 634
 635         bool    b_advanced_rpmb_en;
 636
 637         /* UFS EXT_IID Enable */
 638         bool    b_ext_iid_en;
 639 };
 640
 641 /*
 642  * This enum is used in string mapping in include/trace/events/ufs.h.
 643  */
 644 enum ufs_trace_str_t {
 645         UFS_CMD_SEND, UFS_CMD_COMP, UFS_DEV_COMP,
 646         UFS_QUERY_SEND, UFS_QUERY_COMP, UFS_QUERY_ERR,
 647         UFS_TM_SEND, UFS_TM_COMP, UFS_TM_ERR
 648 };
 649
 650 /*
 651  * Transaction Specific Fields (TSF) type in the UPIU package, this enum is
 652  * used in include/trace/events/ufs.h for UFS command trace.
 653  */
 654 enum ufs_trace_tsf_t {
 655         UFS_TSF_CDB, UFS_TSF_OSF, UFS_TSF_TM_INPUT, UFS_TSF_TM_OUTPUT
 656 };
 657
 658 #endif /* End of Header */