2 * linux/drivers/char/serial_core.h
4 * Copyright (C) 2000 Deep Blue Solutions Ltd.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 #ifndef _UAPILINUX_SERIAL_CORE_H
21 #define _UAPILINUX_SERIAL_CORE_H
23 #include <linux/serial.h>
26 * The type definitions. These are from Ted Ts'o's serial.h
28 #define PORT_UNKNOWN 0
35 #define PORT_16650V2 7
37 #define PORT_STARTECH 9
38 #define PORT_16C950 10
42 #define PORT_NS16550A 14
43 #define PORT_XSCALE 15
44 #define PORT_RM9000 16 /* PMC-Sierra RM9xxx internal UART */
45 #define PORT_OCTEON 17 /* Cavium OCTEON internal UART */
46 #define PORT_AR7 18 /* Texas Instruments AR7 internal UART */
47 #define PORT_U6_16550A 19 /* ST-Ericsson U6xxx internal UART */
48 #define PORT_TEGRA 20 /* NVIDIA Tegra internal UART */
49 #define PORT_XR17D15X 21 /* Exar XR17D15x UART */
50 #define PORT_LPC3220 22 /* NXP LPC32xx SoC "Standard" UART */
51 #define PORT_8250_CIR 23 /* CIR infrared port, has its own driver */
52 #define PORT_XR17V35X 24 /* Exar XR17V35x UARTs */
53 #define PORT_BRCM_TRUMANAGE 25
54 #define PORT_ALTR_16550_F32 26 /* Altera 16550 UART with 32 FIFOs */
55 #define PORT_ALTR_16550_F64 27 /* Altera 16550 UART with 64 FIFOs */
56 #define PORT_ALTR_16550_F128 28 /* Altera 16550 UART with 128 FIFOs */
57 #define PORT_MAX_8250 28 /* max port ID */
60 * ARM specific type numbers. These are not currently guaranteed
61 * to be implemented, and will change in the future. These are
62 * separate so any additions to the old serial.c that occur before
63 * we are merged can be easily merged here.
67 #define PORT_CLPS711X 33
68 #define PORT_SA1100 34
69 #define PORT_UART00 35
72 /* Sparc type numbers. */
73 #define PORT_SUNZILOG 38
74 #define PORT_SUNSAB 39
80 /* Parisc type numbers. */
83 /* Atmel AT91 / AT32 SoC */
86 /* Macintosh Zilog type numbers */
87 #define PORT_MAC_ZILOG 50 /* m68k : not yet implemented */
88 #define PORT_PMAC_ZILOG 51
95 /* Samsung S3C2410 SoC and derivatives thereof */
96 #define PORT_S3C2410 55
98 /* SGI IP22 aka Indy / Challenge S / Indigo 2 */
99 #define PORT_IP22ZILOG 56
101 /* Sharp LH7a40x -- an ARM9 SoC series */
102 #define PORT_LH7A40X 57
104 /* PPC CPM type number */
107 /* MPC52xx (and MPC512x) type numbers */
108 #define PORT_MPC52xx 59
113 /* Samsung S3C2440 SoC */
114 #define PORT_S3C2440 61
116 /* Motorola i.MX SoC */
122 /* TXX9 type number */
125 /* NEC VR4100 series SIU/DSIU */
126 #define PORT_VR41XX_SIU 65
127 #define PORT_VR41XX_DSIU 66
129 /* Samsung S3C2400 SoC */
130 #define PORT_S3C2400 67
133 #define PORT_M32R_SIO 68
138 #define PORT_PNX8XXX 70
143 /* SUN4V Hypervisor Console */
144 #define PORT_SUNHV 72
146 #define PORT_S3C2412 73
148 /* Xilinx uartlite */
149 #define PORT_UARTLITE 74
155 #define PORT_KS8695 76
157 /* Broadcom SB1250, etc. SOC */
158 #define PORT_SB1250_DUART 77
160 /* Freescale ColdFire */
164 #define PORT_BFIN_SPORT 79
166 /* MN10300 on-chip UART numbers */
167 #define PORT_MN10300 80
168 #define PORT_MN10300_CTS 81
170 #define PORT_SC26XX 82
173 #define PORT_SCIFA 83
175 #define PORT_S3C6400 84
178 #define PORT_NWPSERIAL 85
181 #define PORT_MAX3100 86
183 /* Timberdale UART */
184 #define PORT_TIMBUART 87
186 /* Qualcomm MSM SoCs */
189 /* BCM63xx family SoCs */
190 #define PORT_BCM63XX 89
192 /* Aeroflex Gaisler GRLIB APBUART */
193 #define PORT_APBUART 90
196 #define PORT_ALTERA_JTAGUART 91
197 #define PORT_ALTERA_UART 92
200 #define PORT_SCIFB 93
203 #define PORT_MAX310X 94
205 /* High Speed UART for Medfield */
212 #define PORT_VT8500 97
214 /* Xilinx PSS UART */
215 #define PORT_XUARTPS 98
217 /* Atheros AR933X SoC */
218 #define PORT_AR933X 99
220 /* Energy Micro efm32 SoC */
221 #define PORT_EFMUART 100
223 /* ARC (Synopsys) on-chip UART */
226 /* Rocketport EXPRESS/INFINITY */
229 /* Freescale lpuart */
230 #define PORT_LPUART 103
233 #define PORT_HSCIF 104
235 /* Tilera TILE-Gx UART */
236 #define PORT_TILEGX 105
238 #endif /* _UAPILINUX_SERIAL_CORE_H */