include/uapi/linux/perf_event.h

   1 /*
   2  * Performance events:
   3  *
   4  *    Copyright (C) 2008-2009, Thomas Gleixner <tglx@linutronix.de>
   5  *    Copyright (C) 2008-2011, Red Hat, Inc., Ingo Molnar
   6  *    Copyright (C) 2008-2011, Red Hat, Inc., Peter Zijlstra
   7  *
   8  * Data type definitions, declarations, prototypes.
   9  *
  10  *    Started by: Thomas Gleixner and Ingo Molnar
  11  *
  12  * For licencing details see kernel-base/COPYING
  13  */
  14 #ifndef _UAPI_LINUX_PERF_EVENT_H
  15 #define _UAPI_LINUX_PERF_EVENT_H
  16
  17 #include <linux/types.h>
  18 #include <linux/ioctl.h>
  19 #include <asm/byteorder.h>
  20
  21 /*
  22  * User-space ABI bits:
  23  */
  24
  25 /*
  26  * attr.type
  27  */
  28 enum perf_type_id {
  29         PERF_TYPE_HARDWARE                      = 0,
  30         PERF_TYPE_SOFTWARE                      = 1,
  31         PERF_TYPE_TRACEPOINT                    = 2,
  32         PERF_TYPE_HW_CACHE                      = 3,
  33         PERF_TYPE_RAW                           = 4,
  34         PERF_TYPE_BREAKPOINT                    = 5,
  35         PERF_TYPE_INTEL_CQM                     = 6,
  36
  37         PERF_TYPE_MAX,                          /* non-ABI */
  38 };
  39
  40 /*
  41  * Generalized performance event event_id types, used by the
  42  * attr.event_id parameter of the sys_perf_event_open()
  43  * syscall:
  44  */
  45 enum perf_hw_id {
  46         /*
  47          * Common hardware events, generalized by the kernel:
  48          */
  49         PERF_COUNT_HW_CPU_CYCLES                = 0,
  50         PERF_COUNT_HW_INSTRUCTIONS              = 1,
  51         PERF_COUNT_HW_CACHE_REFERENCES          = 2,
  52         PERF_COUNT_HW_CACHE_MISSES              = 3,
  53         PERF_COUNT_HW_BRANCH_INSTRUCTIONS       = 4,
  54         PERF_COUNT_HW_BRANCH_MISSES             = 5,
  55         PERF_COUNT_HW_BUS_CYCLES                = 6,
  56         PERF_COUNT_HW_STALLED_CYCLES_FRONTEND   = 7,
  57         PERF_COUNT_HW_STALLED_CYCLES_BACKEND    = 8,
  58         PERF_COUNT_HW_REF_CPU_CYCLES            = 9,
  59
  60         PERF_COUNT_HW_MAX,                      /* non-ABI */
  61 };
  62
  63 /*
  64  * Generalized hardware cache events:
  65  *
  66  *       { L1-D, L1-I, LLC, ITLB, DTLB, BPU, NODE } x
  67  *       { read, write, prefetch } x
  68  *       { accesses, misses }
  69  */
  70 enum perf_hw_cache_id {
  71         PERF_COUNT_HW_CACHE_L1D                 = 0,
  72         PERF_COUNT_HW_CACHE_L1I                 = 1,
  73         PERF_COUNT_HW_CACHE_LL                  = 2,
  74         PERF_COUNT_HW_CACHE_DTLB                = 3,
  75         PERF_COUNT_HW_CACHE_ITLB                = 4,
  76         PERF_COUNT_HW_CACHE_BPU                 = 5,
  77         PERF_COUNT_HW_CACHE_NODE                = 6,
  78
  79         PERF_COUNT_HW_CACHE_MAX,                /* non-ABI */
  80 };
  81
  82 enum perf_hw_cache_op_id {
  83         PERF_COUNT_HW_CACHE_OP_READ             = 0,
  84         PERF_COUNT_HW_CACHE_OP_WRITE            = 1,
  85         PERF_COUNT_HW_CACHE_OP_PREFETCH         = 2,
  86
  87         PERF_COUNT_HW_CACHE_OP_MAX,             /* non-ABI */
  88 };
  89
  90 enum perf_hw_cache_op_result_id {
  91         PERF_COUNT_HW_CACHE_RESULT_ACCESS       = 0,
  92         PERF_COUNT_HW_CACHE_RESULT_MISS         = 1,
  93
  94         PERF_COUNT_HW_CACHE_RESULT_MAX,         /* non-ABI */
  95 };
  96
  97 /*
  98  * Special "software" events provided by the kernel, even if the hardware
  99  * does not support performance events. These events measure various
 100  * physical and sw events of the kernel (and allow the profiling of them as
 101  * well):
 102  */
 103 enum perf_sw_ids {
 104         PERF_COUNT_SW_CPU_CLOCK                 = 0,
 105         PERF_COUNT_SW_TASK_CLOCK                = 1,
 106         PERF_COUNT_SW_PAGE_FAULTS               = 2,
 107         PERF_COUNT_SW_CONTEXT_SWITCHES          = 3,
 108         PERF_COUNT_SW_CPU_MIGRATIONS            = 4,
 109         PERF_COUNT_SW_PAGE_FAULTS_MIN           = 5,
 110         PERF_COUNT_SW_PAGE_FAULTS_MAJ           = 6,
 111         PERF_COUNT_SW_ALIGNMENT_FAULTS          = 7,
 112         PERF_COUNT_SW_EMULATION_FAULTS          = 8,
 113         PERF_COUNT_SW_DUMMY                     = 9,
 114
 115         PERF_COUNT_SW_MAX,                      /* non-ABI */
 116 };
 117
 118 /*
 119  * Bits that can be set in attr.sample_type to request information
 120  * in the overflow packets.
 121  */
 122 enum perf_event_sample_format {
 123         PERF_SAMPLE_IP                          = 1U << 0,
 124         PERF_SAMPLE_TID                         = 1U << 1,
 125         PERF_SAMPLE_TIME                        = 1U << 2,
 126         PERF_SAMPLE_ADDR                        = 1U << 3,
 127         PERF_SAMPLE_READ                        = 1U << 4,
 128         PERF_SAMPLE_CALLCHAIN                   = 1U << 5,
 129         PERF_SAMPLE_ID                          = 1U << 6,
 130         PERF_SAMPLE_CPU                         = 1U << 7,
 131         PERF_SAMPLE_PERIOD                      = 1U << 8,
 132         PERF_SAMPLE_STREAM_ID                   = 1U << 9,
 133         PERF_SAMPLE_RAW                         = 1U << 10,
 134         PERF_SAMPLE_BRANCH_STACK                = 1U << 11,
 135         PERF_SAMPLE_REGS_USER                   = 1U << 12,
 136         PERF_SAMPLE_STACK_USER                  = 1U << 13,
 137         PERF_SAMPLE_WEIGHT                      = 1U << 14,
 138         PERF_SAMPLE_DATA_SRC                    = 1U << 15,
 139         PERF_SAMPLE_IDENTIFIER                  = 1U << 16,
 140         PERF_SAMPLE_TRANSACTION                 = 1U << 17,
 141         PERF_SAMPLE_REGS_INTR                   = 1U << 18,
 142
 143         PERF_SAMPLE_MAX = 1U << 19,             /* non-ABI */
 144 };
 145
 146 /*
 147  * values to program into branch_sample_type when PERF_SAMPLE_BRANCH is set
 148  *
 149  * If the user does not pass priv level information via branch_sample_type,
 150  * the kernel uses the event's priv level. Branch and event priv levels do
 151  * not have to match. Branch priv level is checked for permissions.
 152  *
 153  * The branch types can be combined, however BRANCH_ANY covers all types
 154  * of branches and therefore it supersedes all the other types.
 155  */
 156 enum perf_branch_sample_type_shift {
 157         PERF_SAMPLE_BRANCH_USER_SHIFT           = 0, /* user branches */
 158         PERF_SAMPLE_BRANCH_KERNEL_SHIFT         = 1, /* kernel branches */
 159         PERF_SAMPLE_BRANCH_HV_SHIFT             = 2, /* hypervisor branches */
 160
 161         PERF_SAMPLE_BRANCH_ANY_SHIFT            = 3, /* any branch types */
 162         PERF_SAMPLE_BRANCH_ANY_CALL_SHIFT       = 4, /* any call branch */
 163         PERF_SAMPLE_BRANCH_ANY_RETURN_SHIFT     = 5, /* any return branch */
 164         PERF_SAMPLE_BRANCH_IND_CALL_SHIFT       = 6, /* indirect calls */
 165         PERF_SAMPLE_BRANCH_ABORT_TX_SHIFT       = 7, /* transaction aborts */
 166         PERF_SAMPLE_BRANCH_IN_TX_SHIFT          = 8, /* in transaction */
 167         PERF_SAMPLE_BRANCH_NO_TX_SHIFT          = 9, /* not in transaction */
 168         PERF_SAMPLE_BRANCH_COND_SHIFT           = 10, /* conditional branches */
 169
 170         PERF_SAMPLE_BRANCH_CALL_STACK_SHIFT     = 11, /* call/ret stack */
 171
 172         PERF_SAMPLE_BRANCH_MAX_SHIFT            /* non-ABI */
 173 };
 174
 175 enum perf_branch_sample_type {
 176         PERF_SAMPLE_BRANCH_USER         = 1U << PERF_SAMPLE_BRANCH_USER_SHIFT,
 177         PERF_SAMPLE_BRANCH_KERNEL       = 1U << PERF_SAMPLE_BRANCH_KERNEL_SHIFT,
 178         PERF_SAMPLE_BRANCH_HV           = 1U << PERF_SAMPLE_BRANCH_HV_SHIFT,
 179
 180         PERF_SAMPLE_BRANCH_ANY          = 1U << PERF_SAMPLE_BRANCH_ANY_SHIFT,
 181         PERF_SAMPLE_BRANCH_ANY_CALL     = 1U << PERF_SAMPLE_BRANCH_ANY_CALL_SHIFT,
 182         PERF_SAMPLE_BRANCH_ANY_RETURN   = 1U << PERF_SAMPLE_BRANCH_ANY_RETURN_SHIFT,
 183         PERF_SAMPLE_BRANCH_IND_CALL     = 1U << PERF_SAMPLE_BRANCH_IND_CALL_SHIFT,
 184         PERF_SAMPLE_BRANCH_ABORT_TX     = 1U << PERF_SAMPLE_BRANCH_ABORT_TX_SHIFT,
 185         PERF_SAMPLE_BRANCH_IN_TX        = 1U << PERF_SAMPLE_BRANCH_IN_TX_SHIFT,
 186         PERF_SAMPLE_BRANCH_NO_TX        = 1U << PERF_SAMPLE_BRANCH_NO_TX_SHIFT,
 187         PERF_SAMPLE_BRANCH_COND         = 1U << PERF_SAMPLE_BRANCH_COND_SHIFT,
 188
 189         PERF_SAMPLE_BRANCH_CALL_STACK   = 1U << PERF_SAMPLE_BRANCH_CALL_STACK_SHIFT,
 190
 191         PERF_SAMPLE_BRANCH_MAX          = 1U << PERF_SAMPLE_BRANCH_MAX_SHIFT,
 192 };
 193
 194 #define PERF_SAMPLE_BRANCH_PLM_ALL \
 195         (PERF_SAMPLE_BRANCH_USER|\
 196          PERF_SAMPLE_BRANCH_KERNEL|\
 197          PERF_SAMPLE_BRANCH_HV)
 198
 199 /*
 200  * Values to determine ABI of the registers dump.
 201  */
 202 enum perf_sample_regs_abi {
 203         PERF_SAMPLE_REGS_ABI_NONE       = 0,
 204         PERF_SAMPLE_REGS_ABI_32         = 1,
 205         PERF_SAMPLE_REGS_ABI_64         = 2,
 206 };
 207
 208 /*
 209  * Values for the memory transaction event qualifier, mostly for
 210  * abort events. Multiple bits can be set.
 211  */
 212 enum {
 213         PERF_TXN_ELISION        = (1 << 0), /* From elision */
 214         PERF_TXN_TRANSACTION    = (1 << 1), /* From transaction */
 215         PERF_TXN_SYNC           = (1 << 2), /* Instruction is related */
 216         PERF_TXN_ASYNC          = (1 << 3), /* Instruction not related */
 217         PERF_TXN_RETRY          = (1 << 4), /* Retry possible */
 218         PERF_TXN_CONFLICT       = (1 << 5), /* Conflict abort */
 219         PERF_TXN_CAPACITY_WRITE = (1 << 6), /* Capacity write abort */
 220         PERF_TXN_CAPACITY_READ  = (1 << 7), /* Capacity read abort */
 221
 222         PERF_TXN_MAX            = (1 << 8), /* non-ABI */
 223
 224         /* bits 32..63 are reserved for the abort code */
 225
 226         PERF_TXN_ABORT_MASK  = (0xffffffffULL << 32),
 227         PERF_TXN_ABORT_SHIFT = 32,
 228 };
 229
 230 /*
 231  * The format of the data returned by read() on a perf event fd,
 232  * as specified by attr.read_format:
 233  *
 234  * struct read_format {
 235  *      { u64           value;
 236  *        { u64         time_enabled; } && PERF_FORMAT_TOTAL_TIME_ENABLED
 237  *        { u64         time_running; } && PERF_FORMAT_TOTAL_TIME_RUNNING
 238  *        { u64         id;           } && PERF_FORMAT_ID
 239  *      } && !PERF_FORMAT_GROUP
 240  *
 241  *      { u64           nr;
 242  *        { u64         time_enabled; } && PERF_FORMAT_TOTAL_TIME_ENABLED
 243  *        { u64         time_running; } && PERF_FORMAT_TOTAL_TIME_RUNNING
 244  *        { u64         value;
 245  *          { u64       id;           } && PERF_FORMAT_ID
 246  *        }             cntr[nr];
 247  *      } && PERF_FORMAT_GROUP
 248  * };
 249  */
 250 enum perf_event_read_format {
 251         PERF_FORMAT_TOTAL_TIME_ENABLED          = 1U << 0,
 252         PERF_FORMAT_TOTAL_TIME_RUNNING          = 1U << 1,
 253         PERF_FORMAT_ID                          = 1U << 2,
 254         PERF_FORMAT_GROUP                       = 1U << 3,
 255
 256         PERF_FORMAT_MAX = 1U << 4,              /* non-ABI */
 257 };
 258
 259 #define PERF_ATTR_SIZE_VER0     64      /* sizeof first published struct */
 260 #define PERF_ATTR_SIZE_VER1     72      /* add: config2 */
 261 #define PERF_ATTR_SIZE_VER2     80      /* add: branch_sample_type */
 262 #define PERF_ATTR_SIZE_VER3     96      /* add: sample_regs_user */
 263                                         /* add: sample_stack_user */
 264 #define PERF_ATTR_SIZE_VER4     104     /* add: sample_regs_intr */
 265
 266 /*
 267  * Hardware event_id to monitor via a performance monitoring event:
 268  */
 269 struct perf_event_attr {
 270
 271         /*
 272          * Major type: hardware/software/tracepoint/etc.
 273          */
 274         __u32                   type;
 275
 276         /*
 277          * Size of the attr structure, for fwd/bwd compat.
 278          */
 279         __u32                   size;
 280
 281         /*
 282          * Type specific configuration information.
 283          */
 284         __u64                   config;
 285
 286         union {
 287                 __u64           sample_period;
 288                 __u64           sample_freq;
 289         };
 290
 291         __u64                   sample_type;
 292         __u64                   read_format;
 293
 294         __u64                   disabled       :  1, /* off by default        */
 295                                 inherit        :  1, /* children inherit it   */
 296                                 pinned         :  1, /* must always be on PMU */
 297                                 exclusive      :  1, /* only group on PMU     */
 298                                 exclude_user   :  1, /* don't count user      */
 299                                 exclude_kernel :  1, /* ditto kernel          */
 300                                 exclude_hv     :  1, /* ditto hypervisor      */
 301                                 exclude_idle   :  1, /* don't count when idle */
 302                                 mmap           :  1, /* include mmap data     */
 303                                 comm           :  1, /* include comm data     */
 304                                 freq           :  1, /* use freq, not period  */
 305                                 inherit_stat   :  1, /* per task counts       */
 306                                 enable_on_exec :  1, /* next exec enables     */
 307                                 task           :  1, /* trace fork/exit       */
 308                                 watermark      :  1, /* wakeup_watermark      */
 309                                 /*
 310                                  * precise_ip:
 311                                  *
 312                                  *  0 - SAMPLE_IP can have arbitrary skid
 313                                  *  1 - SAMPLE_IP must have constant skid
 314                                  *  2 - SAMPLE_IP requested to have 0 skid
 315                                  *  3 - SAMPLE_IP must have 0 skid
 316                                  *
 317                                  *  See also PERF_RECORD_MISC_EXACT_IP
 318                                  */
 319                                 precise_ip     :  2, /* skid constraint       */
 320                                 mmap_data      :  1, /* non-exec mmap data    */
 321                                 sample_id_all  :  1, /* sample_type all events */
 322
 323                                 exclude_host   :  1, /* don't count in host   */
 324                                 exclude_guest  :  1, /* don't count in guest  */
 325
 326                                 exclude_callchain_kernel : 1, /* exclude kernel callchains */
 327                                 exclude_callchain_user   : 1, /* exclude user callchains */
 328                                 mmap2          :  1, /* include mmap with inode data     */
 329                                 comm_exec      :  1, /* flag comm events that are due to an exec */
 330                                 __reserved_1   : 39;
 331
 332         union {
 333                 __u32           wakeup_events;    /* wakeup every n events */
 334                 __u32           wakeup_watermark; /* bytes before wakeup   */
 335         };
 336
 337         __u32                   bp_type;
 338         union {
 339                 __u64           bp_addr;
 340                 __u64           config1; /* extension of config */
 341         };
 342         union {
 343                 __u64           bp_len;
 344                 __u64           config2; /* extension of config1 */
 345         };
 346         __u64   branch_sample_type; /* enum perf_branch_sample_type */
 347
 348         /*
 349          * Defines set of user regs to dump on samples.
 350          * See asm/perf_regs.h for details.
 351          */
 352         __u64   sample_regs_user;
 353
 354         /*
 355          * Defines size of the user stack to dump on samples.
 356          */
 357         __u32   sample_stack_user;
 358
 359         /* Align to u64. */
 360         __u32   __reserved_2;
 361         /*
 362          * Defines set of regs to dump for each sample
 363          * state captured on:
 364          *  - precise = 0: PMU interrupt
 365          *  - precise > 0: sampled instruction
 366          *
 367          * See asm/perf_regs.h for details.
 368          */
 369         __u64   sample_regs_intr;
 370 };
 371
 372 #define perf_flags(attr)        (*(&(attr)->read_format + 1))
 373
 374 /*
 375  * Ioctls that can be done on a perf event fd:
 376  */
 377 #define PERF_EVENT_IOC_ENABLE           _IO ('$', 0)
 378 #define PERF_EVENT_IOC_DISABLE          _IO ('$', 1)
 379 #define PERF_EVENT_IOC_REFRESH          _IO ('$', 2)
 380 #define PERF_EVENT_IOC_RESET            _IO ('$', 3)
 381 #define PERF_EVENT_IOC_PERIOD           _IOW('$', 4, __u64)
 382 #define PERF_EVENT_IOC_SET_OUTPUT       _IO ('$', 5)
 383 #define PERF_EVENT_IOC_SET_FILTER       _IOW('$', 6, char *)
 384 #define PERF_EVENT_IOC_ID               _IOR('$', 7, __u64 *)
 385
 386 enum perf_event_ioc_flags {
 387         PERF_IOC_FLAG_GROUP             = 1U << 0,
 388 };
 389
 390 /*
 391  * Structure of the page that can be mapped via mmap
 392  */
 393 struct perf_event_mmap_page {
 394         __u32   version;                /* version number of this structure */
 395         __u32   compat_version;         /* lowest version this is compat with */
 396
 397         /*
 398          * Bits needed to read the hw events in user-space.
 399          *
 400          *   u32 seq, time_mult, time_shift, index, width;
 401          *   u64 count, enabled, running;
 402          *   u64 cyc, time_offset;
 403          *   s64 pmc = 0;
 404          *
 405          *   do {
 406          *     seq = pc->lock;
 407          *     barrier()
 408          *
 409          *     enabled = pc->time_enabled;
 410          *     running = pc->time_running;
 411          *
 412          *     if (pc->cap_usr_time && enabled != running) {
 413          *       cyc = rdtsc();
 414          *       time_offset = pc->time_offset;
 415          *       time_mult   = pc->time_mult;
 416          *       time_shift  = pc->time_shift;
 417          *     }
 418          *
 419          *     index = pc->index;
 420          *     count = pc->offset;
 421          *     if (pc->cap_user_rdpmc && index) {
 422          *       width = pc->pmc_width;
 423          *       pmc = rdpmc(index - 1);
 424          *     }
 425          *
 426          *     barrier();
 427          *   } while (pc->lock != seq);
 428          *
 429          * NOTE: for obvious reason this only works on self-monitoring
 430          *       processes.
 431          */
 432         __u32   lock;                   /* seqlock for synchronization */
 433         __u32   index;                  /* hardware event identifier */
 434         __s64   offset;                 /* add to hardware event value */
 435         __u64   time_enabled;           /* time event active */
 436         __u64   time_running;           /* time event on cpu */
 437         union {
 438                 __u64   capabilities;
 439                 struct {
 440                         __u64   cap_bit0                : 1, /* Always 0, deprecated, see commit 860f085b74e9 */
 441                                 cap_bit0_is_deprecated  : 1, /* Always 1, signals that bit 0 is zero */
 442
 443                                 cap_user_rdpmc          : 1, /* The RDPMC instruction can be used to read counts */
 444                                 cap_user_time           : 1, /* The time_* fields are used */
 445                                 cap_user_time_zero      : 1, /* The time_zero field is used */
 446                                 cap_____res             : 59;
 447                 };
 448         };
 449
 450         /*
 451          * If cap_user_rdpmc this field provides the bit-width of the value
 452          * read using the rdpmc() or equivalent instruction. This can be used
 453          * to sign extend the result like:
 454          *
 455          *   pmc <<= 64 - width;
 456          *   pmc >>= 64 - width; // signed shift right
 457          *   count += pmc;
 458          */
 459         __u16   pmc_width;
 460
 461         /*
 462          * If cap_usr_time the below fields can be used to compute the time
 463          * delta since time_enabled (in ns) using rdtsc or similar.
 464          *
 465          *   u64 quot, rem;
 466          *   u64 delta;
 467          *
 468          *   quot = (cyc >> time_shift);
 469          *   rem = cyc & ((1 << time_shift) - 1);
 470          *   delta = time_offset + quot * time_mult +
 471          *              ((rem * time_mult) >> time_shift);
 472          *
 473          * Where time_offset,time_mult,time_shift and cyc are read in the
 474          * seqcount loop described above. This delta can then be added to
 475          * enabled and possible running (if index), improving the scaling:
 476          *
 477          *   enabled += delta;
 478          *   if (index)
 479          *     running += delta;
 480          *
 481          *   quot = count / running;
 482          *   rem  = count % running;
 483          *   count = quot * enabled + (rem * enabled) / running;
 484          */
 485         __u16   time_shift;
 486         __u32   time_mult;
 487         __u64   time_offset;
 488         /*
 489          * If cap_usr_time_zero, the hardware clock (e.g. TSC) can be calculated
 490          * from sample timestamps.
 491          *
 492          *   time = timestamp - time_zero;
 493          *   quot = time / time_mult;
 494          *   rem  = time % time_mult;
 495          *   cyc = (quot << time_shift) + (rem << time_shift) / time_mult;
 496          *
 497          * And vice versa:
 498          *
 499          *   quot = cyc >> time_shift;
 500          *   rem  = cyc & ((1 << time_shift) - 1);
 501          *   timestamp = time_zero + quot * time_mult +
 502          *               ((rem * time_mult) >> time_shift);
 503          */
 504         __u64   time_zero;
 505         __u32   size;                   /* Header size up to __reserved[] fields. */
 506
 507                 /*
 508                  * Hole for extension of the self monitor capabilities
 509                  */
 510
 511         __u8    __reserved[118*8+4];    /* align to 1k. */
 512
 513         /*
 514          * Control data for the mmap() data buffer.
 515          *
 516          * User-space reading the @data_head value should issue an smp_rmb(),
 517          * after reading this value.
 518          *
 519          * When the mapping is PROT_WRITE the @data_tail value should be
 520          * written by userspace to reflect the last read data, after issueing
 521          * an smp_mb() to separate the data read from the ->data_tail store.
 522          * In this case the kernel will not over-write unread data.
 523          *
 524          * See perf_output_put_handle() for the data ordering.
 525          */
 526         __u64   data_head;              /* head in the data section */
 527         __u64   data_tail;              /* user-space written tail */
 528 };
 529
 530 #define PERF_RECORD_MISC_CPUMODE_MASK           (7 << 0)
 531 #define PERF_RECORD_MISC_CPUMODE_UNKNOWN        (0 << 0)
 532 #define PERF_RECORD_MISC_KERNEL                 (1 << 0)
 533 #define PERF_RECORD_MISC_USER                   (2 << 0)
 534 #define PERF_RECORD_MISC_HYPERVISOR             (3 << 0)
 535 #define PERF_RECORD_MISC_GUEST_KERNEL           (4 << 0)
 536 #define PERF_RECORD_MISC_GUEST_USER             (5 << 0)
 537
 538 /*
 539  * PERF_RECORD_MISC_MMAP_DATA and PERF_RECORD_MISC_COMM_EXEC are used on
 540  * different events so can reuse the same bit position.
 541  */
 542 #define PERF_RECORD_MISC_MMAP_DATA              (1 << 13)
 543 #define PERF_RECORD_MISC_COMM_EXEC              (1 << 13)
 544 /*
 545  * Indicates that the content of PERF_SAMPLE_IP points to
 546  * the actual instruction that triggered the event. See also
 547  * perf_event_attr::precise_ip.
 548  */
 549 #define PERF_RECORD_MISC_EXACT_IP               (1 << 14)
 550 /*
 551  * Reserve the last bit to indicate some extended misc field
 552  */
 553 #define PERF_RECORD_MISC_EXT_RESERVED           (1 << 15)
 554
 555 struct perf_event_header {
 556         __u32   type;
 557         __u16   misc;
 558         __u16   size;
 559 };
 560
 561 enum perf_event_type {
 562
 563         /*
 564          * If perf_event_attr.sample_id_all is set then all event types will
 565          * have the sample_type selected fields related to where/when
 566          * (identity) an event took place (TID, TIME, ID, STREAM_ID, CPU,
 567          * IDENTIFIER) described in PERF_RECORD_SAMPLE below, it will be stashed
 568          * just after the perf_event_header and the fields already present for
 569          * the existing fields, i.e. at the end of the payload. That way a newer
 570          * perf.data file will be supported by older perf tools, with these new
 571          * optional fields being ignored.
 572          *
 573          * struct sample_id {
 574          *      { u32                   pid, tid; } && PERF_SAMPLE_TID
 575          *      { u64                   time;     } && PERF_SAMPLE_TIME
 576          *      { u64                   id;       } && PERF_SAMPLE_ID
 577          *      { u64                   stream_id;} && PERF_SAMPLE_STREAM_ID
 578          *      { u32                   cpu, res; } && PERF_SAMPLE_CPU
 579          *      { u64                   id;       } && PERF_SAMPLE_IDENTIFIER
 580          * } && perf_event_attr::sample_id_all
 581          *
 582          * Note that PERF_SAMPLE_IDENTIFIER duplicates PERF_SAMPLE_ID.  The
 583          * advantage of PERF_SAMPLE_IDENTIFIER is that its position is fixed
 584          * relative to header.size.
 585          */
 586
 587         /*
 588          * The MMAP events record the PROT_EXEC mappings so that we can
 589          * correlate userspace IPs to code. They have the following structure:
 590          *
 591          * struct {
 592          *      struct perf_event_header        header;
 593          *
 594          *      u32                             pid, tid;
 595          *      u64                             addr;
 596          *      u64                             len;
 597          *      u64                             pgoff;
 598          *      char                            filename[];
 599          *      struct sample_id                sample_id;
 600          * };
 601          */
 602         PERF_RECORD_MMAP                        = 1,
 603
 604         /*
 605          * struct {
 606          *      struct perf_event_header        header;
 607          *      u64                             id;
 608          *      u64                             lost;
 609          *      struct sample_id                sample_id;
 610          * };
 611          */
 612         PERF_RECORD_LOST                        = 2,
 613
 614         /*
 615          * struct {
 616          *      struct perf_event_header        header;
 617          *
 618          *      u32                             pid, tid;
 619          *      char                            comm[];
 620          *      struct sample_id                sample_id;
 621          * };
 622          */
 623         PERF_RECORD_COMM                        = 3,
 624
 625         /*
 626          * struct {
 627          *      struct perf_event_header        header;
 628          *      u32                             pid, ppid;
 629          *      u32                             tid, ptid;
 630          *      u64                             time;
 631          *      struct sample_id                sample_id;
 632          * };
 633          */
 634         PERF_RECORD_EXIT                        = 4,
 635
 636         /*
 637          * struct {
 638          *      struct perf_event_header        header;
 639          *      u64                             time;
 640          *      u64                             id;
 641          *      u64                             stream_id;
 642          *      struct sample_id                sample_id;
 643          * };
 644          */
 645         PERF_RECORD_THROTTLE                    = 5,
 646         PERF_RECORD_UNTHROTTLE                  = 6,
 647
 648         /*
 649          * struct {
 650          *      struct perf_event_header        header;
 651          *      u32                             pid, ppid;
 652          *      u32                             tid, ptid;
 653          *      u64                             time;
 654          *      struct sample_id                sample_id;
 655          * };
 656          */
 657         PERF_RECORD_FORK                        = 7,
 658
 659         /*
 660          * struct {
 661          *      struct perf_event_header        header;
 662          *      u32                             pid, tid;
 663          *
 664          *      struct read_format              values;
 665          *      struct sample_id                sample_id;
 666          * };
 667          */
 668         PERF_RECORD_READ                        = 8,
 669
 670         /*
 671          * struct {
 672          *      struct perf_event_header        header;
 673          *
 674          *      #
 675          *      # Note that PERF_SAMPLE_IDENTIFIER duplicates PERF_SAMPLE_ID.
 676          *      # The advantage of PERF_SAMPLE_IDENTIFIER is that its position
 677          *      # is fixed relative to header.
 678          *      #
 679          *
 680          *      { u64                   id;       } && PERF_SAMPLE_IDENTIFIER
 681          *      { u64                   ip;       } && PERF_SAMPLE_IP
 682          *      { u32                   pid, tid; } && PERF_SAMPLE_TID
 683          *      { u64                   time;     } && PERF_SAMPLE_TIME
 684          *      { u64                   addr;     } && PERF_SAMPLE_ADDR
 685          *      { u64                   id;       } && PERF_SAMPLE_ID
 686          *      { u64                   stream_id;} && PERF_SAMPLE_STREAM_ID
 687          *      { u32                   cpu, res; } && PERF_SAMPLE_CPU
 688          *      { u64                   period;   } && PERF_SAMPLE_PERIOD
 689          *
 690          *      { struct read_format    values;   } && PERF_SAMPLE_READ
 691          *
 692          *      { u64                   nr,
 693          *        u64                   ips[nr];  } && PERF_SAMPLE_CALLCHAIN
 694          *
 695          *      #
 696          *      # The RAW record below is opaque data wrt the ABI
 697          *      #
 698          *      # That is, the ABI doesn't make any promises wrt to
 699          *      # the stability of its content, it may vary depending
 700          *      # on event, hardware, kernel version and phase of
 701          *      # the moon.
 702          *      #
 703          *      # In other words, PERF_SAMPLE_RAW contents are not an ABI.
 704          *      #
 705          *
 706          *      { u32                   size;
 707          *        char                  data[size];}&& PERF_SAMPLE_RAW
 708          *
 709          *      { u64                   nr;
 710          *        { u64 from, to, flags } lbr[nr];} && PERF_SAMPLE_BRANCH_STACK
 711          *
 712          *      { u64                   abi; # enum perf_sample_regs_abi
 713          *        u64                   regs[weight(mask)]; } && PERF_SAMPLE_REGS_USER
 714          *
 715          *      { u64                   size;
 716          *        char                  data[size];
 717          *        u64                   dyn_size; } && PERF_SAMPLE_STACK_USER
 718          *
 719          *      { u64                   weight;   } && PERF_SAMPLE_WEIGHT
 720          *      { u64                   data_src; } && PERF_SAMPLE_DATA_SRC
 721          *      { u64                   transaction; } && PERF_SAMPLE_TRANSACTION
 722          *      { u64                   abi; # enum perf_sample_regs_abi
 723          *        u64                   regs[weight(mask)]; } && PERF_SAMPLE_REGS_INTR
 724          * };
 725          */
 726         PERF_RECORD_SAMPLE                      = 9,
 727
 728         /*
 729          * The MMAP2 records are an augmented version of MMAP, they add
 730          * maj, min, ino numbers to be used to uniquely identify each mapping
 731          *
 732          * struct {
 733          *      struct perf_event_header        header;
 734          *
 735          *      u32                             pid, tid;
 736          *      u64                             addr;
 737          *      u64                             len;
 738          *      u64                             pgoff;
 739          *      u32                             maj;
 740          *      u32                             min;
 741          *      u64                             ino;
 742          *      u64                             ino_generation;
 743          *      u32                             prot, flags;
 744          *      char                            filename[];
 745          *      struct sample_id                sample_id;
 746          * };
 747          */
 748         PERF_RECORD_MMAP2                       = 10,
 749
 750         PERF_RECORD_MAX,                        /* non-ABI */
 751 };
 752
 753 #define PERF_MAX_STACK_DEPTH            127
 754
 755 enum perf_callchain_context {
 756         PERF_CONTEXT_HV                 = (__u64)-32,
 757         PERF_CONTEXT_KERNEL             = (__u64)-128,
 758         PERF_CONTEXT_USER               = (__u64)-512,
 759
 760         PERF_CONTEXT_GUEST              = (__u64)-2048,
 761         PERF_CONTEXT_GUEST_KERNEL       = (__u64)-2176,
 762         PERF_CONTEXT_GUEST_USER         = (__u64)-2560,
 763
 764         PERF_CONTEXT_MAX                = (__u64)-4095,
 765 };
 766
 767 #define PERF_FLAG_FD_NO_GROUP           (1UL << 0)
 768 #define PERF_FLAG_FD_OUTPUT             (1UL << 1)
 769 #define PERF_FLAG_PID_CGROUP            (1UL << 2) /* pid=cgroup id, per-cpu mode only */
 770 #define PERF_FLAG_FD_CLOEXEC            (1UL << 3) /* O_CLOEXEC */
 771
 772 union perf_mem_data_src {
 773         __u64 val;
 774         struct {
 775                 __u64   mem_op:5,       /* type of opcode */
 776                         mem_lvl:14,     /* memory hierarchy level */
 777                         mem_snoop:5,    /* snoop mode */
 778                         mem_lock:2,     /* lock instr */
 779                         mem_dtlb:7,     /* tlb access */
 780                         mem_rsvd:31;
 781         };
 782 };
 783
 784 /* type of opcode (load/store/prefetch,code) */
 785 #define PERF_MEM_OP_NA          0x01 /* not available */
 786 #define PERF_MEM_OP_LOAD        0x02 /* load instruction */
 787 #define PERF_MEM_OP_STORE       0x04 /* store instruction */
 788 #define PERF_MEM_OP_PFETCH      0x08 /* prefetch */
 789 #define PERF_MEM_OP_EXEC        0x10 /* code (execution) */
 790 #define PERF_MEM_OP_SHIFT       0
 791
 792 /* memory hierarchy (memory level, hit or miss) */
 793 #define PERF_MEM_LVL_NA         0x01  /* not available */
 794 #define PERF_MEM_LVL_HIT        0x02  /* hit level */
 795 #define PERF_MEM_LVL_MISS       0x04  /* miss level  */
 796 #define PERF_MEM_LVL_L1         0x08  /* L1 */
 797 #define PERF_MEM_LVL_LFB        0x10  /* Line Fill Buffer */
 798 #define PERF_MEM_LVL_L2         0x20  /* L2 */
 799 #define PERF_MEM_LVL_L3         0x40  /* L3 */
 800 #define PERF_MEM_LVL_LOC_RAM    0x80  /* Local DRAM */
 801 #define PERF_MEM_LVL_REM_RAM1   0x100 /* Remote DRAM (1 hop) */
 802 #define PERF_MEM_LVL_REM_RAM2   0x200 /* Remote DRAM (2 hops) */
 803 #define PERF_MEM_LVL_REM_CCE1   0x400 /* Remote Cache (1 hop) */
 804 #define PERF_MEM_LVL_REM_CCE2   0x800 /* Remote Cache (2 hops) */
 805 #define PERF_MEM_LVL_IO         0x1000 /* I/O memory */
 806 #define PERF_MEM_LVL_UNC        0x2000 /* Uncached memory */
 807 #define PERF_MEM_LVL_SHIFT      5
 808
 809 /* snoop mode */
 810 #define PERF_MEM_SNOOP_NA       0x01 /* not available */
 811 #define PERF_MEM_SNOOP_NONE     0x02 /* no snoop */
 812 #define PERF_MEM_SNOOP_HIT      0x04 /* snoop hit */
 813 #define PERF_MEM_SNOOP_MISS     0x08 /* snoop miss */
 814 #define PERF_MEM_SNOOP_HITM     0x10 /* snoop hit modified */
 815 #define PERF_MEM_SNOOP_SHIFT    19
 816
 817 /* locked instruction */
 818 #define PERF_MEM_LOCK_NA        0x01 /* not available */
 819 #define PERF_MEM_LOCK_LOCKED    0x02 /* locked transaction */
 820 #define PERF_MEM_LOCK_SHIFT     24
 821
 822 /* TLB access */
 823 #define PERF_MEM_TLB_NA         0x01 /* not available */
 824 #define PERF_MEM_TLB_HIT        0x02 /* hit level */
 825 #define PERF_MEM_TLB_MISS       0x04 /* miss level */
 826 #define PERF_MEM_TLB_L1         0x08 /* L1 */
 827 #define PERF_MEM_TLB_L2         0x10 /* L2 */
 828 #define PERF_MEM_TLB_WK         0x20 /* Hardware Walker*/
 829 #define PERF_MEM_TLB_OS         0x40 /* OS fault handler */
 830 #define PERF_MEM_TLB_SHIFT      26
 831
 832 #define PERF_MEM_S(a, s) \
 833         (((__u64)PERF_MEM_##a##_##s) << PERF_MEM_##a##_SHIFT)
 834
 835 /*
 836  * single taken branch record layout:
 837  *
 838  *      from: source instruction (may not always be a branch insn)
 839  *        to: branch target
 840  *   mispred: branch target was mispredicted
 841  * predicted: branch target was predicted
 842  *
 843  * support for mispred, predicted is optional. In case it
 844  * is not supported mispred = predicted = 0.
 845  *
 846  *     in_tx: running in a hardware transaction
 847  *     abort: aborting a hardware transaction
 848  */
 849 struct perf_branch_entry {
 850         __u64   from;
 851         __u64   to;
 852         __u64   mispred:1,  /* target mispredicted */
 853                 predicted:1,/* target predicted */
 854                 in_tx:1,    /* in transaction */
 855                 abort:1,    /* transaction abort */
 856                 reserved:60;
 857 };
 858
 859 #endif /* _UAPI_LINUX_PERF_EVENT_H */