1 // SPDX-License-Identifier: GPL-2.0
3 * Texas Instruments System Control Interface Protocol
5 * Copyright (C) 2015-2016 Texas Instruments Incorporated - https://www.ti.com/
9 #ifndef __TISCI_PROTOCOL_H
10 #define __TISCI_PROTOCOL_H
13 * struct ti_sci_version_info - version information structure
14 * @abi_major: Major ABI version. Change here implies risk of backward
15 * compatibility break.
16 * @abi_minor: Minor ABI version. Change here implies new feature addition,
17 * or compatible change in ABI.
18 * @firmware_revision: Firmware revision (not usually used).
19 * @firmware_description: Firmware description (not usually used).
21 struct ti_sci_version_info {
24 u16 firmware_revision;
25 char firmware_description[32];
31 * struct ti_sci_core_ops - SoC Core Operations
32 * @reboot_device: Reboot the SoC
33 * Returns 0 for successful request(ideally should never return),
34 * else returns corresponding error value.
36 struct ti_sci_core_ops {
37 int (*reboot_device)(const struct ti_sci_handle *handle);
41 * struct ti_sci_dev_ops - Device control operations
42 * @get_device: Command to request for device managed by TISCI
43 * Returns 0 for successful exclusive request, else returns
44 * corresponding error message.
45 * @idle_device: Command to idle a device managed by TISCI
46 * Returns 0 for successful exclusive request, else returns
47 * corresponding error message.
48 * @put_device: Command to release a device managed by TISCI
49 * Returns 0 for successful release, else returns corresponding
51 * @is_valid: Check if the device ID is a valid ID.
52 * Returns 0 if the ID is valid, else returns corresponding error.
53 * @get_context_loss_count: Command to retrieve context loss counter - this
54 * increments every time the device looses context. Overflow
56 * - count: pointer to u32 which will retrieve counter
57 * Returns 0 for successful information request and count has
58 * proper data, else returns corresponding error message.
59 * @is_idle: Reports back about device idle state
60 * - req_state: Returns requested idle state
61 * Returns 0 for successful information request and req_state and
62 * current_state has proper data, else returns corresponding error
64 * @is_stop: Reports back about device stop state
65 * - req_state: Returns requested stop state
66 * - current_state: Returns current stop state
67 * Returns 0 for successful information request and req_state and
68 * current_state has proper data, else returns corresponding error
70 * @is_on: Reports back about device ON(or active) state
71 * - req_state: Returns requested ON state
72 * - current_state: Returns current ON state
73 * Returns 0 for successful information request and req_state and
74 * current_state has proper data, else returns corresponding error
76 * @is_transitioning: Reports back if the device is in the middle of transition
78 * -current_state: Returns 'true' if currently transitioning.
79 * @set_device_resets: Command to configure resets for device managed by TISCI.
80 * -reset_state: Device specific reset bit field
81 * Returns 0 for successful request, else returns
82 * corresponding error message.
83 * @get_device_resets: Command to read state of resets for device managed
85 * -reset_state: pointer to u32 which will retrieve resets
86 * Returns 0 for successful request, else returns
87 * corresponding error message.
89 * NOTE: for all these functions, the following parameters are generic in
91 * -handle: Pointer to TISCI handle as retrieved by *ti_sci_get_handle
92 * -id: Device Identifier
94 * Request for the device - NOTE: the client MUST maintain integrity of
95 * usage count by balancing get_device with put_device. No refcounting is
96 * managed by driver for that purpose.
98 struct ti_sci_dev_ops {
99 int (*get_device)(const struct ti_sci_handle *handle, u32 id);
100 int (*get_device_exclusive)(const struct ti_sci_handle *handle, u32 id);
101 int (*idle_device)(const struct ti_sci_handle *handle, u32 id);
102 int (*idle_device_exclusive)(const struct ti_sci_handle *handle,
104 int (*put_device)(const struct ti_sci_handle *handle, u32 id);
105 int (*is_valid)(const struct ti_sci_handle *handle, u32 id);
106 int (*get_context_loss_count)(const struct ti_sci_handle *handle,
108 int (*is_idle)(const struct ti_sci_handle *handle, u32 id,
109 bool *requested_state);
110 int (*is_stop)(const struct ti_sci_handle *handle, u32 id,
111 bool *req_state, bool *current_state);
112 int (*is_on)(const struct ti_sci_handle *handle, u32 id,
113 bool *req_state, bool *current_state);
114 int (*is_transitioning)(const struct ti_sci_handle *handle, u32 id,
115 bool *current_state);
116 int (*set_device_resets)(const struct ti_sci_handle *handle, u32 id,
118 int (*get_device_resets)(const struct ti_sci_handle *handle, u32 id,
123 * struct ti_sci_clk_ops - Clock control operations
124 * @get_clock: Request for activation of clock and manage by processor
125 * - needs_ssc: 'true' if Spread Spectrum clock is desired.
126 * - can_change_freq: 'true' if frequency change is desired.
127 * - enable_input_term: 'true' if input termination is desired.
128 * @idle_clock: Request for Idling a clock managed by processor
129 * @put_clock: Release the clock to be auto managed by TISCI
130 * @is_auto: Is the clock being auto managed
131 * - req_state: state indicating if the clock is auto managed
132 * @is_on: Is the clock ON
133 * - req_state: if the clock is requested to be forced ON
134 * - current_state: if the clock is currently ON
135 * @is_off: Is the clock OFF
136 * - req_state: if the clock is requested to be forced OFF
137 * - current_state: if the clock is currently Gated
138 * @set_parent: Set the clock source of a specific device clock
139 * - parent_id: Parent clock identifier to set.
140 * @get_parent: Get the current clock source of a specific device clock
141 * - parent_id: Parent clock identifier which is the parent.
142 * @get_num_parents: Get the number of parents of the current clock source
143 * - num_parents: returns the number of parent clocks.
144 * @get_best_match_freq: Find a best matching frequency for a frequency
146 * - match_freq: Best matching frequency in Hz.
147 * @set_freq: Set the Clock frequency
148 * @get_freq: Get the Clock frequency
149 * - current_freq: Frequency in Hz that the clock is at.
151 * NOTE: for all these functions, the following parameters are generic in
153 * -handle: Pointer to TISCI handle as retrieved by *ti_sci_get_handle
154 * -did: Device identifier this request is for
155 * -cid: Clock identifier for the device for this request.
156 * Each device has it's own set of clock inputs. This indexes
157 * which clock input to modify.
158 * -min_freq: The minimum allowable frequency in Hz. This is the minimum
159 * allowable programmed frequency and does not account for clock
160 * tolerances and jitter.
161 * -target_freq: The target clock frequency in Hz. A frequency will be
162 * processed as close to this target frequency as possible.
163 * -max_freq: The maximum allowable frequency in Hz. This is the maximum
164 * allowable programmed frequency and does not account for clock
165 * tolerances and jitter.
167 * Request for the clock - NOTE: the client MUST maintain integrity of
168 * usage count by balancing get_clock with put_clock. No refcounting is
169 * managed by driver for that purpose.
171 struct ti_sci_clk_ops {
172 int (*get_clock)(const struct ti_sci_handle *handle, u32 did, u32 cid,
173 bool needs_ssc, bool can_change_freq,
174 bool enable_input_term);
175 int (*idle_clock)(const struct ti_sci_handle *handle, u32 did, u32 cid);
176 int (*put_clock)(const struct ti_sci_handle *handle, u32 did, u32 cid);
177 int (*is_auto)(const struct ti_sci_handle *handle, u32 did, u32 cid,
179 int (*is_on)(const struct ti_sci_handle *handle, u32 did, u32 cid,
180 bool *req_state, bool *current_state);
181 int (*is_off)(const struct ti_sci_handle *handle, u32 did, u32 cid,
182 bool *req_state, bool *current_state);
183 int (*set_parent)(const struct ti_sci_handle *handle, u32 did, u32 cid,
185 int (*get_parent)(const struct ti_sci_handle *handle, u32 did, u32 cid,
187 int (*get_num_parents)(const struct ti_sci_handle *handle, u32 did,
188 u32 cid, u32 *num_parents);
189 int (*get_best_match_freq)(const struct ti_sci_handle *handle, u32 did,
190 u32 cid, u64 min_freq, u64 target_freq,
191 u64 max_freq, u64 *match_freq);
192 int (*set_freq)(const struct ti_sci_handle *handle, u32 did, u32 cid,
193 u64 min_freq, u64 target_freq, u64 max_freq);
194 int (*get_freq)(const struct ti_sci_handle *handle, u32 did, u32 cid,
199 * struct ti_sci_resource_desc - Description of TI SCI resource instance range.
200 * @start: Start index of the first resource range.
201 * @num: Number of resources in the first range.
202 * @start_sec: Start index of the second resource range.
203 * @num_sec: Number of resources in the second range.
204 * @res_map: Bitmap to manage the allocation of these resources.
206 struct ti_sci_resource_desc {
211 unsigned long *res_map;
215 * struct ti_sci_rm_core_ops - Resource management core operations
216 * @get_range: Get a range of resources belonging to ti sci host.
217 * @get_rage_from_shost: Get a range of resources belonging to
219 * - s_host: Host processing entity to which the
220 * resources are allocated
222 * NOTE: for these functions, all the parameters are consolidated and defined
224 * - handle: Pointer to TISCI handle as retrieved by *ti_sci_get_handle
225 * - dev_id: TISCI device ID.
226 * - subtype: Resource assignment subtype that is being requested
227 * from the given device.
228 * - desc: Pointer to ti_sci_resource_desc to be updated with the resource
229 * range start index and number of resources
231 struct ti_sci_rm_core_ops {
232 int (*get_range)(const struct ti_sci_handle *handle, u32 dev_id,
233 u8 subtype, struct ti_sci_resource_desc *desc);
234 int (*get_range_from_shost)(const struct ti_sci_handle *handle,
235 u32 dev_id, u8 subtype, u8 s_host,
236 struct ti_sci_resource_desc *desc);
239 #define TI_SCI_RESASG_SUBTYPE_IR_OUTPUT 0
240 #define TI_SCI_RESASG_SUBTYPE_IA_VINT 0xa
241 #define TI_SCI_RESASG_SUBTYPE_GLOBAL_EVENT_SEVT 0xd
243 * struct ti_sci_rm_irq_ops: IRQ management operations
244 * @set_irq: Set an IRQ route between the requested source
246 * @set_event_map: Set an Event based peripheral irq to Interrupt
248 * @free_irq: Free an IRQ route between the requested source
250 * @free_event_map: Free an event based peripheral irq to Interrupt
253 struct ti_sci_rm_irq_ops {
254 int (*set_irq)(const struct ti_sci_handle *handle, u16 src_id,
255 u16 src_index, u16 dst_id, u16 dst_host_irq);
256 int (*set_event_map)(const struct ti_sci_handle *handle, u16 src_id,
257 u16 src_index, u16 ia_id, u16 vint,
258 u16 global_event, u8 vint_status_bit);
259 int (*free_irq)(const struct ti_sci_handle *handle, u16 src_id,
260 u16 src_index, u16 dst_id, u16 dst_host_irq);
261 int (*free_event_map)(const struct ti_sci_handle *handle, u16 src_id,
262 u16 src_index, u16 ia_id, u16 vint,
263 u16 global_event, u8 vint_status_bit);
266 /* RA config.addr_lo parameter is valid for RM ring configure TI_SCI message */
267 #define TI_SCI_MSG_VALUE_RM_RING_ADDR_LO_VALID BIT(0)
268 /* RA config.addr_hi parameter is valid for RM ring configure TI_SCI message */
269 #define TI_SCI_MSG_VALUE_RM_RING_ADDR_HI_VALID BIT(1)
270 /* RA config.count parameter is valid for RM ring configure TI_SCI message */
271 #define TI_SCI_MSG_VALUE_RM_RING_COUNT_VALID BIT(2)
272 /* RA config.mode parameter is valid for RM ring configure TI_SCI message */
273 #define TI_SCI_MSG_VALUE_RM_RING_MODE_VALID BIT(3)
274 /* RA config.size parameter is valid for RM ring configure TI_SCI message */
275 #define TI_SCI_MSG_VALUE_RM_RING_SIZE_VALID BIT(4)
276 /* RA config.order_id parameter is valid for RM ring configure TISCI message */
277 #define TI_SCI_MSG_VALUE_RM_RING_ORDER_ID_VALID BIT(5)
278 /* RA config.virtid parameter is valid for RM ring configure TISCI message */
279 #define TI_SCI_MSG_VALUE_RM_RING_VIRTID_VALID BIT(6)
280 /* RA config.asel parameter is valid for RM ring configure TISCI message */
281 #define TI_SCI_MSG_VALUE_RM_RING_ASEL_VALID BIT(7)
283 #define TI_SCI_MSG_VALUE_RM_ALL_NO_ORDER \
284 (TI_SCI_MSG_VALUE_RM_RING_ADDR_LO_VALID | \
285 TI_SCI_MSG_VALUE_RM_RING_ADDR_HI_VALID | \
286 TI_SCI_MSG_VALUE_RM_RING_COUNT_VALID | \
287 TI_SCI_MSG_VALUE_RM_RING_MODE_VALID | \
288 TI_SCI_MSG_VALUE_RM_RING_SIZE_VALID | \
289 TI_SCI_MSG_VALUE_RM_RING_ASEL_VALID)
292 * struct ti_sci_msg_rm_ring_cfg - Ring configuration
294 * Parameters for Navigator Subsystem ring configuration
295 * See @ti_sci_msg_rm_ring_cfg_req
297 struct ti_sci_msg_rm_ring_cfg {
312 * struct ti_sci_rm_ringacc_ops - Ring Accelerator Management operations
313 * @config: configure the SoC Navigator Subsystem Ring Accelerator ring
315 * @set_cfg: configure the SoC Navigator Subsystem Ring Accelerator ring
317 struct ti_sci_rm_ringacc_ops {
318 int (*config)(const struct ti_sci_handle *handle,
319 u32 valid_params, u16 nav_id, u16 index,
320 u32 addr_lo, u32 addr_hi, u32 count, u8 mode,
323 int (*set_cfg)(const struct ti_sci_handle *handle,
324 const struct ti_sci_msg_rm_ring_cfg *params);
328 * struct ti_sci_rm_psil_ops - PSI-L thread operations
329 * @pair: pair PSI-L source thread to a destination thread.
330 * If the src_thread is mapped to UDMA tchan, the corresponding channel's
331 * TCHAN_THRD_ID register is updated.
332 * If the dst_thread is mapped to UDMA rchan, the corresponding channel's
333 * RCHAN_THRD_ID register is updated.
334 * @unpair: unpair PSI-L source thread from a destination thread.
335 * If the src_thread is mapped to UDMA tchan, the corresponding channel's
336 * TCHAN_THRD_ID register is cleared.
337 * If the dst_thread is mapped to UDMA rchan, the corresponding channel's
338 * RCHAN_THRD_ID register is cleared.
340 struct ti_sci_rm_psil_ops {
341 int (*pair)(const struct ti_sci_handle *handle, u32 nav_id,
342 u32 src_thread, u32 dst_thread);
343 int (*unpair)(const struct ti_sci_handle *handle, u32 nav_id,
344 u32 src_thread, u32 dst_thread);
347 /* UDMAP channel types */
348 #define TI_SCI_RM_UDMAP_CHAN_TYPE_PKT_PBRR 2
349 #define TI_SCI_RM_UDMAP_CHAN_TYPE_PKT_PBRR_SB 3 /* RX only */
350 #define TI_SCI_RM_UDMAP_CHAN_TYPE_3RDP_PBRR 10
351 #define TI_SCI_RM_UDMAP_CHAN_TYPE_3RDP_PBVR 11
352 #define TI_SCI_RM_UDMAP_CHAN_TYPE_3RDP_BCOPY_PBRR 12
353 #define TI_SCI_RM_UDMAP_CHAN_TYPE_3RDP_BCOPY_PBVR 13
355 #define TI_SCI_RM_UDMAP_RX_FLOW_DESC_HOST 0
356 #define TI_SCI_RM_UDMAP_RX_FLOW_DESC_MONO 2
358 #define TI_SCI_RM_UDMAP_CHAN_BURST_SIZE_64_BYTES 1
359 #define TI_SCI_RM_UDMAP_CHAN_BURST_SIZE_128_BYTES 2
360 #define TI_SCI_RM_UDMAP_CHAN_BURST_SIZE_256_BYTES 3
362 #define TI_SCI_RM_BCDMA_EXTENDED_CH_TYPE_TCHAN 0
363 #define TI_SCI_RM_BCDMA_EXTENDED_CH_TYPE_BCHAN 1
365 /* UDMAP TX/RX channel valid_params common declarations */
366 #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_PAUSE_ON_ERR_VALID BIT(0)
367 #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_ATYPE_VALID BIT(1)
368 #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_CHAN_TYPE_VALID BIT(2)
369 #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_FETCH_SIZE_VALID BIT(3)
370 #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_CQ_QNUM_VALID BIT(4)
371 #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_PRIORITY_VALID BIT(5)
372 #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_QOS_VALID BIT(6)
373 #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_ORDER_ID_VALID BIT(7)
374 #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_SCHED_PRIORITY_VALID BIT(8)
375 #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_BURST_SIZE_VALID BIT(14)
378 * Configures a Navigator Subsystem UDMAP transmit channel
380 * Configures a Navigator Subsystem UDMAP transmit channel registers.
381 * See @ti_sci_msg_rm_udmap_tx_ch_cfg_req
383 struct ti_sci_msg_rm_udmap_tx_ch_cfg {
385 #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_TX_FILT_EINFO_VALID BIT(9)
386 #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_TX_FILT_PSWORDS_VALID BIT(10)
387 #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_TX_SUPR_TDPKT_VALID BIT(11)
388 #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_TX_CREDIT_COUNT_VALID BIT(12)
389 #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_TX_FDEPTH_VALID BIT(13)
390 #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_TX_TDTYPE_VALID BIT(15)
391 #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_EXTENDED_CH_TYPE_VALID BIT(16)
407 u8 tx_sched_priority;
414 * Configures a Navigator Subsystem UDMAP receive channel
416 * Configures a Navigator Subsystem UDMAP receive channel registers.
417 * See @ti_sci_msg_rm_udmap_rx_ch_cfg_req
419 struct ti_sci_msg_rm_udmap_rx_ch_cfg {
421 #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_RX_FLOWID_START_VALID BIT(9)
422 #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_RX_FLOWID_CNT_VALID BIT(10)
423 #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_RX_IGNORE_SHORT_VALID BIT(11)
424 #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_RX_IGNORE_LONG_VALID BIT(12)
432 u8 rx_sched_priority;
444 * Configures a Navigator Subsystem UDMAP receive flow
446 * Configures a Navigator Subsystem UDMAP receive flow's registers.
447 * See @tis_ci_msg_rm_udmap_flow_cfg_req
449 struct ti_sci_msg_rm_udmap_flow_cfg {
451 #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_EINFO_PRESENT_VALID BIT(0)
452 #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_PSINFO_PRESENT_VALID BIT(1)
453 #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_ERROR_HANDLING_VALID BIT(2)
454 #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_DESC_TYPE_VALID BIT(3)
455 #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_SOP_OFFSET_VALID BIT(4)
456 #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_DEST_QNUM_VALID BIT(5)
457 #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_SRC_TAG_HI_VALID BIT(6)
458 #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_SRC_TAG_LO_VALID BIT(7)
459 #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_DEST_TAG_HI_VALID BIT(8)
460 #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_DEST_TAG_LO_VALID BIT(9)
461 #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_SRC_TAG_HI_SEL_VALID BIT(10)
462 #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_SRC_TAG_LO_SEL_VALID BIT(11)
463 #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_DEST_TAG_HI_SEL_VALID BIT(12)
464 #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_DEST_TAG_LO_SEL_VALID BIT(13)
465 #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_FDQ0_SZ0_QNUM_VALID BIT(14)
466 #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_FDQ1_QNUM_VALID BIT(15)
467 #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_FDQ2_QNUM_VALID BIT(16)
468 #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_FDQ3_QNUM_VALID BIT(17)
469 #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_PS_LOCATION_VALID BIT(18)
473 u8 rx_psinfo_present;
474 u8 rx_error_handling;
482 u8 rx_src_tag_hi_sel;
483 u8 rx_src_tag_lo_sel;
484 u8 rx_dest_tag_hi_sel;
485 u8 rx_dest_tag_lo_sel;
486 u16 rx_fdq0_sz0_qnum;
494 * struct ti_sci_rm_udmap_ops - UDMA Management operations
495 * @tx_ch_cfg: configure SoC Navigator Subsystem UDMA transmit channel.
496 * @rx_ch_cfg: configure SoC Navigator Subsystem UDMA receive channel.
497 * @rx_flow_cfg1: configure SoC Navigator Subsystem UDMA receive flow.
499 struct ti_sci_rm_udmap_ops {
500 int (*tx_ch_cfg)(const struct ti_sci_handle *handle,
501 const struct ti_sci_msg_rm_udmap_tx_ch_cfg *params);
502 int (*rx_ch_cfg)(const struct ti_sci_handle *handle,
503 const struct ti_sci_msg_rm_udmap_rx_ch_cfg *params);
504 int (*rx_flow_cfg)(const struct ti_sci_handle *handle,
505 const struct ti_sci_msg_rm_udmap_flow_cfg *params);
509 * struct ti_sci_proc_ops - Processor Control operations
510 * @request: Request to control a physical processor. The requesting host
511 * should be in the processor access list
512 * @release: Relinquish a physical processor control
513 * @handover: Handover a physical processor control to another host
514 * in the permitted list
515 * @set_config: Set base configuration of a processor
516 * @set_control: Setup limited control flags in specific cases
517 * @get_status: Get the state of physical processor
519 * NOTE: The following paramteres are generic in nature for all these ops,
520 * -handle: Pointer to TI SCI handle as retrieved by *ti_sci_get_handle
524 struct ti_sci_proc_ops {
525 int (*request)(const struct ti_sci_handle *handle, u8 pid);
526 int (*release)(const struct ti_sci_handle *handle, u8 pid);
527 int (*handover)(const struct ti_sci_handle *handle, u8 pid, u8 hid);
528 int (*set_config)(const struct ti_sci_handle *handle, u8 pid,
529 u64 boot_vector, u32 cfg_set, u32 cfg_clr);
530 int (*set_control)(const struct ti_sci_handle *handle, u8 pid,
531 u32 ctrl_set, u32 ctrl_clr);
532 int (*get_status)(const struct ti_sci_handle *handle, u8 pid,
533 u64 *boot_vector, u32 *cfg_flags, u32 *ctrl_flags,
538 * struct ti_sci_ops - Function support for TI SCI
539 * @dev_ops: Device specific operations
540 * @clk_ops: Clock specific operations
541 * @rm_core_ops: Resource management core operations.
542 * @rm_irq_ops: IRQ management specific operations
543 * @proc_ops: Processor Control specific operations
546 struct ti_sci_core_ops core_ops;
547 struct ti_sci_dev_ops dev_ops;
548 struct ti_sci_clk_ops clk_ops;
549 struct ti_sci_rm_core_ops rm_core_ops;
550 struct ti_sci_rm_irq_ops rm_irq_ops;
551 struct ti_sci_rm_ringacc_ops rm_ring_ops;
552 struct ti_sci_rm_psil_ops rm_psil_ops;
553 struct ti_sci_rm_udmap_ops rm_udmap_ops;
554 struct ti_sci_proc_ops proc_ops;
558 * struct ti_sci_handle - Handle returned to TI SCI clients for usage.
559 * @version: structure containing version information
560 * @ops: operations that are made available to TI SCI clients
562 struct ti_sci_handle {
563 struct ti_sci_version_info version;
564 struct ti_sci_ops ops;
567 #define TI_SCI_RESOURCE_NULL 0xffff
570 * struct ti_sci_resource - Structure representing a resource assigned
572 * @sets: Number of sets available from this resource type
573 * @lock: Lock to guard the res map in each set.
574 * @desc: Array of resource descriptors.
576 struct ti_sci_resource {
579 struct ti_sci_resource_desc *desc;
582 #if IS_ENABLED(CONFIG_TI_SCI_PROTOCOL)
583 const struct ti_sci_handle *ti_sci_get_handle(struct device *dev);
584 int ti_sci_put_handle(const struct ti_sci_handle *handle);
585 const struct ti_sci_handle *devm_ti_sci_get_handle(struct device *dev);
586 const struct ti_sci_handle *ti_sci_get_by_phandle(struct device_node *np,
587 const char *property);
588 const struct ti_sci_handle *devm_ti_sci_get_by_phandle(struct device *dev,
589 const char *property);
590 u16 ti_sci_get_free_resource(struct ti_sci_resource *res);
591 void ti_sci_release_resource(struct ti_sci_resource *res, u16 id);
592 u32 ti_sci_get_num_resources(struct ti_sci_resource *res);
593 struct ti_sci_resource *
594 devm_ti_sci_get_of_resource(const struct ti_sci_handle *handle,
595 struct device *dev, u32 dev_id, char *of_prop);
596 struct ti_sci_resource *
597 devm_ti_sci_get_resource(const struct ti_sci_handle *handle, struct device *dev,
598 u32 dev_id, u32 sub_type);
600 #else /* CONFIG_TI_SCI_PROTOCOL */
602 static inline const struct ti_sci_handle *ti_sci_get_handle(struct device *dev)
604 return ERR_PTR(-EINVAL);
607 static inline int ti_sci_put_handle(const struct ti_sci_handle *handle)
613 const struct ti_sci_handle *devm_ti_sci_get_handle(struct device *dev)
615 return ERR_PTR(-EINVAL);
619 const struct ti_sci_handle *ti_sci_get_by_phandle(struct device_node *np,
620 const char *property)
622 return ERR_PTR(-EINVAL);
626 const struct ti_sci_handle *devm_ti_sci_get_by_phandle(struct device *dev,
627 const char *property)
629 return ERR_PTR(-EINVAL);
632 static inline u16 ti_sci_get_free_resource(struct ti_sci_resource *res)
634 return TI_SCI_RESOURCE_NULL;
637 static inline void ti_sci_release_resource(struct ti_sci_resource *res, u16 id)
641 static inline u32 ti_sci_get_num_resources(struct ti_sci_resource *res)
646 static inline struct ti_sci_resource *
647 devm_ti_sci_get_of_resource(const struct ti_sci_handle *handle,
648 struct device *dev, u32 dev_id, char *of_prop)
650 return ERR_PTR(-EINVAL);
653 static inline struct ti_sci_resource *
654 devm_ti_sci_get_resource(const struct ti_sci_handle *handle, struct device *dev,
655 u32 dev_id, u32 sub_type);
657 return ERR_PTR(-EINVAL);
659 #endif /* CONFIG_TI_SCI_PROTOCOL */
661 #endif /* __TISCI_PROTOCOL_H */