4 #include <linux/kernel.h>
5 #include <linux/rcupdate.h>
6 #include <linux/regmap.h>
8 #include <linux/skbuff.h>
10 #define MTK_WED_TX_QUEUES 2
11 #define MTK_WED_RX_QUEUES 2
13 #define WED_WO_STA_REC 0x6
19 MTK_WED_WO_CMD_WED_CFG,
20 MTK_WED_WO_CMD_WED_RX_STAT,
21 MTK_WED_WO_CMD_RRO_SER,
22 MTK_WED_WO_CMD_DBG_INFO,
23 MTK_WED_WO_CMD_DEV_INFO,
24 MTK_WED_WO_CMD_BSS_INFO,
25 MTK_WED_WO_CMD_STA_REC,
26 MTK_WED_WO_CMD_DEV_INFO_DUMP,
27 MTK_WED_WO_CMD_BSS_INFO_DUMP,
28 MTK_WED_WO_CMD_STA_REC_DUMP,
29 MTK_WED_WO_CMD_BA_INFO_DUMP,
30 MTK_WED_WO_CMD_FBCMD_Q_DUMP,
31 MTK_WED_WO_CMD_FW_LOG_CTRL,
32 MTK_WED_WO_CMD_LOG_FLUSH,
33 MTK_WED_WO_CMD_CHANGE_STATE,
34 MTK_WED_WO_CMD_CPU_STATS_ENABLE,
35 MTK_WED_WO_CMD_CPU_STATS_DUMP,
36 MTK_WED_WO_CMD_EXCEPTION_INIT,
37 MTK_WED_WO_CMD_PROF_CTRL,
38 MTK_WED_WO_CMD_STA_BA_DUMP,
39 MTK_WED_WO_CMD_BA_CTRL_DUMP,
40 MTK_WED_WO_CMD_RXCNT_CTRL,
41 MTK_WED_WO_CMD_RXCNT_INFO,
42 MTK_WED_WO_CMD_SET_CAP,
43 MTK_WED_WO_CMD_CCIF_RING_DUMP,
44 MTK_WED_WO_CMD_WED_END
47 struct mtk_rxbm_desc {
50 } __packed __aligned(4);
52 enum mtk_wed_bus_tye {
57 #define MTK_WED_RING_CONFIGURED BIT(0)
59 struct mtk_wdma_desc *desc;
69 struct mtk_wed_wo_rx_stats {
78 struct mtk_wed_device {
79 #ifdef CONFIG_NET_MEDIATEK_SOC_WED
80 const struct mtk_wed_ops *ops;
82 struct mtk_wed_hw *hw;
83 bool init_done, running;
88 /* used by wlan driver */
91 struct mtk_wed_ring tx_ring[MTK_WED_TX_QUEUES];
92 struct mtk_wed_ring rx_ring[MTK_WED_RX_QUEUES];
93 struct mtk_wed_ring txfree_ring;
94 struct mtk_wed_ring tx_wdma[MTK_WED_TX_QUEUES];
95 struct mtk_wed_ring rx_wdma[MTK_WED_RX_QUEUES];
100 struct mtk_wdma_desc *desc;
101 dma_addr_t desc_phys;
106 struct page_frag_cache rx_page;
107 struct mtk_rxbm_desc *desc;
108 dma_addr_t desc_phys;
112 struct mtk_wed_ring ring;
113 dma_addr_t miod_phys;
114 dma_addr_t fdbk_phys;
117 /* filled by driver: */
120 struct platform_device *platform_dev;
121 struct pci_dev *pci_dev;
123 enum mtk_wed_bus_tye bus_type;
139 unsigned int rx_nbuf;
140 unsigned int rx_npkt;
141 unsigned int rx_size;
143 u8 tx_tbit[MTK_WED_TX_QUEUES];
144 u8 rx_tbit[MTK_WED_RX_QUEUES];
147 u32 (*init_buf)(void *ptr, dma_addr_t phys, int token_id);
148 int (*offload_enable)(struct mtk_wed_device *wed);
149 void (*offload_disable)(struct mtk_wed_device *wed);
150 u32 (*init_rx_buf)(struct mtk_wed_device *wed, int size);
151 void (*release_rx_buf)(struct mtk_wed_device *wed);
152 void (*update_wo_rx_stats)(struct mtk_wed_device *wed,
153 struct mtk_wed_wo_rx_stats *stats);
159 int (*attach)(struct mtk_wed_device *dev);
160 int (*tx_ring_setup)(struct mtk_wed_device *dev, int ring,
161 void __iomem *regs, bool reset);
162 int (*rx_ring_setup)(struct mtk_wed_device *dev, int ring,
163 void __iomem *regs, bool reset);
164 int (*txfree_ring_setup)(struct mtk_wed_device *dev,
166 int (*msg_update)(struct mtk_wed_device *dev, int cmd_id,
167 void *data, int len);
168 void (*detach)(struct mtk_wed_device *dev);
169 void (*ppe_check)(struct mtk_wed_device *dev, struct sk_buff *skb,
170 u32 reason, u32 hash);
172 void (*stop)(struct mtk_wed_device *dev);
173 void (*start)(struct mtk_wed_device *dev, u32 irq_mask);
174 void (*reset_dma)(struct mtk_wed_device *dev);
176 u32 (*reg_read)(struct mtk_wed_device *dev, u32 reg);
177 void (*reg_write)(struct mtk_wed_device *dev, u32 reg, u32 val);
179 u32 (*irq_get)(struct mtk_wed_device *dev, u32 mask);
180 void (*irq_set_mask)(struct mtk_wed_device *dev, u32 mask);
183 extern const struct mtk_wed_ops __rcu *mtk_soc_wed_ops;
186 mtk_wed_device_attach(struct mtk_wed_device *dev)
190 #ifdef CONFIG_NET_MEDIATEK_SOC_WED
192 dev->ops = rcu_dereference(mtk_soc_wed_ops);
194 ret = dev->ops->attach(dev);
206 mtk_wed_get_rx_capa(struct mtk_wed_device *dev)
208 #ifdef CONFIG_NET_MEDIATEK_SOC_WED
209 return dev->version != 1;
215 #ifdef CONFIG_NET_MEDIATEK_SOC_WED
216 #define mtk_wed_device_active(_dev) !!(_dev)->ops
217 #define mtk_wed_device_detach(_dev) (_dev)->ops->detach(_dev)
218 #define mtk_wed_device_start(_dev, _mask) (_dev)->ops->start(_dev, _mask)
219 #define mtk_wed_device_tx_ring_setup(_dev, _ring, _regs, _reset) \
220 (_dev)->ops->tx_ring_setup(_dev, _ring, _regs, _reset)
221 #define mtk_wed_device_txfree_ring_setup(_dev, _regs) \
222 (_dev)->ops->txfree_ring_setup(_dev, _regs)
223 #define mtk_wed_device_reg_read(_dev, _reg) \
224 (_dev)->ops->reg_read(_dev, _reg)
225 #define mtk_wed_device_reg_write(_dev, _reg, _val) \
226 (_dev)->ops->reg_write(_dev, _reg, _val)
227 #define mtk_wed_device_irq_get(_dev, _mask) \
228 (_dev)->ops->irq_get(_dev, _mask)
229 #define mtk_wed_device_irq_set_mask(_dev, _mask) \
230 (_dev)->ops->irq_set_mask(_dev, _mask)
231 #define mtk_wed_device_rx_ring_setup(_dev, _ring, _regs, _reset) \
232 (_dev)->ops->rx_ring_setup(_dev, _ring, _regs, _reset)
233 #define mtk_wed_device_ppe_check(_dev, _skb, _reason, _hash) \
234 (_dev)->ops->ppe_check(_dev, _skb, _reason, _hash)
235 #define mtk_wed_device_update_msg(_dev, _id, _msg, _len) \
236 (_dev)->ops->msg_update(_dev, _id, _msg, _len)
237 #define mtk_wed_device_stop(_dev) (_dev)->ops->stop(_dev)
238 #define mtk_wed_device_dma_reset(_dev) (_dev)->ops->reset_dma(_dev)
240 static inline bool mtk_wed_device_active(struct mtk_wed_device *dev)
244 #define mtk_wed_device_detach(_dev) do {} while (0)
245 #define mtk_wed_device_start(_dev, _mask) do {} while (0)
246 #define mtk_wed_device_tx_ring_setup(_dev, _ring, _regs, _reset) -ENODEV
247 #define mtk_wed_device_txfree_ring_setup(_dev, _ring, _regs) -ENODEV
248 #define mtk_wed_device_reg_read(_dev, _reg) 0
249 #define mtk_wed_device_reg_write(_dev, _reg, _val) do {} while (0)
250 #define mtk_wed_device_irq_get(_dev, _mask) 0
251 #define mtk_wed_device_irq_set_mask(_dev, _mask) do {} while (0)
252 #define mtk_wed_device_rx_ring_setup(_dev, _ring, _regs, _reset) -ENODEV
253 #define mtk_wed_device_ppe_check(_dev, _skb, _reason, _hash) do {} while (0)
254 #define mtk_wed_device_update_msg(_dev, _id, _msg, _len) -ENODEV
255 #define mtk_wed_device_stop(_dev) do {} while (0)
256 #define mtk_wed_device_dma_reset(_dev) do {} while (0)