1 /* QLogic qed NIC Driver
3 * Copyright (c) 2015 QLogic Corporation
5 * This software is available under the terms of the GNU General Public License
6 * (GPL) Version 2, available from the file COPYING in the main directory of
13 #include <linux/types.h>
14 #include <linux/interrupt.h>
15 #include <linux/netdevice.h>
16 #include <linux/pci.h>
17 #include <linux/skbuff.h>
18 #include <linux/types.h>
19 #include <asm/byteorder.h>
21 #include <linux/compiler.h>
22 #include <linux/kernel.h>
23 #include <linux/list.h>
24 #include <linux/slab.h>
25 #include <linux/qed/common_hsi.h>
26 #include <linux/qed/qed_chain.h>
28 enum dcbx_protocol_type {
32 DCBX_PROTOCOL_ROCE_V2,
34 DCBX_MAX_PROTOCOL_TYPE
38 #define QED_LLDP_CHASSIS_ID_STAT_LEN 4
39 #define QED_LLDP_PORT_ID_STAT_LEN 4
40 #define QED_DCBX_MAX_APP_PROTOCOL 32
41 #define QED_MAX_PFC_PRIORITIES 8
42 #define QED_DCBX_DSCP_SIZE 64
44 struct qed_dcbx_lldp_remote {
45 u32 peer_chassis_id[QED_LLDP_CHASSIS_ID_STAT_LEN];
46 u32 peer_port_id[QED_LLDP_PORT_ID_STAT_LEN];
53 struct qed_dcbx_lldp_local {
54 u32 local_chassis_id[QED_LLDP_CHASSIS_ID_STAT_LEN];
55 u32 local_port_id[QED_LLDP_PORT_ID_STAT_LEN];
58 struct qed_dcbx_app_prio {
66 struct qed_dbcx_pfc_params {
69 u8 prio[QED_MAX_PFC_PRIORITIES];
73 enum qed_dcbx_sf_ieee_type {
74 QED_DCBX_SF_IEEE_ETHTYPE,
75 QED_DCBX_SF_IEEE_TCP_PORT,
76 QED_DCBX_SF_IEEE_UDP_PORT,
77 QED_DCBX_SF_IEEE_TCP_UDP_PORT
80 struct qed_app_entry {
82 enum qed_dcbx_sf_ieee_type sf_ieee;
86 enum dcbx_protocol_type proto_type;
89 struct qed_dcbx_params {
90 struct qed_app_entry app_entry[QED_DCBX_MAX_APP_PROTOCOL];
99 u8 ets_pri_tc_tbl[QED_MAX_PFC_PRIORITIES];
100 u8 ets_tc_bw_tbl[QED_MAX_PFC_PRIORITIES];
101 u8 ets_tc_tsa_tbl[QED_MAX_PFC_PRIORITIES];
102 struct qed_dbcx_pfc_params pfc;
106 struct qed_dcbx_admin_params {
107 struct qed_dcbx_params params;
111 struct qed_dcbx_remote_params {
112 struct qed_dcbx_params params;
116 struct qed_dcbx_operational_params {
117 struct qed_dcbx_app_prio app_prio;
118 struct qed_dcbx_params params;
126 struct qed_dcbx_get {
127 struct qed_dcbx_operational_params operational;
128 struct qed_dcbx_lldp_remote lldp_remote;
129 struct qed_dcbx_lldp_local lldp_local;
130 struct qed_dcbx_remote_params remote;
131 struct qed_dcbx_admin_params local;
141 #define DIRECT_REG_WR(reg_addr, val) writel((u32)val, \
142 (void __iomem *)(reg_addr))
144 #define DIRECT_REG_RD(reg_addr) readl((void __iomem *)(reg_addr))
146 #define QED_COALESCE_MAX 0xFF
151 struct qed_eth_pf_params {
152 /* The following parameters are used during HW-init
153 * and these parameters need to be passed as arguments
154 * to update_pf_params routine invoked before slowpath start
159 /* Most of the the parameters below are described in the FW iSCSI / TCP HSI */
160 struct qed_iscsi_pf_params {
161 u64 glbl_q_params_addr;
162 u64 bdq_pbl_base_addr[2];
165 u16 cmdq_num_entries;
166 u16 dup_ack_threshold;
172 /* The following parameters are used during HW-init
173 * and these parameters need to be passed as arguments
174 * to update_pf_params routine invoked before slowpath start
179 /* The following parameters are used during protocol-init */
180 u16 half_way_close_timeout;
181 u16 bdq_xoff_threshold[2];
182 u16 bdq_xon_threshold[2];
183 u16 cmdq_xoff_threshold;
184 u16 cmdq_xon_threshold;
187 u8 num_sq_pages_in_ring;
188 u8 num_r2tq_pages_in_ring;
189 u8 num_uhq_pages_in_ring;
201 u8 bdq_pbl_num_entries[2];
204 struct qed_rdma_pf_params {
205 /* Supplied to QED during resource allocation (may affect the ILT and
208 u32 min_dpis; /* number of requested DPIs */
209 u32 num_mrs; /* number of requested memory regions */
210 u32 num_qps; /* number of requested Queue Pairs */
211 u32 num_srqs; /* number of requested SRQ */
212 u8 roce_edpm_mode; /* see QED_ROCE_EDPM_MODE_ENABLE */
213 u8 gl_pi; /* protocol index */
215 /* Will allocate rate limiters to be used with QPs */
219 struct qed_pf_params {
220 struct qed_eth_pf_params eth_pf_params;
221 struct qed_iscsi_pf_params iscsi_pf_params;
222 struct qed_rdma_pf_params rdma_pf_params;
233 struct status_block *sb_virt;
235 u32 sb_ack; /* Last given ack */
237 void __iomem *igu_addr;
239 #define QED_SB_INFO_INIT 0x1
240 #define QED_SB_INFO_SETUP 0x2
242 struct qed_dev *cdev;
245 struct qed_dev_info {
246 unsigned long pci_mem_start;
247 unsigned long pci_mem_end;
248 unsigned int pci_irq;
271 QED_SB_TYPE_L2_QUEUE,
279 struct qed_link_params {
282 #define QED_LINK_OVERRIDE_SPEED_AUTONEG BIT(0)
283 #define QED_LINK_OVERRIDE_SPEED_ADV_SPEEDS BIT(1)
284 #define QED_LINK_OVERRIDE_SPEED_FORCED_SPEED BIT(2)
285 #define QED_LINK_OVERRIDE_PAUSE_CONFIG BIT(3)
286 #define QED_LINK_OVERRIDE_LOOPBACK_MODE BIT(4)
291 #define QED_LINK_PAUSE_AUTONEG_ENABLE BIT(0)
292 #define QED_LINK_PAUSE_RX_ENABLE BIT(1)
293 #define QED_LINK_PAUSE_TX_ENABLE BIT(2)
295 #define QED_LINK_LOOPBACK_NONE BIT(0)
296 #define QED_LINK_LOOPBACK_INT_PHY BIT(1)
297 #define QED_LINK_LOOPBACK_EXT_PHY BIT(2)
298 #define QED_LINK_LOOPBACK_EXT BIT(3)
299 #define QED_LINK_LOOPBACK_MAC BIT(4)
303 struct qed_link_output {
306 u32 supported_caps; /* In SUPPORTED defs */
307 u32 advertised_caps; /* In ADVERTISED defs */
308 u32 lp_caps; /* In ADVERTISED defs */
309 u32 speed; /* In Mb/s */
310 u8 duplex; /* In DUPLEX defs */
311 u8 port; /* In PORT defs */
316 struct qed_probe_params {
317 enum qed_protocol protocol;
323 #define QED_DRV_VER_STR_SIZE 12
324 struct qed_slowpath_params {
330 u8 name[QED_DRV_VER_STR_SIZE];
333 #define ILT_PAGE_SIZE_TCFC 0x8000 /* 32KB */
335 struct qed_int_info {
336 struct msix_entry *msix;
339 /* This should be updated by the protocol driver */
343 struct qed_common_cb_ops {
344 void (*link_update)(void *dev,
345 struct qed_link_output *link);
348 struct qed_selftest_ops {
350 * @brief selftest_interrupt - Perform interrupt test
354 * @return 0 on success, error otherwise.
356 int (*selftest_interrupt)(struct qed_dev *cdev);
359 * @brief selftest_memory - Perform memory test
363 * @return 0 on success, error otherwise.
365 int (*selftest_memory)(struct qed_dev *cdev);
368 * @brief selftest_register - Perform register test
372 * @return 0 on success, error otherwise.
374 int (*selftest_register)(struct qed_dev *cdev);
377 * @brief selftest_clock - Perform clock test
381 * @return 0 on success, error otherwise.
383 int (*selftest_clock)(struct qed_dev *cdev);
386 struct qed_common_ops {
387 struct qed_selftest_ops *selftest;
389 struct qed_dev* (*probe)(struct pci_dev *dev,
390 struct qed_probe_params *params);
392 void (*remove)(struct qed_dev *cdev);
394 int (*set_power_state)(struct qed_dev *cdev,
397 void (*set_id)(struct qed_dev *cdev,
401 /* Client drivers need to make this call before slowpath_start.
402 * PF params required for the call before slowpath_start is
403 * documented within the qed_pf_params structure definition.
405 void (*update_pf_params)(struct qed_dev *cdev,
406 struct qed_pf_params *params);
407 int (*slowpath_start)(struct qed_dev *cdev,
408 struct qed_slowpath_params *params);
410 int (*slowpath_stop)(struct qed_dev *cdev);
412 /* Requests to use `cnt' interrupts for fastpath.
413 * upon success, returns number of interrupts allocated for fastpath.
415 int (*set_fp_int)(struct qed_dev *cdev,
418 /* Fills `info' with pointers required for utilizing interrupts */
419 int (*get_fp_int)(struct qed_dev *cdev,
420 struct qed_int_info *info);
422 u32 (*sb_init)(struct qed_dev *cdev,
423 struct qed_sb_info *sb_info,
425 dma_addr_t sb_phy_addr,
427 enum qed_sb_type type);
429 u32 (*sb_release)(struct qed_dev *cdev,
430 struct qed_sb_info *sb_info,
433 void (*simd_handler_config)(struct qed_dev *cdev,
436 void (*handler)(void *));
438 void (*simd_handler_clean)(struct qed_dev *cdev,
442 * @brief can_link_change - can the instance change the link or not
446 * @return true if link-change is allowed, false otherwise.
448 bool (*can_link_change)(struct qed_dev *cdev);
451 * @brief set_link - set links according to params
454 * @param params - values used to override the default link configuration
456 * @return 0 on success, error otherwise.
458 int (*set_link)(struct qed_dev *cdev,
459 struct qed_link_params *params);
462 * @brief get_link - returns the current link state.
465 * @param if_link - structure to be filled with current link configuration.
467 void (*get_link)(struct qed_dev *cdev,
468 struct qed_link_output *if_link);
471 * @brief - drains chip in case Tx completions fail to arrive due to pause.
475 int (*drain)(struct qed_dev *cdev);
478 * @brief update_msglvl - update module debug level
484 void (*update_msglvl)(struct qed_dev *cdev,
488 int (*chain_alloc)(struct qed_dev *cdev,
489 enum qed_chain_use_mode intended_use,
490 enum qed_chain_mode mode,
491 enum qed_chain_cnt_type cnt_type,
494 struct qed_chain *p_chain);
496 void (*chain_free)(struct qed_dev *cdev,
497 struct qed_chain *p_chain);
500 * @brief get_coalesce - Get coalesce parameters in usec
503 * @param rx_coal - Rx coalesce value in usec
504 * @param tx_coal - Tx coalesce value in usec
507 void (*get_coalesce)(struct qed_dev *cdev, u16 *rx_coal, u16 *tx_coal);
510 * @brief set_coalesce - Configure Rx coalesce value in usec
513 * @param rx_coal - Rx coalesce value in usec
514 * @param tx_coal - Tx coalesce value in usec
515 * @param qid - Queue index
516 * @param sb_id - Status Block Id
518 * @return 0 on success, error otherwise.
520 int (*set_coalesce)(struct qed_dev *cdev, u16 rx_coal, u16 tx_coal,
524 * @brief set_led - Configure LED mode
527 * @param mode - LED mode
529 * @return 0 on success, error otherwise.
531 int (*set_led)(struct qed_dev *cdev,
532 enum qed_led_mode mode);
535 #define MASK_FIELD(_name, _value) \
536 ((_value) &= (_name ## _MASK))
538 #define FIELD_VALUE(_name, _value) \
539 ((_value & _name ## _MASK) << _name ## _SHIFT)
541 #define SET_FIELD(value, name, flag) \
543 (value) &= ~(name ## _MASK << name ## _SHIFT); \
544 (value) |= (((u64)flag) << (name ## _SHIFT)); \
547 #define GET_FIELD(value, name) \
548 (((value) >> (name ## _SHIFT)) & name ## _MASK)
550 /* Debug print definitions */
551 #define DP_ERR(cdev, fmt, ...) \
552 pr_err("[%s:%d(%s)]" fmt, \
553 __func__, __LINE__, \
554 DP_NAME(cdev) ? DP_NAME(cdev) : "", \
557 #define DP_NOTICE(cdev, fmt, ...) \
559 if (unlikely((cdev)->dp_level <= QED_LEVEL_NOTICE)) { \
560 pr_notice("[%s:%d(%s)]" fmt, \
561 __func__, __LINE__, \
562 DP_NAME(cdev) ? DP_NAME(cdev) : "", \
568 #define DP_INFO(cdev, fmt, ...) \
570 if (unlikely((cdev)->dp_level <= QED_LEVEL_INFO)) { \
571 pr_notice("[%s:%d(%s)]" fmt, \
572 __func__, __LINE__, \
573 DP_NAME(cdev) ? DP_NAME(cdev) : "", \
578 #define DP_VERBOSE(cdev, module, fmt, ...) \
580 if (unlikely(((cdev)->dp_level <= QED_LEVEL_VERBOSE) && \
581 ((cdev)->dp_module & module))) { \
582 pr_notice("[%s:%d(%s)]" fmt, \
583 __func__, __LINE__, \
584 DP_NAME(cdev) ? DP_NAME(cdev) : "", \
590 QED_LEVEL_VERBOSE = 0x0,
591 QED_LEVEL_INFO = 0x1,
592 QED_LEVEL_NOTICE = 0x2,
596 #define QED_LOG_LEVEL_SHIFT (30)
597 #define QED_LOG_VERBOSE_MASK (0x3fffffff)
598 #define QED_LOG_INFO_MASK (0x40000000)
599 #define QED_LOG_NOTICE_MASK (0x80000000)
602 QED_MSG_SPQ = 0x10000,
603 QED_MSG_STATS = 0x20000,
604 QED_MSG_DCB = 0x40000,
605 QED_MSG_IOV = 0x80000,
606 QED_MSG_SP = 0x100000,
607 QED_MSG_STORAGE = 0x200000,
608 QED_MSG_CXT = 0x800000,
609 QED_MSG_ILT = 0x2000000,
610 QED_MSG_ROCE = 0x4000000,
611 QED_MSG_DEBUG = 0x8000000,
612 /* to be added...up to 0x8000000 */
621 struct qed_eth_stats {
622 u64 no_buff_discards;
623 u64 packet_too_big_discard;
631 u64 mftag_filter_discards;
632 u64 mac_filter_discards;
639 u64 tx_err_drop_pkts;
640 u64 tpa_coalesced_pkts;
641 u64 tpa_coalesced_events;
643 u64 tpa_not_coalesced_pkts;
644 u64 tpa_coalesced_bytes;
647 u64 rx_64_byte_packets;
648 u64 rx_65_to_127_byte_packets;
649 u64 rx_128_to_255_byte_packets;
650 u64 rx_256_to_511_byte_packets;
651 u64 rx_512_to_1023_byte_packets;
652 u64 rx_1024_to_1518_byte_packets;
653 u64 rx_1519_to_1522_byte_packets;
654 u64 rx_1519_to_2047_byte_packets;
655 u64 rx_2048_to_4095_byte_packets;
656 u64 rx_4096_to_9216_byte_packets;
657 u64 rx_9217_to_16383_byte_packets;
659 u64 rx_mac_crtl_frames;
663 u64 rx_carrier_errors;
664 u64 rx_oversize_packets;
666 u64 rx_undersize_packets;
668 u64 tx_64_byte_packets;
669 u64 tx_65_to_127_byte_packets;
670 u64 tx_128_to_255_byte_packets;
671 u64 tx_256_to_511_byte_packets;
672 u64 tx_512_to_1023_byte_packets;
673 u64 tx_1024_to_1518_byte_packets;
674 u64 tx_1519_to_2047_byte_packets;
675 u64 tx_2048_to_4095_byte_packets;
676 u64 tx_4096_to_9216_byte_packets;
677 u64 tx_9217_to_16383_byte_packets;
680 u64 tx_lpi_entry_count;
681 u64 tx_total_collisions;
685 u64 rx_mac_uc_packets;
686 u64 rx_mac_mc_packets;
687 u64 rx_mac_bc_packets;
688 u64 rx_mac_frames_ok;
690 u64 tx_mac_uc_packets;
691 u64 tx_mac_mc_packets;
692 u64 tx_mac_bc_packets;
693 u64 tx_mac_ctrl_frames;
696 #define QED_SB_IDX 0x0002
699 #define TX_PI(tc) (RX_PI + 1 + tc)
701 struct qed_sb_cnt_info {
707 static inline u16 qed_sb_update_sb_idx(struct qed_sb_info *sb_info)
712 prod = le32_to_cpu(sb_info->sb_virt->prod_index) &
713 STATUS_BLOCK_PROD_INDEX_MASK;
714 if (sb_info->sb_ack != prod) {
715 sb_info->sb_ack = prod;
726 * @brief This function creates an update command for interrupts that is
727 * written to the IGU.
729 * @param sb_info - This is the structure allocated and
730 * initialized per status block. Assumption is
731 * that it was initialized using qed_sb_init
732 * @param int_cmd - Enable/Disable/Nop
733 * @param upd_flg - whether igu consumer should be
736 * @return inline void
738 static inline void qed_sb_ack(struct qed_sb_info *sb_info,
739 enum igu_int_cmd int_cmd,
742 struct igu_prod_cons_update igu_ack = { 0 };
744 igu_ack.sb_id_and_flags =
745 ((sb_info->sb_ack << IGU_PROD_CONS_UPDATE_SB_INDEX_SHIFT) |
746 (upd_flg << IGU_PROD_CONS_UPDATE_UPDATE_FLAG_SHIFT) |
747 (int_cmd << IGU_PROD_CONS_UPDATE_ENABLE_INT_SHIFT) |
748 (IGU_SEG_ACCESS_REG <<
749 IGU_PROD_CONS_UPDATE_SEGMENT_ACCESS_SHIFT));
751 DIRECT_REG_WR(sb_info->igu_addr, igu_ack.sb_id_and_flags);
753 /* Both segments (interrupts & acks) are written to same place address;
754 * Need to guarantee all commands will be received (in-order) by HW.
760 static inline void __internal_ram_wr(void *p_hwfn,
768 for (i = 0; i < size / sizeof(*data); i++)
769 DIRECT_REG_WR(&((u32 __iomem *)addr)[i], data[i]);
772 static inline void internal_ram_wr(void __iomem *addr,
776 __internal_ram_wr(NULL, addr, size, data);
782 QED_RSS_IPV4_TCP = 0x4,
783 QED_RSS_IPV6_TCP = 0x8,
784 QED_RSS_IPV4_UDP = 0x10,
785 QED_RSS_IPV6_UDP = 0x20,
788 #define QED_RSS_IND_TABLE_SIZE 128
789 #define QED_RSS_KEY_SIZE 10 /* size in 32b chunks */