modules: add ro_after_init support
[linux-2.6-block.git] / include / linux / qed / qed_if.h
1 /* QLogic qed NIC Driver
2  *
3  * Copyright (c) 2015 QLogic Corporation
4  *
5  * This software is available under the terms of the GNU General Public License
6  * (GPL) Version 2, available from the file COPYING in the main directory of
7  * this source tree.
8  */
9
10 #ifndef _QED_IF_H
11 #define _QED_IF_H
12
13 #include <linux/types.h>
14 #include <linux/interrupt.h>
15 #include <linux/netdevice.h>
16 #include <linux/pci.h>
17 #include <linux/skbuff.h>
18 #include <linux/types.h>
19 #include <asm/byteorder.h>
20 #include <linux/io.h>
21 #include <linux/compiler.h>
22 #include <linux/kernel.h>
23 #include <linux/list.h>
24 #include <linux/slab.h>
25 #include <linux/qed/common_hsi.h>
26 #include <linux/qed/qed_chain.h>
27
28 enum dcbx_protocol_type {
29         DCBX_PROTOCOL_ISCSI,
30         DCBX_PROTOCOL_FCOE,
31         DCBX_PROTOCOL_ROCE,
32         DCBX_PROTOCOL_ROCE_V2,
33         DCBX_PROTOCOL_ETH,
34         DCBX_MAX_PROTOCOL_TYPE
35 };
36
37 enum qed_led_mode {
38         QED_LED_MODE_OFF,
39         QED_LED_MODE_ON,
40         QED_LED_MODE_RESTORE
41 };
42
43 #define DIRECT_REG_WR(reg_addr, val) writel((u32)val, \
44                                             (void __iomem *)(reg_addr))
45
46 #define DIRECT_REG_RD(reg_addr) readl((void __iomem *)(reg_addr))
47
48 #define QED_COALESCE_MAX 0xFF
49
50 /* forward */
51 struct qed_dev;
52
53 struct qed_eth_pf_params {
54         /* The following parameters are used during HW-init
55          * and these parameters need to be passed as arguments
56          * to update_pf_params routine invoked before slowpath start
57          */
58         u16 num_cons;
59 };
60
61 struct qed_pf_params {
62         struct qed_eth_pf_params eth_pf_params;
63 };
64
65 enum qed_int_mode {
66         QED_INT_MODE_INTA,
67         QED_INT_MODE_MSIX,
68         QED_INT_MODE_MSI,
69         QED_INT_MODE_POLL,
70 };
71
72 struct qed_sb_info {
73         struct status_block     *sb_virt;
74         dma_addr_t              sb_phys;
75         u32                     sb_ack; /* Last given ack */
76         u16                     igu_sb_id;
77         void __iomem            *igu_addr;
78         u8                      flags;
79 #define QED_SB_INFO_INIT        0x1
80 #define QED_SB_INFO_SETUP       0x2
81
82         struct qed_dev          *cdev;
83 };
84
85 struct qed_dev_info {
86         unsigned long   pci_mem_start;
87         unsigned long   pci_mem_end;
88         unsigned int    pci_irq;
89         u8              num_hwfns;
90
91         u8              hw_mac[ETH_ALEN];
92         bool            is_mf_default;
93
94         /* FW version */
95         u16             fw_major;
96         u16             fw_minor;
97         u16             fw_rev;
98         u16             fw_eng;
99
100         /* MFW version */
101         u32             mfw_rev;
102
103         u32             flash_size;
104         u8              mf_mode;
105         bool            tx_switching;
106 };
107
108 enum qed_sb_type {
109         QED_SB_TYPE_L2_QUEUE,
110 };
111
112 enum qed_protocol {
113         QED_PROTOCOL_ETH,
114 };
115
116 struct qed_link_params {
117         bool    link_up;
118
119 #define QED_LINK_OVERRIDE_SPEED_AUTONEG         BIT(0)
120 #define QED_LINK_OVERRIDE_SPEED_ADV_SPEEDS      BIT(1)
121 #define QED_LINK_OVERRIDE_SPEED_FORCED_SPEED    BIT(2)
122 #define QED_LINK_OVERRIDE_PAUSE_CONFIG          BIT(3)
123 #define QED_LINK_OVERRIDE_LOOPBACK_MODE         BIT(4)
124         u32     override_flags;
125         bool    autoneg;
126         u32     adv_speeds;
127         u32     forced_speed;
128 #define QED_LINK_PAUSE_AUTONEG_ENABLE           BIT(0)
129 #define QED_LINK_PAUSE_RX_ENABLE                BIT(1)
130 #define QED_LINK_PAUSE_TX_ENABLE                BIT(2)
131         u32     pause_config;
132 #define QED_LINK_LOOPBACK_NONE                  BIT(0)
133 #define QED_LINK_LOOPBACK_INT_PHY               BIT(1)
134 #define QED_LINK_LOOPBACK_EXT_PHY               BIT(2)
135 #define QED_LINK_LOOPBACK_EXT                   BIT(3)
136 #define QED_LINK_LOOPBACK_MAC                   BIT(4)
137         u32     loopback_mode;
138 };
139
140 struct qed_link_output {
141         bool    link_up;
142
143         u32     supported_caps;         /* In SUPPORTED defs */
144         u32     advertised_caps;        /* In ADVERTISED defs */
145         u32     lp_caps;                /* In ADVERTISED defs */
146         u32     speed;                  /* In Mb/s */
147         u8      duplex;                 /* In DUPLEX defs */
148         u8      port;                   /* In PORT defs */
149         bool    autoneg;
150         u32     pause_config;
151 };
152
153 struct qed_probe_params {
154         enum qed_protocol protocol;
155         u32 dp_module;
156         u8 dp_level;
157         bool is_vf;
158 };
159
160 #define QED_DRV_VER_STR_SIZE 12
161 struct qed_slowpath_params {
162         u32     int_mode;
163         u8      drv_major;
164         u8      drv_minor;
165         u8      drv_rev;
166         u8      drv_eng;
167         u8      name[QED_DRV_VER_STR_SIZE];
168 };
169
170 #define ILT_PAGE_SIZE_TCFC 0x8000 /* 32KB */
171
172 struct qed_int_info {
173         struct msix_entry       *msix;
174         u8                      msix_cnt;
175
176         /* This should be updated by the protocol driver */
177         u8                      used_cnt;
178 };
179
180 struct qed_common_cb_ops {
181         void    (*link_update)(void                     *dev,
182                                struct qed_link_output   *link);
183 };
184
185 struct qed_selftest_ops {
186 /**
187  * @brief selftest_interrupt - Perform interrupt test
188  *
189  * @param cdev
190  *
191  * @return 0 on success, error otherwise.
192  */
193         int (*selftest_interrupt)(struct qed_dev *cdev);
194
195 /**
196  * @brief selftest_memory - Perform memory test
197  *
198  * @param cdev
199  *
200  * @return 0 on success, error otherwise.
201  */
202         int (*selftest_memory)(struct qed_dev *cdev);
203
204 /**
205  * @brief selftest_register - Perform register test
206  *
207  * @param cdev
208  *
209  * @return 0 on success, error otherwise.
210  */
211         int (*selftest_register)(struct qed_dev *cdev);
212
213 /**
214  * @brief selftest_clock - Perform clock test
215  *
216  * @param cdev
217  *
218  * @return 0 on success, error otherwise.
219  */
220         int (*selftest_clock)(struct qed_dev *cdev);
221 };
222
223 struct qed_common_ops {
224         struct qed_selftest_ops *selftest;
225
226         struct qed_dev* (*probe)(struct pci_dev *dev,
227                                  struct qed_probe_params *params);
228
229         void            (*remove)(struct qed_dev *cdev);
230
231         int             (*set_power_state)(struct qed_dev *cdev,
232                                            pci_power_t state);
233
234         void            (*set_id)(struct qed_dev *cdev,
235                                   char name[],
236                                   char ver_str[]);
237
238         /* Client drivers need to make this call before slowpath_start.
239          * PF params required for the call before slowpath_start is
240          * documented within the qed_pf_params structure definition.
241          */
242         void            (*update_pf_params)(struct qed_dev *cdev,
243                                             struct qed_pf_params *params);
244         int             (*slowpath_start)(struct qed_dev *cdev,
245                                           struct qed_slowpath_params *params);
246
247         int             (*slowpath_stop)(struct qed_dev *cdev);
248
249         /* Requests to use `cnt' interrupts for fastpath.
250          * upon success, returns number of interrupts allocated for fastpath.
251          */
252         int             (*set_fp_int)(struct qed_dev *cdev,
253                                       u16 cnt);
254
255         /* Fills `info' with pointers required for utilizing interrupts */
256         int             (*get_fp_int)(struct qed_dev *cdev,
257                                       struct qed_int_info *info);
258
259         u32             (*sb_init)(struct qed_dev *cdev,
260                                    struct qed_sb_info *sb_info,
261                                    void *sb_virt_addr,
262                                    dma_addr_t sb_phy_addr,
263                                    u16 sb_id,
264                                    enum qed_sb_type type);
265
266         u32             (*sb_release)(struct qed_dev *cdev,
267                                       struct qed_sb_info *sb_info,
268                                       u16 sb_id);
269
270         void            (*simd_handler_config)(struct qed_dev *cdev,
271                                                void *token,
272                                                int index,
273                                                void (*handler)(void *));
274
275         void            (*simd_handler_clean)(struct qed_dev *cdev,
276                                               int index);
277
278 /**
279  * @brief can_link_change - can the instance change the link or not
280  *
281  * @param cdev
282  *
283  * @return true if link-change is allowed, false otherwise.
284  */
285         bool (*can_link_change)(struct qed_dev *cdev);
286
287 /**
288  * @brief set_link - set links according to params
289  *
290  * @param cdev
291  * @param params - values used to override the default link configuration
292  *
293  * @return 0 on success, error otherwise.
294  */
295         int             (*set_link)(struct qed_dev *cdev,
296                                     struct qed_link_params *params);
297
298 /**
299  * @brief get_link - returns the current link state.
300  *
301  * @param cdev
302  * @param if_link - structure to be filled with current link configuration.
303  */
304         void            (*get_link)(struct qed_dev *cdev,
305                                     struct qed_link_output *if_link);
306
307 /**
308  * @brief - drains chip in case Tx completions fail to arrive due to pause.
309  *
310  * @param cdev
311  */
312         int             (*drain)(struct qed_dev *cdev);
313
314 /**
315  * @brief update_msglvl - update module debug level
316  *
317  * @param cdev
318  * @param dp_module
319  * @param dp_level
320  */
321         void            (*update_msglvl)(struct qed_dev *cdev,
322                                          u32 dp_module,
323                                          u8 dp_level);
324
325         int             (*chain_alloc)(struct qed_dev *cdev,
326                                        enum qed_chain_use_mode intended_use,
327                                        enum qed_chain_mode mode,
328                                        u16 num_elems,
329                                        size_t elem_size,
330                                        struct qed_chain *p_chain);
331
332         void            (*chain_free)(struct qed_dev *cdev,
333                                       struct qed_chain *p_chain);
334
335 /**
336  * @brief set_led - Configure LED mode
337  *
338  * @param cdev
339  * @param mode - LED mode
340  *
341  * @return 0 on success, error otherwise.
342  */
343         int (*set_led)(struct qed_dev *cdev,
344                        enum qed_led_mode mode);
345 };
346
347 #define MASK_FIELD(_name, _value) \
348         ((_value) &= (_name ## _MASK))
349
350 #define FIELD_VALUE(_name, _value) \
351         ((_value & _name ## _MASK) << _name ## _SHIFT)
352
353 #define SET_FIELD(value, name, flag)                           \
354         do {                                                   \
355                 (value) &= ~(name ## _MASK << name ## _SHIFT); \
356                 (value) |= (((u64)flag) << (name ## _SHIFT));  \
357         } while (0)
358
359 #define GET_FIELD(value, name) \
360         (((value) >> (name ## _SHIFT)) & name ## _MASK)
361
362 /* Debug print definitions */
363 #define DP_ERR(cdev, fmt, ...)                                               \
364                 pr_err("[%s:%d(%s)]" fmt,                                    \
365                        __func__, __LINE__,                                   \
366                        DP_NAME(cdev) ? DP_NAME(cdev) : "",                   \
367                        ## __VA_ARGS__)                                       \
368
369 #define DP_NOTICE(cdev, fmt, ...)                                     \
370         do {                                                          \
371                 if (unlikely((cdev)->dp_level <= QED_LEVEL_NOTICE)) { \
372                         pr_notice("[%s:%d(%s)]" fmt,                  \
373                                   __func__, __LINE__,                 \
374                                   DP_NAME(cdev) ? DP_NAME(cdev) : "", \
375                                   ## __VA_ARGS__);                    \
376                                                                       \
377                 }                                                     \
378         } while (0)
379
380 #define DP_INFO(cdev, fmt, ...)                                       \
381         do {                                                          \
382                 if (unlikely((cdev)->dp_level <= QED_LEVEL_INFO)) {   \
383                         pr_notice("[%s:%d(%s)]" fmt,                  \
384                                   __func__, __LINE__,                 \
385                                   DP_NAME(cdev) ? DP_NAME(cdev) : "", \
386                                   ## __VA_ARGS__);                    \
387                 }                                                     \
388         } while (0)
389
390 #define DP_VERBOSE(cdev, module, fmt, ...)                              \
391         do {                                                            \
392                 if (unlikely(((cdev)->dp_level <= QED_LEVEL_VERBOSE) && \
393                              ((cdev)->dp_module & module))) {           \
394                         pr_notice("[%s:%d(%s)]" fmt,                    \
395                                   __func__, __LINE__,                   \
396                                   DP_NAME(cdev) ? DP_NAME(cdev) : "",   \
397                                   ## __VA_ARGS__);                      \
398                 }                                                       \
399         } while (0)
400
401 enum DP_LEVEL {
402         QED_LEVEL_VERBOSE       = 0x0,
403         QED_LEVEL_INFO          = 0x1,
404         QED_LEVEL_NOTICE        = 0x2,
405         QED_LEVEL_ERR           = 0x3,
406 };
407
408 #define QED_LOG_LEVEL_SHIFT     (30)
409 #define QED_LOG_VERBOSE_MASK    (0x3fffffff)
410 #define QED_LOG_INFO_MASK       (0x40000000)
411 #define QED_LOG_NOTICE_MASK     (0x80000000)
412
413 enum DP_MODULE {
414         QED_MSG_SPQ     = 0x10000,
415         QED_MSG_STATS   = 0x20000,
416         QED_MSG_DCB     = 0x40000,
417         QED_MSG_IOV     = 0x80000,
418         QED_MSG_SP      = 0x100000,
419         QED_MSG_STORAGE = 0x200000,
420         QED_MSG_CXT     = 0x800000,
421         QED_MSG_ILT     = 0x2000000,
422         QED_MSG_ROCE    = 0x4000000,
423         QED_MSG_DEBUG   = 0x8000000,
424         /* to be added...up to 0x8000000 */
425 };
426
427 enum qed_mf_mode {
428         QED_MF_DEFAULT,
429         QED_MF_OVLAN,
430         QED_MF_NPAR,
431 };
432
433 struct qed_eth_stats {
434         u64     no_buff_discards;
435         u64     packet_too_big_discard;
436         u64     ttl0_discard;
437         u64     rx_ucast_bytes;
438         u64     rx_mcast_bytes;
439         u64     rx_bcast_bytes;
440         u64     rx_ucast_pkts;
441         u64     rx_mcast_pkts;
442         u64     rx_bcast_pkts;
443         u64     mftag_filter_discards;
444         u64     mac_filter_discards;
445         u64     tx_ucast_bytes;
446         u64     tx_mcast_bytes;
447         u64     tx_bcast_bytes;
448         u64     tx_ucast_pkts;
449         u64     tx_mcast_pkts;
450         u64     tx_bcast_pkts;
451         u64     tx_err_drop_pkts;
452         u64     tpa_coalesced_pkts;
453         u64     tpa_coalesced_events;
454         u64     tpa_aborts_num;
455         u64     tpa_not_coalesced_pkts;
456         u64     tpa_coalesced_bytes;
457
458         /* port */
459         u64     rx_64_byte_packets;
460         u64     rx_65_to_127_byte_packets;
461         u64     rx_128_to_255_byte_packets;
462         u64     rx_256_to_511_byte_packets;
463         u64     rx_512_to_1023_byte_packets;
464         u64     rx_1024_to_1518_byte_packets;
465         u64     rx_1519_to_1522_byte_packets;
466         u64     rx_1519_to_2047_byte_packets;
467         u64     rx_2048_to_4095_byte_packets;
468         u64     rx_4096_to_9216_byte_packets;
469         u64     rx_9217_to_16383_byte_packets;
470         u64     rx_crc_errors;
471         u64     rx_mac_crtl_frames;
472         u64     rx_pause_frames;
473         u64     rx_pfc_frames;
474         u64     rx_align_errors;
475         u64     rx_carrier_errors;
476         u64     rx_oversize_packets;
477         u64     rx_jabbers;
478         u64     rx_undersize_packets;
479         u64     rx_fragments;
480         u64     tx_64_byte_packets;
481         u64     tx_65_to_127_byte_packets;
482         u64     tx_128_to_255_byte_packets;
483         u64     tx_256_to_511_byte_packets;
484         u64     tx_512_to_1023_byte_packets;
485         u64     tx_1024_to_1518_byte_packets;
486         u64     tx_1519_to_2047_byte_packets;
487         u64     tx_2048_to_4095_byte_packets;
488         u64     tx_4096_to_9216_byte_packets;
489         u64     tx_9217_to_16383_byte_packets;
490         u64     tx_pause_frames;
491         u64     tx_pfc_frames;
492         u64     tx_lpi_entry_count;
493         u64     tx_total_collisions;
494         u64     brb_truncates;
495         u64     brb_discards;
496         u64     rx_mac_bytes;
497         u64     rx_mac_uc_packets;
498         u64     rx_mac_mc_packets;
499         u64     rx_mac_bc_packets;
500         u64     rx_mac_frames_ok;
501         u64     tx_mac_bytes;
502         u64     tx_mac_uc_packets;
503         u64     tx_mac_mc_packets;
504         u64     tx_mac_bc_packets;
505         u64     tx_mac_ctrl_frames;
506 };
507
508 #define QED_SB_IDX              0x0002
509
510 #define RX_PI           0
511 #define TX_PI(tc)       (RX_PI + 1 + tc)
512
513 struct qed_sb_cnt_info {
514         int     sb_cnt;
515         int     sb_iov_cnt;
516         int     sb_free_blk;
517 };
518
519 static inline u16 qed_sb_update_sb_idx(struct qed_sb_info *sb_info)
520 {
521         u32 prod = 0;
522         u16 rc = 0;
523
524         prod = le32_to_cpu(sb_info->sb_virt->prod_index) &
525                STATUS_BLOCK_PROD_INDEX_MASK;
526         if (sb_info->sb_ack != prod) {
527                 sb_info->sb_ack = prod;
528                 rc |= QED_SB_IDX;
529         }
530
531         /* Let SB update */
532         mmiowb();
533         return rc;
534 }
535
536 /**
537  *
538  * @brief This function creates an update command for interrupts that is
539  *        written to the IGU.
540  *
541  * @param sb_info       - This is the structure allocated and
542  *                 initialized per status block. Assumption is
543  *                 that it was initialized using qed_sb_init
544  * @param int_cmd       - Enable/Disable/Nop
545  * @param upd_flg       - whether igu consumer should be
546  *                 updated.
547  *
548  * @return inline void
549  */
550 static inline void qed_sb_ack(struct qed_sb_info *sb_info,
551                               enum igu_int_cmd int_cmd,
552                               u8 upd_flg)
553 {
554         struct igu_prod_cons_update igu_ack = { 0 };
555
556         igu_ack.sb_id_and_flags =
557                 ((sb_info->sb_ack << IGU_PROD_CONS_UPDATE_SB_INDEX_SHIFT) |
558                  (upd_flg << IGU_PROD_CONS_UPDATE_UPDATE_FLAG_SHIFT) |
559                  (int_cmd << IGU_PROD_CONS_UPDATE_ENABLE_INT_SHIFT) |
560                  (IGU_SEG_ACCESS_REG <<
561                   IGU_PROD_CONS_UPDATE_SEGMENT_ACCESS_SHIFT));
562
563         DIRECT_REG_WR(sb_info->igu_addr, igu_ack.sb_id_and_flags);
564
565         /* Both segments (interrupts & acks) are written to same place address;
566          * Need to guarantee all commands will be received (in-order) by HW.
567          */
568         mmiowb();
569         barrier();
570 }
571
572 static inline void __internal_ram_wr(void *p_hwfn,
573                                      void __iomem *addr,
574                                      int size,
575                                      u32 *data)
576
577 {
578         unsigned int i;
579
580         for (i = 0; i < size / sizeof(*data); i++)
581                 DIRECT_REG_WR(&((u32 __iomem *)addr)[i], data[i]);
582 }
583
584 static inline void internal_ram_wr(void __iomem *addr,
585                                    int size,
586                                    u32 *data)
587 {
588         __internal_ram_wr(NULL, addr, size, data);
589 }
590
591 enum qed_rss_caps {
592         QED_RSS_IPV4            = 0x1,
593         QED_RSS_IPV6            = 0x2,
594         QED_RSS_IPV4_TCP        = 0x4,
595         QED_RSS_IPV6_TCP        = 0x8,
596         QED_RSS_IPV4_UDP        = 0x10,
597         QED_RSS_IPV6_UDP        = 0x20,
598 };
599
600 #define QED_RSS_IND_TABLE_SIZE 128
601 #define QED_RSS_KEY_SIZE 10 /* size in 32b chunks */
602 #endif