1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _LINUX_PGTABLE_H
3 #define _LINUX_PGTABLE_H
6 #include <asm/pgtable.h>
11 #include <linux/mm_types.h>
12 #include <linux/bug.h>
13 #include <linux/errno.h>
14 #include <asm-generic/pgtable_uffd.h>
15 #include <linux/page_table_check.h>
17 #if 5 - defined(__PAGETABLE_P4D_FOLDED) - defined(__PAGETABLE_PUD_FOLDED) - \
18 defined(__PAGETABLE_PMD_FOLDED) != CONFIG_PGTABLE_LEVELS
19 #error CONFIG_PGTABLE_LEVELS is not consistent with __PAGETABLE_{P4D,PUD,PMD}_FOLDED
23 * On almost all architectures and configurations, 0 can be used as the
24 * upper ceiling to free_pgtables(): on many architectures it has the same
25 * effect as using TASK_SIZE. However, there is one configuration which
26 * must impose a more careful limit, to avoid freeing kernel pgtables.
28 #ifndef USER_PGTABLES_CEILING
29 #define USER_PGTABLES_CEILING 0UL
33 * This defines the first usable user address. Platforms
34 * can override its value with custom FIRST_USER_ADDRESS
35 * defined in their respective <asm/pgtable.h>.
37 #ifndef FIRST_USER_ADDRESS
38 #define FIRST_USER_ADDRESS 0UL
42 * This defines the generic helper for accessing PMD page
43 * table page. Although platforms can still override this
44 * via their respective <asm/pgtable.h>.
47 #define pmd_pgtable(pmd) pmd_page(pmd)
51 * A page table page can be thought of an array like this: pXd_t[PTRS_PER_PxD]
53 * The pXx_index() functions return the index of the entry in the page
54 * table page which would control the given virtual address
56 * As these functions may be used by the same code for different levels of
57 * the page table folding, they are always available, regardless of
58 * CONFIG_PGTABLE_LEVELS value. For the folded levels they simply return 0
59 * because in such cases PTRS_PER_PxD equals 1.
62 static inline unsigned long pte_index(unsigned long address)
64 return (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1);
66 #define pte_index pte_index
69 static inline unsigned long pmd_index(unsigned long address)
71 return (address >> PMD_SHIFT) & (PTRS_PER_PMD - 1);
73 #define pmd_index pmd_index
77 static inline unsigned long pud_index(unsigned long address)
79 return (address >> PUD_SHIFT) & (PTRS_PER_PUD - 1);
81 #define pud_index pud_index
85 /* Must be a compile-time constant, so implement it as a macro */
86 #define pgd_index(a) (((a) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))
89 #ifndef pte_offset_kernel
90 static inline pte_t *pte_offset_kernel(pmd_t *pmd, unsigned long address)
92 return (pte_t *)pmd_page_vaddr(*pmd) + pte_index(address);
94 #define pte_offset_kernel pte_offset_kernel
97 #if defined(CONFIG_HIGHPTE)
98 #define pte_offset_map(dir, address) \
99 ((pte_t *)kmap_atomic(pmd_page(*(dir))) + \
100 pte_index((address)))
101 #define pte_unmap(pte) kunmap_atomic((pte))
103 #define pte_offset_map(dir, address) pte_offset_kernel((dir), (address))
104 #define pte_unmap(pte) ((void)(pte)) /* NOP */
107 /* Find an entry in the second-level page table.. */
109 static inline pmd_t *pmd_offset(pud_t *pud, unsigned long address)
111 return pud_pgtable(*pud) + pmd_index(address);
113 #define pmd_offset pmd_offset
117 static inline pud_t *pud_offset(p4d_t *p4d, unsigned long address)
119 return p4d_pgtable(*p4d) + pud_index(address);
121 #define pud_offset pud_offset
124 static inline pgd_t *pgd_offset_pgd(pgd_t *pgd, unsigned long address)
126 return (pgd + pgd_index(address));
130 * a shortcut to get a pgd_t in a given mm
133 #define pgd_offset(mm, address) pgd_offset_pgd((mm)->pgd, (address))
137 * a shortcut which implies the use of the kernel's pgd, instead
141 #define pgd_offset_k(address) pgd_offset(&init_mm, (address))
145 * In many cases it is known that a virtual address is mapped at PMD or PTE
146 * level, so instead of traversing all the page table levels, we can get a
147 * pointer to the PMD entry in user or kernel page table or translate a virtual
148 * address to the pointer in the PTE in the kernel page tables with simple
151 static inline pmd_t *pmd_off(struct mm_struct *mm, unsigned long va)
153 return pmd_offset(pud_offset(p4d_offset(pgd_offset(mm, va), va), va), va);
156 static inline pmd_t *pmd_off_k(unsigned long va)
158 return pmd_offset(pud_offset(p4d_offset(pgd_offset_k(va), va), va), va);
161 static inline pte_t *virt_to_kpte(unsigned long vaddr)
163 pmd_t *pmd = pmd_off_k(vaddr);
165 return pmd_none(*pmd) ? NULL : pte_offset_kernel(pmd, vaddr);
168 #ifndef __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
169 extern int ptep_set_access_flags(struct vm_area_struct *vma,
170 unsigned long address, pte_t *ptep,
171 pte_t entry, int dirty);
174 #ifndef __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS
175 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
176 extern int pmdp_set_access_flags(struct vm_area_struct *vma,
177 unsigned long address, pmd_t *pmdp,
178 pmd_t entry, int dirty);
179 extern int pudp_set_access_flags(struct vm_area_struct *vma,
180 unsigned long address, pud_t *pudp,
181 pud_t entry, int dirty);
183 static inline int pmdp_set_access_flags(struct vm_area_struct *vma,
184 unsigned long address, pmd_t *pmdp,
185 pmd_t entry, int dirty)
190 static inline int pudp_set_access_flags(struct vm_area_struct *vma,
191 unsigned long address, pud_t *pudp,
192 pud_t entry, int dirty)
197 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
200 #ifndef __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
201 static inline int ptep_test_and_clear_young(struct vm_area_struct *vma,
202 unsigned long address,
210 set_pte_at(vma->vm_mm, address, ptep, pte_mkold(pte));
215 #ifndef __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG
216 #if defined(CONFIG_TRANSPARENT_HUGEPAGE) || defined(CONFIG_ARCH_HAS_NONLEAF_PMD_YOUNG)
217 static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma,
218 unsigned long address,
226 set_pmd_at(vma->vm_mm, address, pmdp, pmd_mkold(pmd));
230 static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma,
231 unsigned long address,
237 #endif /* CONFIG_TRANSPARENT_HUGEPAGE || CONFIG_ARCH_HAS_NONLEAF_PMD_YOUNG */
240 #ifndef __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
241 int ptep_clear_flush_young(struct vm_area_struct *vma,
242 unsigned long address, pte_t *ptep);
245 #ifndef __HAVE_ARCH_PMDP_CLEAR_YOUNG_FLUSH
246 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
247 extern int pmdp_clear_flush_young(struct vm_area_struct *vma,
248 unsigned long address, pmd_t *pmdp);
251 * Despite relevant to THP only, this API is called from generic rmap code
252 * under PageTransHuge(), hence needs a dummy implementation for !THP
254 static inline int pmdp_clear_flush_young(struct vm_area_struct *vma,
255 unsigned long address, pmd_t *pmdp)
260 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
263 #ifndef arch_has_hw_pte_young
265 * Return whether the accessed bit is supported on the local CPU.
267 * This stub assumes accessing through an old PTE triggers a page fault.
268 * Architectures that automatically set the access bit should overwrite it.
270 static inline bool arch_has_hw_pte_young(void)
276 #ifndef __HAVE_ARCH_PTEP_GET_AND_CLEAR
277 static inline pte_t ptep_get_and_clear(struct mm_struct *mm,
278 unsigned long address,
282 pte_clear(mm, address, ptep);
283 page_table_check_pte_clear(mm, address, pte);
288 static inline void ptep_clear(struct mm_struct *mm, unsigned long addr,
291 ptep_get_and_clear(mm, addr, ptep);
294 #ifndef __HAVE_ARCH_PTEP_GET
295 static inline pte_t ptep_get(pte_t *ptep)
297 return READ_ONCE(*ptep);
301 #ifndef __HAVE_ARCH_PMDP_GET
302 static inline pmd_t pmdp_get(pmd_t *pmdp)
304 return READ_ONCE(*pmdp);
308 #ifdef CONFIG_GUP_GET_PXX_LOW_HIGH
310 * For walking the pagetables without holding any locks. Some architectures
311 * (eg x86-32 PAE) cannot load the entries atomically without using expensive
312 * instructions. We are guaranteed that a PTE will only either go from not
313 * present to present, or present to not present -- it will not switch to a
314 * completely different present page without a TLB flush inbetween; which we
315 * are blocking by holding interrupts off.
317 * Setting ptes from not present to present goes:
319 * ptep->pte_high = h;
323 * And present to not present goes:
327 * ptep->pte_high = 0;
329 * We must ensure here that the load of pte_low sees 'l' IFF pte_high sees 'h'.
330 * We load pte_high *after* loading pte_low, which ensures we don't see an older
331 * value of pte_high. *Then* we recheck pte_low, which ensures that we haven't
332 * picked up a changed pte high. We might have gotten rubbish values from
333 * pte_low and pte_high, but we are guaranteed that pte_low will not have the
334 * present bit set *unless* it is 'l'. Because get_user_pages_fast() only
335 * operates on present ptes we're safe.
337 static inline pte_t ptep_get_lockless(pte_t *ptep)
342 pte.pte_low = ptep->pte_low;
344 pte.pte_high = ptep->pte_high;
346 } while (unlikely(pte.pte_low != ptep->pte_low));
350 #define ptep_get_lockless ptep_get_lockless
352 #if CONFIG_PGTABLE_LEVELS > 2
353 static inline pmd_t pmdp_get_lockless(pmd_t *pmdp)
358 pmd.pmd_low = pmdp->pmd_low;
360 pmd.pmd_high = pmdp->pmd_high;
362 } while (unlikely(pmd.pmd_low != pmdp->pmd_low));
366 #define pmdp_get_lockless pmdp_get_lockless
367 #endif /* CONFIG_PGTABLE_LEVELS > 2 */
368 #endif /* CONFIG_GUP_GET_PXX_LOW_HIGH */
371 * We require that the PTE can be read atomically.
373 #ifndef ptep_get_lockless
374 static inline pte_t ptep_get_lockless(pte_t *ptep)
376 return ptep_get(ptep);
380 #ifndef pmdp_get_lockless
381 static inline pmd_t pmdp_get_lockless(pmd_t *pmdp)
383 return pmdp_get(pmdp);
387 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
388 #ifndef __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR
389 static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm,
390 unsigned long address,
396 page_table_check_pmd_clear(mm, address, pmd);
400 #endif /* __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR */
401 #ifndef __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR
402 static inline pud_t pudp_huge_get_and_clear(struct mm_struct *mm,
403 unsigned long address,
409 page_table_check_pud_clear(mm, address, pud);
413 #endif /* __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR */
414 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
416 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
417 #ifndef __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR_FULL
418 static inline pmd_t pmdp_huge_get_and_clear_full(struct vm_area_struct *vma,
419 unsigned long address, pmd_t *pmdp,
422 return pmdp_huge_get_and_clear(vma->vm_mm, address, pmdp);
426 #ifndef __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR_FULL
427 static inline pud_t pudp_huge_get_and_clear_full(struct mm_struct *mm,
428 unsigned long address, pud_t *pudp,
431 return pudp_huge_get_and_clear(mm, address, pudp);
434 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
436 #ifndef __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
437 static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm,
438 unsigned long address, pte_t *ptep,
442 pte = ptep_get_and_clear(mm, address, ptep);
449 * If two threads concurrently fault at the same page, the thread that
450 * won the race updates the PTE and its local TLB/Cache. The other thread
451 * gives up, simply does nothing, and continues; on architectures where
452 * software can update TLB, local TLB can be updated here to avoid next page
453 * fault. This function updates TLB only, do nothing with cache or others.
454 * It is the difference with function update_mmu_cache.
456 #ifndef __HAVE_ARCH_UPDATE_MMU_TLB
457 static inline void update_mmu_tlb(struct vm_area_struct *vma,
458 unsigned long address, pte_t *ptep)
461 #define __HAVE_ARCH_UPDATE_MMU_TLB
465 * Some architectures may be able to avoid expensive synchronization
466 * primitives when modifications are made to PTE's which are already
467 * not present, or in the process of an address space destruction.
469 #ifndef __HAVE_ARCH_PTE_CLEAR_NOT_PRESENT_FULL
470 static inline void pte_clear_not_present_full(struct mm_struct *mm,
471 unsigned long address,
475 pte_clear(mm, address, ptep);
479 #ifndef __HAVE_ARCH_PTEP_CLEAR_FLUSH
480 extern pte_t ptep_clear_flush(struct vm_area_struct *vma,
481 unsigned long address,
485 #ifndef __HAVE_ARCH_PMDP_HUGE_CLEAR_FLUSH
486 extern pmd_t pmdp_huge_clear_flush(struct vm_area_struct *vma,
487 unsigned long address,
489 extern pud_t pudp_huge_clear_flush(struct vm_area_struct *vma,
490 unsigned long address,
494 #ifndef __HAVE_ARCH_PTEP_SET_WRPROTECT
496 static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long address, pte_t *ptep)
498 pte_t old_pte = *ptep;
499 set_pte_at(mm, address, ptep, pte_wrprotect(old_pte));
504 * On some architectures hardware does not set page access bit when accessing
505 * memory page, it is responsibility of software setting this bit. It brings
506 * out extra page fault penalty to track page access bit. For optimization page
507 * access bit can be set during all page fault flow on these arches.
508 * To be differentiate with macro pte_mkyoung, this macro is used on platforms
509 * where software maintains page access bit.
511 #ifndef pte_sw_mkyoung
512 static inline pte_t pte_sw_mkyoung(pte_t pte)
516 #define pte_sw_mkyoung pte_sw_mkyoung
519 #ifndef pte_savedwrite
520 #define pte_savedwrite pte_write
523 #ifndef pte_mk_savedwrite
524 #define pte_mk_savedwrite pte_mkwrite
527 #ifndef pte_clear_savedwrite
528 #define pte_clear_savedwrite pte_wrprotect
531 #ifndef pmd_savedwrite
532 #define pmd_savedwrite pmd_write
535 #ifndef pmd_mk_savedwrite
536 #define pmd_mk_savedwrite pmd_mkwrite
539 #ifndef pmd_clear_savedwrite
540 #define pmd_clear_savedwrite pmd_wrprotect
543 #ifndef __HAVE_ARCH_PMDP_SET_WRPROTECT
544 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
545 static inline void pmdp_set_wrprotect(struct mm_struct *mm,
546 unsigned long address, pmd_t *pmdp)
548 pmd_t old_pmd = *pmdp;
549 set_pmd_at(mm, address, pmdp, pmd_wrprotect(old_pmd));
552 static inline void pmdp_set_wrprotect(struct mm_struct *mm,
553 unsigned long address, pmd_t *pmdp)
557 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
559 #ifndef __HAVE_ARCH_PUDP_SET_WRPROTECT
560 #ifdef CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD
561 static inline void pudp_set_wrprotect(struct mm_struct *mm,
562 unsigned long address, pud_t *pudp)
564 pud_t old_pud = *pudp;
566 set_pud_at(mm, address, pudp, pud_wrprotect(old_pud));
569 static inline void pudp_set_wrprotect(struct mm_struct *mm,
570 unsigned long address, pud_t *pudp)
574 #endif /* CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD */
577 #ifndef pmdp_collapse_flush
578 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
579 extern pmd_t pmdp_collapse_flush(struct vm_area_struct *vma,
580 unsigned long address, pmd_t *pmdp);
582 static inline pmd_t pmdp_collapse_flush(struct vm_area_struct *vma,
583 unsigned long address,
589 #define pmdp_collapse_flush pmdp_collapse_flush
590 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
593 #ifndef __HAVE_ARCH_PGTABLE_DEPOSIT
594 extern void pgtable_trans_huge_deposit(struct mm_struct *mm, pmd_t *pmdp,
598 #ifndef __HAVE_ARCH_PGTABLE_WITHDRAW
599 extern pgtable_t pgtable_trans_huge_withdraw(struct mm_struct *mm, pmd_t *pmdp);
602 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
604 * This is an implementation of pmdp_establish() that is only suitable for an
605 * architecture that doesn't have hardware dirty/accessed bits. In this case we
606 * can't race with CPU which sets these bits and non-atomic approach is fine.
608 static inline pmd_t generic_pmdp_establish(struct vm_area_struct *vma,
609 unsigned long address, pmd_t *pmdp, pmd_t pmd)
611 pmd_t old_pmd = *pmdp;
612 set_pmd_at(vma->vm_mm, address, pmdp, pmd);
617 #ifndef __HAVE_ARCH_PMDP_INVALIDATE
618 extern pmd_t pmdp_invalidate(struct vm_area_struct *vma, unsigned long address,
622 #ifndef __HAVE_ARCH_PMDP_INVALIDATE_AD
625 * pmdp_invalidate_ad() invalidates the PMD while changing a transparent
626 * hugepage mapping in the page tables. This function is similar to
627 * pmdp_invalidate(), but should only be used if the access and dirty bits would
628 * not be cleared by the software in the new PMD value. The function ensures
629 * that hardware changes of the access and dirty bits updates would not be lost.
631 * Doing so can allow in certain architectures to avoid a TLB flush in most
632 * cases. Yet, another TLB flush might be necessary later if the PMD update
633 * itself requires such flush (e.g., if protection was set to be stricter). Yet,
634 * even when a TLB flush is needed because of the update, the caller may be able
635 * to batch these TLB flushing operations, so fewer TLB flush operations are
638 extern pmd_t pmdp_invalidate_ad(struct vm_area_struct *vma,
639 unsigned long address, pmd_t *pmdp);
642 #ifndef __HAVE_ARCH_PTE_SAME
643 static inline int pte_same(pte_t pte_a, pte_t pte_b)
645 return pte_val(pte_a) == pte_val(pte_b);
649 #ifndef __HAVE_ARCH_PTE_UNUSED
651 * Some architectures provide facilities to virtualization guests
652 * so that they can flag allocated pages as unused. This allows the
653 * host to transparently reclaim unused pages. This function returns
654 * whether the pte's page is unused.
656 static inline int pte_unused(pte_t pte)
662 #ifndef pte_access_permitted
663 #define pte_access_permitted(pte, write) \
664 (pte_present(pte) && (!(write) || pte_write(pte)))
667 #ifndef pmd_access_permitted
668 #define pmd_access_permitted(pmd, write) \
669 (pmd_present(pmd) && (!(write) || pmd_write(pmd)))
672 #ifndef pud_access_permitted
673 #define pud_access_permitted(pud, write) \
674 (pud_present(pud) && (!(write) || pud_write(pud)))
677 #ifndef p4d_access_permitted
678 #define p4d_access_permitted(p4d, write) \
679 (p4d_present(p4d) && (!(write) || p4d_write(p4d)))
682 #ifndef pgd_access_permitted
683 #define pgd_access_permitted(pgd, write) \
684 (pgd_present(pgd) && (!(write) || pgd_write(pgd)))
687 #ifndef __HAVE_ARCH_PMD_SAME
688 static inline int pmd_same(pmd_t pmd_a, pmd_t pmd_b)
690 return pmd_val(pmd_a) == pmd_val(pmd_b);
693 static inline int pud_same(pud_t pud_a, pud_t pud_b)
695 return pud_val(pud_a) == pud_val(pud_b);
699 #ifndef __HAVE_ARCH_P4D_SAME
700 static inline int p4d_same(p4d_t p4d_a, p4d_t p4d_b)
702 return p4d_val(p4d_a) == p4d_val(p4d_b);
706 #ifndef __HAVE_ARCH_PGD_SAME
707 static inline int pgd_same(pgd_t pgd_a, pgd_t pgd_b)
709 return pgd_val(pgd_a) == pgd_val(pgd_b);
714 * Use set_p*_safe(), and elide TLB flushing, when confident that *no*
715 * TLB flush will be required as a result of the "set". For example, use
716 * in scenarios where it is known ahead of time that the routine is
717 * setting non-present entries, or re-setting an existing entry to the
718 * same value. Otherwise, use the typical "set" helpers and flush the
721 #define set_pte_safe(ptep, pte) \
723 WARN_ON_ONCE(pte_present(*ptep) && !pte_same(*ptep, pte)); \
724 set_pte(ptep, pte); \
727 #define set_pmd_safe(pmdp, pmd) \
729 WARN_ON_ONCE(pmd_present(*pmdp) && !pmd_same(*pmdp, pmd)); \
730 set_pmd(pmdp, pmd); \
733 #define set_pud_safe(pudp, pud) \
735 WARN_ON_ONCE(pud_present(*pudp) && !pud_same(*pudp, pud)); \
736 set_pud(pudp, pud); \
739 #define set_p4d_safe(p4dp, p4d) \
741 WARN_ON_ONCE(p4d_present(*p4dp) && !p4d_same(*p4dp, p4d)); \
742 set_p4d(p4dp, p4d); \
745 #define set_pgd_safe(pgdp, pgd) \
747 WARN_ON_ONCE(pgd_present(*pgdp) && !pgd_same(*pgdp, pgd)); \
748 set_pgd(pgdp, pgd); \
751 #ifndef __HAVE_ARCH_DO_SWAP_PAGE
753 * Some architectures support metadata associated with a page. When a
754 * page is being swapped out, this metadata must be saved so it can be
755 * restored when the page is swapped back in. SPARC M7 and newer
756 * processors support an ADI (Application Data Integrity) tag for the
757 * page as metadata for the page. arch_do_swap_page() can restore this
758 * metadata when a page is swapped back in.
760 static inline void arch_do_swap_page(struct mm_struct *mm,
761 struct vm_area_struct *vma,
763 pte_t pte, pte_t oldpte)
769 #ifndef __HAVE_ARCH_UNMAP_ONE
771 * Some architectures support metadata associated with a page. When a
772 * page is being swapped out, this metadata must be saved so it can be
773 * restored when the page is swapped back in. SPARC M7 and newer
774 * processors support an ADI (Application Data Integrity) tag for the
775 * page as metadata for the page. arch_unmap_one() can save this
776 * metadata on a swap-out of a page.
778 static inline int arch_unmap_one(struct mm_struct *mm,
779 struct vm_area_struct *vma,
788 * Allow architectures to preserve additional metadata associated with
789 * swapped-out pages. The corresponding __HAVE_ARCH_SWAP_* macros and function
790 * prototypes must be defined in the arch-specific asm/pgtable.h file.
792 #ifndef __HAVE_ARCH_PREPARE_TO_SWAP
793 static inline int arch_prepare_to_swap(struct page *page)
799 #ifndef __HAVE_ARCH_SWAP_INVALIDATE
800 static inline void arch_swap_invalidate_page(int type, pgoff_t offset)
804 static inline void arch_swap_invalidate_area(int type)
809 #ifndef __HAVE_ARCH_SWAP_RESTORE
810 static inline void arch_swap_restore(swp_entry_t entry, struct folio *folio)
815 #ifndef __HAVE_ARCH_PGD_OFFSET_GATE
816 #define pgd_offset_gate(mm, addr) pgd_offset(mm, addr)
819 #ifndef __HAVE_ARCH_MOVE_PTE
820 #define move_pte(pte, prot, old_addr, new_addr) (pte)
823 #ifndef pte_accessible
824 # define pte_accessible(mm, pte) ((void)(pte), 1)
827 #ifndef flush_tlb_fix_spurious_fault
828 #define flush_tlb_fix_spurious_fault(vma, address) flush_tlb_page(vma, address)
832 * When walking page tables, get the address of the next boundary,
833 * or the end address of the range if that comes earlier. Although no
834 * vma end wraps to 0, rounded up __boundary may wrap to 0 throughout.
837 #define pgd_addr_end(addr, end) \
838 ({ unsigned long __boundary = ((addr) + PGDIR_SIZE) & PGDIR_MASK; \
839 (__boundary - 1 < (end) - 1)? __boundary: (end); \
843 #define p4d_addr_end(addr, end) \
844 ({ unsigned long __boundary = ((addr) + P4D_SIZE) & P4D_MASK; \
845 (__boundary - 1 < (end) - 1)? __boundary: (end); \
850 #define pud_addr_end(addr, end) \
851 ({ unsigned long __boundary = ((addr) + PUD_SIZE) & PUD_MASK; \
852 (__boundary - 1 < (end) - 1)? __boundary: (end); \
857 #define pmd_addr_end(addr, end) \
858 ({ unsigned long __boundary = ((addr) + PMD_SIZE) & PMD_MASK; \
859 (__boundary - 1 < (end) - 1)? __boundary: (end); \
864 * When walking page tables, we usually want to skip any p?d_none entries;
865 * and any p?d_bad entries - reporting the error before resetting to none.
866 * Do the tests inline, but report and clear the bad entry in mm/memory.c.
868 void pgd_clear_bad(pgd_t *);
870 #ifndef __PAGETABLE_P4D_FOLDED
871 void p4d_clear_bad(p4d_t *);
873 #define p4d_clear_bad(p4d) do { } while (0)
876 #ifndef __PAGETABLE_PUD_FOLDED
877 void pud_clear_bad(pud_t *);
879 #define pud_clear_bad(p4d) do { } while (0)
882 void pmd_clear_bad(pmd_t *);
884 static inline int pgd_none_or_clear_bad(pgd_t *pgd)
888 if (unlikely(pgd_bad(*pgd))) {
895 static inline int p4d_none_or_clear_bad(p4d_t *p4d)
899 if (unlikely(p4d_bad(*p4d))) {
906 static inline int pud_none_or_clear_bad(pud_t *pud)
910 if (unlikely(pud_bad(*pud))) {
917 static inline int pmd_none_or_clear_bad(pmd_t *pmd)
921 if (unlikely(pmd_bad(*pmd))) {
928 static inline pte_t __ptep_modify_prot_start(struct vm_area_struct *vma,
933 * Get the current pte state, but zero it out to make it
934 * non-present, preventing the hardware from asynchronously
937 return ptep_get_and_clear(vma->vm_mm, addr, ptep);
940 static inline void __ptep_modify_prot_commit(struct vm_area_struct *vma,
942 pte_t *ptep, pte_t pte)
945 * The pte is non-present, so there's no hardware state to
948 set_pte_at(vma->vm_mm, addr, ptep, pte);
951 #ifndef __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION
953 * Start a pte protection read-modify-write transaction, which
954 * protects against asynchronous hardware modifications to the pte.
955 * The intention is not to prevent the hardware from making pte
956 * updates, but to prevent any updates it may make from being lost.
958 * This does not protect against other software modifications of the
959 * pte; the appropriate pte lock must be held over the transaction.
961 * Note that this interface is intended to be batchable, meaning that
962 * ptep_modify_prot_commit may not actually update the pte, but merely
963 * queue the update to be done at some later time. The update must be
964 * actually committed before the pte lock is released, however.
966 static inline pte_t ptep_modify_prot_start(struct vm_area_struct *vma,
970 return __ptep_modify_prot_start(vma, addr, ptep);
974 * Commit an update to a pte, leaving any hardware-controlled bits in
975 * the PTE unmodified.
977 static inline void ptep_modify_prot_commit(struct vm_area_struct *vma,
979 pte_t *ptep, pte_t old_pte, pte_t pte)
981 __ptep_modify_prot_commit(vma, addr, ptep, pte);
983 #endif /* __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION */
984 #endif /* CONFIG_MMU */
987 * No-op macros that just return the current protection value. Defined here
988 * because these macros can be used even if CONFIG_MMU is not defined.
992 #define pgprot_nx(prot) (prot)
995 #ifndef pgprot_noncached
996 #define pgprot_noncached(prot) (prot)
999 #ifndef pgprot_writecombine
1000 #define pgprot_writecombine pgprot_noncached
1003 #ifndef pgprot_writethrough
1004 #define pgprot_writethrough pgprot_noncached
1007 #ifndef pgprot_device
1008 #define pgprot_device pgprot_noncached
1012 #define pgprot_mhp(prot) (prot)
1016 #ifndef pgprot_modify
1017 #define pgprot_modify pgprot_modify
1018 static inline pgprot_t pgprot_modify(pgprot_t oldprot, pgprot_t newprot)
1020 if (pgprot_val(oldprot) == pgprot_val(pgprot_noncached(oldprot)))
1021 newprot = pgprot_noncached(newprot);
1022 if (pgprot_val(oldprot) == pgprot_val(pgprot_writecombine(oldprot)))
1023 newprot = pgprot_writecombine(newprot);
1024 if (pgprot_val(oldprot) == pgprot_val(pgprot_device(oldprot)))
1025 newprot = pgprot_device(newprot);
1029 #endif /* CONFIG_MMU */
1031 #ifndef pgprot_encrypted
1032 #define pgprot_encrypted(prot) (prot)
1035 #ifndef pgprot_decrypted
1036 #define pgprot_decrypted(prot) (prot)
1040 * A facility to provide lazy MMU batching. This allows PTE updates and
1041 * page invalidations to be delayed until a call to leave lazy MMU mode
1042 * is issued. Some architectures may benefit from doing this, and it is
1043 * beneficial for both shadow and direct mode hypervisors, which may batch
1044 * the PTE updates which happen during this window. Note that using this
1045 * interface requires that read hazards be removed from the code. A read
1046 * hazard could result in the direct mode hypervisor case, since the actual
1047 * write to the page tables may not yet have taken place, so reads though
1048 * a raw PTE pointer after it has been modified are not guaranteed to be
1049 * up to date. This mode can only be entered and left under the protection of
1050 * the page table locks for all page tables which may be modified. In the UP
1051 * case, this is required so that preemption is disabled, and in the SMP case,
1052 * it must synchronize the delayed page table writes properly on other CPUs.
1054 #ifndef __HAVE_ARCH_ENTER_LAZY_MMU_MODE
1055 #define arch_enter_lazy_mmu_mode() do {} while (0)
1056 #define arch_leave_lazy_mmu_mode() do {} while (0)
1057 #define arch_flush_lazy_mmu_mode() do {} while (0)
1061 * A facility to provide batching of the reload of page tables and
1062 * other process state with the actual context switch code for
1063 * paravirtualized guests. By convention, only one of the batched
1064 * update (lazy) modes (CPU, MMU) should be active at any given time,
1065 * entry should never be nested, and entry and exits should always be
1066 * paired. This is for sanity of maintaining and reasoning about the
1067 * kernel code. In this case, the exit (end of the context switch) is
1068 * in architecture-specific code, and so doesn't need a generic
1071 #ifndef __HAVE_ARCH_START_CONTEXT_SWITCH
1072 #define arch_start_context_switch(prev) do {} while (0)
1076 * When replacing an anonymous page by a real (!non) swap entry, we clear
1077 * PG_anon_exclusive from the page and instead remember whether the flag was
1078 * set in the swp pte. During fork(), we have to mark the entry as !exclusive
1079 * (possibly shared). On swapin, we use that information to restore
1080 * PG_anon_exclusive, which is very helpful in cases where we might have
1081 * additional (e.g., FOLL_GET) references on a page and wouldn't be able to
1082 * detect exclusivity.
1084 * These functions don't apply to non-swap entries (e.g., migration, hwpoison,
1087 #ifndef __HAVE_ARCH_PTE_SWP_EXCLUSIVE
1088 static inline pte_t pte_swp_mkexclusive(pte_t pte)
1093 static inline int pte_swp_exclusive(pte_t pte)
1098 static inline pte_t pte_swp_clear_exclusive(pte_t pte)
1104 #ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY
1105 #ifndef CONFIG_ARCH_ENABLE_THP_MIGRATION
1106 static inline pmd_t pmd_swp_mksoft_dirty(pmd_t pmd)
1111 static inline int pmd_swp_soft_dirty(pmd_t pmd)
1116 static inline pmd_t pmd_swp_clear_soft_dirty(pmd_t pmd)
1121 #else /* !CONFIG_HAVE_ARCH_SOFT_DIRTY */
1122 static inline int pte_soft_dirty(pte_t pte)
1127 static inline int pmd_soft_dirty(pmd_t pmd)
1132 static inline pte_t pte_mksoft_dirty(pte_t pte)
1137 static inline pmd_t pmd_mksoft_dirty(pmd_t pmd)
1142 static inline pte_t pte_clear_soft_dirty(pte_t pte)
1147 static inline pmd_t pmd_clear_soft_dirty(pmd_t pmd)
1152 static inline pte_t pte_swp_mksoft_dirty(pte_t pte)
1157 static inline int pte_swp_soft_dirty(pte_t pte)
1162 static inline pte_t pte_swp_clear_soft_dirty(pte_t pte)
1167 static inline pmd_t pmd_swp_mksoft_dirty(pmd_t pmd)
1172 static inline int pmd_swp_soft_dirty(pmd_t pmd)
1177 static inline pmd_t pmd_swp_clear_soft_dirty(pmd_t pmd)
1183 #ifndef __HAVE_PFNMAP_TRACKING
1185 * Interfaces that can be used by architecture code to keep track of
1186 * memory type of pfn mappings specified by the remap_pfn_range,
1191 * track_pfn_remap is called when a _new_ pfn mapping is being established
1192 * by remap_pfn_range() for physical range indicated by pfn and size.
1194 static inline int track_pfn_remap(struct vm_area_struct *vma, pgprot_t *prot,
1195 unsigned long pfn, unsigned long addr,
1202 * track_pfn_insert is called when a _new_ single pfn is established
1203 * by vmf_insert_pfn().
1205 static inline void track_pfn_insert(struct vm_area_struct *vma, pgprot_t *prot,
1211 * track_pfn_copy is called when vma that is covering the pfnmap gets
1212 * copied through copy_page_range().
1214 static inline int track_pfn_copy(struct vm_area_struct *vma)
1220 * untrack_pfn is called while unmapping a pfnmap for a region.
1221 * untrack can be called for a specific region indicated by pfn and size or
1222 * can be for the entire vma (in which case pfn, size are zero).
1224 static inline void untrack_pfn(struct vm_area_struct *vma,
1225 unsigned long pfn, unsigned long size)
1230 * untrack_pfn_moved is called while mremapping a pfnmap for a new region.
1232 static inline void untrack_pfn_moved(struct vm_area_struct *vma)
1236 extern int track_pfn_remap(struct vm_area_struct *vma, pgprot_t *prot,
1237 unsigned long pfn, unsigned long addr,
1238 unsigned long size);
1239 extern void track_pfn_insert(struct vm_area_struct *vma, pgprot_t *prot,
1241 extern int track_pfn_copy(struct vm_area_struct *vma);
1242 extern void untrack_pfn(struct vm_area_struct *vma, unsigned long pfn,
1243 unsigned long size);
1244 extern void untrack_pfn_moved(struct vm_area_struct *vma);
1248 #ifdef __HAVE_COLOR_ZERO_PAGE
1249 static inline int is_zero_pfn(unsigned long pfn)
1251 extern unsigned long zero_pfn;
1252 unsigned long offset_from_zero_pfn = pfn - zero_pfn;
1253 return offset_from_zero_pfn <= (zero_page_mask >> PAGE_SHIFT);
1256 #define my_zero_pfn(addr) page_to_pfn(ZERO_PAGE(addr))
1259 static inline int is_zero_pfn(unsigned long pfn)
1261 extern unsigned long zero_pfn;
1262 return pfn == zero_pfn;
1265 static inline unsigned long my_zero_pfn(unsigned long addr)
1267 extern unsigned long zero_pfn;
1272 static inline int is_zero_pfn(unsigned long pfn)
1277 static inline unsigned long my_zero_pfn(unsigned long addr)
1281 #endif /* CONFIG_MMU */
1285 #ifndef CONFIG_TRANSPARENT_HUGEPAGE
1286 static inline int pmd_trans_huge(pmd_t pmd)
1291 static inline int pmd_write(pmd_t pmd)
1296 #endif /* pmd_write */
1297 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
1300 static inline int pud_write(pud_t pud)
1305 #endif /* pud_write */
1307 #if !defined(CONFIG_ARCH_HAS_PTE_DEVMAP) || !defined(CONFIG_TRANSPARENT_HUGEPAGE)
1308 static inline int pmd_devmap(pmd_t pmd)
1312 static inline int pud_devmap(pud_t pud)
1316 static inline int pgd_devmap(pgd_t pgd)
1322 #if !defined(CONFIG_TRANSPARENT_HUGEPAGE) || \
1323 !defined(CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD)
1324 static inline int pud_trans_huge(pud_t pud)
1330 /* See pmd_none_or_trans_huge_or_clear_bad for discussion. */
1331 static inline int pud_none_or_trans_huge_or_dev_or_clear_bad(pud_t *pud)
1333 pud_t pudval = READ_ONCE(*pud);
1335 if (pud_none(pudval) || pud_trans_huge(pudval) || pud_devmap(pudval))
1337 if (unlikely(pud_bad(pudval))) {
1344 /* See pmd_trans_unstable for discussion. */
1345 static inline int pud_trans_unstable(pud_t *pud)
1347 #if defined(CONFIG_TRANSPARENT_HUGEPAGE) && \
1348 defined(CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD)
1349 return pud_none_or_trans_huge_or_dev_or_clear_bad(pud);
1355 static inline pmd_t pmd_read_atomic(pmd_t *pmdp)
1357 return pmdp_get_lockless(pmdp);
1360 #ifndef arch_needs_pgtable_deposit
1361 #define arch_needs_pgtable_deposit() (false)
1364 * This function is meant to be used by sites walking pagetables with
1365 * the mmap_lock held in read mode to protect against MADV_DONTNEED and
1366 * transhuge page faults. MADV_DONTNEED can convert a transhuge pmd
1367 * into a null pmd and the transhuge page fault can convert a null pmd
1368 * into an hugepmd or into a regular pmd (if the hugepage allocation
1369 * fails). While holding the mmap_lock in read mode the pmd becomes
1370 * stable and stops changing under us only if it's not null and not a
1371 * transhuge pmd. When those races occurs and this function makes a
1372 * difference vs the standard pmd_none_or_clear_bad, the result is
1373 * undefined so behaving like if the pmd was none is safe (because it
1374 * can return none anyway). The compiler level barrier() is critically
1375 * important to compute the two checks atomically on the same pmdval.
1377 * For 32bit kernels with a 64bit large pmd_t this automatically takes
1378 * care of reading the pmd atomically to avoid SMP race conditions
1379 * against pmd_populate() when the mmap_lock is hold for reading by the
1380 * caller (a special atomic read not done by "gcc" as in the generic
1381 * version above, is also needed when THP is disabled because the page
1382 * fault can populate the pmd from under us).
1384 static inline int pmd_none_or_trans_huge_or_clear_bad(pmd_t *pmd)
1386 pmd_t pmdval = pmd_read_atomic(pmd);
1388 * The barrier will stabilize the pmdval in a register or on
1389 * the stack so that it will stop changing under the code.
1391 * When CONFIG_TRANSPARENT_HUGEPAGE=y on x86 32bit PAE,
1392 * pmd_read_atomic is allowed to return a not atomic pmdval
1393 * (for example pointing to an hugepage that has never been
1394 * mapped in the pmd). The below checks will only care about
1395 * the low part of the pmd with 32bit PAE x86 anyway, with the
1396 * exception of pmd_none(). So the important thing is that if
1397 * the low part of the pmd is found null, the high part will
1398 * be also null or the pmd_none() check below would be
1401 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
1405 * !pmd_present() checks for pmd migration entries
1407 * The complete check uses is_pmd_migration_entry() in linux/swapops.h
1408 * But using that requires moving current function and pmd_trans_unstable()
1409 * to linux/swapops.h to resolve dependency, which is too much code move.
1411 * !pmd_present() is equivalent to is_pmd_migration_entry() currently,
1412 * because !pmd_present() pages can only be under migration not swapped
1415 * pmd_none() is preserved for future condition checks on pmd migration
1416 * entries and not confusing with this function name, although it is
1417 * redundant with !pmd_present().
1419 if (pmd_none(pmdval) || pmd_trans_huge(pmdval) ||
1420 (IS_ENABLED(CONFIG_ARCH_ENABLE_THP_MIGRATION) && !pmd_present(pmdval)))
1422 if (unlikely(pmd_bad(pmdval))) {
1430 * This is a noop if Transparent Hugepage Support is not built into
1431 * the kernel. Otherwise it is equivalent to
1432 * pmd_none_or_trans_huge_or_clear_bad(), and shall only be called in
1433 * places that already verified the pmd is not none and they want to
1434 * walk ptes while holding the mmap sem in read mode (write mode don't
1435 * need this). If THP is not enabled, the pmd can't go away under the
1436 * code even if MADV_DONTNEED runs, but if THP is enabled we need to
1437 * run a pmd_trans_unstable before walking the ptes after
1438 * split_huge_pmd returns (because it may have run when the pmd become
1439 * null, but then a page fault can map in a THP and not a regular page).
1441 static inline int pmd_trans_unstable(pmd_t *pmd)
1443 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
1444 return pmd_none_or_trans_huge_or_clear_bad(pmd);
1451 * the ordering of these checks is important for pmds with _page_devmap set.
1452 * if we check pmd_trans_unstable() first we will trip the bad_pmd() check
1453 * inside of pmd_none_or_trans_huge_or_clear_bad(). this will end up correctly
1454 * returning 1 but not before it spams dmesg with the pmd_clear_bad() output.
1456 static inline int pmd_devmap_trans_unstable(pmd_t *pmd)
1458 return pmd_devmap(*pmd) || pmd_trans_unstable(pmd);
1461 #ifndef CONFIG_NUMA_BALANCING
1463 * Technically a PTE can be PROTNONE even when not doing NUMA balancing but
1464 * the only case the kernel cares is for NUMA balancing and is only ever set
1465 * when the VMA is accessible. For PROT_NONE VMAs, the PTEs are not marked
1466 * _PAGE_PROTNONE so by default, implement the helper as "always no". It
1467 * is the responsibility of the caller to distinguish between PROT_NONE
1468 * protections and NUMA hinting fault protections.
1470 static inline int pte_protnone(pte_t pte)
1475 static inline int pmd_protnone(pmd_t pmd)
1479 #endif /* CONFIG_NUMA_BALANCING */
1481 #endif /* CONFIG_MMU */
1483 #ifdef CONFIG_HAVE_ARCH_HUGE_VMAP
1485 #ifndef __PAGETABLE_P4D_FOLDED
1486 int p4d_set_huge(p4d_t *p4d, phys_addr_t addr, pgprot_t prot);
1487 void p4d_clear_huge(p4d_t *p4d);
1489 static inline int p4d_set_huge(p4d_t *p4d, phys_addr_t addr, pgprot_t prot)
1493 static inline void p4d_clear_huge(p4d_t *p4d) { }
1494 #endif /* !__PAGETABLE_P4D_FOLDED */
1496 int pud_set_huge(pud_t *pud, phys_addr_t addr, pgprot_t prot);
1497 int pmd_set_huge(pmd_t *pmd, phys_addr_t addr, pgprot_t prot);
1498 int pud_clear_huge(pud_t *pud);
1499 int pmd_clear_huge(pmd_t *pmd);
1500 int p4d_free_pud_page(p4d_t *p4d, unsigned long addr);
1501 int pud_free_pmd_page(pud_t *pud, unsigned long addr);
1502 int pmd_free_pte_page(pmd_t *pmd, unsigned long addr);
1503 #else /* !CONFIG_HAVE_ARCH_HUGE_VMAP */
1504 static inline int p4d_set_huge(p4d_t *p4d, phys_addr_t addr, pgprot_t prot)
1508 static inline int pud_set_huge(pud_t *pud, phys_addr_t addr, pgprot_t prot)
1512 static inline int pmd_set_huge(pmd_t *pmd, phys_addr_t addr, pgprot_t prot)
1516 static inline void p4d_clear_huge(p4d_t *p4d) { }
1517 static inline int pud_clear_huge(pud_t *pud)
1521 static inline int pmd_clear_huge(pmd_t *pmd)
1525 static inline int p4d_free_pud_page(p4d_t *p4d, unsigned long addr)
1529 static inline int pud_free_pmd_page(pud_t *pud, unsigned long addr)
1533 static inline int pmd_free_pte_page(pmd_t *pmd, unsigned long addr)
1537 #endif /* CONFIG_HAVE_ARCH_HUGE_VMAP */
1539 #ifndef __HAVE_ARCH_FLUSH_PMD_TLB_RANGE
1540 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
1542 * ARCHes with special requirements for evicting THP backing TLB entries can
1543 * implement this. Otherwise also, it can help optimize normal TLB flush in
1544 * THP regime. Stock flush_tlb_range() typically has optimization to nuke the
1545 * entire TLB if flush span is greater than a threshold, which will
1546 * likely be true for a single huge page. Thus a single THP flush will
1547 * invalidate the entire TLB which is not desirable.
1548 * e.g. see arch/arc: flush_pmd_tlb_range
1550 #define flush_pmd_tlb_range(vma, addr, end) flush_tlb_range(vma, addr, end)
1551 #define flush_pud_tlb_range(vma, addr, end) flush_tlb_range(vma, addr, end)
1553 #define flush_pmd_tlb_range(vma, addr, end) BUILD_BUG()
1554 #define flush_pud_tlb_range(vma, addr, end) BUILD_BUG()
1559 int phys_mem_access_prot_allowed(struct file *file, unsigned long pfn,
1560 unsigned long size, pgprot_t *vma_prot);
1562 #ifndef CONFIG_X86_ESPFIX64
1563 static inline void init_espfix_bsp(void) { }
1566 extern void __init pgtable_cache_init(void);
1568 #ifndef __HAVE_ARCH_PFN_MODIFY_ALLOWED
1569 static inline bool pfn_modify_allowed(unsigned long pfn, pgprot_t prot)
1574 static inline bool arch_has_pfn_modify_check(void)
1578 #endif /* !_HAVE_ARCH_PFN_MODIFY_ALLOWED */
1581 * Architecture PAGE_KERNEL_* fallbacks
1583 * Some architectures don't define certain PAGE_KERNEL_* flags. This is either
1584 * because they really don't support them, or the port needs to be updated to
1585 * reflect the required functionality. Below are a set of relatively safe
1586 * fallbacks, as best effort, which we can count on in lieu of the architectures
1587 * not defining them on their own yet.
1590 #ifndef PAGE_KERNEL_RO
1591 # define PAGE_KERNEL_RO PAGE_KERNEL
1594 #ifndef PAGE_KERNEL_EXEC
1595 # define PAGE_KERNEL_EXEC PAGE_KERNEL
1599 * Page Table Modification bits for pgtbl_mod_mask.
1601 * These are used by the p?d_alloc_track*() set of functions an in the generic
1602 * vmalloc/ioremap code to track at which page-table levels entries have been
1603 * modified. Based on that the code can better decide when vmalloc and ioremap
1604 * mapping changes need to be synchronized to other page-tables in the system.
1606 #define __PGTBL_PGD_MODIFIED 0
1607 #define __PGTBL_P4D_MODIFIED 1
1608 #define __PGTBL_PUD_MODIFIED 2
1609 #define __PGTBL_PMD_MODIFIED 3
1610 #define __PGTBL_PTE_MODIFIED 4
1612 #define PGTBL_PGD_MODIFIED BIT(__PGTBL_PGD_MODIFIED)
1613 #define PGTBL_P4D_MODIFIED BIT(__PGTBL_P4D_MODIFIED)
1614 #define PGTBL_PUD_MODIFIED BIT(__PGTBL_PUD_MODIFIED)
1615 #define PGTBL_PMD_MODIFIED BIT(__PGTBL_PMD_MODIFIED)
1616 #define PGTBL_PTE_MODIFIED BIT(__PGTBL_PTE_MODIFIED)
1618 /* Page-Table Modification Mask */
1619 typedef unsigned int pgtbl_mod_mask;
1621 #endif /* !__ASSEMBLY__ */
1623 #if !defined(MAX_POSSIBLE_PHYSMEM_BITS) && !defined(CONFIG_64BIT)
1624 #ifdef CONFIG_PHYS_ADDR_T_64BIT
1626 * ZSMALLOC needs to know the highest PFN on 32-bit architectures
1627 * with physical address space extension, but falls back to
1628 * BITS_PER_LONG otherwise.
1630 #error Missing MAX_POSSIBLE_PHYSMEM_BITS definition
1632 #define MAX_POSSIBLE_PHYSMEM_BITS 32
1636 #ifndef has_transparent_hugepage
1637 #define has_transparent_hugepage() IS_BUILTIN(CONFIG_TRANSPARENT_HUGEPAGE)
1641 * On some architectures it depends on the mm if the p4d/pud or pmd
1642 * layer of the page table hierarchy is folded or not.
1644 #ifndef mm_p4d_folded
1645 #define mm_p4d_folded(mm) __is_defined(__PAGETABLE_P4D_FOLDED)
1648 #ifndef mm_pud_folded
1649 #define mm_pud_folded(mm) __is_defined(__PAGETABLE_PUD_FOLDED)
1652 #ifndef mm_pmd_folded
1653 #define mm_pmd_folded(mm) __is_defined(__PAGETABLE_PMD_FOLDED)
1656 #ifndef p4d_offset_lockless
1657 #define p4d_offset_lockless(pgdp, pgd, address) p4d_offset(&(pgd), address)
1659 #ifndef pud_offset_lockless
1660 #define pud_offset_lockless(p4dp, p4d, address) pud_offset(&(p4d), address)
1662 #ifndef pmd_offset_lockless
1663 #define pmd_offset_lockless(pudp, pud, address) pmd_offset(&(pud), address)
1667 * p?d_leaf() - true if this entry is a final mapping to a physical address.
1668 * This differs from p?d_huge() by the fact that they are always available (if
1669 * the architecture supports large pages at the appropriate level) even
1670 * if CONFIG_HUGETLB_PAGE is not defined.
1671 * Only meaningful when called on a valid entry.
1674 #define pgd_leaf(x) 0
1677 #define p4d_leaf(x) 0
1680 #define pud_leaf(x) 0
1683 #define pmd_leaf(x) 0
1686 #ifndef pgd_leaf_size
1687 #define pgd_leaf_size(x) (1ULL << PGDIR_SHIFT)
1689 #ifndef p4d_leaf_size
1690 #define p4d_leaf_size(x) P4D_SIZE
1692 #ifndef pud_leaf_size
1693 #define pud_leaf_size(x) PUD_SIZE
1695 #ifndef pmd_leaf_size
1696 #define pmd_leaf_size(x) PMD_SIZE
1698 #ifndef pte_leaf_size
1699 #define pte_leaf_size(x) PAGE_SIZE
1703 * Some architectures have MMUs that are configurable or selectable at boot
1704 * time. These lead to variable PTRS_PER_x. For statically allocated arrays it
1705 * helps to have a static maximum value.
1708 #ifndef MAX_PTRS_PER_PTE
1709 #define MAX_PTRS_PER_PTE PTRS_PER_PTE
1712 #ifndef MAX_PTRS_PER_PMD
1713 #define MAX_PTRS_PER_PMD PTRS_PER_PMD
1716 #ifndef MAX_PTRS_PER_PUD
1717 #define MAX_PTRS_PER_PUD PTRS_PER_PUD
1720 #ifndef MAX_PTRS_PER_P4D
1721 #define MAX_PTRS_PER_P4D PTRS_PER_P4D
1724 /* description of effects of mapping type and prot in current implementation.
1725 * this is due to the limited x86 page protection hardware. The expected
1726 * behavior is in parens:
1729 * PROT_NONE PROT_READ PROT_WRITE PROT_EXEC
1730 * MAP_SHARED r: (no) no r: (yes) yes r: (no) yes r: (no) yes
1731 * w: (no) no w: (no) no w: (yes) yes w: (no) no
1732 * x: (no) no x: (no) yes x: (no) yes x: (yes) yes
1734 * MAP_PRIVATE r: (no) no r: (yes) yes r: (no) yes r: (no) yes
1735 * w: (no) no w: (no) no w: (copy) copy w: (no) no
1736 * x: (no) no x: (no) yes x: (no) yes x: (yes) yes
1738 * On arm64, PROT_EXEC has the following behaviour for both MAP_SHARED and
1739 * MAP_PRIVATE (with Enhanced PAN supported):
1744 #define DECLARE_VM_GET_PAGE_PROT \
1745 pgprot_t vm_get_page_prot(unsigned long vm_flags) \
1747 return protection_map[vm_flags & \
1748 (VM_READ | VM_WRITE | VM_EXEC | VM_SHARED)]; \
1750 EXPORT_SYMBOL(vm_get_page_prot);
1752 #endif /* _LINUX_PGTABLE_H */