1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _LINUX_PGTABLE_H
3 #define _LINUX_PGTABLE_H
6 #include <asm/pgtable.h>
11 #include <linux/mm_types.h>
12 #include <linux/bug.h>
13 #include <linux/errno.h>
14 #include <asm-generic/pgtable_uffd.h>
15 #include <linux/page_table_check.h>
17 #if 5 - defined(__PAGETABLE_P4D_FOLDED) - defined(__PAGETABLE_PUD_FOLDED) - \
18 defined(__PAGETABLE_PMD_FOLDED) != CONFIG_PGTABLE_LEVELS
19 #error CONFIG_PGTABLE_LEVELS is not consistent with __PAGETABLE_{P4D,PUD,PMD}_FOLDED
23 * On almost all architectures and configurations, 0 can be used as the
24 * upper ceiling to free_pgtables(): on many architectures it has the same
25 * effect as using TASK_SIZE. However, there is one configuration which
26 * must impose a more careful limit, to avoid freeing kernel pgtables.
28 #ifndef USER_PGTABLES_CEILING
29 #define USER_PGTABLES_CEILING 0UL
33 * This defines the first usable user address. Platforms
34 * can override its value with custom FIRST_USER_ADDRESS
35 * defined in their respective <asm/pgtable.h>.
37 #ifndef FIRST_USER_ADDRESS
38 #define FIRST_USER_ADDRESS 0UL
42 * This defines the generic helper for accessing PMD page
43 * table page. Although platforms can still override this
44 * via their respective <asm/pgtable.h>.
47 #define pmd_pgtable(pmd) pmd_page(pmd)
51 * A page table page can be thought of an array like this: pXd_t[PTRS_PER_PxD]
53 * The pXx_index() functions return the index of the entry in the page
54 * table page which would control the given virtual address
56 * As these functions may be used by the same code for different levels of
57 * the page table folding, they are always available, regardless of
58 * CONFIG_PGTABLE_LEVELS value. For the folded levels they simply return 0
59 * because in such cases PTRS_PER_PxD equals 1.
62 static inline unsigned long pte_index(unsigned long address)
64 return (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1);
66 #define pte_index pte_index
69 static inline unsigned long pmd_index(unsigned long address)
71 return (address >> PMD_SHIFT) & (PTRS_PER_PMD - 1);
73 #define pmd_index pmd_index
77 static inline unsigned long pud_index(unsigned long address)
79 return (address >> PUD_SHIFT) & (PTRS_PER_PUD - 1);
81 #define pud_index pud_index
85 /* Must be a compile-time constant, so implement it as a macro */
86 #define pgd_index(a) (((a) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))
89 #ifndef pte_offset_kernel
90 static inline pte_t *pte_offset_kernel(pmd_t *pmd, unsigned long address)
92 return (pte_t *)pmd_page_vaddr(*pmd) + pte_index(address);
94 #define pte_offset_kernel pte_offset_kernel
97 #if defined(CONFIG_HIGHPTE)
98 #define pte_offset_map(dir, address) \
99 ((pte_t *)kmap_atomic(pmd_page(*(dir))) + \
100 pte_index((address)))
101 #define pte_unmap(pte) kunmap_atomic((pte))
103 #define pte_offset_map(dir, address) pte_offset_kernel((dir), (address))
104 #define pte_unmap(pte) ((void)(pte)) /* NOP */
107 /* Find an entry in the second-level page table.. */
109 static inline pmd_t *pmd_offset(pud_t *pud, unsigned long address)
111 return pud_pgtable(*pud) + pmd_index(address);
113 #define pmd_offset pmd_offset
117 static inline pud_t *pud_offset(p4d_t *p4d, unsigned long address)
119 return p4d_pgtable(*p4d) + pud_index(address);
121 #define pud_offset pud_offset
124 static inline pgd_t *pgd_offset_pgd(pgd_t *pgd, unsigned long address)
126 return (pgd + pgd_index(address));
130 * a shortcut to get a pgd_t in a given mm
133 #define pgd_offset(mm, address) pgd_offset_pgd((mm)->pgd, (address))
137 * a shortcut which implies the use of the kernel's pgd, instead
141 #define pgd_offset_k(address) pgd_offset(&init_mm, (address))
145 * In many cases it is known that a virtual address is mapped at PMD or PTE
146 * level, so instead of traversing all the page table levels, we can get a
147 * pointer to the PMD entry in user or kernel page table or translate a virtual
148 * address to the pointer in the PTE in the kernel page tables with simple
151 static inline pmd_t *pmd_off(struct mm_struct *mm, unsigned long va)
153 return pmd_offset(pud_offset(p4d_offset(pgd_offset(mm, va), va), va), va);
156 static inline pmd_t *pmd_off_k(unsigned long va)
158 return pmd_offset(pud_offset(p4d_offset(pgd_offset_k(va), va), va), va);
161 static inline pte_t *virt_to_kpte(unsigned long vaddr)
163 pmd_t *pmd = pmd_off_k(vaddr);
165 return pmd_none(*pmd) ? NULL : pte_offset_kernel(pmd, vaddr);
169 static inline int pmd_young(pmd_t pmd)
175 #ifndef __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
176 extern int ptep_set_access_flags(struct vm_area_struct *vma,
177 unsigned long address, pte_t *ptep,
178 pte_t entry, int dirty);
181 #ifndef __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS
182 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
183 extern int pmdp_set_access_flags(struct vm_area_struct *vma,
184 unsigned long address, pmd_t *pmdp,
185 pmd_t entry, int dirty);
186 extern int pudp_set_access_flags(struct vm_area_struct *vma,
187 unsigned long address, pud_t *pudp,
188 pud_t entry, int dirty);
190 static inline int pmdp_set_access_flags(struct vm_area_struct *vma,
191 unsigned long address, pmd_t *pmdp,
192 pmd_t entry, int dirty)
197 static inline int pudp_set_access_flags(struct vm_area_struct *vma,
198 unsigned long address, pud_t *pudp,
199 pud_t entry, int dirty)
204 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
207 #ifndef __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
208 static inline int ptep_test_and_clear_young(struct vm_area_struct *vma,
209 unsigned long address,
217 set_pte_at(vma->vm_mm, address, ptep, pte_mkold(pte));
222 #ifndef __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG
223 #if defined(CONFIG_TRANSPARENT_HUGEPAGE) || defined(CONFIG_ARCH_HAS_NONLEAF_PMD_YOUNG)
224 static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma,
225 unsigned long address,
233 set_pmd_at(vma->vm_mm, address, pmdp, pmd_mkold(pmd));
237 static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma,
238 unsigned long address,
244 #endif /* CONFIG_TRANSPARENT_HUGEPAGE || CONFIG_ARCH_HAS_NONLEAF_PMD_YOUNG */
247 #ifndef __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
248 int ptep_clear_flush_young(struct vm_area_struct *vma,
249 unsigned long address, pte_t *ptep);
252 #ifndef __HAVE_ARCH_PMDP_CLEAR_YOUNG_FLUSH
253 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
254 extern int pmdp_clear_flush_young(struct vm_area_struct *vma,
255 unsigned long address, pmd_t *pmdp);
258 * Despite relevant to THP only, this API is called from generic rmap code
259 * under PageTransHuge(), hence needs a dummy implementation for !THP
261 static inline int pmdp_clear_flush_young(struct vm_area_struct *vma,
262 unsigned long address, pmd_t *pmdp)
267 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
270 #ifndef arch_has_hw_nonleaf_pmd_young
272 * Return whether the accessed bit in non-leaf PMD entries is supported on the
275 static inline bool arch_has_hw_nonleaf_pmd_young(void)
277 return IS_ENABLED(CONFIG_ARCH_HAS_NONLEAF_PMD_YOUNG);
281 #ifndef arch_has_hw_pte_young
283 * Return whether the accessed bit is supported on the local CPU.
285 * This stub assumes accessing through an old PTE triggers a page fault.
286 * Architectures that automatically set the access bit should overwrite it.
288 static inline bool arch_has_hw_pte_young(void)
294 #ifndef __HAVE_ARCH_PTEP_GET_AND_CLEAR
295 static inline pte_t ptep_get_and_clear(struct mm_struct *mm,
296 unsigned long address,
300 pte_clear(mm, address, ptep);
301 page_table_check_pte_clear(mm, address, pte);
306 static inline void ptep_clear(struct mm_struct *mm, unsigned long addr,
309 ptep_get_and_clear(mm, addr, ptep);
313 static inline pte_t ptep_get(pte_t *ptep)
315 return READ_ONCE(*ptep);
320 static inline pmd_t pmdp_get(pmd_t *pmdp)
322 return READ_ONCE(*pmdp);
326 #ifdef CONFIG_GUP_GET_PXX_LOW_HIGH
328 * For walking the pagetables without holding any locks. Some architectures
329 * (eg x86-32 PAE) cannot load the entries atomically without using expensive
330 * instructions. We are guaranteed that a PTE will only either go from not
331 * present to present, or present to not present -- it will not switch to a
332 * completely different present page without a TLB flush inbetween; which we
333 * are blocking by holding interrupts off.
335 * Setting ptes from not present to present goes:
337 * ptep->pte_high = h;
341 * And present to not present goes:
345 * ptep->pte_high = 0;
347 * We must ensure here that the load of pte_low sees 'l' IFF pte_high sees 'h'.
348 * We load pte_high *after* loading pte_low, which ensures we don't see an older
349 * value of pte_high. *Then* we recheck pte_low, which ensures that we haven't
350 * picked up a changed pte high. We might have gotten rubbish values from
351 * pte_low and pte_high, but we are guaranteed that pte_low will not have the
352 * present bit set *unless* it is 'l'. Because get_user_pages_fast() only
353 * operates on present ptes we're safe.
355 static inline pte_t ptep_get_lockless(pte_t *ptep)
360 pte.pte_low = ptep->pte_low;
362 pte.pte_high = ptep->pte_high;
364 } while (unlikely(pte.pte_low != ptep->pte_low));
368 #define ptep_get_lockless ptep_get_lockless
370 #if CONFIG_PGTABLE_LEVELS > 2
371 static inline pmd_t pmdp_get_lockless(pmd_t *pmdp)
376 pmd.pmd_low = pmdp->pmd_low;
378 pmd.pmd_high = pmdp->pmd_high;
380 } while (unlikely(pmd.pmd_low != pmdp->pmd_low));
384 #define pmdp_get_lockless pmdp_get_lockless
385 #endif /* CONFIG_PGTABLE_LEVELS > 2 */
386 #endif /* CONFIG_GUP_GET_PXX_LOW_HIGH */
389 * We require that the PTE can be read atomically.
391 #ifndef ptep_get_lockless
392 static inline pte_t ptep_get_lockless(pte_t *ptep)
394 return ptep_get(ptep);
398 #ifndef pmdp_get_lockless
399 static inline pmd_t pmdp_get_lockless(pmd_t *pmdp)
401 return pmdp_get(pmdp);
405 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
406 #ifndef __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR
407 static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm,
408 unsigned long address,
414 page_table_check_pmd_clear(mm, address, pmd);
418 #endif /* __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR */
419 #ifndef __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR
420 static inline pud_t pudp_huge_get_and_clear(struct mm_struct *mm,
421 unsigned long address,
427 page_table_check_pud_clear(mm, address, pud);
431 #endif /* __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR */
432 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
434 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
435 #ifndef __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR_FULL
436 static inline pmd_t pmdp_huge_get_and_clear_full(struct vm_area_struct *vma,
437 unsigned long address, pmd_t *pmdp,
440 return pmdp_huge_get_and_clear(vma->vm_mm, address, pmdp);
444 #ifndef __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR_FULL
445 static inline pud_t pudp_huge_get_and_clear_full(struct mm_struct *mm,
446 unsigned long address, pud_t *pudp,
449 return pudp_huge_get_and_clear(mm, address, pudp);
452 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
454 #ifndef __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
455 static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm,
456 unsigned long address, pte_t *ptep,
459 return ptep_get_and_clear(mm, address, ptep);
465 * If two threads concurrently fault at the same page, the thread that
466 * won the race updates the PTE and its local TLB/Cache. The other thread
467 * gives up, simply does nothing, and continues; on architectures where
468 * software can update TLB, local TLB can be updated here to avoid next page
469 * fault. This function updates TLB only, do nothing with cache or others.
470 * It is the difference with function update_mmu_cache.
472 #ifndef __HAVE_ARCH_UPDATE_MMU_TLB
473 static inline void update_mmu_tlb(struct vm_area_struct *vma,
474 unsigned long address, pte_t *ptep)
477 #define __HAVE_ARCH_UPDATE_MMU_TLB
481 * Some architectures may be able to avoid expensive synchronization
482 * primitives when modifications are made to PTE's which are already
483 * not present, or in the process of an address space destruction.
485 #ifndef __HAVE_ARCH_PTE_CLEAR_NOT_PRESENT_FULL
486 static inline void pte_clear_not_present_full(struct mm_struct *mm,
487 unsigned long address,
491 pte_clear(mm, address, ptep);
495 #ifndef __HAVE_ARCH_PTEP_CLEAR_FLUSH
496 extern pte_t ptep_clear_flush(struct vm_area_struct *vma,
497 unsigned long address,
501 #ifndef __HAVE_ARCH_PMDP_HUGE_CLEAR_FLUSH
502 extern pmd_t pmdp_huge_clear_flush(struct vm_area_struct *vma,
503 unsigned long address,
505 extern pud_t pudp_huge_clear_flush(struct vm_area_struct *vma,
506 unsigned long address,
510 #ifndef __HAVE_ARCH_PTEP_SET_WRPROTECT
512 static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long address, pte_t *ptep)
514 pte_t old_pte = *ptep;
515 set_pte_at(mm, address, ptep, pte_wrprotect(old_pte));
520 * On some architectures hardware does not set page access bit when accessing
521 * memory page, it is responsibility of software setting this bit. It brings
522 * out extra page fault penalty to track page access bit. For optimization page
523 * access bit can be set during all page fault flow on these arches.
524 * To be differentiate with macro pte_mkyoung, this macro is used on platforms
525 * where software maintains page access bit.
527 #ifndef pte_sw_mkyoung
528 static inline pte_t pte_sw_mkyoung(pte_t pte)
532 #define pte_sw_mkyoung pte_sw_mkyoung
535 #ifndef __HAVE_ARCH_PMDP_SET_WRPROTECT
536 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
537 static inline void pmdp_set_wrprotect(struct mm_struct *mm,
538 unsigned long address, pmd_t *pmdp)
540 pmd_t old_pmd = *pmdp;
541 set_pmd_at(mm, address, pmdp, pmd_wrprotect(old_pmd));
544 static inline void pmdp_set_wrprotect(struct mm_struct *mm,
545 unsigned long address, pmd_t *pmdp)
549 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
551 #ifndef __HAVE_ARCH_PUDP_SET_WRPROTECT
552 #ifdef CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD
553 static inline void pudp_set_wrprotect(struct mm_struct *mm,
554 unsigned long address, pud_t *pudp)
556 pud_t old_pud = *pudp;
558 set_pud_at(mm, address, pudp, pud_wrprotect(old_pud));
561 static inline void pudp_set_wrprotect(struct mm_struct *mm,
562 unsigned long address, pud_t *pudp)
566 #endif /* CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD */
569 #ifndef pmdp_collapse_flush
570 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
571 extern pmd_t pmdp_collapse_flush(struct vm_area_struct *vma,
572 unsigned long address, pmd_t *pmdp);
574 static inline pmd_t pmdp_collapse_flush(struct vm_area_struct *vma,
575 unsigned long address,
581 #define pmdp_collapse_flush pmdp_collapse_flush
582 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
585 #ifndef __HAVE_ARCH_PGTABLE_DEPOSIT
586 extern void pgtable_trans_huge_deposit(struct mm_struct *mm, pmd_t *pmdp,
590 #ifndef __HAVE_ARCH_PGTABLE_WITHDRAW
591 extern pgtable_t pgtable_trans_huge_withdraw(struct mm_struct *mm, pmd_t *pmdp);
594 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
596 * This is an implementation of pmdp_establish() that is only suitable for an
597 * architecture that doesn't have hardware dirty/accessed bits. In this case we
598 * can't race with CPU which sets these bits and non-atomic approach is fine.
600 static inline pmd_t generic_pmdp_establish(struct vm_area_struct *vma,
601 unsigned long address, pmd_t *pmdp, pmd_t pmd)
603 pmd_t old_pmd = *pmdp;
604 set_pmd_at(vma->vm_mm, address, pmdp, pmd);
609 #ifndef __HAVE_ARCH_PMDP_INVALIDATE
610 extern pmd_t pmdp_invalidate(struct vm_area_struct *vma, unsigned long address,
614 #ifndef __HAVE_ARCH_PMDP_INVALIDATE_AD
617 * pmdp_invalidate_ad() invalidates the PMD while changing a transparent
618 * hugepage mapping in the page tables. This function is similar to
619 * pmdp_invalidate(), but should only be used if the access and dirty bits would
620 * not be cleared by the software in the new PMD value. The function ensures
621 * that hardware changes of the access and dirty bits updates would not be lost.
623 * Doing so can allow in certain architectures to avoid a TLB flush in most
624 * cases. Yet, another TLB flush might be necessary later if the PMD update
625 * itself requires such flush (e.g., if protection was set to be stricter). Yet,
626 * even when a TLB flush is needed because of the update, the caller may be able
627 * to batch these TLB flushing operations, so fewer TLB flush operations are
630 extern pmd_t pmdp_invalidate_ad(struct vm_area_struct *vma,
631 unsigned long address, pmd_t *pmdp);
634 #ifndef __HAVE_ARCH_PTE_SAME
635 static inline int pte_same(pte_t pte_a, pte_t pte_b)
637 return pte_val(pte_a) == pte_val(pte_b);
641 #ifndef __HAVE_ARCH_PTE_UNUSED
643 * Some architectures provide facilities to virtualization guests
644 * so that they can flag allocated pages as unused. This allows the
645 * host to transparently reclaim unused pages. This function returns
646 * whether the pte's page is unused.
648 static inline int pte_unused(pte_t pte)
654 #ifndef pte_access_permitted
655 #define pte_access_permitted(pte, write) \
656 (pte_present(pte) && (!(write) || pte_write(pte)))
659 #ifndef pmd_access_permitted
660 #define pmd_access_permitted(pmd, write) \
661 (pmd_present(pmd) && (!(write) || pmd_write(pmd)))
664 #ifndef pud_access_permitted
665 #define pud_access_permitted(pud, write) \
666 (pud_present(pud) && (!(write) || pud_write(pud)))
669 #ifndef p4d_access_permitted
670 #define p4d_access_permitted(p4d, write) \
671 (p4d_present(p4d) && (!(write) || p4d_write(p4d)))
674 #ifndef pgd_access_permitted
675 #define pgd_access_permitted(pgd, write) \
676 (pgd_present(pgd) && (!(write) || pgd_write(pgd)))
679 #ifndef __HAVE_ARCH_PMD_SAME
680 static inline int pmd_same(pmd_t pmd_a, pmd_t pmd_b)
682 return pmd_val(pmd_a) == pmd_val(pmd_b);
685 static inline int pud_same(pud_t pud_a, pud_t pud_b)
687 return pud_val(pud_a) == pud_val(pud_b);
691 #ifndef __HAVE_ARCH_P4D_SAME
692 static inline int p4d_same(p4d_t p4d_a, p4d_t p4d_b)
694 return p4d_val(p4d_a) == p4d_val(p4d_b);
698 #ifndef __HAVE_ARCH_PGD_SAME
699 static inline int pgd_same(pgd_t pgd_a, pgd_t pgd_b)
701 return pgd_val(pgd_a) == pgd_val(pgd_b);
706 * Use set_p*_safe(), and elide TLB flushing, when confident that *no*
707 * TLB flush will be required as a result of the "set". For example, use
708 * in scenarios where it is known ahead of time that the routine is
709 * setting non-present entries, or re-setting an existing entry to the
710 * same value. Otherwise, use the typical "set" helpers and flush the
713 #define set_pte_safe(ptep, pte) \
715 WARN_ON_ONCE(pte_present(*ptep) && !pte_same(*ptep, pte)); \
716 set_pte(ptep, pte); \
719 #define set_pmd_safe(pmdp, pmd) \
721 WARN_ON_ONCE(pmd_present(*pmdp) && !pmd_same(*pmdp, pmd)); \
722 set_pmd(pmdp, pmd); \
725 #define set_pud_safe(pudp, pud) \
727 WARN_ON_ONCE(pud_present(*pudp) && !pud_same(*pudp, pud)); \
728 set_pud(pudp, pud); \
731 #define set_p4d_safe(p4dp, p4d) \
733 WARN_ON_ONCE(p4d_present(*p4dp) && !p4d_same(*p4dp, p4d)); \
734 set_p4d(p4dp, p4d); \
737 #define set_pgd_safe(pgdp, pgd) \
739 WARN_ON_ONCE(pgd_present(*pgdp) && !pgd_same(*pgdp, pgd)); \
740 set_pgd(pgdp, pgd); \
743 #ifndef __HAVE_ARCH_DO_SWAP_PAGE
745 * Some architectures support metadata associated with a page. When a
746 * page is being swapped out, this metadata must be saved so it can be
747 * restored when the page is swapped back in. SPARC M7 and newer
748 * processors support an ADI (Application Data Integrity) tag for the
749 * page as metadata for the page. arch_do_swap_page() can restore this
750 * metadata when a page is swapped back in.
752 static inline void arch_do_swap_page(struct mm_struct *mm,
753 struct vm_area_struct *vma,
755 pte_t pte, pte_t oldpte)
761 #ifndef __HAVE_ARCH_UNMAP_ONE
763 * Some architectures support metadata associated with a page. When a
764 * page is being swapped out, this metadata must be saved so it can be
765 * restored when the page is swapped back in. SPARC M7 and newer
766 * processors support an ADI (Application Data Integrity) tag for the
767 * page as metadata for the page. arch_unmap_one() can save this
768 * metadata on a swap-out of a page.
770 static inline int arch_unmap_one(struct mm_struct *mm,
771 struct vm_area_struct *vma,
780 * Allow architectures to preserve additional metadata associated with
781 * swapped-out pages. The corresponding __HAVE_ARCH_SWAP_* macros and function
782 * prototypes must be defined in the arch-specific asm/pgtable.h file.
784 #ifndef __HAVE_ARCH_PREPARE_TO_SWAP
785 static inline int arch_prepare_to_swap(struct page *page)
791 #ifndef __HAVE_ARCH_SWAP_INVALIDATE
792 static inline void arch_swap_invalidate_page(int type, pgoff_t offset)
796 static inline void arch_swap_invalidate_area(int type)
801 #ifndef __HAVE_ARCH_SWAP_RESTORE
802 static inline void arch_swap_restore(swp_entry_t entry, struct folio *folio)
807 #ifndef __HAVE_ARCH_PGD_OFFSET_GATE
808 #define pgd_offset_gate(mm, addr) pgd_offset(mm, addr)
811 #ifndef __HAVE_ARCH_MOVE_PTE
812 #define move_pte(pte, prot, old_addr, new_addr) (pte)
815 #ifndef pte_accessible
816 # define pte_accessible(mm, pte) ((void)(pte), 1)
819 #ifndef flush_tlb_fix_spurious_fault
820 #define flush_tlb_fix_spurious_fault(vma, address) flush_tlb_page(vma, address)
824 * When walking page tables, get the address of the next boundary,
825 * or the end address of the range if that comes earlier. Although no
826 * vma end wraps to 0, rounded up __boundary may wrap to 0 throughout.
829 #define pgd_addr_end(addr, end) \
830 ({ unsigned long __boundary = ((addr) + PGDIR_SIZE) & PGDIR_MASK; \
831 (__boundary - 1 < (end) - 1)? __boundary: (end); \
835 #define p4d_addr_end(addr, end) \
836 ({ unsigned long __boundary = ((addr) + P4D_SIZE) & P4D_MASK; \
837 (__boundary - 1 < (end) - 1)? __boundary: (end); \
842 #define pud_addr_end(addr, end) \
843 ({ unsigned long __boundary = ((addr) + PUD_SIZE) & PUD_MASK; \
844 (__boundary - 1 < (end) - 1)? __boundary: (end); \
849 #define pmd_addr_end(addr, end) \
850 ({ unsigned long __boundary = ((addr) + PMD_SIZE) & PMD_MASK; \
851 (__boundary - 1 < (end) - 1)? __boundary: (end); \
856 * When walking page tables, we usually want to skip any p?d_none entries;
857 * and any p?d_bad entries - reporting the error before resetting to none.
858 * Do the tests inline, but report and clear the bad entry in mm/memory.c.
860 void pgd_clear_bad(pgd_t *);
862 #ifndef __PAGETABLE_P4D_FOLDED
863 void p4d_clear_bad(p4d_t *);
865 #define p4d_clear_bad(p4d) do { } while (0)
868 #ifndef __PAGETABLE_PUD_FOLDED
869 void pud_clear_bad(pud_t *);
871 #define pud_clear_bad(p4d) do { } while (0)
874 void pmd_clear_bad(pmd_t *);
876 static inline int pgd_none_or_clear_bad(pgd_t *pgd)
880 if (unlikely(pgd_bad(*pgd))) {
887 static inline int p4d_none_or_clear_bad(p4d_t *p4d)
891 if (unlikely(p4d_bad(*p4d))) {
898 static inline int pud_none_or_clear_bad(pud_t *pud)
902 if (unlikely(pud_bad(*pud))) {
909 static inline int pmd_none_or_clear_bad(pmd_t *pmd)
913 if (unlikely(pmd_bad(*pmd))) {
920 static inline pte_t __ptep_modify_prot_start(struct vm_area_struct *vma,
925 * Get the current pte state, but zero it out to make it
926 * non-present, preventing the hardware from asynchronously
929 return ptep_get_and_clear(vma->vm_mm, addr, ptep);
932 static inline void __ptep_modify_prot_commit(struct vm_area_struct *vma,
934 pte_t *ptep, pte_t pte)
937 * The pte is non-present, so there's no hardware state to
940 set_pte_at(vma->vm_mm, addr, ptep, pte);
943 #ifndef __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION
945 * Start a pte protection read-modify-write transaction, which
946 * protects against asynchronous hardware modifications to the pte.
947 * The intention is not to prevent the hardware from making pte
948 * updates, but to prevent any updates it may make from being lost.
950 * This does not protect against other software modifications of the
951 * pte; the appropriate pte lock must be held over the transaction.
953 * Note that this interface is intended to be batchable, meaning that
954 * ptep_modify_prot_commit may not actually update the pte, but merely
955 * queue the update to be done at some later time. The update must be
956 * actually committed before the pte lock is released, however.
958 static inline pte_t ptep_modify_prot_start(struct vm_area_struct *vma,
962 return __ptep_modify_prot_start(vma, addr, ptep);
966 * Commit an update to a pte, leaving any hardware-controlled bits in
967 * the PTE unmodified.
969 static inline void ptep_modify_prot_commit(struct vm_area_struct *vma,
971 pte_t *ptep, pte_t old_pte, pte_t pte)
973 __ptep_modify_prot_commit(vma, addr, ptep, pte);
975 #endif /* __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION */
976 #endif /* CONFIG_MMU */
979 * No-op macros that just return the current protection value. Defined here
980 * because these macros can be used even if CONFIG_MMU is not defined.
984 #define pgprot_nx(prot) (prot)
987 #ifndef pgprot_noncached
988 #define pgprot_noncached(prot) (prot)
991 #ifndef pgprot_writecombine
992 #define pgprot_writecombine pgprot_noncached
995 #ifndef pgprot_writethrough
996 #define pgprot_writethrough pgprot_noncached
999 #ifndef pgprot_device
1000 #define pgprot_device pgprot_noncached
1004 #define pgprot_mhp(prot) (prot)
1008 #ifndef pgprot_modify
1009 #define pgprot_modify pgprot_modify
1010 static inline pgprot_t pgprot_modify(pgprot_t oldprot, pgprot_t newprot)
1012 if (pgprot_val(oldprot) == pgprot_val(pgprot_noncached(oldprot)))
1013 newprot = pgprot_noncached(newprot);
1014 if (pgprot_val(oldprot) == pgprot_val(pgprot_writecombine(oldprot)))
1015 newprot = pgprot_writecombine(newprot);
1016 if (pgprot_val(oldprot) == pgprot_val(pgprot_device(oldprot)))
1017 newprot = pgprot_device(newprot);
1021 #endif /* CONFIG_MMU */
1023 #ifndef pgprot_encrypted
1024 #define pgprot_encrypted(prot) (prot)
1027 #ifndef pgprot_decrypted
1028 #define pgprot_decrypted(prot) (prot)
1032 * A facility to provide lazy MMU batching. This allows PTE updates and
1033 * page invalidations to be delayed until a call to leave lazy MMU mode
1034 * is issued. Some architectures may benefit from doing this, and it is
1035 * beneficial for both shadow and direct mode hypervisors, which may batch
1036 * the PTE updates which happen during this window. Note that using this
1037 * interface requires that read hazards be removed from the code. A read
1038 * hazard could result in the direct mode hypervisor case, since the actual
1039 * write to the page tables may not yet have taken place, so reads though
1040 * a raw PTE pointer after it has been modified are not guaranteed to be
1041 * up to date. This mode can only be entered and left under the protection of
1042 * the page table locks for all page tables which may be modified. In the UP
1043 * case, this is required so that preemption is disabled, and in the SMP case,
1044 * it must synchronize the delayed page table writes properly on other CPUs.
1046 #ifndef __HAVE_ARCH_ENTER_LAZY_MMU_MODE
1047 #define arch_enter_lazy_mmu_mode() do {} while (0)
1048 #define arch_leave_lazy_mmu_mode() do {} while (0)
1049 #define arch_flush_lazy_mmu_mode() do {} while (0)
1053 * A facility to provide batching of the reload of page tables and
1054 * other process state with the actual context switch code for
1055 * paravirtualized guests. By convention, only one of the batched
1056 * update (lazy) modes (CPU, MMU) should be active at any given time,
1057 * entry should never be nested, and entry and exits should always be
1058 * paired. This is for sanity of maintaining and reasoning about the
1059 * kernel code. In this case, the exit (end of the context switch) is
1060 * in architecture-specific code, and so doesn't need a generic
1063 #ifndef __HAVE_ARCH_START_CONTEXT_SWITCH
1064 #define arch_start_context_switch(prev) do {} while (0)
1067 #ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY
1068 #ifndef CONFIG_ARCH_ENABLE_THP_MIGRATION
1069 static inline pmd_t pmd_swp_mksoft_dirty(pmd_t pmd)
1074 static inline int pmd_swp_soft_dirty(pmd_t pmd)
1079 static inline pmd_t pmd_swp_clear_soft_dirty(pmd_t pmd)
1084 #else /* !CONFIG_HAVE_ARCH_SOFT_DIRTY */
1085 static inline int pte_soft_dirty(pte_t pte)
1090 static inline int pmd_soft_dirty(pmd_t pmd)
1095 static inline pte_t pte_mksoft_dirty(pte_t pte)
1100 static inline pmd_t pmd_mksoft_dirty(pmd_t pmd)
1105 static inline pte_t pte_clear_soft_dirty(pte_t pte)
1110 static inline pmd_t pmd_clear_soft_dirty(pmd_t pmd)
1115 static inline pte_t pte_swp_mksoft_dirty(pte_t pte)
1120 static inline int pte_swp_soft_dirty(pte_t pte)
1125 static inline pte_t pte_swp_clear_soft_dirty(pte_t pte)
1130 static inline pmd_t pmd_swp_mksoft_dirty(pmd_t pmd)
1135 static inline int pmd_swp_soft_dirty(pmd_t pmd)
1140 static inline pmd_t pmd_swp_clear_soft_dirty(pmd_t pmd)
1146 #ifndef __HAVE_PFNMAP_TRACKING
1148 * Interfaces that can be used by architecture code to keep track of
1149 * memory type of pfn mappings specified by the remap_pfn_range,
1154 * track_pfn_remap is called when a _new_ pfn mapping is being established
1155 * by remap_pfn_range() for physical range indicated by pfn and size.
1157 static inline int track_pfn_remap(struct vm_area_struct *vma, pgprot_t *prot,
1158 unsigned long pfn, unsigned long addr,
1165 * track_pfn_insert is called when a _new_ single pfn is established
1166 * by vmf_insert_pfn().
1168 static inline void track_pfn_insert(struct vm_area_struct *vma, pgprot_t *prot,
1174 * track_pfn_copy is called when vma that is covering the pfnmap gets
1175 * copied through copy_page_range().
1177 static inline int track_pfn_copy(struct vm_area_struct *vma)
1183 * untrack_pfn is called while unmapping a pfnmap for a region.
1184 * untrack can be called for a specific region indicated by pfn and size or
1185 * can be for the entire vma (in which case pfn, size are zero).
1187 static inline void untrack_pfn(struct vm_area_struct *vma,
1188 unsigned long pfn, unsigned long size,
1194 * untrack_pfn_moved is called while mremapping a pfnmap for a new region.
1196 static inline void untrack_pfn_moved(struct vm_area_struct *vma)
1200 extern int track_pfn_remap(struct vm_area_struct *vma, pgprot_t *prot,
1201 unsigned long pfn, unsigned long addr,
1202 unsigned long size);
1203 extern void track_pfn_insert(struct vm_area_struct *vma, pgprot_t *prot,
1205 extern int track_pfn_copy(struct vm_area_struct *vma);
1206 extern void untrack_pfn(struct vm_area_struct *vma, unsigned long pfn,
1207 unsigned long size, bool mm_wr_locked);
1208 extern void untrack_pfn_moved(struct vm_area_struct *vma);
1212 #ifdef __HAVE_COLOR_ZERO_PAGE
1213 static inline int is_zero_pfn(unsigned long pfn)
1215 extern unsigned long zero_pfn;
1216 unsigned long offset_from_zero_pfn = pfn - zero_pfn;
1217 return offset_from_zero_pfn <= (zero_page_mask >> PAGE_SHIFT);
1220 #define my_zero_pfn(addr) page_to_pfn(ZERO_PAGE(addr))
1223 static inline int is_zero_pfn(unsigned long pfn)
1225 extern unsigned long zero_pfn;
1226 return pfn == zero_pfn;
1229 static inline unsigned long my_zero_pfn(unsigned long addr)
1231 extern unsigned long zero_pfn;
1236 static inline int is_zero_pfn(unsigned long pfn)
1241 static inline unsigned long my_zero_pfn(unsigned long addr)
1245 #endif /* CONFIG_MMU */
1249 #ifndef CONFIG_TRANSPARENT_HUGEPAGE
1250 static inline int pmd_trans_huge(pmd_t pmd)
1255 static inline int pmd_write(pmd_t pmd)
1260 #endif /* pmd_write */
1261 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
1264 static inline int pud_write(pud_t pud)
1269 #endif /* pud_write */
1271 #if !defined(CONFIG_ARCH_HAS_PTE_DEVMAP) || !defined(CONFIG_TRANSPARENT_HUGEPAGE)
1272 static inline int pmd_devmap(pmd_t pmd)
1276 static inline int pud_devmap(pud_t pud)
1280 static inline int pgd_devmap(pgd_t pgd)
1286 #if !defined(CONFIG_TRANSPARENT_HUGEPAGE) || \
1287 !defined(CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD)
1288 static inline int pud_trans_huge(pud_t pud)
1294 /* See pmd_none_or_trans_huge_or_clear_bad for discussion. */
1295 static inline int pud_none_or_trans_huge_or_dev_or_clear_bad(pud_t *pud)
1297 pud_t pudval = READ_ONCE(*pud);
1299 if (pud_none(pudval) || pud_trans_huge(pudval) || pud_devmap(pudval))
1301 if (unlikely(pud_bad(pudval))) {
1308 /* See pmd_trans_unstable for discussion. */
1309 static inline int pud_trans_unstable(pud_t *pud)
1311 #if defined(CONFIG_TRANSPARENT_HUGEPAGE) && \
1312 defined(CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD)
1313 return pud_none_or_trans_huge_or_dev_or_clear_bad(pud);
1319 #ifndef arch_needs_pgtable_deposit
1320 #define arch_needs_pgtable_deposit() (false)
1323 * This function is meant to be used by sites walking pagetables with
1324 * the mmap_lock held in read mode to protect against MADV_DONTNEED and
1325 * transhuge page faults. MADV_DONTNEED can convert a transhuge pmd
1326 * into a null pmd and the transhuge page fault can convert a null pmd
1327 * into an hugepmd or into a regular pmd (if the hugepage allocation
1328 * fails). While holding the mmap_lock in read mode the pmd becomes
1329 * stable and stops changing under us only if it's not null and not a
1330 * transhuge pmd. When those races occurs and this function makes a
1331 * difference vs the standard pmd_none_or_clear_bad, the result is
1332 * undefined so behaving like if the pmd was none is safe (because it
1333 * can return none anyway). The compiler level barrier() is critically
1334 * important to compute the two checks atomically on the same pmdval.
1336 * For 32bit kernels with a 64bit large pmd_t this automatically takes
1337 * care of reading the pmd atomically to avoid SMP race conditions
1338 * against pmd_populate() when the mmap_lock is hold for reading by the
1339 * caller (a special atomic read not done by "gcc" as in the generic
1340 * version above, is also needed when THP is disabled because the page
1341 * fault can populate the pmd from under us).
1343 static inline int pmd_none_or_trans_huge_or_clear_bad(pmd_t *pmd)
1345 pmd_t pmdval = pmdp_get_lockless(pmd);
1347 * The barrier will stabilize the pmdval in a register or on
1348 * the stack so that it will stop changing under the code.
1350 * When CONFIG_TRANSPARENT_HUGEPAGE=y on x86 32bit PAE,
1351 * pmdp_get_lockless is allowed to return a not atomic pmdval
1352 * (for example pointing to an hugepage that has never been
1353 * mapped in the pmd). The below checks will only care about
1354 * the low part of the pmd with 32bit PAE x86 anyway, with the
1355 * exception of pmd_none(). So the important thing is that if
1356 * the low part of the pmd is found null, the high part will
1357 * be also null or the pmd_none() check below would be
1360 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
1364 * !pmd_present() checks for pmd migration entries
1366 * The complete check uses is_pmd_migration_entry() in linux/swapops.h
1367 * But using that requires moving current function and pmd_trans_unstable()
1368 * to linux/swapops.h to resolve dependency, which is too much code move.
1370 * !pmd_present() is equivalent to is_pmd_migration_entry() currently,
1371 * because !pmd_present() pages can only be under migration not swapped
1374 * pmd_none() is preserved for future condition checks on pmd migration
1375 * entries and not confusing with this function name, although it is
1376 * redundant with !pmd_present().
1378 if (pmd_none(pmdval) || pmd_trans_huge(pmdval) ||
1379 (IS_ENABLED(CONFIG_ARCH_ENABLE_THP_MIGRATION) && !pmd_present(pmdval)))
1381 if (unlikely(pmd_bad(pmdval))) {
1389 * This is a noop if Transparent Hugepage Support is not built into
1390 * the kernel. Otherwise it is equivalent to
1391 * pmd_none_or_trans_huge_or_clear_bad(), and shall only be called in
1392 * places that already verified the pmd is not none and they want to
1393 * walk ptes while holding the mmap sem in read mode (write mode don't
1394 * need this). If THP is not enabled, the pmd can't go away under the
1395 * code even if MADV_DONTNEED runs, but if THP is enabled we need to
1396 * run a pmd_trans_unstable before walking the ptes after
1397 * split_huge_pmd returns (because it may have run when the pmd become
1398 * null, but then a page fault can map in a THP and not a regular page).
1400 static inline int pmd_trans_unstable(pmd_t *pmd)
1402 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
1403 return pmd_none_or_trans_huge_or_clear_bad(pmd);
1410 * the ordering of these checks is important for pmds with _page_devmap set.
1411 * if we check pmd_trans_unstable() first we will trip the bad_pmd() check
1412 * inside of pmd_none_or_trans_huge_or_clear_bad(). this will end up correctly
1413 * returning 1 but not before it spams dmesg with the pmd_clear_bad() output.
1415 static inline int pmd_devmap_trans_unstable(pmd_t *pmd)
1417 return pmd_devmap(*pmd) || pmd_trans_unstable(pmd);
1420 #ifndef CONFIG_NUMA_BALANCING
1422 * Technically a PTE can be PROTNONE even when not doing NUMA balancing but
1423 * the only case the kernel cares is for NUMA balancing and is only ever set
1424 * when the VMA is accessible. For PROT_NONE VMAs, the PTEs are not marked
1425 * _PAGE_PROTNONE so by default, implement the helper as "always no". It
1426 * is the responsibility of the caller to distinguish between PROT_NONE
1427 * protections and NUMA hinting fault protections.
1429 static inline int pte_protnone(pte_t pte)
1434 static inline int pmd_protnone(pmd_t pmd)
1438 #endif /* CONFIG_NUMA_BALANCING */
1440 #endif /* CONFIG_MMU */
1442 #ifdef CONFIG_HAVE_ARCH_HUGE_VMAP
1444 #ifndef __PAGETABLE_P4D_FOLDED
1445 int p4d_set_huge(p4d_t *p4d, phys_addr_t addr, pgprot_t prot);
1446 void p4d_clear_huge(p4d_t *p4d);
1448 static inline int p4d_set_huge(p4d_t *p4d, phys_addr_t addr, pgprot_t prot)
1452 static inline void p4d_clear_huge(p4d_t *p4d) { }
1453 #endif /* !__PAGETABLE_P4D_FOLDED */
1455 int pud_set_huge(pud_t *pud, phys_addr_t addr, pgprot_t prot);
1456 int pmd_set_huge(pmd_t *pmd, phys_addr_t addr, pgprot_t prot);
1457 int pud_clear_huge(pud_t *pud);
1458 int pmd_clear_huge(pmd_t *pmd);
1459 int p4d_free_pud_page(p4d_t *p4d, unsigned long addr);
1460 int pud_free_pmd_page(pud_t *pud, unsigned long addr);
1461 int pmd_free_pte_page(pmd_t *pmd, unsigned long addr);
1462 #else /* !CONFIG_HAVE_ARCH_HUGE_VMAP */
1463 static inline int p4d_set_huge(p4d_t *p4d, phys_addr_t addr, pgprot_t prot)
1467 static inline int pud_set_huge(pud_t *pud, phys_addr_t addr, pgprot_t prot)
1471 static inline int pmd_set_huge(pmd_t *pmd, phys_addr_t addr, pgprot_t prot)
1475 static inline void p4d_clear_huge(p4d_t *p4d) { }
1476 static inline int pud_clear_huge(pud_t *pud)
1480 static inline int pmd_clear_huge(pmd_t *pmd)
1484 static inline int p4d_free_pud_page(p4d_t *p4d, unsigned long addr)
1488 static inline int pud_free_pmd_page(pud_t *pud, unsigned long addr)
1492 static inline int pmd_free_pte_page(pmd_t *pmd, unsigned long addr)
1496 #endif /* CONFIG_HAVE_ARCH_HUGE_VMAP */
1498 #ifndef __HAVE_ARCH_FLUSH_PMD_TLB_RANGE
1499 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
1501 * ARCHes with special requirements for evicting THP backing TLB entries can
1502 * implement this. Otherwise also, it can help optimize normal TLB flush in
1503 * THP regime. Stock flush_tlb_range() typically has optimization to nuke the
1504 * entire TLB if flush span is greater than a threshold, which will
1505 * likely be true for a single huge page. Thus a single THP flush will
1506 * invalidate the entire TLB which is not desirable.
1507 * e.g. see arch/arc: flush_pmd_tlb_range
1509 #define flush_pmd_tlb_range(vma, addr, end) flush_tlb_range(vma, addr, end)
1510 #define flush_pud_tlb_range(vma, addr, end) flush_tlb_range(vma, addr, end)
1512 #define flush_pmd_tlb_range(vma, addr, end) BUILD_BUG()
1513 #define flush_pud_tlb_range(vma, addr, end) BUILD_BUG()
1518 int phys_mem_access_prot_allowed(struct file *file, unsigned long pfn,
1519 unsigned long size, pgprot_t *vma_prot);
1521 #ifndef CONFIG_X86_ESPFIX64
1522 static inline void init_espfix_bsp(void) { }
1525 extern void __init pgtable_cache_init(void);
1527 #ifndef __HAVE_ARCH_PFN_MODIFY_ALLOWED
1528 static inline bool pfn_modify_allowed(unsigned long pfn, pgprot_t prot)
1533 static inline bool arch_has_pfn_modify_check(void)
1537 #endif /* !_HAVE_ARCH_PFN_MODIFY_ALLOWED */
1540 * Architecture PAGE_KERNEL_* fallbacks
1542 * Some architectures don't define certain PAGE_KERNEL_* flags. This is either
1543 * because they really don't support them, or the port needs to be updated to
1544 * reflect the required functionality. Below are a set of relatively safe
1545 * fallbacks, as best effort, which we can count on in lieu of the architectures
1546 * not defining them on their own yet.
1549 #ifndef PAGE_KERNEL_RO
1550 # define PAGE_KERNEL_RO PAGE_KERNEL
1553 #ifndef PAGE_KERNEL_EXEC
1554 # define PAGE_KERNEL_EXEC PAGE_KERNEL
1558 * Page Table Modification bits for pgtbl_mod_mask.
1560 * These are used by the p?d_alloc_track*() set of functions an in the generic
1561 * vmalloc/ioremap code to track at which page-table levels entries have been
1562 * modified. Based on that the code can better decide when vmalloc and ioremap
1563 * mapping changes need to be synchronized to other page-tables in the system.
1565 #define __PGTBL_PGD_MODIFIED 0
1566 #define __PGTBL_P4D_MODIFIED 1
1567 #define __PGTBL_PUD_MODIFIED 2
1568 #define __PGTBL_PMD_MODIFIED 3
1569 #define __PGTBL_PTE_MODIFIED 4
1571 #define PGTBL_PGD_MODIFIED BIT(__PGTBL_PGD_MODIFIED)
1572 #define PGTBL_P4D_MODIFIED BIT(__PGTBL_P4D_MODIFIED)
1573 #define PGTBL_PUD_MODIFIED BIT(__PGTBL_PUD_MODIFIED)
1574 #define PGTBL_PMD_MODIFIED BIT(__PGTBL_PMD_MODIFIED)
1575 #define PGTBL_PTE_MODIFIED BIT(__PGTBL_PTE_MODIFIED)
1577 /* Page-Table Modification Mask */
1578 typedef unsigned int pgtbl_mod_mask;
1580 #endif /* !__ASSEMBLY__ */
1582 #if !defined(MAX_POSSIBLE_PHYSMEM_BITS) && !defined(CONFIG_64BIT)
1583 #ifdef CONFIG_PHYS_ADDR_T_64BIT
1585 * ZSMALLOC needs to know the highest PFN on 32-bit architectures
1586 * with physical address space extension, but falls back to
1587 * BITS_PER_LONG otherwise.
1589 #error Missing MAX_POSSIBLE_PHYSMEM_BITS definition
1591 #define MAX_POSSIBLE_PHYSMEM_BITS 32
1595 #ifndef has_transparent_hugepage
1596 #define has_transparent_hugepage() IS_BUILTIN(CONFIG_TRANSPARENT_HUGEPAGE)
1600 * On some architectures it depends on the mm if the p4d/pud or pmd
1601 * layer of the page table hierarchy is folded or not.
1603 #ifndef mm_p4d_folded
1604 #define mm_p4d_folded(mm) __is_defined(__PAGETABLE_P4D_FOLDED)
1607 #ifndef mm_pud_folded
1608 #define mm_pud_folded(mm) __is_defined(__PAGETABLE_PUD_FOLDED)
1611 #ifndef mm_pmd_folded
1612 #define mm_pmd_folded(mm) __is_defined(__PAGETABLE_PMD_FOLDED)
1615 #ifndef p4d_offset_lockless
1616 #define p4d_offset_lockless(pgdp, pgd, address) p4d_offset(&(pgd), address)
1618 #ifndef pud_offset_lockless
1619 #define pud_offset_lockless(p4dp, p4d, address) pud_offset(&(p4d), address)
1621 #ifndef pmd_offset_lockless
1622 #define pmd_offset_lockless(pudp, pud, address) pmd_offset(&(pud), address)
1626 * p?d_leaf() - true if this entry is a final mapping to a physical address.
1627 * This differs from p?d_huge() by the fact that they are always available (if
1628 * the architecture supports large pages at the appropriate level) even
1629 * if CONFIG_HUGETLB_PAGE is not defined.
1630 * Only meaningful when called on a valid entry.
1633 #define pgd_leaf(x) 0
1636 #define p4d_leaf(x) 0
1639 #define pud_leaf(x) 0
1642 #define pmd_leaf(x) 0
1645 #ifndef pgd_leaf_size
1646 #define pgd_leaf_size(x) (1ULL << PGDIR_SHIFT)
1648 #ifndef p4d_leaf_size
1649 #define p4d_leaf_size(x) P4D_SIZE
1651 #ifndef pud_leaf_size
1652 #define pud_leaf_size(x) PUD_SIZE
1654 #ifndef pmd_leaf_size
1655 #define pmd_leaf_size(x) PMD_SIZE
1657 #ifndef pte_leaf_size
1658 #define pte_leaf_size(x) PAGE_SIZE
1662 * Some architectures have MMUs that are configurable or selectable at boot
1663 * time. These lead to variable PTRS_PER_x. For statically allocated arrays it
1664 * helps to have a static maximum value.
1667 #ifndef MAX_PTRS_PER_PTE
1668 #define MAX_PTRS_PER_PTE PTRS_PER_PTE
1671 #ifndef MAX_PTRS_PER_PMD
1672 #define MAX_PTRS_PER_PMD PTRS_PER_PMD
1675 #ifndef MAX_PTRS_PER_PUD
1676 #define MAX_PTRS_PER_PUD PTRS_PER_PUD
1679 #ifndef MAX_PTRS_PER_P4D
1680 #define MAX_PTRS_PER_P4D PTRS_PER_P4D
1683 /* description of effects of mapping type and prot in current implementation.
1684 * this is due to the limited x86 page protection hardware. The expected
1685 * behavior is in parens:
1688 * PROT_NONE PROT_READ PROT_WRITE PROT_EXEC
1689 * MAP_SHARED r: (no) no r: (yes) yes r: (no) yes r: (no) yes
1690 * w: (no) no w: (no) no w: (yes) yes w: (no) no
1691 * x: (no) no x: (no) yes x: (no) yes x: (yes) yes
1693 * MAP_PRIVATE r: (no) no r: (yes) yes r: (no) yes r: (no) yes
1694 * w: (no) no w: (no) no w: (copy) copy w: (no) no
1695 * x: (no) no x: (no) yes x: (no) yes x: (yes) yes
1697 * On arm64, PROT_EXEC has the following behaviour for both MAP_SHARED and
1698 * MAP_PRIVATE (with Enhanced PAN supported):
1703 #define DECLARE_VM_GET_PAGE_PROT \
1704 pgprot_t vm_get_page_prot(unsigned long vm_flags) \
1706 return protection_map[vm_flags & \
1707 (VM_READ | VM_WRITE | VM_EXEC | VM_SHARED)]; \
1709 EXPORT_SYMBOL(vm_get_page_prot);
1711 #endif /* _LINUX_PGTABLE_H */