1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _LINUX_PGTABLE_H
3 #define _LINUX_PGTABLE_H
6 #include <asm/pgtable.h>
11 #include <linux/mm_types.h>
12 #include <linux/bug.h>
13 #include <linux/errno.h>
14 #include <asm-generic/pgtable_uffd.h>
15 #include <linux/page_table_check.h>
17 #if 5 - defined(__PAGETABLE_P4D_FOLDED) - defined(__PAGETABLE_PUD_FOLDED) - \
18 defined(__PAGETABLE_PMD_FOLDED) != CONFIG_PGTABLE_LEVELS
19 #error CONFIG_PGTABLE_LEVELS is not consistent with __PAGETABLE_{P4D,PUD,PMD}_FOLDED
23 * On almost all architectures and configurations, 0 can be used as the
24 * upper ceiling to free_pgtables(): on many architectures it has the same
25 * effect as using TASK_SIZE. However, there is one configuration which
26 * must impose a more careful limit, to avoid freeing kernel pgtables.
28 #ifndef USER_PGTABLES_CEILING
29 #define USER_PGTABLES_CEILING 0UL
33 * This defines the first usable user address. Platforms
34 * can override its value with custom FIRST_USER_ADDRESS
35 * defined in their respective <asm/pgtable.h>.
37 #ifndef FIRST_USER_ADDRESS
38 #define FIRST_USER_ADDRESS 0UL
42 * This defines the generic helper for accessing PMD page
43 * table page. Although platforms can still override this
44 * via their respective <asm/pgtable.h>.
47 #define pmd_pgtable(pmd) pmd_page(pmd)
51 * A page table page can be thought of an array like this: pXd_t[PTRS_PER_PxD]
53 * The pXx_index() functions return the index of the entry in the page
54 * table page which would control the given virtual address
56 * As these functions may be used by the same code for different levels of
57 * the page table folding, they are always available, regardless of
58 * CONFIG_PGTABLE_LEVELS value. For the folded levels they simply return 0
59 * because in such cases PTRS_PER_PxD equals 1.
62 static inline unsigned long pte_index(unsigned long address)
64 return (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1);
66 #define pte_index pte_index
69 static inline unsigned long pmd_index(unsigned long address)
71 return (address >> PMD_SHIFT) & (PTRS_PER_PMD - 1);
73 #define pmd_index pmd_index
77 static inline unsigned long pud_index(unsigned long address)
79 return (address >> PUD_SHIFT) & (PTRS_PER_PUD - 1);
81 #define pud_index pud_index
85 /* Must be a compile-time constant, so implement it as a macro */
86 #define pgd_index(a) (((a) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))
89 #ifndef pte_offset_kernel
90 static inline pte_t *pte_offset_kernel(pmd_t *pmd, unsigned long address)
92 return (pte_t *)pmd_page_vaddr(*pmd) + pte_index(address);
94 #define pte_offset_kernel pte_offset_kernel
97 #if defined(CONFIG_HIGHPTE)
98 #define pte_offset_map(dir, address) \
99 ((pte_t *)kmap_atomic(pmd_page(*(dir))) + \
100 pte_index((address)))
101 #define pte_unmap(pte) kunmap_atomic((pte))
103 #define pte_offset_map(dir, address) pte_offset_kernel((dir), (address))
104 #define pte_unmap(pte) ((void)(pte)) /* NOP */
107 /* Find an entry in the second-level page table.. */
109 static inline pmd_t *pmd_offset(pud_t *pud, unsigned long address)
111 return pud_pgtable(*pud) + pmd_index(address);
113 #define pmd_offset pmd_offset
117 static inline pud_t *pud_offset(p4d_t *p4d, unsigned long address)
119 return p4d_pgtable(*p4d) + pud_index(address);
121 #define pud_offset pud_offset
124 static inline pgd_t *pgd_offset_pgd(pgd_t *pgd, unsigned long address)
126 return (pgd + pgd_index(address));
130 * a shortcut to get a pgd_t in a given mm
133 #define pgd_offset(mm, address) pgd_offset_pgd((mm)->pgd, (address))
137 * a shortcut which implies the use of the kernel's pgd, instead
141 #define pgd_offset_k(address) pgd_offset(&init_mm, (address))
145 * In many cases it is known that a virtual address is mapped at PMD or PTE
146 * level, so instead of traversing all the page table levels, we can get a
147 * pointer to the PMD entry in user or kernel page table or translate a virtual
148 * address to the pointer in the PTE in the kernel page tables with simple
151 static inline pmd_t *pmd_off(struct mm_struct *mm, unsigned long va)
153 return pmd_offset(pud_offset(p4d_offset(pgd_offset(mm, va), va), va), va);
156 static inline pmd_t *pmd_off_k(unsigned long va)
158 return pmd_offset(pud_offset(p4d_offset(pgd_offset_k(va), va), va), va);
161 static inline pte_t *virt_to_kpte(unsigned long vaddr)
163 pmd_t *pmd = pmd_off_k(vaddr);
165 return pmd_none(*pmd) ? NULL : pte_offset_kernel(pmd, vaddr);
168 #ifndef __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
169 extern int ptep_set_access_flags(struct vm_area_struct *vma,
170 unsigned long address, pte_t *ptep,
171 pte_t entry, int dirty);
174 #ifndef __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS
175 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
176 extern int pmdp_set_access_flags(struct vm_area_struct *vma,
177 unsigned long address, pmd_t *pmdp,
178 pmd_t entry, int dirty);
179 extern int pudp_set_access_flags(struct vm_area_struct *vma,
180 unsigned long address, pud_t *pudp,
181 pud_t entry, int dirty);
183 static inline int pmdp_set_access_flags(struct vm_area_struct *vma,
184 unsigned long address, pmd_t *pmdp,
185 pmd_t entry, int dirty)
190 static inline int pudp_set_access_flags(struct vm_area_struct *vma,
191 unsigned long address, pud_t *pudp,
192 pud_t entry, int dirty)
197 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
200 #ifndef __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
201 static inline int ptep_test_and_clear_young(struct vm_area_struct *vma,
202 unsigned long address,
210 set_pte_at(vma->vm_mm, address, ptep, pte_mkold(pte));
215 #ifndef __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG
216 #if defined(CONFIG_TRANSPARENT_HUGEPAGE) || defined(CONFIG_ARCH_HAS_NONLEAF_PMD_YOUNG)
217 static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma,
218 unsigned long address,
226 set_pmd_at(vma->vm_mm, address, pmdp, pmd_mkold(pmd));
230 static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma,
231 unsigned long address,
237 #endif /* CONFIG_TRANSPARENT_HUGEPAGE || CONFIG_ARCH_HAS_NONLEAF_PMD_YOUNG */
240 #ifndef __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
241 int ptep_clear_flush_young(struct vm_area_struct *vma,
242 unsigned long address, pte_t *ptep);
245 #ifndef __HAVE_ARCH_PMDP_CLEAR_YOUNG_FLUSH
246 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
247 extern int pmdp_clear_flush_young(struct vm_area_struct *vma,
248 unsigned long address, pmd_t *pmdp);
251 * Despite relevant to THP only, this API is called from generic rmap code
252 * under PageTransHuge(), hence needs a dummy implementation for !THP
254 static inline int pmdp_clear_flush_young(struct vm_area_struct *vma,
255 unsigned long address, pmd_t *pmdp)
260 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
263 #ifndef arch_has_hw_pte_young
265 * Return whether the accessed bit is supported on the local CPU.
267 * This stub assumes accessing through an old PTE triggers a page fault.
268 * Architectures that automatically set the access bit should overwrite it.
270 static inline bool arch_has_hw_pte_young(void)
276 #ifndef __HAVE_ARCH_PTEP_GET_AND_CLEAR
277 static inline pte_t ptep_get_and_clear(struct mm_struct *mm,
278 unsigned long address,
282 pte_clear(mm, address, ptep);
283 page_table_check_pte_clear(mm, address, pte);
288 static inline void ptep_clear(struct mm_struct *mm, unsigned long addr,
291 ptep_get_and_clear(mm, addr, ptep);
294 #ifndef __HAVE_ARCH_PTEP_GET
295 static inline pte_t ptep_get(pte_t *ptep)
297 return READ_ONCE(*ptep);
301 #ifdef CONFIG_GUP_GET_PTE_LOW_HIGH
303 * WARNING: only to be used in the get_user_pages_fast() implementation.
305 * With get_user_pages_fast(), we walk down the pagetables without taking any
306 * locks. For this we would like to load the pointers atomically, but sometimes
307 * that is not possible (e.g. without expensive cmpxchg8b on x86_32 PAE). What
308 * we do have is the guarantee that a PTE will only either go from not present
309 * to present, or present to not present or both -- it will not switch to a
310 * completely different present page without a TLB flush in between; something
311 * that we are blocking by holding interrupts off.
313 * Setting ptes from not present to present goes:
315 * ptep->pte_high = h;
319 * And present to not present goes:
323 * ptep->pte_high = 0;
325 * We must ensure here that the load of pte_low sees 'l' IFF pte_high sees 'h'.
326 * We load pte_high *after* loading pte_low, which ensures we don't see an older
327 * value of pte_high. *Then* we recheck pte_low, which ensures that we haven't
328 * picked up a changed pte high. We might have gotten rubbish values from
329 * pte_low and pte_high, but we are guaranteed that pte_low will not have the
330 * present bit set *unless* it is 'l'. Because get_user_pages_fast() only
331 * operates on present ptes we're safe.
333 static inline pte_t ptep_get_lockless(pte_t *ptep)
338 pte.pte_low = ptep->pte_low;
340 pte.pte_high = ptep->pte_high;
342 } while (unlikely(pte.pte_low != ptep->pte_low));
346 #else /* CONFIG_GUP_GET_PTE_LOW_HIGH */
348 * We require that the PTE can be read atomically.
350 static inline pte_t ptep_get_lockless(pte_t *ptep)
352 return ptep_get(ptep);
354 #endif /* CONFIG_GUP_GET_PTE_LOW_HIGH */
356 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
357 #ifndef __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR
358 static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm,
359 unsigned long address,
365 page_table_check_pmd_clear(mm, address, pmd);
369 #endif /* __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR */
370 #ifndef __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR
371 static inline pud_t pudp_huge_get_and_clear(struct mm_struct *mm,
372 unsigned long address,
378 page_table_check_pud_clear(mm, address, pud);
382 #endif /* __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR */
383 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
385 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
386 #ifndef __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR_FULL
387 static inline pmd_t pmdp_huge_get_and_clear_full(struct vm_area_struct *vma,
388 unsigned long address, pmd_t *pmdp,
391 return pmdp_huge_get_and_clear(vma->vm_mm, address, pmdp);
395 #ifndef __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR_FULL
396 static inline pud_t pudp_huge_get_and_clear_full(struct mm_struct *mm,
397 unsigned long address, pud_t *pudp,
400 return pudp_huge_get_and_clear(mm, address, pudp);
403 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
405 #ifndef __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
406 static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm,
407 unsigned long address, pte_t *ptep,
411 pte = ptep_get_and_clear(mm, address, ptep);
418 * If two threads concurrently fault at the same page, the thread that
419 * won the race updates the PTE and its local TLB/Cache. The other thread
420 * gives up, simply does nothing, and continues; on architectures where
421 * software can update TLB, local TLB can be updated here to avoid next page
422 * fault. This function updates TLB only, do nothing with cache or others.
423 * It is the difference with function update_mmu_cache.
425 #ifndef __HAVE_ARCH_UPDATE_MMU_TLB
426 static inline void update_mmu_tlb(struct vm_area_struct *vma,
427 unsigned long address, pte_t *ptep)
430 #define __HAVE_ARCH_UPDATE_MMU_TLB
434 * Some architectures may be able to avoid expensive synchronization
435 * primitives when modifications are made to PTE's which are already
436 * not present, or in the process of an address space destruction.
438 #ifndef __HAVE_ARCH_PTE_CLEAR_NOT_PRESENT_FULL
439 static inline void pte_clear_not_present_full(struct mm_struct *mm,
440 unsigned long address,
444 pte_clear(mm, address, ptep);
448 #ifndef __HAVE_ARCH_PTEP_CLEAR_FLUSH
449 extern pte_t ptep_clear_flush(struct vm_area_struct *vma,
450 unsigned long address,
454 #ifndef __HAVE_ARCH_PMDP_HUGE_CLEAR_FLUSH
455 extern pmd_t pmdp_huge_clear_flush(struct vm_area_struct *vma,
456 unsigned long address,
458 extern pud_t pudp_huge_clear_flush(struct vm_area_struct *vma,
459 unsigned long address,
463 #ifndef __HAVE_ARCH_PTEP_SET_WRPROTECT
465 static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long address, pte_t *ptep)
467 pte_t old_pte = *ptep;
468 set_pte_at(mm, address, ptep, pte_wrprotect(old_pte));
473 * On some architectures hardware does not set page access bit when accessing
474 * memory page, it is responsibility of software setting this bit. It brings
475 * out extra page fault penalty to track page access bit. For optimization page
476 * access bit can be set during all page fault flow on these arches.
477 * To be differentiate with macro pte_mkyoung, this macro is used on platforms
478 * where software maintains page access bit.
480 #ifndef pte_sw_mkyoung
481 static inline pte_t pte_sw_mkyoung(pte_t pte)
485 #define pte_sw_mkyoung pte_sw_mkyoung
488 #ifndef pte_savedwrite
489 #define pte_savedwrite pte_write
492 #ifndef pte_mk_savedwrite
493 #define pte_mk_savedwrite pte_mkwrite
496 #ifndef pte_clear_savedwrite
497 #define pte_clear_savedwrite pte_wrprotect
500 #ifndef pmd_savedwrite
501 #define pmd_savedwrite pmd_write
504 #ifndef pmd_mk_savedwrite
505 #define pmd_mk_savedwrite pmd_mkwrite
508 #ifndef pmd_clear_savedwrite
509 #define pmd_clear_savedwrite pmd_wrprotect
512 #ifndef __HAVE_ARCH_PMDP_SET_WRPROTECT
513 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
514 static inline void pmdp_set_wrprotect(struct mm_struct *mm,
515 unsigned long address, pmd_t *pmdp)
517 pmd_t old_pmd = *pmdp;
518 set_pmd_at(mm, address, pmdp, pmd_wrprotect(old_pmd));
521 static inline void pmdp_set_wrprotect(struct mm_struct *mm,
522 unsigned long address, pmd_t *pmdp)
526 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
528 #ifndef __HAVE_ARCH_PUDP_SET_WRPROTECT
529 #ifdef CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD
530 static inline void pudp_set_wrprotect(struct mm_struct *mm,
531 unsigned long address, pud_t *pudp)
533 pud_t old_pud = *pudp;
535 set_pud_at(mm, address, pudp, pud_wrprotect(old_pud));
538 static inline void pudp_set_wrprotect(struct mm_struct *mm,
539 unsigned long address, pud_t *pudp)
543 #endif /* CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD */
546 #ifndef pmdp_collapse_flush
547 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
548 extern pmd_t pmdp_collapse_flush(struct vm_area_struct *vma,
549 unsigned long address, pmd_t *pmdp);
551 static inline pmd_t pmdp_collapse_flush(struct vm_area_struct *vma,
552 unsigned long address,
558 #define pmdp_collapse_flush pmdp_collapse_flush
559 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
562 #ifndef __HAVE_ARCH_PGTABLE_DEPOSIT
563 extern void pgtable_trans_huge_deposit(struct mm_struct *mm, pmd_t *pmdp,
567 #ifndef __HAVE_ARCH_PGTABLE_WITHDRAW
568 extern pgtable_t pgtable_trans_huge_withdraw(struct mm_struct *mm, pmd_t *pmdp);
571 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
573 * This is an implementation of pmdp_establish() that is only suitable for an
574 * architecture that doesn't have hardware dirty/accessed bits. In this case we
575 * can't race with CPU which sets these bits and non-atomic approach is fine.
577 static inline pmd_t generic_pmdp_establish(struct vm_area_struct *vma,
578 unsigned long address, pmd_t *pmdp, pmd_t pmd)
580 pmd_t old_pmd = *pmdp;
581 set_pmd_at(vma->vm_mm, address, pmdp, pmd);
586 #ifndef __HAVE_ARCH_PMDP_INVALIDATE
587 extern pmd_t pmdp_invalidate(struct vm_area_struct *vma, unsigned long address,
591 #ifndef __HAVE_ARCH_PMDP_INVALIDATE_AD
594 * pmdp_invalidate_ad() invalidates the PMD while changing a transparent
595 * hugepage mapping in the page tables. This function is similar to
596 * pmdp_invalidate(), but should only be used if the access and dirty bits would
597 * not be cleared by the software in the new PMD value. The function ensures
598 * that hardware changes of the access and dirty bits updates would not be lost.
600 * Doing so can allow in certain architectures to avoid a TLB flush in most
601 * cases. Yet, another TLB flush might be necessary later if the PMD update
602 * itself requires such flush (e.g., if protection was set to be stricter). Yet,
603 * even when a TLB flush is needed because of the update, the caller may be able
604 * to batch these TLB flushing operations, so fewer TLB flush operations are
607 extern pmd_t pmdp_invalidate_ad(struct vm_area_struct *vma,
608 unsigned long address, pmd_t *pmdp);
611 #ifndef __HAVE_ARCH_PTE_SAME
612 static inline int pte_same(pte_t pte_a, pte_t pte_b)
614 return pte_val(pte_a) == pte_val(pte_b);
618 #ifndef __HAVE_ARCH_PTE_UNUSED
620 * Some architectures provide facilities to virtualization guests
621 * so that they can flag allocated pages as unused. This allows the
622 * host to transparently reclaim unused pages. This function returns
623 * whether the pte's page is unused.
625 static inline int pte_unused(pte_t pte)
631 #ifndef pte_access_permitted
632 #define pte_access_permitted(pte, write) \
633 (pte_present(pte) && (!(write) || pte_write(pte)))
636 #ifndef pmd_access_permitted
637 #define pmd_access_permitted(pmd, write) \
638 (pmd_present(pmd) && (!(write) || pmd_write(pmd)))
641 #ifndef pud_access_permitted
642 #define pud_access_permitted(pud, write) \
643 (pud_present(pud) && (!(write) || pud_write(pud)))
646 #ifndef p4d_access_permitted
647 #define p4d_access_permitted(p4d, write) \
648 (p4d_present(p4d) && (!(write) || p4d_write(p4d)))
651 #ifndef pgd_access_permitted
652 #define pgd_access_permitted(pgd, write) \
653 (pgd_present(pgd) && (!(write) || pgd_write(pgd)))
656 #ifndef __HAVE_ARCH_PMD_SAME
657 static inline int pmd_same(pmd_t pmd_a, pmd_t pmd_b)
659 return pmd_val(pmd_a) == pmd_val(pmd_b);
662 static inline int pud_same(pud_t pud_a, pud_t pud_b)
664 return pud_val(pud_a) == pud_val(pud_b);
668 #ifndef __HAVE_ARCH_P4D_SAME
669 static inline int p4d_same(p4d_t p4d_a, p4d_t p4d_b)
671 return p4d_val(p4d_a) == p4d_val(p4d_b);
675 #ifndef __HAVE_ARCH_PGD_SAME
676 static inline int pgd_same(pgd_t pgd_a, pgd_t pgd_b)
678 return pgd_val(pgd_a) == pgd_val(pgd_b);
683 * Use set_p*_safe(), and elide TLB flushing, when confident that *no*
684 * TLB flush will be required as a result of the "set". For example, use
685 * in scenarios where it is known ahead of time that the routine is
686 * setting non-present entries, or re-setting an existing entry to the
687 * same value. Otherwise, use the typical "set" helpers and flush the
690 #define set_pte_safe(ptep, pte) \
692 WARN_ON_ONCE(pte_present(*ptep) && !pte_same(*ptep, pte)); \
693 set_pte(ptep, pte); \
696 #define set_pmd_safe(pmdp, pmd) \
698 WARN_ON_ONCE(pmd_present(*pmdp) && !pmd_same(*pmdp, pmd)); \
699 set_pmd(pmdp, pmd); \
702 #define set_pud_safe(pudp, pud) \
704 WARN_ON_ONCE(pud_present(*pudp) && !pud_same(*pudp, pud)); \
705 set_pud(pudp, pud); \
708 #define set_p4d_safe(p4dp, p4d) \
710 WARN_ON_ONCE(p4d_present(*p4dp) && !p4d_same(*p4dp, p4d)); \
711 set_p4d(p4dp, p4d); \
714 #define set_pgd_safe(pgdp, pgd) \
716 WARN_ON_ONCE(pgd_present(*pgdp) && !pgd_same(*pgdp, pgd)); \
717 set_pgd(pgdp, pgd); \
720 #ifndef __HAVE_ARCH_DO_SWAP_PAGE
722 * Some architectures support metadata associated with a page. When a
723 * page is being swapped out, this metadata must be saved so it can be
724 * restored when the page is swapped back in. SPARC M7 and newer
725 * processors support an ADI (Application Data Integrity) tag for the
726 * page as metadata for the page. arch_do_swap_page() can restore this
727 * metadata when a page is swapped back in.
729 static inline void arch_do_swap_page(struct mm_struct *mm,
730 struct vm_area_struct *vma,
732 pte_t pte, pte_t oldpte)
738 #ifndef __HAVE_ARCH_UNMAP_ONE
740 * Some architectures support metadata associated with a page. When a
741 * page is being swapped out, this metadata must be saved so it can be
742 * restored when the page is swapped back in. SPARC M7 and newer
743 * processors support an ADI (Application Data Integrity) tag for the
744 * page as metadata for the page. arch_unmap_one() can save this
745 * metadata on a swap-out of a page.
747 static inline int arch_unmap_one(struct mm_struct *mm,
748 struct vm_area_struct *vma,
757 * Allow architectures to preserve additional metadata associated with
758 * swapped-out pages. The corresponding __HAVE_ARCH_SWAP_* macros and function
759 * prototypes must be defined in the arch-specific asm/pgtable.h file.
761 #ifndef __HAVE_ARCH_PREPARE_TO_SWAP
762 static inline int arch_prepare_to_swap(struct page *page)
768 #ifndef __HAVE_ARCH_SWAP_INVALIDATE
769 static inline void arch_swap_invalidate_page(int type, pgoff_t offset)
773 static inline void arch_swap_invalidate_area(int type)
778 #ifndef __HAVE_ARCH_SWAP_RESTORE
779 static inline void arch_swap_restore(swp_entry_t entry, struct folio *folio)
784 #ifndef __HAVE_ARCH_PGD_OFFSET_GATE
785 #define pgd_offset_gate(mm, addr) pgd_offset(mm, addr)
788 #ifndef __HAVE_ARCH_MOVE_PTE
789 #define move_pte(pte, prot, old_addr, new_addr) (pte)
792 #ifndef pte_accessible
793 # define pte_accessible(mm, pte) ((void)(pte), 1)
796 #ifndef flush_tlb_fix_spurious_fault
797 #define flush_tlb_fix_spurious_fault(vma, address) flush_tlb_page(vma, address)
801 * When walking page tables, get the address of the next boundary,
802 * or the end address of the range if that comes earlier. Although no
803 * vma end wraps to 0, rounded up __boundary may wrap to 0 throughout.
806 #define pgd_addr_end(addr, end) \
807 ({ unsigned long __boundary = ((addr) + PGDIR_SIZE) & PGDIR_MASK; \
808 (__boundary - 1 < (end) - 1)? __boundary: (end); \
812 #define p4d_addr_end(addr, end) \
813 ({ unsigned long __boundary = ((addr) + P4D_SIZE) & P4D_MASK; \
814 (__boundary - 1 < (end) - 1)? __boundary: (end); \
819 #define pud_addr_end(addr, end) \
820 ({ unsigned long __boundary = ((addr) + PUD_SIZE) & PUD_MASK; \
821 (__boundary - 1 < (end) - 1)? __boundary: (end); \
826 #define pmd_addr_end(addr, end) \
827 ({ unsigned long __boundary = ((addr) + PMD_SIZE) & PMD_MASK; \
828 (__boundary - 1 < (end) - 1)? __boundary: (end); \
833 * When walking page tables, we usually want to skip any p?d_none entries;
834 * and any p?d_bad entries - reporting the error before resetting to none.
835 * Do the tests inline, but report and clear the bad entry in mm/memory.c.
837 void pgd_clear_bad(pgd_t *);
839 #ifndef __PAGETABLE_P4D_FOLDED
840 void p4d_clear_bad(p4d_t *);
842 #define p4d_clear_bad(p4d) do { } while (0)
845 #ifndef __PAGETABLE_PUD_FOLDED
846 void pud_clear_bad(pud_t *);
848 #define pud_clear_bad(p4d) do { } while (0)
851 void pmd_clear_bad(pmd_t *);
853 static inline int pgd_none_or_clear_bad(pgd_t *pgd)
857 if (unlikely(pgd_bad(*pgd))) {
864 static inline int p4d_none_or_clear_bad(p4d_t *p4d)
868 if (unlikely(p4d_bad(*p4d))) {
875 static inline int pud_none_or_clear_bad(pud_t *pud)
879 if (unlikely(pud_bad(*pud))) {
886 static inline int pmd_none_or_clear_bad(pmd_t *pmd)
890 if (unlikely(pmd_bad(*pmd))) {
897 static inline pte_t __ptep_modify_prot_start(struct vm_area_struct *vma,
902 * Get the current pte state, but zero it out to make it
903 * non-present, preventing the hardware from asynchronously
906 return ptep_get_and_clear(vma->vm_mm, addr, ptep);
909 static inline void __ptep_modify_prot_commit(struct vm_area_struct *vma,
911 pte_t *ptep, pte_t pte)
914 * The pte is non-present, so there's no hardware state to
917 set_pte_at(vma->vm_mm, addr, ptep, pte);
920 #ifndef __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION
922 * Start a pte protection read-modify-write transaction, which
923 * protects against asynchronous hardware modifications to the pte.
924 * The intention is not to prevent the hardware from making pte
925 * updates, but to prevent any updates it may make from being lost.
927 * This does not protect against other software modifications of the
928 * pte; the appropriate pte lock must be held over the transaction.
930 * Note that this interface is intended to be batchable, meaning that
931 * ptep_modify_prot_commit may not actually update the pte, but merely
932 * queue the update to be done at some later time. The update must be
933 * actually committed before the pte lock is released, however.
935 static inline pte_t ptep_modify_prot_start(struct vm_area_struct *vma,
939 return __ptep_modify_prot_start(vma, addr, ptep);
943 * Commit an update to a pte, leaving any hardware-controlled bits in
944 * the PTE unmodified.
946 static inline void ptep_modify_prot_commit(struct vm_area_struct *vma,
948 pte_t *ptep, pte_t old_pte, pte_t pte)
950 __ptep_modify_prot_commit(vma, addr, ptep, pte);
952 #endif /* __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION */
953 #endif /* CONFIG_MMU */
956 * No-op macros that just return the current protection value. Defined here
957 * because these macros can be used even if CONFIG_MMU is not defined.
961 #define pgprot_nx(prot) (prot)
964 #ifndef pgprot_noncached
965 #define pgprot_noncached(prot) (prot)
968 #ifndef pgprot_writecombine
969 #define pgprot_writecombine pgprot_noncached
972 #ifndef pgprot_writethrough
973 #define pgprot_writethrough pgprot_noncached
976 #ifndef pgprot_device
977 #define pgprot_device pgprot_noncached
981 #define pgprot_mhp(prot) (prot)
985 #ifndef pgprot_modify
986 #define pgprot_modify pgprot_modify
987 static inline pgprot_t pgprot_modify(pgprot_t oldprot, pgprot_t newprot)
989 if (pgprot_val(oldprot) == pgprot_val(pgprot_noncached(oldprot)))
990 newprot = pgprot_noncached(newprot);
991 if (pgprot_val(oldprot) == pgprot_val(pgprot_writecombine(oldprot)))
992 newprot = pgprot_writecombine(newprot);
993 if (pgprot_val(oldprot) == pgprot_val(pgprot_device(oldprot)))
994 newprot = pgprot_device(newprot);
998 #endif /* CONFIG_MMU */
1000 #ifndef pgprot_encrypted
1001 #define pgprot_encrypted(prot) (prot)
1004 #ifndef pgprot_decrypted
1005 #define pgprot_decrypted(prot) (prot)
1009 * A facility to provide lazy MMU batching. This allows PTE updates and
1010 * page invalidations to be delayed until a call to leave lazy MMU mode
1011 * is issued. Some architectures may benefit from doing this, and it is
1012 * beneficial for both shadow and direct mode hypervisors, which may batch
1013 * the PTE updates which happen during this window. Note that using this
1014 * interface requires that read hazards be removed from the code. A read
1015 * hazard could result in the direct mode hypervisor case, since the actual
1016 * write to the page tables may not yet have taken place, so reads though
1017 * a raw PTE pointer after it has been modified are not guaranteed to be
1018 * up to date. This mode can only be entered and left under the protection of
1019 * the page table locks for all page tables which may be modified. In the UP
1020 * case, this is required so that preemption is disabled, and in the SMP case,
1021 * it must synchronize the delayed page table writes properly on other CPUs.
1023 #ifndef __HAVE_ARCH_ENTER_LAZY_MMU_MODE
1024 #define arch_enter_lazy_mmu_mode() do {} while (0)
1025 #define arch_leave_lazy_mmu_mode() do {} while (0)
1026 #define arch_flush_lazy_mmu_mode() do {} while (0)
1030 * A facility to provide batching of the reload of page tables and
1031 * other process state with the actual context switch code for
1032 * paravirtualized guests. By convention, only one of the batched
1033 * update (lazy) modes (CPU, MMU) should be active at any given time,
1034 * entry should never be nested, and entry and exits should always be
1035 * paired. This is for sanity of maintaining and reasoning about the
1036 * kernel code. In this case, the exit (end of the context switch) is
1037 * in architecture-specific code, and so doesn't need a generic
1040 #ifndef __HAVE_ARCH_START_CONTEXT_SWITCH
1041 #define arch_start_context_switch(prev) do {} while (0)
1045 * When replacing an anonymous page by a real (!non) swap entry, we clear
1046 * PG_anon_exclusive from the page and instead remember whether the flag was
1047 * set in the swp pte. During fork(), we have to mark the entry as !exclusive
1048 * (possibly shared). On swapin, we use that information to restore
1049 * PG_anon_exclusive, which is very helpful in cases where we might have
1050 * additional (e.g., FOLL_GET) references on a page and wouldn't be able to
1051 * detect exclusivity.
1053 * These functions don't apply to non-swap entries (e.g., migration, hwpoison,
1056 #ifndef __HAVE_ARCH_PTE_SWP_EXCLUSIVE
1057 static inline pte_t pte_swp_mkexclusive(pte_t pte)
1062 static inline int pte_swp_exclusive(pte_t pte)
1067 static inline pte_t pte_swp_clear_exclusive(pte_t pte)
1073 #ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY
1074 #ifndef CONFIG_ARCH_ENABLE_THP_MIGRATION
1075 static inline pmd_t pmd_swp_mksoft_dirty(pmd_t pmd)
1080 static inline int pmd_swp_soft_dirty(pmd_t pmd)
1085 static inline pmd_t pmd_swp_clear_soft_dirty(pmd_t pmd)
1090 #else /* !CONFIG_HAVE_ARCH_SOFT_DIRTY */
1091 static inline int pte_soft_dirty(pte_t pte)
1096 static inline int pmd_soft_dirty(pmd_t pmd)
1101 static inline pte_t pte_mksoft_dirty(pte_t pte)
1106 static inline pmd_t pmd_mksoft_dirty(pmd_t pmd)
1111 static inline pte_t pte_clear_soft_dirty(pte_t pte)
1116 static inline pmd_t pmd_clear_soft_dirty(pmd_t pmd)
1121 static inline pte_t pte_swp_mksoft_dirty(pte_t pte)
1126 static inline int pte_swp_soft_dirty(pte_t pte)
1131 static inline pte_t pte_swp_clear_soft_dirty(pte_t pte)
1136 static inline pmd_t pmd_swp_mksoft_dirty(pmd_t pmd)
1141 static inline int pmd_swp_soft_dirty(pmd_t pmd)
1146 static inline pmd_t pmd_swp_clear_soft_dirty(pmd_t pmd)
1152 #ifndef __HAVE_PFNMAP_TRACKING
1154 * Interfaces that can be used by architecture code to keep track of
1155 * memory type of pfn mappings specified by the remap_pfn_range,
1160 * track_pfn_remap is called when a _new_ pfn mapping is being established
1161 * by remap_pfn_range() for physical range indicated by pfn and size.
1163 static inline int track_pfn_remap(struct vm_area_struct *vma, pgprot_t *prot,
1164 unsigned long pfn, unsigned long addr,
1171 * track_pfn_insert is called when a _new_ single pfn is established
1172 * by vmf_insert_pfn().
1174 static inline void track_pfn_insert(struct vm_area_struct *vma, pgprot_t *prot,
1180 * track_pfn_copy is called when vma that is covering the pfnmap gets
1181 * copied through copy_page_range().
1183 static inline int track_pfn_copy(struct vm_area_struct *vma)
1189 * untrack_pfn is called while unmapping a pfnmap for a region.
1190 * untrack can be called for a specific region indicated by pfn and size or
1191 * can be for the entire vma (in which case pfn, size are zero).
1193 static inline void untrack_pfn(struct vm_area_struct *vma,
1194 unsigned long pfn, unsigned long size)
1199 * untrack_pfn_moved is called while mremapping a pfnmap for a new region.
1201 static inline void untrack_pfn_moved(struct vm_area_struct *vma)
1205 extern int track_pfn_remap(struct vm_area_struct *vma, pgprot_t *prot,
1206 unsigned long pfn, unsigned long addr,
1207 unsigned long size);
1208 extern void track_pfn_insert(struct vm_area_struct *vma, pgprot_t *prot,
1210 extern int track_pfn_copy(struct vm_area_struct *vma);
1211 extern void untrack_pfn(struct vm_area_struct *vma, unsigned long pfn,
1212 unsigned long size);
1213 extern void untrack_pfn_moved(struct vm_area_struct *vma);
1217 #ifdef __HAVE_COLOR_ZERO_PAGE
1218 static inline int is_zero_pfn(unsigned long pfn)
1220 extern unsigned long zero_pfn;
1221 unsigned long offset_from_zero_pfn = pfn - zero_pfn;
1222 return offset_from_zero_pfn <= (zero_page_mask >> PAGE_SHIFT);
1225 #define my_zero_pfn(addr) page_to_pfn(ZERO_PAGE(addr))
1228 static inline int is_zero_pfn(unsigned long pfn)
1230 extern unsigned long zero_pfn;
1231 return pfn == zero_pfn;
1234 static inline unsigned long my_zero_pfn(unsigned long addr)
1236 extern unsigned long zero_pfn;
1241 static inline int is_zero_pfn(unsigned long pfn)
1246 static inline unsigned long my_zero_pfn(unsigned long addr)
1250 #endif /* CONFIG_MMU */
1254 #ifndef CONFIG_TRANSPARENT_HUGEPAGE
1255 static inline int pmd_trans_huge(pmd_t pmd)
1260 static inline int pmd_write(pmd_t pmd)
1265 #endif /* pmd_write */
1266 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
1269 static inline int pud_write(pud_t pud)
1274 #endif /* pud_write */
1276 #if !defined(CONFIG_ARCH_HAS_PTE_DEVMAP) || !defined(CONFIG_TRANSPARENT_HUGEPAGE)
1277 static inline int pmd_devmap(pmd_t pmd)
1281 static inline int pud_devmap(pud_t pud)
1285 static inline int pgd_devmap(pgd_t pgd)
1291 #if !defined(CONFIG_TRANSPARENT_HUGEPAGE) || \
1292 !defined(CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD)
1293 static inline int pud_trans_huge(pud_t pud)
1299 /* See pmd_none_or_trans_huge_or_clear_bad for discussion. */
1300 static inline int pud_none_or_trans_huge_or_dev_or_clear_bad(pud_t *pud)
1302 pud_t pudval = READ_ONCE(*pud);
1304 if (pud_none(pudval) || pud_trans_huge(pudval) || pud_devmap(pudval))
1306 if (unlikely(pud_bad(pudval))) {
1313 /* See pmd_trans_unstable for discussion. */
1314 static inline int pud_trans_unstable(pud_t *pud)
1316 #if defined(CONFIG_TRANSPARENT_HUGEPAGE) && \
1317 defined(CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD)
1318 return pud_none_or_trans_huge_or_dev_or_clear_bad(pud);
1324 #ifndef pmd_read_atomic
1325 static inline pmd_t pmd_read_atomic(pmd_t *pmdp)
1328 * Depend on compiler for an atomic pmd read. NOTE: this is
1329 * only going to work, if the pmdval_t isn't larger than
1336 #ifndef arch_needs_pgtable_deposit
1337 #define arch_needs_pgtable_deposit() (false)
1340 * This function is meant to be used by sites walking pagetables with
1341 * the mmap_lock held in read mode to protect against MADV_DONTNEED and
1342 * transhuge page faults. MADV_DONTNEED can convert a transhuge pmd
1343 * into a null pmd and the transhuge page fault can convert a null pmd
1344 * into an hugepmd or into a regular pmd (if the hugepage allocation
1345 * fails). While holding the mmap_lock in read mode the pmd becomes
1346 * stable and stops changing under us only if it's not null and not a
1347 * transhuge pmd. When those races occurs and this function makes a
1348 * difference vs the standard pmd_none_or_clear_bad, the result is
1349 * undefined so behaving like if the pmd was none is safe (because it
1350 * can return none anyway). The compiler level barrier() is critically
1351 * important to compute the two checks atomically on the same pmdval.
1353 * For 32bit kernels with a 64bit large pmd_t this automatically takes
1354 * care of reading the pmd atomically to avoid SMP race conditions
1355 * against pmd_populate() when the mmap_lock is hold for reading by the
1356 * caller (a special atomic read not done by "gcc" as in the generic
1357 * version above, is also needed when THP is disabled because the page
1358 * fault can populate the pmd from under us).
1360 static inline int pmd_none_or_trans_huge_or_clear_bad(pmd_t *pmd)
1362 pmd_t pmdval = pmd_read_atomic(pmd);
1364 * The barrier will stabilize the pmdval in a register or on
1365 * the stack so that it will stop changing under the code.
1367 * When CONFIG_TRANSPARENT_HUGEPAGE=y on x86 32bit PAE,
1368 * pmd_read_atomic is allowed to return a not atomic pmdval
1369 * (for example pointing to an hugepage that has never been
1370 * mapped in the pmd). The below checks will only care about
1371 * the low part of the pmd with 32bit PAE x86 anyway, with the
1372 * exception of pmd_none(). So the important thing is that if
1373 * the low part of the pmd is found null, the high part will
1374 * be also null or the pmd_none() check below would be
1377 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
1381 * !pmd_present() checks for pmd migration entries
1383 * The complete check uses is_pmd_migration_entry() in linux/swapops.h
1384 * But using that requires moving current function and pmd_trans_unstable()
1385 * to linux/swapops.h to resolve dependency, which is too much code move.
1387 * !pmd_present() is equivalent to is_pmd_migration_entry() currently,
1388 * because !pmd_present() pages can only be under migration not swapped
1391 * pmd_none() is preserved for future condition checks on pmd migration
1392 * entries and not confusing with this function name, although it is
1393 * redundant with !pmd_present().
1395 if (pmd_none(pmdval) || pmd_trans_huge(pmdval) ||
1396 (IS_ENABLED(CONFIG_ARCH_ENABLE_THP_MIGRATION) && !pmd_present(pmdval)))
1398 if (unlikely(pmd_bad(pmdval))) {
1406 * This is a noop if Transparent Hugepage Support is not built into
1407 * the kernel. Otherwise it is equivalent to
1408 * pmd_none_or_trans_huge_or_clear_bad(), and shall only be called in
1409 * places that already verified the pmd is not none and they want to
1410 * walk ptes while holding the mmap sem in read mode (write mode don't
1411 * need this). If THP is not enabled, the pmd can't go away under the
1412 * code even if MADV_DONTNEED runs, but if THP is enabled we need to
1413 * run a pmd_trans_unstable before walking the ptes after
1414 * split_huge_pmd returns (because it may have run when the pmd become
1415 * null, but then a page fault can map in a THP and not a regular page).
1417 static inline int pmd_trans_unstable(pmd_t *pmd)
1419 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
1420 return pmd_none_or_trans_huge_or_clear_bad(pmd);
1427 * the ordering of these checks is important for pmds with _page_devmap set.
1428 * if we check pmd_trans_unstable() first we will trip the bad_pmd() check
1429 * inside of pmd_none_or_trans_huge_or_clear_bad(). this will end up correctly
1430 * returning 1 but not before it spams dmesg with the pmd_clear_bad() output.
1432 static inline int pmd_devmap_trans_unstable(pmd_t *pmd)
1434 return pmd_devmap(*pmd) || pmd_trans_unstable(pmd);
1437 #ifndef CONFIG_NUMA_BALANCING
1439 * Technically a PTE can be PROTNONE even when not doing NUMA balancing but
1440 * the only case the kernel cares is for NUMA balancing and is only ever set
1441 * when the VMA is accessible. For PROT_NONE VMAs, the PTEs are not marked
1442 * _PAGE_PROTNONE so by default, implement the helper as "always no". It
1443 * is the responsibility of the caller to distinguish between PROT_NONE
1444 * protections and NUMA hinting fault protections.
1446 static inline int pte_protnone(pte_t pte)
1451 static inline int pmd_protnone(pmd_t pmd)
1455 #endif /* CONFIG_NUMA_BALANCING */
1457 #endif /* CONFIG_MMU */
1459 #ifdef CONFIG_HAVE_ARCH_HUGE_VMAP
1461 #ifndef __PAGETABLE_P4D_FOLDED
1462 int p4d_set_huge(p4d_t *p4d, phys_addr_t addr, pgprot_t prot);
1463 void p4d_clear_huge(p4d_t *p4d);
1465 static inline int p4d_set_huge(p4d_t *p4d, phys_addr_t addr, pgprot_t prot)
1469 static inline void p4d_clear_huge(p4d_t *p4d) { }
1470 #endif /* !__PAGETABLE_P4D_FOLDED */
1472 int pud_set_huge(pud_t *pud, phys_addr_t addr, pgprot_t prot);
1473 int pmd_set_huge(pmd_t *pmd, phys_addr_t addr, pgprot_t prot);
1474 int pud_clear_huge(pud_t *pud);
1475 int pmd_clear_huge(pmd_t *pmd);
1476 int p4d_free_pud_page(p4d_t *p4d, unsigned long addr);
1477 int pud_free_pmd_page(pud_t *pud, unsigned long addr);
1478 int pmd_free_pte_page(pmd_t *pmd, unsigned long addr);
1479 #else /* !CONFIG_HAVE_ARCH_HUGE_VMAP */
1480 static inline int p4d_set_huge(p4d_t *p4d, phys_addr_t addr, pgprot_t prot)
1484 static inline int pud_set_huge(pud_t *pud, phys_addr_t addr, pgprot_t prot)
1488 static inline int pmd_set_huge(pmd_t *pmd, phys_addr_t addr, pgprot_t prot)
1492 static inline void p4d_clear_huge(p4d_t *p4d) { }
1493 static inline int pud_clear_huge(pud_t *pud)
1497 static inline int pmd_clear_huge(pmd_t *pmd)
1501 static inline int p4d_free_pud_page(p4d_t *p4d, unsigned long addr)
1505 static inline int pud_free_pmd_page(pud_t *pud, unsigned long addr)
1509 static inline int pmd_free_pte_page(pmd_t *pmd, unsigned long addr)
1513 #endif /* CONFIG_HAVE_ARCH_HUGE_VMAP */
1515 #ifndef __HAVE_ARCH_FLUSH_PMD_TLB_RANGE
1516 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
1518 * ARCHes with special requirements for evicting THP backing TLB entries can
1519 * implement this. Otherwise also, it can help optimize normal TLB flush in
1520 * THP regime. Stock flush_tlb_range() typically has optimization to nuke the
1521 * entire TLB if flush span is greater than a threshold, which will
1522 * likely be true for a single huge page. Thus a single THP flush will
1523 * invalidate the entire TLB which is not desirable.
1524 * e.g. see arch/arc: flush_pmd_tlb_range
1526 #define flush_pmd_tlb_range(vma, addr, end) flush_tlb_range(vma, addr, end)
1527 #define flush_pud_tlb_range(vma, addr, end) flush_tlb_range(vma, addr, end)
1529 #define flush_pmd_tlb_range(vma, addr, end) BUILD_BUG()
1530 #define flush_pud_tlb_range(vma, addr, end) BUILD_BUG()
1535 int phys_mem_access_prot_allowed(struct file *file, unsigned long pfn,
1536 unsigned long size, pgprot_t *vma_prot);
1538 #ifndef CONFIG_X86_ESPFIX64
1539 static inline void init_espfix_bsp(void) { }
1542 extern void __init pgtable_cache_init(void);
1544 #ifndef __HAVE_ARCH_PFN_MODIFY_ALLOWED
1545 static inline bool pfn_modify_allowed(unsigned long pfn, pgprot_t prot)
1550 static inline bool arch_has_pfn_modify_check(void)
1554 #endif /* !_HAVE_ARCH_PFN_MODIFY_ALLOWED */
1557 * Architecture PAGE_KERNEL_* fallbacks
1559 * Some architectures don't define certain PAGE_KERNEL_* flags. This is either
1560 * because they really don't support them, or the port needs to be updated to
1561 * reflect the required functionality. Below are a set of relatively safe
1562 * fallbacks, as best effort, which we can count on in lieu of the architectures
1563 * not defining them on their own yet.
1566 #ifndef PAGE_KERNEL_RO
1567 # define PAGE_KERNEL_RO PAGE_KERNEL
1570 #ifndef PAGE_KERNEL_EXEC
1571 # define PAGE_KERNEL_EXEC PAGE_KERNEL
1575 * Page Table Modification bits for pgtbl_mod_mask.
1577 * These are used by the p?d_alloc_track*() set of functions an in the generic
1578 * vmalloc/ioremap code to track at which page-table levels entries have been
1579 * modified. Based on that the code can better decide when vmalloc and ioremap
1580 * mapping changes need to be synchronized to other page-tables in the system.
1582 #define __PGTBL_PGD_MODIFIED 0
1583 #define __PGTBL_P4D_MODIFIED 1
1584 #define __PGTBL_PUD_MODIFIED 2
1585 #define __PGTBL_PMD_MODIFIED 3
1586 #define __PGTBL_PTE_MODIFIED 4
1588 #define PGTBL_PGD_MODIFIED BIT(__PGTBL_PGD_MODIFIED)
1589 #define PGTBL_P4D_MODIFIED BIT(__PGTBL_P4D_MODIFIED)
1590 #define PGTBL_PUD_MODIFIED BIT(__PGTBL_PUD_MODIFIED)
1591 #define PGTBL_PMD_MODIFIED BIT(__PGTBL_PMD_MODIFIED)
1592 #define PGTBL_PTE_MODIFIED BIT(__PGTBL_PTE_MODIFIED)
1594 /* Page-Table Modification Mask */
1595 typedef unsigned int pgtbl_mod_mask;
1597 #endif /* !__ASSEMBLY__ */
1599 #if !defined(MAX_POSSIBLE_PHYSMEM_BITS) && !defined(CONFIG_64BIT)
1600 #ifdef CONFIG_PHYS_ADDR_T_64BIT
1602 * ZSMALLOC needs to know the highest PFN on 32-bit architectures
1603 * with physical address space extension, but falls back to
1604 * BITS_PER_LONG otherwise.
1606 #error Missing MAX_POSSIBLE_PHYSMEM_BITS definition
1608 #define MAX_POSSIBLE_PHYSMEM_BITS 32
1612 #ifndef has_transparent_hugepage
1613 #define has_transparent_hugepage() IS_BUILTIN(CONFIG_TRANSPARENT_HUGEPAGE)
1617 * On some architectures it depends on the mm if the p4d/pud or pmd
1618 * layer of the page table hierarchy is folded or not.
1620 #ifndef mm_p4d_folded
1621 #define mm_p4d_folded(mm) __is_defined(__PAGETABLE_P4D_FOLDED)
1624 #ifndef mm_pud_folded
1625 #define mm_pud_folded(mm) __is_defined(__PAGETABLE_PUD_FOLDED)
1628 #ifndef mm_pmd_folded
1629 #define mm_pmd_folded(mm) __is_defined(__PAGETABLE_PMD_FOLDED)
1632 #ifndef p4d_offset_lockless
1633 #define p4d_offset_lockless(pgdp, pgd, address) p4d_offset(&(pgd), address)
1635 #ifndef pud_offset_lockless
1636 #define pud_offset_lockless(p4dp, p4d, address) pud_offset(&(p4d), address)
1638 #ifndef pmd_offset_lockless
1639 #define pmd_offset_lockless(pudp, pud, address) pmd_offset(&(pud), address)
1643 * p?d_leaf() - true if this entry is a final mapping to a physical address.
1644 * This differs from p?d_huge() by the fact that they are always available (if
1645 * the architecture supports large pages at the appropriate level) even
1646 * if CONFIG_HUGETLB_PAGE is not defined.
1647 * Only meaningful when called on a valid entry.
1650 #define pgd_leaf(x) 0
1653 #define p4d_leaf(x) 0
1656 #define pud_leaf(x) 0
1659 #define pmd_leaf(x) 0
1662 #ifndef pgd_leaf_size
1663 #define pgd_leaf_size(x) (1ULL << PGDIR_SHIFT)
1665 #ifndef p4d_leaf_size
1666 #define p4d_leaf_size(x) P4D_SIZE
1668 #ifndef pud_leaf_size
1669 #define pud_leaf_size(x) PUD_SIZE
1671 #ifndef pmd_leaf_size
1672 #define pmd_leaf_size(x) PMD_SIZE
1674 #ifndef pte_leaf_size
1675 #define pte_leaf_size(x) PAGE_SIZE
1679 * Some architectures have MMUs that are configurable or selectable at boot
1680 * time. These lead to variable PTRS_PER_x. For statically allocated arrays it
1681 * helps to have a static maximum value.
1684 #ifndef MAX_PTRS_PER_PTE
1685 #define MAX_PTRS_PER_PTE PTRS_PER_PTE
1688 #ifndef MAX_PTRS_PER_PMD
1689 #define MAX_PTRS_PER_PMD PTRS_PER_PMD
1692 #ifndef MAX_PTRS_PER_PUD
1693 #define MAX_PTRS_PER_PUD PTRS_PER_PUD
1696 #ifndef MAX_PTRS_PER_P4D
1697 #define MAX_PTRS_PER_P4D PTRS_PER_P4D
1700 /* description of effects of mapping type and prot in current implementation.
1701 * this is due to the limited x86 page protection hardware. The expected
1702 * behavior is in parens:
1705 * PROT_NONE PROT_READ PROT_WRITE PROT_EXEC
1706 * MAP_SHARED r: (no) no r: (yes) yes r: (no) yes r: (no) yes
1707 * w: (no) no w: (no) no w: (yes) yes w: (no) no
1708 * x: (no) no x: (no) yes x: (no) yes x: (yes) yes
1710 * MAP_PRIVATE r: (no) no r: (yes) yes r: (no) yes r: (no) yes
1711 * w: (no) no w: (no) no w: (copy) copy w: (no) no
1712 * x: (no) no x: (no) yes x: (no) yes x: (yes) yes
1714 * On arm64, PROT_EXEC has the following behaviour for both MAP_SHARED and
1715 * MAP_PRIVATE (with Enhanced PAN supported):
1720 #define DECLARE_VM_GET_PAGE_PROT \
1721 pgprot_t vm_get_page_prot(unsigned long vm_flags) \
1723 return protection_map[vm_flags & \
1724 (VM_READ | VM_WRITE | VM_EXEC | VM_SHARED)]; \
1726 EXPORT_SYMBOL(vm_get_page_prot);
1728 #endif /* _LINUX_PGTABLE_H */