1 #ifndef _LINUX_DMA_MAPPING_H
2 #define _LINUX_DMA_MAPPING_H
4 #include <linux/string.h>
5 #include <linux/device.h>
7 #include <linux/dma-attrs.h>
8 #include <linux/dma-direction.h>
9 #include <linux/scatterlist.h>
12 * A dma_addr_t can hold any valid DMA or bus address for the platform.
13 * It can be given to a device to use as a DMA source or target. A CPU cannot
14 * reference a dma_addr_t directly because there may be translation between
15 * its physical address space and the bus address space.
18 void* (*alloc)(struct device *dev, size_t size,
19 dma_addr_t *dma_handle, gfp_t gfp,
20 struct dma_attrs *attrs);
21 void (*free)(struct device *dev, size_t size,
22 void *vaddr, dma_addr_t dma_handle,
23 struct dma_attrs *attrs);
24 int (*mmap)(struct device *, struct vm_area_struct *,
25 void *, dma_addr_t, size_t, struct dma_attrs *attrs);
27 int (*get_sgtable)(struct device *dev, struct sg_table *sgt, void *,
28 dma_addr_t, size_t, struct dma_attrs *attrs);
30 dma_addr_t (*map_page)(struct device *dev, struct page *page,
31 unsigned long offset, size_t size,
32 enum dma_data_direction dir,
33 struct dma_attrs *attrs);
34 void (*unmap_page)(struct device *dev, dma_addr_t dma_handle,
35 size_t size, enum dma_data_direction dir,
36 struct dma_attrs *attrs);
37 int (*map_sg)(struct device *dev, struct scatterlist *sg,
38 int nents, enum dma_data_direction dir,
39 struct dma_attrs *attrs);
40 void (*unmap_sg)(struct device *dev,
41 struct scatterlist *sg, int nents,
42 enum dma_data_direction dir,
43 struct dma_attrs *attrs);
44 void (*sync_single_for_cpu)(struct device *dev,
45 dma_addr_t dma_handle, size_t size,
46 enum dma_data_direction dir);
47 void (*sync_single_for_device)(struct device *dev,
48 dma_addr_t dma_handle, size_t size,
49 enum dma_data_direction dir);
50 void (*sync_sg_for_cpu)(struct device *dev,
51 struct scatterlist *sg, int nents,
52 enum dma_data_direction dir);
53 void (*sync_sg_for_device)(struct device *dev,
54 struct scatterlist *sg, int nents,
55 enum dma_data_direction dir);
56 int (*mapping_error)(struct device *dev, dma_addr_t dma_addr);
57 int (*dma_supported)(struct device *dev, u64 mask);
58 int (*set_dma_mask)(struct device *dev, u64 mask);
59 #ifdef ARCH_HAS_DMA_GET_REQUIRED_MASK
60 u64 (*get_required_mask)(struct device *dev);
65 #define DMA_BIT_MASK(n) (((n) == 64) ? ~0ULL : ((1ULL<<(n))-1))
67 #define DMA_MASK_NONE 0x0ULL
69 static inline int valid_dma_direction(int dma_direction)
71 return ((dma_direction == DMA_BIDIRECTIONAL) ||
72 (dma_direction == DMA_TO_DEVICE) ||
73 (dma_direction == DMA_FROM_DEVICE));
76 static inline int is_device_dma_capable(struct device *dev)
78 return dev->dma_mask != NULL && *dev->dma_mask != DMA_MASK_NONE;
82 #include <asm/dma-mapping.h>
84 #include <asm-generic/dma-mapping-broken.h>
87 static inline u64 dma_get_mask(struct device *dev)
89 if (dev && dev->dma_mask && *dev->dma_mask)
90 return *dev->dma_mask;
91 return DMA_BIT_MASK(32);
94 #ifdef CONFIG_ARCH_HAS_DMA_SET_COHERENT_MASK
95 int dma_set_coherent_mask(struct device *dev, u64 mask);
97 static inline int dma_set_coherent_mask(struct device *dev, u64 mask)
99 if (!dma_supported(dev, mask))
101 dev->coherent_dma_mask = mask;
107 * Set both the DMA mask and the coherent DMA mask to the same thing.
108 * Note that we don't check the return value from dma_set_coherent_mask()
109 * as the DMA API guarantees that the coherent DMA mask can be set to
110 * the same or smaller than the streaming DMA mask.
112 static inline int dma_set_mask_and_coherent(struct device *dev, u64 mask)
114 int rc = dma_set_mask(dev, mask);
116 dma_set_coherent_mask(dev, mask);
121 * Similar to the above, except it deals with the case where the device
122 * does not have dev->dma_mask appropriately setup.
124 static inline int dma_coerce_mask_and_coherent(struct device *dev, u64 mask)
126 dev->dma_mask = &dev->coherent_dma_mask;
127 return dma_set_mask_and_coherent(dev, mask);
130 extern u64 dma_get_required_mask(struct device *dev);
132 static inline unsigned int dma_get_max_seg_size(struct device *dev)
134 return dev->dma_parms ? dev->dma_parms->max_segment_size : 65536;
137 static inline unsigned int dma_set_max_seg_size(struct device *dev,
140 if (dev->dma_parms) {
141 dev->dma_parms->max_segment_size = size;
147 static inline unsigned long dma_get_seg_boundary(struct device *dev)
149 return dev->dma_parms ?
150 dev->dma_parms->segment_boundary_mask : 0xffffffff;
153 static inline int dma_set_seg_boundary(struct device *dev, unsigned long mask)
155 if (dev->dma_parms) {
156 dev->dma_parms->segment_boundary_mask = mask;
163 static inline unsigned long dma_max_pfn(struct device *dev)
165 return *dev->dma_mask >> PAGE_SHIFT;
169 static inline void *dma_zalloc_coherent(struct device *dev, size_t size,
170 dma_addr_t *dma_handle, gfp_t flag)
172 void *ret = dma_alloc_coherent(dev, size, dma_handle,
177 #ifdef CONFIG_HAS_DMA
178 static inline int dma_get_cache_alignment(void)
180 #ifdef ARCH_DMA_MINALIGN
181 return ARCH_DMA_MINALIGN;
187 /* flags for the coherent memory api */
188 #define DMA_MEMORY_MAP 0x01
189 #define DMA_MEMORY_IO 0x02
190 #define DMA_MEMORY_INCLUDES_CHILDREN 0x04
191 #define DMA_MEMORY_EXCLUSIVE 0x08
193 #ifndef ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY
195 dma_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr,
196 dma_addr_t device_addr, size_t size, int flags)
202 dma_release_declared_memory(struct device *dev)
207 dma_mark_declared_memory_occupied(struct device *dev,
208 dma_addr_t device_addr, size_t size)
210 return ERR_PTR(-EBUSY);
217 extern void *dmam_alloc_coherent(struct device *dev, size_t size,
218 dma_addr_t *dma_handle, gfp_t gfp);
219 extern void dmam_free_coherent(struct device *dev, size_t size, void *vaddr,
220 dma_addr_t dma_handle);
221 extern void *dmam_alloc_noncoherent(struct device *dev, size_t size,
222 dma_addr_t *dma_handle, gfp_t gfp);
223 extern void dmam_free_noncoherent(struct device *dev, size_t size, void *vaddr,
224 dma_addr_t dma_handle);
225 #ifdef ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY
226 extern int dmam_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr,
227 dma_addr_t device_addr, size_t size,
229 extern void dmam_release_declared_memory(struct device *dev);
230 #else /* ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY */
231 static inline int dmam_declare_coherent_memory(struct device *dev,
232 dma_addr_t bus_addr, dma_addr_t device_addr,
233 size_t size, gfp_t gfp)
238 static inline void dmam_release_declared_memory(struct device *dev)
241 #endif /* ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY */
243 #ifndef CONFIG_HAVE_DMA_ATTRS
246 #define dma_map_single_attrs(dev, cpu_addr, size, dir, attrs) \
247 dma_map_single(dev, cpu_addr, size, dir)
249 #define dma_unmap_single_attrs(dev, dma_addr, size, dir, attrs) \
250 dma_unmap_single(dev, dma_addr, size, dir)
252 #define dma_map_sg_attrs(dev, sgl, nents, dir, attrs) \
253 dma_map_sg(dev, sgl, nents, dir)
255 #define dma_unmap_sg_attrs(dev, sgl, nents, dir, attrs) \
256 dma_unmap_sg(dev, sgl, nents, dir)
258 #endif /* CONFIG_HAVE_DMA_ATTRS */
260 #ifdef CONFIG_NEED_DMA_MAP_STATE
261 #define DEFINE_DMA_UNMAP_ADDR(ADDR_NAME) dma_addr_t ADDR_NAME
262 #define DEFINE_DMA_UNMAP_LEN(LEN_NAME) __u32 LEN_NAME
263 #define dma_unmap_addr(PTR, ADDR_NAME) ((PTR)->ADDR_NAME)
264 #define dma_unmap_addr_set(PTR, ADDR_NAME, VAL) (((PTR)->ADDR_NAME) = (VAL))
265 #define dma_unmap_len(PTR, LEN_NAME) ((PTR)->LEN_NAME)
266 #define dma_unmap_len_set(PTR, LEN_NAME, VAL) (((PTR)->LEN_NAME) = (VAL))
268 #define DEFINE_DMA_UNMAP_ADDR(ADDR_NAME)
269 #define DEFINE_DMA_UNMAP_LEN(LEN_NAME)
270 #define dma_unmap_addr(PTR, ADDR_NAME) (0)
271 #define dma_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0)
272 #define dma_unmap_len(PTR, LEN_NAME) (0)
273 #define dma_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0)