1 #ifndef _ASM_GENERIC_PGTABLE_H
2 #define _ASM_GENERIC_PGTABLE_H
7 #include <linux/mm_types.h>
11 * On almost all architectures and configurations, 0 can be used as the
12 * upper ceiling to free_pgtables(): on many architectures it has the same
13 * effect as using TASK_SIZE. However, there is one configuration which
14 * must impose a more careful limit, to avoid freeing kernel pgtables.
16 #ifndef USER_PGTABLES_CEILING
17 #define USER_PGTABLES_CEILING 0UL
20 #ifndef __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
21 extern int ptep_set_access_flags(struct vm_area_struct *vma,
22 unsigned long address, pte_t *ptep,
23 pte_t entry, int dirty);
26 #ifndef __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS
27 extern int pmdp_set_access_flags(struct vm_area_struct *vma,
28 unsigned long address, pmd_t *pmdp,
29 pmd_t entry, int dirty);
32 #ifndef __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
33 static inline int ptep_test_and_clear_young(struct vm_area_struct *vma,
34 unsigned long address,
42 set_pte_at(vma->vm_mm, address, ptep, pte_mkold(pte));
47 #ifndef __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG
48 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
49 static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma,
50 unsigned long address,
58 set_pmd_at(vma->vm_mm, address, pmdp, pmd_mkold(pmd));
61 #else /* CONFIG_TRANSPARENT_HUGEPAGE */
62 static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma,
63 unsigned long address,
69 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
72 #ifndef __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
73 int ptep_clear_flush_young(struct vm_area_struct *vma,
74 unsigned long address, pte_t *ptep);
77 #ifndef __HAVE_ARCH_PMDP_CLEAR_YOUNG_FLUSH
78 int pmdp_clear_flush_young(struct vm_area_struct *vma,
79 unsigned long address, pmd_t *pmdp);
82 #ifndef __HAVE_ARCH_PTEP_GET_AND_CLEAR
83 static inline pte_t ptep_get_and_clear(struct mm_struct *mm,
84 unsigned long address,
88 pte_clear(mm, address, ptep);
93 #ifndef __HAVE_ARCH_PMDP_GET_AND_CLEAR
94 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
95 static inline pmd_t pmdp_get_and_clear(struct mm_struct *mm,
96 unsigned long address,
103 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
106 #ifndef __HAVE_ARCH_PMDP_GET_AND_CLEAR_FULL
107 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
108 static inline pmd_t pmdp_get_and_clear_full(struct mm_struct *mm,
109 unsigned long address, pmd_t *pmdp,
112 return pmdp_get_and_clear(mm, address, pmdp);
114 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
117 #ifndef __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
118 static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm,
119 unsigned long address, pte_t *ptep,
123 pte = ptep_get_and_clear(mm, address, ptep);
129 * Some architectures may be able to avoid expensive synchronization
130 * primitives when modifications are made to PTE's which are already
131 * not present, or in the process of an address space destruction.
133 #ifndef __HAVE_ARCH_PTE_CLEAR_NOT_PRESENT_FULL
134 static inline void pte_clear_not_present_full(struct mm_struct *mm,
135 unsigned long address,
139 pte_clear(mm, address, ptep);
143 #ifndef __HAVE_ARCH_PTEP_CLEAR_FLUSH
144 extern pte_t ptep_clear_flush(struct vm_area_struct *vma,
145 unsigned long address,
149 #ifndef __HAVE_ARCH_PMDP_CLEAR_FLUSH
150 extern pmd_t pmdp_clear_flush(struct vm_area_struct *vma,
151 unsigned long address,
155 #ifndef __HAVE_ARCH_PTEP_SET_WRPROTECT
157 static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long address, pte_t *ptep)
159 pte_t old_pte = *ptep;
160 set_pte_at(mm, address, ptep, pte_wrprotect(old_pte));
164 #ifndef __HAVE_ARCH_PMDP_SET_WRPROTECT
165 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
166 static inline void pmdp_set_wrprotect(struct mm_struct *mm,
167 unsigned long address, pmd_t *pmdp)
169 pmd_t old_pmd = *pmdp;
170 set_pmd_at(mm, address, pmdp, pmd_wrprotect(old_pmd));
172 #else /* CONFIG_TRANSPARENT_HUGEPAGE */
173 static inline void pmdp_set_wrprotect(struct mm_struct *mm,
174 unsigned long address, pmd_t *pmdp)
178 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
181 #ifndef __HAVE_ARCH_PMDP_SPLITTING_FLUSH
182 extern void pmdp_splitting_flush(struct vm_area_struct *vma,
183 unsigned long address, pmd_t *pmdp);
186 #ifndef __HAVE_ARCH_PGTABLE_DEPOSIT
187 extern void pgtable_trans_huge_deposit(struct mm_struct *mm, pmd_t *pmdp,
191 #ifndef __HAVE_ARCH_PGTABLE_WITHDRAW
192 extern pgtable_t pgtable_trans_huge_withdraw(struct mm_struct *mm, pmd_t *pmdp);
195 #ifndef __HAVE_ARCH_PMDP_INVALIDATE
196 extern void pmdp_invalidate(struct vm_area_struct *vma, unsigned long address,
200 #ifndef __HAVE_ARCH_PTE_SAME
201 static inline int pte_same(pte_t pte_a, pte_t pte_b)
203 return pte_val(pte_a) == pte_val(pte_b);
207 #ifndef __HAVE_ARCH_PTE_UNUSED
209 * Some architectures provide facilities to virtualization guests
210 * so that they can flag allocated pages as unused. This allows the
211 * host to transparently reclaim unused pages. This function returns
212 * whether the pte's page is unused.
214 static inline int pte_unused(pte_t pte)
220 #ifndef __HAVE_ARCH_PMD_SAME
221 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
222 static inline int pmd_same(pmd_t pmd_a, pmd_t pmd_b)
224 return pmd_val(pmd_a) == pmd_val(pmd_b);
226 #else /* CONFIG_TRANSPARENT_HUGEPAGE */
227 static inline int pmd_same(pmd_t pmd_a, pmd_t pmd_b)
232 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
235 #ifndef __HAVE_ARCH_PGD_OFFSET_GATE
236 #define pgd_offset_gate(mm, addr) pgd_offset(mm, addr)
239 #ifndef __HAVE_ARCH_MOVE_PTE
240 #define move_pte(pte, prot, old_addr, new_addr) (pte)
243 #ifndef pte_accessible
244 # define pte_accessible(mm, pte) ((void)(pte), 1)
247 #ifndef pte_present_nonuma
248 #define pte_present_nonuma(pte) pte_present(pte)
251 #ifndef flush_tlb_fix_spurious_fault
252 #define flush_tlb_fix_spurious_fault(vma, address) flush_tlb_page(vma, address)
255 #ifndef pgprot_noncached
256 #define pgprot_noncached(prot) (prot)
259 #ifndef pgprot_writecombine
260 #define pgprot_writecombine pgprot_noncached
263 #ifndef pgprot_device
264 #define pgprot_device pgprot_noncached
267 #ifndef pgprot_modify
268 #define pgprot_modify pgprot_modify
269 static inline pgprot_t pgprot_modify(pgprot_t oldprot, pgprot_t newprot)
271 if (pgprot_val(oldprot) == pgprot_val(pgprot_noncached(oldprot)))
272 newprot = pgprot_noncached(newprot);
273 if (pgprot_val(oldprot) == pgprot_val(pgprot_writecombine(oldprot)))
274 newprot = pgprot_writecombine(newprot);
275 if (pgprot_val(oldprot) == pgprot_val(pgprot_device(oldprot)))
276 newprot = pgprot_device(newprot);
282 * When walking page tables, get the address of the next boundary,
283 * or the end address of the range if that comes earlier. Although no
284 * vma end wraps to 0, rounded up __boundary may wrap to 0 throughout.
287 #define pgd_addr_end(addr, end) \
288 ({ unsigned long __boundary = ((addr) + PGDIR_SIZE) & PGDIR_MASK; \
289 (__boundary - 1 < (end) - 1)? __boundary: (end); \
293 #define pud_addr_end(addr, end) \
294 ({ unsigned long __boundary = ((addr) + PUD_SIZE) & PUD_MASK; \
295 (__boundary - 1 < (end) - 1)? __boundary: (end); \
300 #define pmd_addr_end(addr, end) \
301 ({ unsigned long __boundary = ((addr) + PMD_SIZE) & PMD_MASK; \
302 (__boundary - 1 < (end) - 1)? __boundary: (end); \
307 * When walking page tables, we usually want to skip any p?d_none entries;
308 * and any p?d_bad entries - reporting the error before resetting to none.
309 * Do the tests inline, but report and clear the bad entry in mm/memory.c.
311 void pgd_clear_bad(pgd_t *);
312 void pud_clear_bad(pud_t *);
313 void pmd_clear_bad(pmd_t *);
315 static inline int pgd_none_or_clear_bad(pgd_t *pgd)
319 if (unlikely(pgd_bad(*pgd))) {
326 static inline int pud_none_or_clear_bad(pud_t *pud)
330 if (unlikely(pud_bad(*pud))) {
337 static inline int pmd_none_or_clear_bad(pmd_t *pmd)
341 if (unlikely(pmd_bad(*pmd))) {
348 static inline pte_t __ptep_modify_prot_start(struct mm_struct *mm,
353 * Get the current pte state, but zero it out to make it
354 * non-present, preventing the hardware from asynchronously
357 return ptep_get_and_clear(mm, addr, ptep);
360 static inline void __ptep_modify_prot_commit(struct mm_struct *mm,
362 pte_t *ptep, pte_t pte)
365 * The pte is non-present, so there's no hardware state to
368 set_pte_at(mm, addr, ptep, pte);
371 #ifndef __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION
373 * Start a pte protection read-modify-write transaction, which
374 * protects against asynchronous hardware modifications to the pte.
375 * The intention is not to prevent the hardware from making pte
376 * updates, but to prevent any updates it may make from being lost.
378 * This does not protect against other software modifications of the
379 * pte; the appropriate pte lock must be held over the transation.
381 * Note that this interface is intended to be batchable, meaning that
382 * ptep_modify_prot_commit may not actually update the pte, but merely
383 * queue the update to be done at some later time. The update must be
384 * actually committed before the pte lock is released, however.
386 static inline pte_t ptep_modify_prot_start(struct mm_struct *mm,
390 return __ptep_modify_prot_start(mm, addr, ptep);
394 * Commit an update to a pte, leaving any hardware-controlled bits in
395 * the PTE unmodified.
397 static inline void ptep_modify_prot_commit(struct mm_struct *mm,
399 pte_t *ptep, pte_t pte)
401 __ptep_modify_prot_commit(mm, addr, ptep, pte);
403 #endif /* __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION */
404 #endif /* CONFIG_MMU */
407 * A facility to provide lazy MMU batching. This allows PTE updates and
408 * page invalidations to be delayed until a call to leave lazy MMU mode
409 * is issued. Some architectures may benefit from doing this, and it is
410 * beneficial for both shadow and direct mode hypervisors, which may batch
411 * the PTE updates which happen during this window. Note that using this
412 * interface requires that read hazards be removed from the code. A read
413 * hazard could result in the direct mode hypervisor case, since the actual
414 * write to the page tables may not yet have taken place, so reads though
415 * a raw PTE pointer after it has been modified are not guaranteed to be
416 * up to date. This mode can only be entered and left under the protection of
417 * the page table locks for all page tables which may be modified. In the UP
418 * case, this is required so that preemption is disabled, and in the SMP case,
419 * it must synchronize the delayed page table writes properly on other CPUs.
421 #ifndef __HAVE_ARCH_ENTER_LAZY_MMU_MODE
422 #define arch_enter_lazy_mmu_mode() do {} while (0)
423 #define arch_leave_lazy_mmu_mode() do {} while (0)
424 #define arch_flush_lazy_mmu_mode() do {} while (0)
428 * A facility to provide batching of the reload of page tables and
429 * other process state with the actual context switch code for
430 * paravirtualized guests. By convention, only one of the batched
431 * update (lazy) modes (CPU, MMU) should be active at any given time,
432 * entry should never be nested, and entry and exits should always be
433 * paired. This is for sanity of maintaining and reasoning about the
434 * kernel code. In this case, the exit (end of the context switch) is
435 * in architecture-specific code, and so doesn't need a generic
438 #ifndef __HAVE_ARCH_START_CONTEXT_SWITCH
439 #define arch_start_context_switch(prev) do {} while (0)
442 #ifndef CONFIG_HAVE_ARCH_SOFT_DIRTY
443 static inline int pte_soft_dirty(pte_t pte)
448 static inline int pmd_soft_dirty(pmd_t pmd)
453 static inline pte_t pte_mksoft_dirty(pte_t pte)
458 static inline pmd_t pmd_mksoft_dirty(pmd_t pmd)
463 static inline pte_t pte_swp_mksoft_dirty(pte_t pte)
468 static inline int pte_swp_soft_dirty(pte_t pte)
473 static inline pte_t pte_swp_clear_soft_dirty(pte_t pte)
478 static inline pte_t pte_file_clear_soft_dirty(pte_t pte)
483 static inline pte_t pte_file_mksoft_dirty(pte_t pte)
488 static inline int pte_file_soft_dirty(pte_t pte)
494 #ifndef __HAVE_PFNMAP_TRACKING
496 * Interfaces that can be used by architecture code to keep track of
497 * memory type of pfn mappings specified by the remap_pfn_range,
502 * track_pfn_remap is called when a _new_ pfn mapping is being established
503 * by remap_pfn_range() for physical range indicated by pfn and size.
505 static inline int track_pfn_remap(struct vm_area_struct *vma, pgprot_t *prot,
506 unsigned long pfn, unsigned long addr,
513 * track_pfn_insert is called when a _new_ single pfn is established
514 * by vm_insert_pfn().
516 static inline int track_pfn_insert(struct vm_area_struct *vma, pgprot_t *prot,
523 * track_pfn_copy is called when vma that is covering the pfnmap gets
524 * copied through copy_page_range().
526 static inline int track_pfn_copy(struct vm_area_struct *vma)
532 * untrack_pfn_vma is called while unmapping a pfnmap for a region.
533 * untrack can be called for a specific region indicated by pfn and size or
534 * can be for the entire vma (in which case pfn, size are zero).
536 static inline void untrack_pfn(struct vm_area_struct *vma,
537 unsigned long pfn, unsigned long size)
541 extern int track_pfn_remap(struct vm_area_struct *vma, pgprot_t *prot,
542 unsigned long pfn, unsigned long addr,
544 extern int track_pfn_insert(struct vm_area_struct *vma, pgprot_t *prot,
546 extern int track_pfn_copy(struct vm_area_struct *vma);
547 extern void untrack_pfn(struct vm_area_struct *vma, unsigned long pfn,
551 #ifdef __HAVE_COLOR_ZERO_PAGE
552 static inline int is_zero_pfn(unsigned long pfn)
554 extern unsigned long zero_pfn;
555 unsigned long offset_from_zero_pfn = pfn - zero_pfn;
556 return offset_from_zero_pfn <= (zero_page_mask >> PAGE_SHIFT);
559 #define my_zero_pfn(addr) page_to_pfn(ZERO_PAGE(addr))
562 static inline int is_zero_pfn(unsigned long pfn)
564 extern unsigned long zero_pfn;
565 return pfn == zero_pfn;
568 static inline unsigned long my_zero_pfn(unsigned long addr)
570 extern unsigned long zero_pfn;
577 #ifndef CONFIG_TRANSPARENT_HUGEPAGE
578 static inline int pmd_trans_huge(pmd_t pmd)
582 static inline int pmd_trans_splitting(pmd_t pmd)
586 #ifndef __HAVE_ARCH_PMD_WRITE
587 static inline int pmd_write(pmd_t pmd)
592 #endif /* __HAVE_ARCH_PMD_WRITE */
593 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
595 #ifndef pmd_read_atomic
596 static inline pmd_t pmd_read_atomic(pmd_t *pmdp)
599 * Depend on compiler for an atomic pmd read. NOTE: this is
600 * only going to work, if the pmdval_t isn't larger than
607 #ifndef pmd_move_must_withdraw
608 static inline int pmd_move_must_withdraw(spinlock_t *new_pmd_ptl,
609 spinlock_t *old_pmd_ptl)
612 * With split pmd lock we also need to move preallocated
613 * PTE page table if new_pmd is on different PMD page table.
615 return new_pmd_ptl != old_pmd_ptl;
620 * This function is meant to be used by sites walking pagetables with
621 * the mmap_sem hold in read mode to protect against MADV_DONTNEED and
622 * transhuge page faults. MADV_DONTNEED can convert a transhuge pmd
623 * into a null pmd and the transhuge page fault can convert a null pmd
624 * into an hugepmd or into a regular pmd (if the hugepage allocation
625 * fails). While holding the mmap_sem in read mode the pmd becomes
626 * stable and stops changing under us only if it's not null and not a
627 * transhuge pmd. When those races occurs and this function makes a
628 * difference vs the standard pmd_none_or_clear_bad, the result is
629 * undefined so behaving like if the pmd was none is safe (because it
630 * can return none anyway). The compiler level barrier() is critically
631 * important to compute the two checks atomically on the same pmdval.
633 * For 32bit kernels with a 64bit large pmd_t this automatically takes
634 * care of reading the pmd atomically to avoid SMP race conditions
635 * against pmd_populate() when the mmap_sem is hold for reading by the
636 * caller (a special atomic read not done by "gcc" as in the generic
637 * version above, is also needed when THP is disabled because the page
638 * fault can populate the pmd from under us).
640 static inline int pmd_none_or_trans_huge_or_clear_bad(pmd_t *pmd)
642 pmd_t pmdval = pmd_read_atomic(pmd);
644 * The barrier will stabilize the pmdval in a register or on
645 * the stack so that it will stop changing under the code.
647 * When CONFIG_TRANSPARENT_HUGEPAGE=y on x86 32bit PAE,
648 * pmd_read_atomic is allowed to return a not atomic pmdval
649 * (for example pointing to an hugepage that has never been
650 * mapped in the pmd). The below checks will only care about
651 * the low part of the pmd with 32bit PAE x86 anyway, with the
652 * exception of pmd_none(). So the important thing is that if
653 * the low part of the pmd is found null, the high part will
654 * be also null or the pmd_none() check below would be
657 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
660 if (pmd_none(pmdval) || pmd_trans_huge(pmdval))
662 if (unlikely(pmd_bad(pmdval))) {
670 * This is a noop if Transparent Hugepage Support is not built into
671 * the kernel. Otherwise it is equivalent to
672 * pmd_none_or_trans_huge_or_clear_bad(), and shall only be called in
673 * places that already verified the pmd is not none and they want to
674 * walk ptes while holding the mmap sem in read mode (write mode don't
675 * need this). If THP is not enabled, the pmd can't go away under the
676 * code even if MADV_DONTNEED runs, but if THP is enabled we need to
677 * run a pmd_trans_unstable before walking the ptes after
678 * split_huge_page_pmd returns (because it may have run when the pmd
679 * become null, but then a page fault can map in a THP and not a
682 static inline int pmd_trans_unstable(pmd_t *pmd)
684 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
685 return pmd_none_or_trans_huge_or_clear_bad(pmd);
691 #ifdef CONFIG_NUMA_BALANCING
693 * _PAGE_NUMA distinguishes between an unmapped page table entry, an entry that
694 * is protected for PROT_NONE and a NUMA hinting fault entry. If the
695 * architecture defines __PAGE_PROTNONE then it should take that into account
696 * but those that do not can rely on the fact that the NUMA hinting scanner
697 * skips inaccessible VMAs.
699 * pte/pmd_present() returns true if pte/pmd_numa returns true. Page
700 * fault triggers on those regions if pte/pmd_numa returns true
701 * (because _PAGE_PRESENT is not set).
704 static inline int pte_numa(pte_t pte)
706 return ptenuma_flags(pte) == _PAGE_NUMA;
711 static inline int pmd_numa(pmd_t pmd)
713 return pmdnuma_flags(pmd) == _PAGE_NUMA;
718 * pte/pmd_mknuma sets the _PAGE_ACCESSED bitflag automatically
719 * because they're called by the NUMA hinting minor page fault. If we
720 * wouldn't set the _PAGE_ACCESSED bitflag here, the TLB miss handler
721 * would be forced to set it later while filling the TLB after we
722 * return to userland. That would trigger a second write to memory
723 * that we optimize away by setting _PAGE_ACCESSED here.
725 #ifndef pte_mknonnuma
726 static inline pte_t pte_mknonnuma(pte_t pte)
728 pteval_t val = pte_val(pte);
731 val |= (_PAGE_PRESENT|_PAGE_ACCESSED);
736 #ifndef pmd_mknonnuma
737 static inline pmd_t pmd_mknonnuma(pmd_t pmd)
739 pmdval_t val = pmd_val(pmd);
742 val |= (_PAGE_PRESENT|_PAGE_ACCESSED);
749 static inline pte_t pte_mknuma(pte_t pte)
751 pteval_t val = pte_val(pte);
753 VM_BUG_ON(!(val & _PAGE_PRESENT));
755 val &= ~_PAGE_PRESENT;
762 #ifndef ptep_set_numa
763 static inline void ptep_set_numa(struct mm_struct *mm, unsigned long addr,
768 ptent = pte_mknuma(ptent);
769 set_pte_at(mm, addr, ptep, ptent);
775 static inline pmd_t pmd_mknuma(pmd_t pmd)
777 pmdval_t val = pmd_val(pmd);
779 val &= ~_PAGE_PRESENT;
786 #ifndef pmdp_set_numa
787 static inline void pmdp_set_numa(struct mm_struct *mm, unsigned long addr,
792 pmd = pmd_mknuma(pmd);
793 set_pmd_at(mm, addr, pmdp, pmd);
798 static inline int pmd_numa(pmd_t pmd)
803 static inline int pte_numa(pte_t pte)
808 static inline pte_t pte_mknonnuma(pte_t pte)
813 static inline pmd_t pmd_mknonnuma(pmd_t pmd)
818 static inline pte_t pte_mknuma(pte_t pte)
823 static inline void ptep_set_numa(struct mm_struct *mm, unsigned long addr,
830 static inline pmd_t pmd_mknuma(pmd_t pmd)
835 static inline void pmdp_set_numa(struct mm_struct *mm, unsigned long addr,
840 #endif /* CONFIG_NUMA_BALANCING */
842 #endif /* CONFIG_MMU */
844 #endif /* !__ASSEMBLY__ */
846 #ifndef io_remap_pfn_range
847 #define io_remap_pfn_range remap_pfn_range
850 #endif /* _ASM_GENERIC_PGTABLE_H */