1 // SPDX-License-Identifier: GPL-2.0
3 * Watchdog driver for the K3 RTI module
5 * (c) Copyright 2019-2020 Texas Instruments Inc.
10 #include <linux/device.h>
11 #include <linux/err.h>
13 #include <linux/kernel.h>
14 #include <linux/mod_devicetable.h>
15 #include <linux/module.h>
16 #include <linux/moduleparam.h>
18 #include <linux/of_address.h>
19 #include <linux/platform_device.h>
20 #include <linux/pm_runtime.h>
21 #include <linux/types.h>
22 #include <linux/watchdog.h>
24 #define DEFAULT_HEARTBEAT 60
26 /* Max heartbeat is calculated at 32kHz source clock */
27 #define MAX_HEARTBEAT 1000
29 /* Timer register set definition */
30 #define RTIDWDCTRL 0x90
31 #define RTIDWDPRLD 0x94
32 #define RTIWDSTATUS 0x98
34 #define RTIDWDCNTR 0xa0
35 #define RTIWWDRXCTRL 0xa4
36 #define RTIWWDSIZECTRL 0xa8
38 #define RTIWWDRX_NMI 0xa
40 #define RTIWWDSIZE_50P 0x50
41 #define RTIWWDSIZE_25P 0x500
42 #define RTIWWDSIZE_12P5 0x5000
43 #define RTIWWDSIZE_6P25 0x50000
44 #define RTIWWDSIZE_3P125 0x500000
46 #define WDENABLE_KEY 0xa98559da
48 #define WDKEY_SEQ0 0xe51a
49 #define WDKEY_SEQ1 0xa35c
51 #define WDT_PRELOAD_SHIFT 13
53 #define WDT_PRELOAD_MAX 0xfff
57 #define PON_REASON_SOF_NUM 0xBBBBCCCC
58 #define PON_REASON_MAGIC_NUM 0xDDDDDDDD
59 #define PON_REASON_EOF_NUM 0xCCCCBBBB
60 #define RESERVED_MEM_MIN_SIZE 12
62 static int heartbeat = DEFAULT_HEARTBEAT;
65 * struct to hold data for each WDT device
66 * @base - base io address of WD device
67 * @freq - source clock frequency of WDT
68 * @wdd - hold watchdog device as is in WDT core
70 struct rti_wdt_device {
73 struct watchdog_device wdd;
76 static int rti_wdt_start(struct watchdog_device *wdd)
79 struct rti_wdt_device *wdt = watchdog_get_drvdata(wdd);
81 /* set timeout period */
82 timer_margin = (u64)wdd->timeout * wdt->freq;
83 timer_margin >>= WDT_PRELOAD_SHIFT;
84 if (timer_margin > WDT_PRELOAD_MAX)
85 timer_margin = WDT_PRELOAD_MAX;
86 writel_relaxed(timer_margin, wdt->base + RTIDWDPRLD);
89 * RTI only supports a windowed mode, where the watchdog can only
90 * be petted during the open window; not too early or not too late.
91 * The HW configuration options only allow for the open window size
92 * to be 50% or less than that; we obviouly want to configure the open
93 * window as large as possible so we select the 50% option.
95 wdd->min_hw_heartbeat_ms = 500 * wdd->timeout;
97 /* Generate NMI when wdt expires */
98 writel_relaxed(RTIWWDRX_NMI, wdt->base + RTIWWDRXCTRL);
100 /* Open window size 50%; this is the largest window size available */
101 writel_relaxed(RTIWWDSIZE_50P, wdt->base + RTIWWDSIZECTRL);
103 readl_relaxed(wdt->base + RTIWWDSIZECTRL);
105 /* enable watchdog */
106 writel_relaxed(WDENABLE_KEY, wdt->base + RTIDWDCTRL);
110 static int rti_wdt_ping(struct watchdog_device *wdd)
112 struct rti_wdt_device *wdt = watchdog_get_drvdata(wdd);
114 /* put watchdog in service state */
115 writel_relaxed(WDKEY_SEQ0, wdt->base + RTIWDKEY);
116 /* put watchdog in active state */
117 writel_relaxed(WDKEY_SEQ1, wdt->base + RTIWDKEY);
122 static int rti_wdt_setup_hw_hb(struct watchdog_device *wdd, u32 wsize)
125 * RTI only supports a windowed mode, where the watchdog can only
126 * be petted during the open window; not too early or not too late.
127 * The HW configuration options only allow for the open window size
128 * to be 50% or less than that.
132 /* 50% open window => 50% min heartbeat */
133 wdd->min_hw_heartbeat_ms = 500 * heartbeat;
137 /* 25% open window => 75% min heartbeat */
138 wdd->min_hw_heartbeat_ms = 750 * heartbeat;
141 case RTIWWDSIZE_12P5:
142 /* 12.5% open window => 87.5% min heartbeat */
143 wdd->min_hw_heartbeat_ms = 875 * heartbeat;
146 case RTIWWDSIZE_6P25:
147 /* 6.5% open window => 93.5% min heartbeat */
148 wdd->min_hw_heartbeat_ms = 935 * heartbeat;
151 case RTIWWDSIZE_3P125:
152 /* 3.125% open window => 96.9% min heartbeat */
153 wdd->min_hw_heartbeat_ms = 969 * heartbeat;
163 static unsigned int rti_wdt_get_timeleft_ms(struct watchdog_device *wdd)
167 struct rti_wdt_device *wdt = watchdog_get_drvdata(wdd);
169 /* if timeout has occurred then return 0 */
170 val = readl_relaxed(wdt->base + RTIWDSTATUS);
174 timer_counter = readl_relaxed(wdt->base + RTIDWDCNTR);
176 timer_counter *= 1000;
178 do_div(timer_counter, wdt->freq);
180 return timer_counter;
183 static unsigned int rti_wdt_get_timeleft(struct watchdog_device *wdd)
185 return rti_wdt_get_timeleft_ms(wdd) / 1000;
188 static const struct watchdog_info rti_wdt_info = {
189 .options = WDIOF_KEEPALIVEPING,
190 .identity = "K3 RTI Watchdog",
193 static const struct watchdog_ops rti_wdt_ops = {
194 .owner = THIS_MODULE,
195 .start = rti_wdt_start,
196 .ping = rti_wdt_ping,
197 .get_timeleft = rti_wdt_get_timeleft,
200 static int rti_wdt_probe(struct platform_device *pdev)
203 struct device *dev = &pdev->dev;
204 struct watchdog_device *wdd;
205 struct rti_wdt_device *wdt;
208 struct device_node *node;
209 u32 reserved_mem_size;
214 wdt = devm_kzalloc(dev, sizeof(*wdt), GFP_KERNEL);
218 clk = clk_get(dev, NULL);
220 return dev_err_probe(dev, PTR_ERR(clk), "failed to get clock\n");
222 wdt->freq = clk_get_rate(clk);
227 dev_err(dev, "Failed to get fck rate.\n");
232 * If watchdog is running at 32k clock, it is not accurate.
233 * Adjust frequency down in this case so that we don't pet
234 * the watchdog too often.
236 if (wdt->freq < 32768)
237 wdt->freq = wdt->freq * 9 / 10;
239 pm_runtime_enable(dev);
240 ret = pm_runtime_resume_and_get(dev);
242 pm_runtime_disable(&pdev->dev);
243 return dev_err_probe(dev, ret, "runtime pm failed\n");
246 platform_set_drvdata(pdev, wdt);
249 wdd->info = &rti_wdt_info;
250 wdd->ops = &rti_wdt_ops;
251 wdd->min_timeout = 1;
252 wdd->max_hw_heartbeat_ms = (WDT_PRELOAD_MAX << WDT_PRELOAD_SHIFT) /
256 watchdog_set_drvdata(wdd, wdt);
257 watchdog_set_nowayout(wdd, 1);
258 watchdog_set_restart_priority(wdd, 128);
260 wdt->base = devm_platform_ioremap_resource(pdev, 0);
261 if (IS_ERR(wdt->base)) {
262 ret = PTR_ERR(wdt->base);
266 if (readl(wdt->base + RTIDWDCTRL) == WDENABLE_KEY) {
267 int preset_heartbeat;
272 set_bit(WDOG_HW_RUNNING, &wdd->status);
273 time_left_ms = rti_wdt_get_timeleft_ms(wdd);
274 heartbeat_ms = readl(wdt->base + RTIDWDPRLD);
275 heartbeat_ms <<= WDT_PRELOAD_SHIFT;
276 heartbeat_ms *= 1000;
277 do_div(heartbeat_ms, wdt->freq);
278 preset_heartbeat = heartbeat_ms + 500;
279 preset_heartbeat /= 1000;
280 if (preset_heartbeat != heartbeat)
281 dev_warn(dev, "watchdog already running, ignoring heartbeat config!\n");
283 heartbeat = preset_heartbeat;
285 wsize = readl(wdt->base + RTIWWDSIZECTRL);
286 ret = rti_wdt_setup_hw_hb(wdd, wsize);
288 dev_err(dev, "bad window size.\n");
292 last_ping = heartbeat_ms - time_left_ms;
293 if (time_left_ms > heartbeat_ms) {
294 dev_warn(dev, "time_left > heartbeat? Assuming last ping just before now.\n");
299 node = of_parse_phandle(pdev->dev.of_node, "memory-region", 0);
301 ret = of_address_to_resource(node, 0, &res);
303 dev_err(dev, "No memory address assigned to the region.\n");
308 * If reserved memory is defined for watchdog reset cause.
309 * Readout the Power-on(PON) reason and pass to bootstatus.
312 reserved_mem_size = resource_size(&res);
313 if (reserved_mem_size < RESERVED_MEM_MIN_SIZE) {
314 dev_err(dev, "The size of reserved memory is too small.\n");
319 vaddr = memremap(paddr, reserved_mem_size, MEMREMAP_WB);
321 dev_err(dev, "Failed to map memory-region.\n");
326 if (vaddr[0] == PON_REASON_SOF_NUM &&
327 vaddr[1] == PON_REASON_MAGIC_NUM &&
328 vaddr[2] == PON_REASON_EOF_NUM) {
329 wdd->bootstatus |= WDIOF_CARDRESET;
331 memset(vaddr, 0, reserved_mem_size);
335 watchdog_init_timeout(wdd, heartbeat, dev);
337 ret = watchdog_register_device(wdd);
339 dev_err(dev, "cannot register watchdog device\n");
344 watchdog_set_last_hw_keepalive(wdd, last_ping);
349 pm_runtime_put_sync(&pdev->dev);
350 pm_runtime_disable(&pdev->dev);
355 static void rti_wdt_remove(struct platform_device *pdev)
357 struct rti_wdt_device *wdt = platform_get_drvdata(pdev);
359 watchdog_unregister_device(&wdt->wdd);
360 pm_runtime_put(&pdev->dev);
361 pm_runtime_disable(&pdev->dev);
364 static const struct of_device_id rti_wdt_of_match[] = {
365 { .compatible = "ti,j7-rti-wdt", },
368 MODULE_DEVICE_TABLE(of, rti_wdt_of_match);
370 static struct platform_driver rti_wdt_driver = {
373 .of_match_table = rti_wdt_of_match,
375 .probe = rti_wdt_probe,
376 .remove_new = rti_wdt_remove,
379 module_platform_driver(rti_wdt_driver);
381 MODULE_AUTHOR("Tero Kristo <t-kristo@ti.com>");
382 MODULE_DESCRIPTION("K3 RTI Watchdog Driver");
384 module_param(heartbeat, int, 0);
385 MODULE_PARM_DESC(heartbeat,
386 "Watchdog heartbeat period in seconds from 1 to "
387 __MODULE_STRING(MAX_HEARTBEAT) ", default "
388 __MODULE_STRING(DEFAULT_HEARTBEAT));
390 MODULE_LICENSE("GPL");
391 MODULE_ALIAS("platform:rti-wdt");