drivers/watchdog/renesas_wdt.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Watchdog driver for Renesas WDT watchdog
   4  *
   5  * Copyright (C) 2015-17 Wolfram Sang, Sang Engineering <wsa@sang-engineering.com>
   6  * Copyright (C) 2015-17 Renesas Electronics Corporation
   7  */
   8 #include <linux/bitops.h>
   9 #include <linux/clk.h>
  10 #include <linux/io.h>
  11 #include <linux/kernel.h>
  12 #include <linux/module.h>
  13 #include <linux/of.h>
  14 #include <linux/platform_device.h>
  15 #include <linux/pm_runtime.h>
  16 #include <linux/smp.h>
  17 #include <linux/sys_soc.h>
  18 #include <linux/watchdog.h>
  19
  20 #define RWTCNT          0
  21 #define RWTCSRA         4
  22 #define RWTCSRA_WOVF    BIT(4)
  23 #define RWTCSRA_WRFLG   BIT(5)
  24 #define RWTCSRA_TME     BIT(7)
  25 #define RWTCSRB         8
  26
  27 #define RWDT_DEFAULT_TIMEOUT 60U
  28
  29 /*
  30  * In probe, clk_rate is checked to be not more than 16 bit * biggest clock
  31  * divider (12 bits). d is only a factor to fully utilize the WDT counter and
  32  * will not exceed its 16 bits. Thus, no overflow, we stay below 32 bits.
  33  */
  34 #define MUL_BY_CLKS_PER_SEC(p, d) \
  35         DIV_ROUND_UP((d) * (p)->clk_rate, clk_divs[(p)->cks])
  36
  37 /* d is 16 bit, clk_divs 12 bit -> no 32 bit overflow */
  38 #define DIV_BY_CLKS_PER_SEC(p, d) ((d) * clk_divs[(p)->cks] / (p)->clk_rate)
  39
  40 static const unsigned int clk_divs[] = { 1, 4, 16, 32, 64, 128, 1024, 4096 };
  41
  42 static bool nowayout = WATCHDOG_NOWAYOUT;
  43 module_param(nowayout, bool, 0);
  44 MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
  45                                 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
  46
  47 struct rwdt_priv {
  48         void __iomem *base;
  49         struct watchdog_device wdev;
  50         unsigned long clk_rate;
  51         u8 cks;
  52 };
  53
  54 static void rwdt_write(struct rwdt_priv *priv, u32 val, unsigned int reg)
  55 {
  56         if (reg == RWTCNT)
  57                 val |= 0x5a5a0000;
  58         else
  59                 val |= 0xa5a5a500;
  60
  61         writel_relaxed(val, priv->base + reg);
  62 }
  63
  64 static int rwdt_init_timeout(struct watchdog_device *wdev)
  65 {
  66         struct rwdt_priv *priv = watchdog_get_drvdata(wdev);
  67
  68         rwdt_write(priv, 65536 - MUL_BY_CLKS_PER_SEC(priv, wdev->timeout), RWTCNT);
  69
  70         return 0;
  71 }
  72
  73 static int rwdt_start(struct watchdog_device *wdev)
  74 {
  75         struct rwdt_priv *priv = watchdog_get_drvdata(wdev);
  76         u8 val;
  77
  78         pm_runtime_get_sync(wdev->parent);
  79
  80         /* Stop the timer before we modify any register */
  81         val = readb_relaxed(priv->base + RWTCSRA) & ~RWTCSRA_TME;
  82         rwdt_write(priv, val, RWTCSRA);
  83
  84         rwdt_init_timeout(wdev);
  85         rwdt_write(priv, priv->cks, RWTCSRA);
  86         rwdt_write(priv, 0, RWTCSRB);
  87
  88         while (readb_relaxed(priv->base + RWTCSRA) & RWTCSRA_WRFLG)
  89                 cpu_relax();
  90
  91         rwdt_write(priv, priv->cks | RWTCSRA_TME, RWTCSRA);
  92
  93         return 0;
  94 }
  95
  96 static int rwdt_stop(struct watchdog_device *wdev)
  97 {
  98         struct rwdt_priv *priv = watchdog_get_drvdata(wdev);
  99
 100         rwdt_write(priv, priv->cks, RWTCSRA);
 101         pm_runtime_put(wdev->parent);
 102
 103         return 0;
 104 }
 105
 106 static unsigned int rwdt_get_timeleft(struct watchdog_device *wdev)
 107 {
 108         struct rwdt_priv *priv = watchdog_get_drvdata(wdev);
 109         u16 val = readw_relaxed(priv->base + RWTCNT);
 110
 111         return DIV_BY_CLKS_PER_SEC(priv, 65536 - val);
 112 }
 113
 114 static int rwdt_restart(struct watchdog_device *wdev, unsigned long action,
 115                         void *data)
 116 {
 117         struct rwdt_priv *priv = watchdog_get_drvdata(wdev);
 118
 119         rwdt_start(wdev);
 120         rwdt_write(priv, 0xffff, RWTCNT);
 121         return 0;
 122 }
 123
 124 static const struct watchdog_info rwdt_ident = {
 125         .options = WDIOF_MAGICCLOSE | WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT |
 126                 WDIOF_CARDRESET,
 127         .identity = "Renesas WDT Watchdog",
 128 };
 129
 130 static const struct watchdog_ops rwdt_ops = {
 131         .owner = THIS_MODULE,
 132         .start = rwdt_start,
 133         .stop = rwdt_stop,
 134         .ping = rwdt_init_timeout,
 135         .get_timeleft = rwdt_get_timeleft,
 136         .restart = rwdt_restart,
 137 };
 138
 139 #if defined(CONFIG_ARCH_RCAR_GEN2) && defined(CONFIG_SMP)
 140 /*
 141  * Watchdog-reset integration is broken on early revisions of R-Car Gen2 SoCs
 142  */
 143 static const struct soc_device_attribute rwdt_quirks_match[] = {
 144         {
 145                 .soc_id = "r8a7790",
 146                 .revision = "ES1.*",
 147                 .data = (void *)1,      /* needs single CPU */
 148         }, {
 149                 .soc_id = "r8a7791",
 150                 .revision = "ES1.*",
 151                 .data = (void *)1,      /* needs single CPU */
 152         }, {
 153                 .soc_id = "r8a7792",
 154                 .revision = "*",
 155                 .data = (void *)0,      /* needs SMP disabled */
 156         },
 157         { /* sentinel */ }
 158 };
 159
 160 static bool rwdt_blacklisted(struct device *dev)
 161 {
 162         const struct soc_device_attribute *attr;
 163
 164         attr = soc_device_match(rwdt_quirks_match);
 165         if (attr && setup_max_cpus > (uintptr_t)attr->data) {
 166                 dev_info(dev, "Watchdog blacklisted on %s %s\n", attr->soc_id,
 167                          attr->revision);
 168                 return true;
 169         }
 170
 171         return false;
 172 }
 173 #else /* !CONFIG_ARCH_RCAR_GEN2 || !CONFIG_SMP */
 174 static inline bool rwdt_blacklisted(struct device *dev) { return false; }
 175 #endif /* !CONFIG_ARCH_RCAR_GEN2 || !CONFIG_SMP */
 176
 177 static int rwdt_probe(struct platform_device *pdev)
 178 {
 179         struct rwdt_priv *priv;
 180         struct resource *res;
 181         struct clk *clk;
 182         unsigned long clks_per_sec;
 183         int ret, i;
 184
 185         if (rwdt_blacklisted(&pdev->dev))
 186                 return -ENODEV;
 187
 188         priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
 189         if (!priv)
 190                 return -ENOMEM;
 191
 192         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 193         priv->base = devm_ioremap_resource(&pdev->dev, res);
 194         if (IS_ERR(priv->base))
 195                 return PTR_ERR(priv->base);
 196
 197         clk = devm_clk_get(&pdev->dev, NULL);
 198         if (IS_ERR(clk))
 199                 return PTR_ERR(clk);
 200
 201         pm_runtime_enable(&pdev->dev);
 202         pm_runtime_get_sync(&pdev->dev);
 203         priv->clk_rate = clk_get_rate(clk);
 204         priv->wdev.bootstatus = (readb_relaxed(priv->base + RWTCSRA) &
 205                                 RWTCSRA_WOVF) ? WDIOF_CARDRESET : 0;
 206         pm_runtime_put(&pdev->dev);
 207
 208         if (!priv->clk_rate) {
 209                 ret = -ENOENT;
 210                 goto out_pm_disable;
 211         }
 212
 213         for (i = ARRAY_SIZE(clk_divs) - 1; i >= 0; i--) {
 214                 clks_per_sec = priv->clk_rate / clk_divs[i];
 215                 if (clks_per_sec && clks_per_sec < 65536) {
 216                         priv->cks = i;
 217                         break;
 218                 }
 219         }
 220
 221         if (i < 0) {
 222                 dev_err(&pdev->dev, "Can't find suitable clock divider\n");
 223                 ret = -ERANGE;
 224                 goto out_pm_disable;
 225         }
 226
 227         priv->wdev.info = &rwdt_ident;
 228         priv->wdev.ops = &rwdt_ops;
 229         priv->wdev.parent = &pdev->dev;
 230         priv->wdev.min_timeout = 1;
 231         priv->wdev.max_timeout = DIV_BY_CLKS_PER_SEC(priv, 65536);
 232         priv->wdev.timeout = min(priv->wdev.max_timeout, RWDT_DEFAULT_TIMEOUT);
 233
 234         platform_set_drvdata(pdev, priv);
 235         watchdog_set_drvdata(&priv->wdev, priv);
 236         watchdog_set_nowayout(&priv->wdev, nowayout);
 237         watchdog_set_restart_priority(&priv->wdev, 0);
 238         watchdog_stop_on_unregister(&priv->wdev);
 239
 240         /* This overrides the default timeout only if DT configuration was found */
 241         ret = watchdog_init_timeout(&priv->wdev, 0, &pdev->dev);
 242         if (ret)
 243                 dev_warn(&pdev->dev, "Specified timeout value invalid, using default\n");
 244
 245         ret = watchdog_register_device(&priv->wdev);
 246         if (ret < 0)
 247                 goto out_pm_disable;
 248
 249         return 0;
 250
 251  out_pm_disable:
 252         pm_runtime_disable(&pdev->dev);
 253         return ret;
 254 }
 255
 256 static int rwdt_remove(struct platform_device *pdev)
 257 {
 258         struct rwdt_priv *priv = platform_get_drvdata(pdev);
 259
 260         watchdog_unregister_device(&priv->wdev);
 261         pm_runtime_disable(&pdev->dev);
 262
 263         return 0;
 264 }
 265
 266 static int __maybe_unused rwdt_suspend(struct device *dev)
 267 {
 268         struct rwdt_priv *priv = dev_get_drvdata(dev);
 269
 270         if (watchdog_active(&priv->wdev))
 271                 rwdt_stop(&priv->wdev);
 272
 273         return 0;
 274 }
 275
 276 static int __maybe_unused rwdt_resume(struct device *dev)
 277 {
 278         struct rwdt_priv *priv = dev_get_drvdata(dev);
 279
 280         if (watchdog_active(&priv->wdev))
 281                 rwdt_start(&priv->wdev);
 282
 283         return 0;
 284 }
 285
 286 static SIMPLE_DEV_PM_OPS(rwdt_pm_ops, rwdt_suspend, rwdt_resume);
 287
 288 static const struct of_device_id rwdt_ids[] = {
 289         { .compatible = "renesas,rcar-gen2-wdt", },
 290         { .compatible = "renesas,rcar-gen3-wdt", },
 291         { /* sentinel */ }
 292 };
 293 MODULE_DEVICE_TABLE(of, rwdt_ids);
 294
 295 static struct platform_driver rwdt_driver = {
 296         .driver = {
 297                 .name = "renesas_wdt",
 298                 .of_match_table = rwdt_ids,
 299                 .pm = &rwdt_pm_ops,
 300         },
 301         .probe = rwdt_probe,
 302         .remove = rwdt_remove,
 303 };
 304 module_platform_driver(rwdt_driver);
 305
 306 MODULE_DESCRIPTION("Renesas WDT Watchdog Driver");
 307 MODULE_LICENSE("GPL v2");
 308 MODULE_AUTHOR("Wolfram Sang <wsa@sang-engineering.com>");