drivers/watchdog/hpwdt.c

   1 /*
   2  *      HPE WatchDog Driver
   3  *      based on
   4  *
   5  *      SoftDog 0.05:   A Software Watchdog Device
   6  *
   7  *      (c) Copyright 2015 Hewlett Packard Enterprise Development LP
   8  *      Thomas Mingarelli <thomas.mingarelli@hpe.com>
   9  *
  10  *      This program is free software; you can redistribute it and/or
  11  *      modify it under the terms of the GNU General Public License
  12  *      version 2 as published by the Free Software Foundation
  13  *
  14  */
  15
  16 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  17
  18 #include <linux/device.h>
  19 #include <linux/fs.h>
  20 #include <linux/io.h>
  21 #include <linux/bitops.h>
  22 #include <linux/kernel.h>
  23 #include <linux/miscdevice.h>
  24 #include <linux/module.h>
  25 #include <linux/moduleparam.h>
  26 #include <linux/pci.h>
  27 #include <linux/pci_ids.h>
  28 #include <linux/types.h>
  29 #include <linux/uaccess.h>
  30 #include <linux/watchdog.h>
  31 #ifdef CONFIG_HPWDT_NMI_DECODING
  32 #include <linux/dmi.h>
  33 #include <linux/spinlock.h>
  34 #include <linux/nmi.h>
  35 #include <linux/kdebug.h>
  36 #include <linux/notifier.h>
  37 #include <asm/set_memory.h>
  38 #endif /* CONFIG_HPWDT_NMI_DECODING */
  39 #include <asm/nmi.h>
  40 #include <asm/frame.h>
  41
  42 #define HPWDT_VERSION                   "1.4.0"
  43 #define SECS_TO_TICKS(secs)             ((secs) * 1000 / 128)
  44 #define TICKS_TO_SECS(ticks)            ((ticks) * 128 / 1000)
  45 #define HPWDT_MAX_TIMER                 TICKS_TO_SECS(65535)
  46 #define DEFAULT_MARGIN                  30
  47
  48 static unsigned int soft_margin = DEFAULT_MARGIN;       /* in seconds */
  49 static unsigned int reload;                     /* the computed soft_margin */
  50 static bool nowayout = WATCHDOG_NOWAYOUT;
  51 static char expect_release;
  52 static unsigned long hpwdt_is_open;
  53
  54 static void __iomem *pci_mem_addr;              /* the PCI-memory address */
  55 static unsigned long __iomem *hpwdt_nmistat;
  56 static unsigned long __iomem *hpwdt_timer_reg;
  57 static unsigned long __iomem *hpwdt_timer_con;
  58
  59 static const struct pci_device_id hpwdt_devices[] = {
  60         { PCI_DEVICE(PCI_VENDOR_ID_COMPAQ, 0xB203) },   /* iLO2 */
  61         { PCI_DEVICE(PCI_VENDOR_ID_HP, 0x3306) },       /* iLO3 */
  62         {0},                    /* terminate list */
  63 };
  64 MODULE_DEVICE_TABLE(pci, hpwdt_devices);
  65
  66 #ifdef CONFIG_HPWDT_NMI_DECODING
  67 #define PCI_BIOS32_SD_VALUE             0x5F32335F      /* "_32_" */
  68 #define CRU_BIOS_SIGNATURE_VALUE        0x55524324
  69 #define PCI_BIOS32_PARAGRAPH_LEN        16
  70 #define PCI_ROM_BASE1                   0x000F0000
  71 #define ROM_SIZE                        0x10000
  72
  73 struct bios32_service_dir {
  74         u32 signature;
  75         u32 entry_point;
  76         u8 revision;
  77         u8 length;
  78         u8 checksum;
  79         u8 reserved[5];
  80 };
  81
  82 /* type 212 */
  83 struct smbios_cru64_info {
  84         u8 type;
  85         u8 byte_length;
  86         u16 handle;
  87         u32 signature;
  88         u64 physical_address;
  89         u32 double_length;
  90         u32 double_offset;
  91 };
  92 #define SMBIOS_CRU64_INFORMATION        212
  93
  94 /* type 219 */
  95 struct smbios_proliant_info {
  96         u8 type;
  97         u8 byte_length;
  98         u16 handle;
  99         u32 power_features;
 100         u32 omega_features;
 101         u32 reserved;
 102         u32 misc_features;
 103 };
 104 #define SMBIOS_ICRU_INFORMATION         219
 105
 106
 107 struct cmn_registers {
 108         union {
 109                 struct {
 110                         u8 ral;
 111                         u8 rah;
 112                         u16 rea2;
 113                 };
 114                 u32 reax;
 115         } u1;
 116         union {
 117                 struct {
 118                         u8 rbl;
 119                         u8 rbh;
 120                         u8 reb2l;
 121                         u8 reb2h;
 122                 };
 123                 u32 rebx;
 124         } u2;
 125         union {
 126                 struct {
 127                         u8 rcl;
 128                         u8 rch;
 129                         u16 rec2;
 130                 };
 131                 u32 recx;
 132         } u3;
 133         union {
 134                 struct {
 135                         u8 rdl;
 136                         u8 rdh;
 137                         u16 red2;
 138                 };
 139                 u32 redx;
 140         } u4;
 141
 142         u32 resi;
 143         u32 redi;
 144         u16 rds;
 145         u16 res;
 146         u32 reflags;
 147 }  __attribute__((packed));
 148
 149 static unsigned int hpwdt_nmi_decoding;
 150 static unsigned int allow_kdump = 1;
 151 static unsigned int is_icru;
 152 static unsigned int is_uefi;
 153 static DEFINE_SPINLOCK(rom_lock);
 154 static void *cru_rom_addr;
 155 static struct cmn_registers cmn_regs;
 156
 157 extern asmlinkage void asminline_call(struct cmn_registers *pi86Regs,
 158                                                 unsigned long *pRomEntry);
 159
 160 #ifdef CONFIG_X86_32
 161 /* --32 Bit Bios------------------------------------------------------------ */
 162
 163 #define HPWDT_ARCH      32
 164
 165 asm(".text                          \n\t"
 166     ".align 4                       \n\t"
 167     ".globl asminline_call          \n"
 168     "asminline_call:                \n\t"
 169     "pushl       %ebp               \n\t"
 170     "movl        %esp, %ebp         \n\t"
 171     "pusha                          \n\t"
 172     "pushf                          \n\t"
 173     "push        %es                \n\t"
 174     "push        %ds                \n\t"
 175     "pop         %es                \n\t"
 176     "movl        8(%ebp),%eax       \n\t"
 177     "movl        4(%eax),%ebx       \n\t"
 178     "movl        8(%eax),%ecx       \n\t"
 179     "movl        12(%eax),%edx      \n\t"
 180     "movl        16(%eax),%esi      \n\t"
 181     "movl        20(%eax),%edi      \n\t"
 182     "movl        (%eax),%eax        \n\t"
 183     "push        %cs                \n\t"
 184     "call        *12(%ebp)          \n\t"
 185     "pushf                          \n\t"
 186     "pushl       %eax               \n\t"
 187     "movl        8(%ebp),%eax       \n\t"
 188     "movl        %ebx,4(%eax)       \n\t"
 189     "movl        %ecx,8(%eax)       \n\t"
 190     "movl        %edx,12(%eax)      \n\t"
 191     "movl        %esi,16(%eax)      \n\t"
 192     "movl        %edi,20(%eax)      \n\t"
 193     "movw        %ds,24(%eax)       \n\t"
 194     "movw        %es,26(%eax)       \n\t"
 195     "popl        %ebx               \n\t"
 196     "movl        %ebx,(%eax)        \n\t"
 197     "popl        %ebx               \n\t"
 198     "movl        %ebx,28(%eax)      \n\t"
 199     "pop         %es                \n\t"
 200     "popf                           \n\t"
 201     "popa                           \n\t"
 202     "leave                          \n\t"
 203     "ret                            \n\t"
 204     ".previous");
 205
 206
 207 /*
 208  *      cru_detect
 209  *
 210  *      Routine Description:
 211  *      This function uses the 32-bit BIOS Service Directory record to
 212  *      search for a $CRU record.
 213  *
 214  *      Return Value:
 215  *      0        :  SUCCESS
 216  *      <0       :  FAILURE
 217  */
 218 static int cru_detect(unsigned long map_entry,
 219         unsigned long map_offset)
 220 {
 221         void *bios32_map;
 222         unsigned long *bios32_entrypoint;
 223         unsigned long cru_physical_address;
 224         unsigned long cru_length;
 225         unsigned long physical_bios_base = 0;
 226         unsigned long physical_bios_offset = 0;
 227         int retval = -ENODEV;
 228
 229         bios32_map = ioremap(map_entry, (2 * PAGE_SIZE));
 230
 231         if (bios32_map == NULL)
 232                 return -ENODEV;
 233
 234         bios32_entrypoint = bios32_map + map_offset;
 235
 236         cmn_regs.u1.reax = CRU_BIOS_SIGNATURE_VALUE;
 237
 238         set_memory_x((unsigned long)bios32_map, 2);
 239         asminline_call(&cmn_regs, bios32_entrypoint);
 240
 241         if (cmn_regs.u1.ral != 0) {
 242                 pr_warn("Call succeeded but with an error: 0x%x\n",
 243                         cmn_regs.u1.ral);
 244         } else {
 245                 physical_bios_base = cmn_regs.u2.rebx;
 246                 physical_bios_offset = cmn_regs.u4.redx;
 247                 cru_length = cmn_regs.u3.recx;
 248                 cru_physical_address =
 249                         physical_bios_base + physical_bios_offset;
 250
 251                 /* If the values look OK, then map it in. */
 252                 if ((physical_bios_base + physical_bios_offset)) {
 253                         cru_rom_addr =
 254                                 ioremap(cru_physical_address, cru_length);
 255                         if (cru_rom_addr) {
 256                                 set_memory_x((unsigned long)cru_rom_addr & PAGE_MASK,
 257                                         (cru_length + PAGE_SIZE - 1) >> PAGE_SHIFT);
 258                                 retval = 0;
 259                         }
 260                 }
 261
 262                 pr_debug("CRU Base Address:   0x%lx\n", physical_bios_base);
 263                 pr_debug("CRU Offset Address: 0x%lx\n", physical_bios_offset);
 264                 pr_debug("CRU Length:         0x%lx\n", cru_length);
 265                 pr_debug("CRU Mapped Address: %p\n", &cru_rom_addr);
 266         }
 267         iounmap(bios32_map);
 268         return retval;
 269 }
 270
 271 /*
 272  *      bios_checksum
 273  */
 274 static int bios_checksum(const char __iomem *ptr, int len)
 275 {
 276         char sum = 0;
 277         int i;
 278
 279         /*
 280          * calculate checksum of size bytes. This should add up
 281          * to zero if we have a valid header.
 282          */
 283         for (i = 0; i < len; i++)
 284                 sum += ptr[i];
 285
 286         return ((sum == 0) && (len > 0));
 287 }
 288
 289 /*
 290  *      bios32_present
 291  *
 292  *      Routine Description:
 293  *      This function finds the 32-bit BIOS Service Directory
 294  *
 295  *      Return Value:
 296  *      0        :  SUCCESS
 297  *      <0       :  FAILURE
 298  */
 299 static int bios32_present(const char __iomem *p)
 300 {
 301         struct bios32_service_dir *bios_32_ptr;
 302         int length;
 303         unsigned long map_entry, map_offset;
 304
 305         bios_32_ptr = (struct bios32_service_dir *) p;
 306
 307         /*
 308          * Search for signature by checking equal to the swizzled value
 309          * instead of calling another routine to perform a strcmp.
 310          */
 311         if (bios_32_ptr->signature == PCI_BIOS32_SD_VALUE) {
 312                 length = bios_32_ptr->length * PCI_BIOS32_PARAGRAPH_LEN;
 313                 if (bios_checksum(p, length)) {
 314                         /*
 315                          * According to the spec, we're looking for the
 316                          * first 4KB-aligned address below the entrypoint
 317                          * listed in the header. The Service Directory code
 318                          * is guaranteed to occupy no more than 2 4KB pages.
 319                          */
 320                         map_entry = bios_32_ptr->entry_point & ~(PAGE_SIZE - 1);
 321                         map_offset = bios_32_ptr->entry_point - map_entry;
 322
 323                         return cru_detect(map_entry, map_offset);
 324                 }
 325         }
 326         return -ENODEV;
 327 }
 328
 329 static int detect_cru_service(void)
 330 {
 331         char __iomem *p, *q;
 332         int rc = -1;
 333
 334         /*
 335          * Search from 0x0f0000 through 0x0fffff, inclusive.
 336          */
 337         p = ioremap(PCI_ROM_BASE1, ROM_SIZE);
 338         if (p == NULL)
 339                 return -ENOMEM;
 340
 341         for (q = p; q < p + ROM_SIZE; q += 16) {
 342                 rc = bios32_present(q);
 343                 if (!rc)
 344                         break;
 345         }
 346         iounmap(p);
 347         return rc;
 348 }
 349 /* ------------------------------------------------------------------------- */
 350 #endif /* CONFIG_X86_32 */
 351 #ifdef CONFIG_X86_64
 352 /* --64 Bit Bios------------------------------------------------------------ */
 353
 354 #define HPWDT_ARCH      64
 355
 356 asm(".text                      \n\t"
 357     ".align 4                   \n\t"
 358     ".globl asminline_call      \n\t"
 359     ".type asminline_call, @function \n\t"
 360     "asminline_call:            \n\t"
 361     FRAME_BEGIN
 362     "pushq      %rax            \n\t"
 363     "pushq      %rbx            \n\t"
 364     "pushq      %rdx            \n\t"
 365     "pushq      %r12            \n\t"
 366     "pushq      %r9             \n\t"
 367     "movq       %rsi, %r12      \n\t"
 368     "movq       %rdi, %r9       \n\t"
 369     "movl       4(%r9),%ebx     \n\t"
 370     "movl       8(%r9),%ecx     \n\t"
 371     "movl       12(%r9),%edx    \n\t"
 372     "movl       16(%r9),%esi    \n\t"
 373     "movl       20(%r9),%edi    \n\t"
 374     "movl       (%r9),%eax      \n\t"
 375     "call       *%r12           \n\t"
 376     "pushfq                     \n\t"
 377     "popq        %r12           \n\t"
 378     "movl       %eax, (%r9)     \n\t"
 379     "movl       %ebx, 4(%r9)    \n\t"
 380     "movl       %ecx, 8(%r9)    \n\t"
 381     "movl       %edx, 12(%r9)   \n\t"
 382     "movl       %esi, 16(%r9)   \n\t"
 383     "movl       %edi, 20(%r9)   \n\t"
 384     "movq       %r12, %rax      \n\t"
 385     "movl       %eax, 28(%r9)   \n\t"
 386     "popq       %r9             \n\t"
 387     "popq       %r12            \n\t"
 388     "popq       %rdx            \n\t"
 389     "popq       %rbx            \n\t"
 390     "popq       %rax            \n\t"
 391     FRAME_END
 392     "ret                        \n\t"
 393     ".previous");
 394
 395 /*
 396  *      dmi_find_cru
 397  *
 398  *      Routine Description:
 399  *      This function checks whether or not a SMBIOS/DMI record is
 400  *      the 64bit CRU info or not
 401  */
 402 static void dmi_find_cru(const struct dmi_header *dm, void *dummy)
 403 {
 404         struct smbios_cru64_info *smbios_cru64_ptr;
 405         unsigned long cru_physical_address;
 406
 407         if (dm->type == SMBIOS_CRU64_INFORMATION) {
 408                 smbios_cru64_ptr = (struct smbios_cru64_info *) dm;
 409                 if (smbios_cru64_ptr->signature == CRU_BIOS_SIGNATURE_VALUE) {
 410                         cru_physical_address =
 411                                 smbios_cru64_ptr->physical_address +
 412                                 smbios_cru64_ptr->double_offset;
 413                         cru_rom_addr = ioremap(cru_physical_address,
 414                                 smbios_cru64_ptr->double_length);
 415                         set_memory_x((unsigned long)cru_rom_addr & PAGE_MASK,
 416                                 smbios_cru64_ptr->double_length >> PAGE_SHIFT);
 417                 }
 418         }
 419 }
 420
 421 static int detect_cru_service(void)
 422 {
 423         cru_rom_addr = NULL;
 424
 425         dmi_walk(dmi_find_cru, NULL);
 426
 427         /* if cru_rom_addr has been set then we found a CRU service */
 428         return ((cru_rom_addr != NULL) ? 0 : -ENODEV);
 429 }
 430 /* ------------------------------------------------------------------------- */
 431 #endif /* CONFIG_X86_64 */
 432 #endif /* CONFIG_HPWDT_NMI_DECODING */
 433
 434 /*
 435  *      Watchdog operations
 436  */
 437 static void hpwdt_start(void)
 438 {
 439         reload = SECS_TO_TICKS(soft_margin);
 440         iowrite16(reload, hpwdt_timer_reg);
 441         iowrite8(0x85, hpwdt_timer_con);
 442 }
 443
 444 static void hpwdt_stop(void)
 445 {
 446         unsigned long data;
 447
 448         data = ioread8(hpwdt_timer_con);
 449         data &= 0xFE;
 450         iowrite8(data, hpwdt_timer_con);
 451 }
 452
 453 static void hpwdt_ping(void)
 454 {
 455         iowrite16(reload, hpwdt_timer_reg);
 456 }
 457
 458 static int hpwdt_change_timer(int new_margin)
 459 {
 460         if (new_margin < 1 || new_margin > HPWDT_MAX_TIMER) {
 461                 pr_warn("New value passed in is invalid: %d seconds\n",
 462                         new_margin);
 463                 return -EINVAL;
 464         }
 465
 466         soft_margin = new_margin;
 467         pr_debug("New timer passed in is %d seconds\n", new_margin);
 468         reload = SECS_TO_TICKS(soft_margin);
 469
 470         return 0;
 471 }
 472
 473 static int hpwdt_time_left(void)
 474 {
 475         return TICKS_TO_SECS(ioread16(hpwdt_timer_reg));
 476 }
 477
 478 #ifdef CONFIG_HPWDT_NMI_DECODING
 479 static int hpwdt_my_nmi(void)
 480 {
 481         return ioread8(hpwdt_nmistat) & 0x6;
 482 }
 483
 484 /*
 485  *      NMI Handler
 486  */
 487 static int hpwdt_pretimeout(unsigned int ulReason, struct pt_regs *regs)
 488 {
 489         unsigned long rom_pl;
 490         static int die_nmi_called;
 491
 492         if (!hpwdt_nmi_decoding)
 493                 return NMI_DONE;
 494
 495         if ((ulReason == NMI_UNKNOWN) && !hpwdt_my_nmi())
 496                 return NMI_DONE;
 497
 498         spin_lock_irqsave(&rom_lock, rom_pl);
 499         if (!die_nmi_called && !is_icru && !is_uefi)
 500                 asminline_call(&cmn_regs, cru_rom_addr);
 501         die_nmi_called = 1;
 502         spin_unlock_irqrestore(&rom_lock, rom_pl);
 503
 504         if (allow_kdump)
 505                 hpwdt_stop();
 506
 507         if (!is_icru && !is_uefi) {
 508                 if (cmn_regs.u1.ral == 0) {
 509                         nmi_panic(regs, "An NMI occurred, but unable to determine source.\n");
 510                         return NMI_HANDLED;
 511                 }
 512         }
 513         nmi_panic(regs, "An NMI occurred. Depending on your system the reason "
 514                 "for the NMI is logged in any one of the following "
 515                 "resources:\n"
 516                 "1. Integrated Management Log (IML)\n"
 517                 "2. OA Syslog\n"
 518                 "3. OA Forward Progress Log\n"
 519                 "4. iLO Event Log");
 520
 521         return NMI_HANDLED;
 522 }
 523 #endif /* CONFIG_HPWDT_NMI_DECODING */
 524
 525 /*
 526  *      /dev/watchdog handling
 527  */
 528 static int hpwdt_open(struct inode *inode, struct file *file)
 529 {
 530         /* /dev/watchdog can only be opened once */
 531         if (test_and_set_bit(0, &hpwdt_is_open))
 532                 return -EBUSY;
 533
 534         /* Start the watchdog */
 535         hpwdt_start();
 536         hpwdt_ping();
 537
 538         return nonseekable_open(inode, file);
 539 }
 540
 541 static int hpwdt_release(struct inode *inode, struct file *file)
 542 {
 543         /* Stop the watchdog */
 544         if (expect_release == 42) {
 545                 hpwdt_stop();
 546         } else {
 547                 pr_crit("Unexpected close, not stopping watchdog!\n");
 548                 hpwdt_ping();
 549         }
 550
 551         expect_release = 0;
 552
 553         /* /dev/watchdog is being closed, make sure it can be re-opened */
 554         clear_bit(0, &hpwdt_is_open);
 555
 556         return 0;
 557 }
 558
 559 static ssize_t hpwdt_write(struct file *file, const char __user *data,
 560         size_t len, loff_t *ppos)
 561 {
 562         /* See if we got the magic character 'V' and reload the timer */
 563         if (len) {
 564                 if (!nowayout) {
 565                         size_t i;
 566
 567                         /* note: just in case someone wrote the magic character
 568                          * five months ago... */
 569                         expect_release = 0;
 570
 571                         /* scan to see whether or not we got the magic char. */
 572                         for (i = 0; i != len; i++) {
 573                                 char c;
 574                                 if (get_user(c, data + i))
 575                                         return -EFAULT;
 576                                 if (c == 'V')
 577                                         expect_release = 42;
 578                         }
 579                 }
 580
 581                 /* someone wrote to us, we should reload the timer */
 582                 hpwdt_ping();
 583         }
 584
 585         return len;
 586 }
 587
 588 static const struct watchdog_info ident = {
 589         .options = WDIOF_SETTIMEOUT |
 590                    WDIOF_KEEPALIVEPING |
 591                    WDIOF_MAGICCLOSE,
 592         .identity = "HPE iLO2+ HW Watchdog Timer",
 593 };
 594
 595 static long hpwdt_ioctl(struct file *file, unsigned int cmd,
 596         unsigned long arg)
 597 {
 598         void __user *argp = (void __user *)arg;
 599         int __user *p = argp;
 600         int new_margin, options;
 601         int ret = -ENOTTY;
 602
 603         switch (cmd) {
 604         case WDIOC_GETSUPPORT:
 605                 ret = 0;
 606                 if (copy_to_user(argp, &ident, sizeof(ident)))
 607                         ret = -EFAULT;
 608                 break;
 609
 610         case WDIOC_GETSTATUS:
 611         case WDIOC_GETBOOTSTATUS:
 612                 ret = put_user(0, p);
 613                 break;
 614
 615         case WDIOC_KEEPALIVE:
 616                 hpwdt_ping();
 617                 ret = 0;
 618                 break;
 619
 620         case WDIOC_SETOPTIONS:
 621                 ret = get_user(options, p);
 622                 if (ret)
 623                         break;
 624
 625                 if (options & WDIOS_DISABLECARD)
 626                         hpwdt_stop();
 627
 628                 if (options & WDIOS_ENABLECARD) {
 629                         hpwdt_start();
 630                         hpwdt_ping();
 631                 }
 632                 break;
 633
 634         case WDIOC_SETTIMEOUT:
 635                 ret = get_user(new_margin, p);
 636                 if (ret)
 637                         break;
 638
 639                 ret = hpwdt_change_timer(new_margin);
 640                 if (ret)
 641                         break;
 642
 643                 hpwdt_ping();
 644                 /* Fall */
 645         case WDIOC_GETTIMEOUT:
 646                 ret = put_user(soft_margin, p);
 647                 break;
 648
 649         case WDIOC_GETTIMELEFT:
 650                 ret = put_user(hpwdt_time_left(), p);
 651                 break;
 652         }
 653         return ret;
 654 }
 655
 656 /*
 657  *      Kernel interfaces
 658  */
 659 static const struct file_operations hpwdt_fops = {
 660         .owner = THIS_MODULE,
 661         .llseek = no_llseek,
 662         .write = hpwdt_write,
 663         .unlocked_ioctl = hpwdt_ioctl,
 664         .open = hpwdt_open,
 665         .release = hpwdt_release,
 666 };
 667
 668 static struct miscdevice hpwdt_miscdev = {
 669         .minor = WATCHDOG_MINOR,
 670         .name = "watchdog",
 671         .fops = &hpwdt_fops,
 672 };
 673
 674 /*
 675  *      Init & Exit
 676  */
 677
 678 #ifdef CONFIG_HPWDT_NMI_DECODING
 679 #ifdef CONFIG_X86_LOCAL_APIC
 680 static void hpwdt_check_nmi_decoding(struct pci_dev *dev)
 681 {
 682         /*
 683          * If nmi_watchdog is turned off then we can turn on
 684          * our nmi decoding capability.
 685          */
 686         hpwdt_nmi_decoding = 1;
 687 }
 688 #else
 689 static void hpwdt_check_nmi_decoding(struct pci_dev *dev)
 690 {
 691         dev_warn(&dev->dev, "NMI decoding is disabled. "
 692                 "Your kernel does not support a NMI Watchdog.\n");
 693 }
 694 #endif /* CONFIG_X86_LOCAL_APIC */
 695
 696 /*
 697  *      dmi_find_icru
 698  *
 699  *      Routine Description:
 700  *      This function checks whether or not we are on an iCRU-based server.
 701  *      This check is independent of architecture and needs to be made for
 702  *      any ProLiant system.
 703  */
 704 static void dmi_find_icru(const struct dmi_header *dm, void *dummy)
 705 {
 706         struct smbios_proliant_info *smbios_proliant_ptr;
 707
 708         if (dm->type == SMBIOS_ICRU_INFORMATION) {
 709                 smbios_proliant_ptr = (struct smbios_proliant_info *) dm;
 710                 if (smbios_proliant_ptr->misc_features & 0x01)
 711                         is_icru = 1;
 712                 if (smbios_proliant_ptr->misc_features & 0x1400)
 713                         is_uefi = 1;
 714         }
 715 }
 716
 717 static int hpwdt_init_nmi_decoding(struct pci_dev *dev)
 718 {
 719         int retval;
 720
 721         /*
 722          * On typical CRU-based systems we need to map that service in
 723          * the BIOS. For 32 bit Operating Systems we need to go through
 724          * the 32 Bit BIOS Service Directory. For 64 bit Operating
 725          * Systems we get that service through SMBIOS.
 726          *
 727          * On systems that support the new iCRU service all we need to
 728          * do is call dmi_walk to get the supported flag value and skip
 729          * the old cru detect code.
 730          */
 731         dmi_walk(dmi_find_icru, NULL);
 732         if (!is_icru && !is_uefi) {
 733
 734                 /*
 735                 * We need to map the ROM to get the CRU service.
 736                 * For 32 bit Operating Systems we need to go through the 32 Bit
 737                 * BIOS Service Directory
 738                 * For 64 bit Operating Systems we get that service through SMBIOS.
 739                 */
 740                 retval = detect_cru_service();
 741                 if (retval < 0) {
 742                         dev_warn(&dev->dev,
 743                                 "Unable to detect the %d Bit CRU Service.\n",
 744                                 HPWDT_ARCH);
 745                         return retval;
 746                 }
 747
 748                 /*
 749                 * We know this is the only CRU call we need to make so lets keep as
 750                 * few instructions as possible once the NMI comes in.
 751                 */
 752                 cmn_regs.u1.rah = 0x0D;
 753                 cmn_regs.u1.ral = 0x02;
 754         }
 755
 756         /*
 757          * Only one function can register for NMI_UNKNOWN
 758          */
 759         retval = register_nmi_handler(NMI_UNKNOWN, hpwdt_pretimeout, 0, "hpwdt");
 760         if (retval)
 761                 goto error;
 762         retval = register_nmi_handler(NMI_SERR, hpwdt_pretimeout, 0, "hpwdt");
 763         if (retval)
 764                 goto error1;
 765         retval = register_nmi_handler(NMI_IO_CHECK, hpwdt_pretimeout, 0, "hpwdt");
 766         if (retval)
 767                 goto error2;
 768
 769         dev_info(&dev->dev,
 770                         "HPE Watchdog Timer Driver: NMI decoding initialized"
 771                         ", allow kernel dump: %s (default = 1/ON)\n",
 772                         (allow_kdump == 0) ? "OFF" : "ON");
 773         return 0;
 774
 775 error2:
 776         unregister_nmi_handler(NMI_SERR, "hpwdt");
 777 error1:
 778         unregister_nmi_handler(NMI_UNKNOWN, "hpwdt");
 779 error:
 780         dev_warn(&dev->dev,
 781                 "Unable to register a die notifier (err=%d).\n",
 782                 retval);
 783         if (cru_rom_addr)
 784                 iounmap(cru_rom_addr);
 785         return retval;
 786 }
 787
 788 static void hpwdt_exit_nmi_decoding(void)
 789 {
 790         unregister_nmi_handler(NMI_UNKNOWN, "hpwdt");
 791         unregister_nmi_handler(NMI_SERR, "hpwdt");
 792         unregister_nmi_handler(NMI_IO_CHECK, "hpwdt");
 793         if (cru_rom_addr)
 794                 iounmap(cru_rom_addr);
 795 }
 796 #else /* !CONFIG_HPWDT_NMI_DECODING */
 797 static void hpwdt_check_nmi_decoding(struct pci_dev *dev)
 798 {
 799 }
 800
 801 static int hpwdt_init_nmi_decoding(struct pci_dev *dev)
 802 {
 803         return 0;
 804 }
 805
 806 static void hpwdt_exit_nmi_decoding(void)
 807 {
 808 }
 809 #endif /* CONFIG_HPWDT_NMI_DECODING */
 810
 811 static int hpwdt_init_one(struct pci_dev *dev,
 812                                         const struct pci_device_id *ent)
 813 {
 814         int retval;
 815
 816         /*
 817          * Check if we can do NMI decoding or not
 818          */
 819         hpwdt_check_nmi_decoding(dev);
 820
 821         /*
 822          * First let's find out if we are on an iLO2+ server. We will
 823          * not run on a legacy ASM box.
 824          * So we only support the G5 ProLiant servers and higher.
 825          */
 826         if (dev->subsystem_vendor != PCI_VENDOR_ID_HP &&
 827             dev->subsystem_vendor != PCI_VENDOR_ID_HP_3PAR) {
 828                 dev_warn(&dev->dev,
 829                         "This server does not have an iLO2+ ASIC.\n");
 830                 return -ENODEV;
 831         }
 832
 833         /*
 834          * Ignore all auxilary iLO devices with the following PCI ID
 835          */
 836         if (dev->subsystem_vendor == PCI_VENDOR_ID_HP &&
 837             dev->subsystem_device == 0x1979)
 838                 return -ENODEV;
 839
 840         if (pci_enable_device(dev)) {
 841                 dev_warn(&dev->dev,
 842                         "Not possible to enable PCI Device: 0x%x:0x%x.\n",
 843                         ent->vendor, ent->device);
 844                 return -ENODEV;
 845         }
 846
 847         pci_mem_addr = pci_iomap(dev, 1, 0x80);
 848         if (!pci_mem_addr) {
 849                 dev_warn(&dev->dev,
 850                         "Unable to detect the iLO2+ server memory.\n");
 851                 retval = -ENOMEM;
 852                 goto error_pci_iomap;
 853         }
 854         hpwdt_nmistat   = pci_mem_addr + 0x6e;
 855         hpwdt_timer_reg = pci_mem_addr + 0x70;
 856         hpwdt_timer_con = pci_mem_addr + 0x72;
 857
 858         /* Make sure that timer is disabled until /dev/watchdog is opened */
 859         hpwdt_stop();
 860
 861         /* Make sure that we have a valid soft_margin */
 862         if (hpwdt_change_timer(soft_margin))
 863                 hpwdt_change_timer(DEFAULT_MARGIN);
 864
 865         /* Initialize NMI Decoding functionality */
 866         retval = hpwdt_init_nmi_decoding(dev);
 867         if (retval != 0)
 868                 goto error_init_nmi_decoding;
 869
 870         retval = misc_register(&hpwdt_miscdev);
 871         if (retval < 0) {
 872                 dev_warn(&dev->dev,
 873                         "Unable to register miscdev on minor=%d (err=%d).\n",
 874                         WATCHDOG_MINOR, retval);
 875                 goto error_misc_register;
 876         }
 877
 878         dev_info(&dev->dev, "HPE Watchdog Timer Driver: %s"
 879                         ", timer margin: %d seconds (nowayout=%d).\n",
 880                         HPWDT_VERSION, soft_margin, nowayout);
 881         return 0;
 882
 883 error_misc_register:
 884         hpwdt_exit_nmi_decoding();
 885 error_init_nmi_decoding:
 886         pci_iounmap(dev, pci_mem_addr);
 887 error_pci_iomap:
 888         pci_disable_device(dev);
 889         return retval;
 890 }
 891
 892 static void hpwdt_exit(struct pci_dev *dev)
 893 {
 894         if (!nowayout)
 895                 hpwdt_stop();
 896
 897         misc_deregister(&hpwdt_miscdev);
 898         hpwdt_exit_nmi_decoding();
 899         pci_iounmap(dev, pci_mem_addr);
 900         pci_disable_device(dev);
 901 }
 902
 903 static struct pci_driver hpwdt_driver = {
 904         .name = "hpwdt",
 905         .id_table = hpwdt_devices,
 906         .probe = hpwdt_init_one,
 907         .remove = hpwdt_exit,
 908 };
 909
 910 MODULE_AUTHOR("Tom Mingarelli");
 911 MODULE_DESCRIPTION("hp watchdog driver");
 912 MODULE_LICENSE("GPL");
 913 MODULE_VERSION(HPWDT_VERSION);
 914
 915 module_param(soft_margin, int, 0);
 916 MODULE_PARM_DESC(soft_margin, "Watchdog timeout in seconds");
 917
 918 module_param(nowayout, bool, 0);
 919 MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
 920                 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
 921
 922 #ifdef CONFIG_HPWDT_NMI_DECODING
 923 module_param(allow_kdump, int, 0);
 924 MODULE_PARM_DESC(allow_kdump, "Start a kernel dump after NMI occurs");
 925 #endif /* !CONFIG_HPWDT_NMI_DECODING */
 926
 927 module_pci_driver(hpwdt_driver);