1 /***************************************************************************
2 * Copyright (C) 2006 by Hans Edgington <hans@edgington.nl> *
3 * Copyright (C) 2007-2009 Hans de Goede <hdegoede@redhat.com> *
4 * Copyright (C) 2010 Giel van Schijndel <me@mortis.eu> *
6 * This program is free software; you can redistribute it and/or modify *
7 * it under the terms of the GNU General Public License as published by *
8 * the Free Software Foundation; either version 2 of the License, or *
9 * (at your option) any later version. *
11 * This program is distributed in the hope that it will be useful, *
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
14 * GNU General Public License for more details. *
16 * You should have received a copy of the GNU General Public License *
17 * along with this program; if not, write to the *
18 * Free Software Foundation, Inc., *
19 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
20 ***************************************************************************/
22 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
24 #include <linux/err.h>
26 #include <linux/init.h>
28 #include <linux/ioport.h>
29 #include <linux/miscdevice.h>
30 #include <linux/module.h>
31 #include <linux/mutex.h>
32 #include <linux/notifier.h>
33 #include <linux/reboot.h>
34 #include <linux/uaccess.h>
35 #include <linux/watchdog.h>
37 #define DRVNAME "f71808e_wdt"
39 #define SIO_F71808FG_LD_WDT 0x07 /* Watchdog timer logical device */
40 #define SIO_UNLOCK_KEY 0x87 /* Key to enable Super-I/O */
41 #define SIO_LOCK_KEY 0xAA /* Key to disable Super-I/O */
43 #define SIO_REG_LDSEL 0x07 /* Logical device select */
44 #define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
45 #define SIO_REG_DEVREV 0x22 /* Device revision */
46 #define SIO_REG_MANID 0x23 /* Fintek ID (2 bytes) */
47 #define SIO_REG_ROM_ADDR_SEL 0x27 /* ROM address select */
48 #define SIO_REG_MFUNCT1 0x29 /* Multi function select 1 */
49 #define SIO_REG_MFUNCT2 0x2a /* Multi function select 2 */
50 #define SIO_REG_MFUNCT3 0x2b /* Multi function select 3 */
51 #define SIO_REG_ENABLE 0x30 /* Logical device enable */
52 #define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
54 #define SIO_FINTEK_ID 0x1934 /* Manufacturers ID */
55 #define SIO_F71808_ID 0x0901 /* Chipset ID */
56 #define SIO_F71858_ID 0x0507 /* Chipset ID */
57 #define SIO_F71862_ID 0x0601 /* Chipset ID */
58 #define SIO_F71869_ID 0x0814 /* Chipset ID */
59 #define SIO_F71869A_ID 0x1007 /* Chipset ID */
60 #define SIO_F71882_ID 0x0541 /* Chipset ID */
61 #define SIO_F71889_ID 0x0723 /* Chipset ID */
62 #define SIO_F81865_ID 0x0704 /* Chipset ID */
64 #define F71808FG_REG_WDO_CONF 0xf0
65 #define F71808FG_REG_WDT_CONF 0xf5
66 #define F71808FG_REG_WD_TIME 0xf6
68 #define F71808FG_FLAG_WDOUT_EN 7
70 #define F71808FG_FLAG_WDTMOUT_STS 6
71 #define F71808FG_FLAG_WD_EN 5
72 #define F71808FG_FLAG_WD_PULSE 4
73 #define F71808FG_FLAG_WD_UNIT 3
75 #define F81865_REG_WDO_CONF 0xfa
76 #define F81865_FLAG_WDOUT_EN 0
79 #define WATCHDOG_TIMEOUT 60 /* 1 minute default timeout */
80 #define WATCHDOG_MAX_TIMEOUT (60 * 255)
81 #define WATCHDOG_PULSE_WIDTH 125 /* 125 ms, default pulse width for
83 #define WATCHDOG_F71862FG_PIN 63 /* default watchdog reset output
86 static unsigned short force_id;
87 module_param(force_id, ushort, 0);
88 MODULE_PARM_DESC(force_id, "Override the detected device ID");
90 static const int max_timeout = WATCHDOG_MAX_TIMEOUT;
91 static int timeout = WATCHDOG_TIMEOUT; /* default timeout in seconds */
92 module_param(timeout, int, 0);
93 MODULE_PARM_DESC(timeout,
94 "Watchdog timeout in seconds. 1<= timeout <="
95 __MODULE_STRING(WATCHDOG_MAX_TIMEOUT) " (default="
96 __MODULE_STRING(WATCHDOG_TIMEOUT) ")");
98 static unsigned int pulse_width = WATCHDOG_PULSE_WIDTH;
99 module_param(pulse_width, uint, 0);
100 MODULE_PARM_DESC(pulse_width,
101 "Watchdog signal pulse width. 0(=level), 1 ms, 25 ms, 125 ms or 5000 ms"
102 " (default=" __MODULE_STRING(WATCHDOG_PULSE_WIDTH) ")");
104 static unsigned int f71862fg_pin = WATCHDOG_F71862FG_PIN;
105 module_param(f71862fg_pin, uint, 0);
106 MODULE_PARM_DESC(f71862fg_pin,
107 "Watchdog f71862fg reset output pin configuration. Choose pin 56 or 63"
108 " (default=" __MODULE_STRING(WATCHDOG_F71862FG_PIN)")");
110 static bool nowayout = WATCHDOG_NOWAYOUT;
111 module_param(nowayout, bool, 0444);
112 MODULE_PARM_DESC(nowayout, "Disable watchdog shutdown on close");
114 static unsigned int start_withtimeout;
115 module_param(start_withtimeout, uint, 0);
116 MODULE_PARM_DESC(start_withtimeout, "Start watchdog timer on module load with"
117 " given initial timeout. Zero (default) disables this feature.");
119 enum chips { f71808fg, f71858fg, f71862fg, f71869, f71882fg, f71889fg, f81865 };
121 static const char *f71808e_names[] = {
131 /* Super-I/O Function prototypes */
132 static inline int superio_inb(int base, int reg);
133 static inline int superio_inw(int base, int reg);
134 static inline void superio_outb(int base, int reg, u8 val);
135 static inline void superio_set_bit(int base, int reg, int bit);
136 static inline void superio_clear_bit(int base, int reg, int bit);
137 static inline int superio_enter(int base);
138 static inline void superio_select(int base, int ld);
139 static inline void superio_exit(int base);
141 struct watchdog_data {
142 unsigned short sioaddr;
144 unsigned long opened;
147 struct watchdog_info ident;
149 unsigned short timeout;
150 u8 timer_val; /* content for the wd_time register */
152 u8 pulse_val; /* pulse width flag */
153 char pulse_mode; /* enable pulse output mode? */
154 char caused_reboot; /* last reboot was by the watchdog */
157 static struct watchdog_data watchdog = {
158 .lock = __MUTEX_INITIALIZER(watchdog.lock),
161 /* Super I/O functions */
162 static inline int superio_inb(int base, int reg)
165 return inb(base + 1);
168 static int superio_inw(int base, int reg)
171 val = superio_inb(base, reg) << 8;
172 val |= superio_inb(base, reg + 1);
176 static inline void superio_outb(int base, int reg, u8 val)
182 static inline void superio_set_bit(int base, int reg, int bit)
184 unsigned long val = superio_inb(base, reg);
185 __set_bit(bit, &val);
186 superio_outb(base, reg, val);
189 static inline void superio_clear_bit(int base, int reg, int bit)
191 unsigned long val = superio_inb(base, reg);
192 __clear_bit(bit, &val);
193 superio_outb(base, reg, val);
196 static inline int superio_enter(int base)
198 /* Don't step on other drivers' I/O space by accident */
199 if (!request_muxed_region(base, 2, DRVNAME)) {
200 pr_err("I/O address 0x%04x already in use\n", (int)base);
204 /* according to the datasheet the key must be sent twice! */
205 outb(SIO_UNLOCK_KEY, base);
206 outb(SIO_UNLOCK_KEY, base);
211 static inline void superio_select(int base, int ld)
213 outb(SIO_REG_LDSEL, base);
217 static inline void superio_exit(int base)
219 outb(SIO_LOCK_KEY, base);
220 release_region(base, 2);
223 static int watchdog_set_timeout(int timeout)
226 || timeout > max_timeout) {
227 pr_err("watchdog timeout out of range\n");
231 mutex_lock(&watchdog.lock);
233 watchdog.timeout = timeout;
234 if (timeout > 0xff) {
235 watchdog.timer_val = DIV_ROUND_UP(timeout, 60);
236 watchdog.minutes_mode = true;
238 watchdog.timer_val = timeout;
239 watchdog.minutes_mode = false;
242 mutex_unlock(&watchdog.lock);
247 static int watchdog_set_pulse_width(unsigned int pw)
251 mutex_lock(&watchdog.lock);
254 watchdog.pulse_val = 0;
255 } else if (pw <= 25) {
256 watchdog.pulse_val = 1;
257 } else if (pw <= 125) {
258 watchdog.pulse_val = 2;
259 } else if (pw <= 5000) {
260 watchdog.pulse_val = 3;
262 pr_err("pulse width out of range\n");
267 watchdog.pulse_mode = pw;
270 mutex_unlock(&watchdog.lock);
274 static int watchdog_keepalive(void)
278 mutex_lock(&watchdog.lock);
279 err = superio_enter(watchdog.sioaddr);
282 superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
284 if (watchdog.minutes_mode)
285 /* select minutes for timer units */
286 superio_set_bit(watchdog.sioaddr, F71808FG_REG_WDT_CONF,
287 F71808FG_FLAG_WD_UNIT);
289 /* select seconds for timer units */
290 superio_clear_bit(watchdog.sioaddr, F71808FG_REG_WDT_CONF,
291 F71808FG_FLAG_WD_UNIT);
293 /* Set timer value */
294 superio_outb(watchdog.sioaddr, F71808FG_REG_WD_TIME,
297 superio_exit(watchdog.sioaddr);
300 mutex_unlock(&watchdog.lock);
304 static int f71862fg_pin_configure(unsigned short ioaddr)
306 /* When ioaddr is non-zero the calling function has to take care of
307 mutex handling and superio preparation! */
309 if (f71862fg_pin == 63) {
311 /* SPI must be disabled first to use this pin! */
312 superio_clear_bit(ioaddr, SIO_REG_ROM_ADDR_SEL, 6);
313 superio_set_bit(ioaddr, SIO_REG_MFUNCT3, 4);
315 } else if (f71862fg_pin == 56) {
317 superio_set_bit(ioaddr, SIO_REG_MFUNCT1, 1);
319 pr_err("Invalid argument f71862fg_pin=%d\n", f71862fg_pin);
325 static int watchdog_start(void)
327 /* Make sure we don't die as soon as the watchdog is enabled below */
328 int err = watchdog_keepalive();
332 mutex_lock(&watchdog.lock);
333 err = superio_enter(watchdog.sioaddr);
336 superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
338 /* Watchdog pin configuration */
339 switch (watchdog.type) {
341 /* Set pin 21 to GPIO23/WDTRST#, then to WDTRST# */
342 superio_clear_bit(watchdog.sioaddr, SIO_REG_MFUNCT2, 3);
343 superio_clear_bit(watchdog.sioaddr, SIO_REG_MFUNCT3, 3);
347 err = f71862fg_pin_configure(watchdog.sioaddr);
353 /* GPIO14 --> WDTRST# */
354 superio_clear_bit(watchdog.sioaddr, SIO_REG_MFUNCT1, 4);
358 /* Set pin 56 to WDTRST# */
359 superio_set_bit(watchdog.sioaddr, SIO_REG_MFUNCT1, 1);
363 /* set pin 40 to WDTRST# */
364 superio_outb(watchdog.sioaddr, SIO_REG_MFUNCT3,
365 superio_inb(watchdog.sioaddr, SIO_REG_MFUNCT3) & 0xcf);
369 /* Set pin 70 to WDTRST# */
370 superio_clear_bit(watchdog.sioaddr, SIO_REG_MFUNCT3, 5);
375 * 'default' label to shut up the compiler and catch
382 superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
383 superio_set_bit(watchdog.sioaddr, SIO_REG_ENABLE, 0);
385 if (watchdog.type == f81865)
386 superio_set_bit(watchdog.sioaddr, F81865_REG_WDO_CONF,
387 F81865_FLAG_WDOUT_EN);
389 superio_set_bit(watchdog.sioaddr, F71808FG_REG_WDO_CONF,
390 F71808FG_FLAG_WDOUT_EN);
392 superio_set_bit(watchdog.sioaddr, F71808FG_REG_WDT_CONF,
393 F71808FG_FLAG_WD_EN);
395 if (watchdog.pulse_mode) {
396 /* Select "pulse" output mode with given duration */
397 u8 wdt_conf = superio_inb(watchdog.sioaddr,
398 F71808FG_REG_WDT_CONF);
400 /* Set WD_PSWIDTH bits (1:0) */
401 wdt_conf = (wdt_conf & 0xfc) | (watchdog.pulse_val & 0x03);
402 /* Set WD_PULSE to "pulse" mode */
403 wdt_conf |= BIT(F71808FG_FLAG_WD_PULSE);
405 superio_outb(watchdog.sioaddr, F71808FG_REG_WDT_CONF,
408 /* Select "level" output mode */
409 superio_clear_bit(watchdog.sioaddr, F71808FG_REG_WDT_CONF,
410 F71808FG_FLAG_WD_PULSE);
414 superio_exit(watchdog.sioaddr);
416 mutex_unlock(&watchdog.lock);
421 static int watchdog_stop(void)
425 mutex_lock(&watchdog.lock);
426 err = superio_enter(watchdog.sioaddr);
429 superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
431 superio_clear_bit(watchdog.sioaddr, F71808FG_REG_WDT_CONF,
432 F71808FG_FLAG_WD_EN);
434 superio_exit(watchdog.sioaddr);
437 mutex_unlock(&watchdog.lock);
442 static int watchdog_get_status(void)
446 mutex_lock(&watchdog.lock);
447 status = (watchdog.caused_reboot) ? WDIOF_CARDRESET : 0;
448 mutex_unlock(&watchdog.lock);
453 static bool watchdog_is_running(void)
456 * if we fail to determine the watchdog's status assume it to be
457 * running to be on the safe side
459 bool is_running = true;
461 mutex_lock(&watchdog.lock);
462 if (superio_enter(watchdog.sioaddr))
464 superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
466 is_running = (superio_inb(watchdog.sioaddr, SIO_REG_ENABLE) & BIT(0))
467 && (superio_inb(watchdog.sioaddr, F71808FG_REG_WDT_CONF)
468 & F71808FG_FLAG_WD_EN);
470 superio_exit(watchdog.sioaddr);
473 mutex_unlock(&watchdog.lock);
477 /* /dev/watchdog api */
479 static int watchdog_open(struct inode *inode, struct file *file)
483 /* If the watchdog is alive we don't need to start it again */
484 if (test_and_set_bit(0, &watchdog.opened))
487 err = watchdog_start();
489 clear_bit(0, &watchdog.opened);
494 __module_get(THIS_MODULE);
496 watchdog.expect_close = 0;
497 return nonseekable_open(inode, file);
500 static int watchdog_release(struct inode *inode, struct file *file)
502 clear_bit(0, &watchdog.opened);
504 if (!watchdog.expect_close) {
505 watchdog_keepalive();
506 pr_crit("Unexpected close, not stopping watchdog!\n");
507 } else if (!nowayout) {
515 * @file: file handle to the watchdog
516 * @buf: buffer to write
517 * @count: count of bytes
518 * @ppos: pointer to the position to write. No seeks allowed
520 * A write to a watchdog device is defined as a keepalive signal. Any
521 * write of data will do, as we we don't define content meaning.
524 static ssize_t watchdog_write(struct file *file, const char __user *buf,
525 size_t count, loff_t *ppos)
531 /* In case it was set long ago */
532 bool expect_close = false;
534 for (i = 0; i != count; i++) {
536 if (get_user(c, buf + i))
538 expect_close = (c == 'V');
541 /* Properly order writes across fork()ed processes */
542 mutex_lock(&watchdog.lock);
543 watchdog.expect_close = expect_close;
544 mutex_unlock(&watchdog.lock);
547 /* someone wrote to us, we should restart timer */
548 watchdog_keepalive();
555 * @inode: inode of the device
556 * @file: file handle to the device
557 * @cmd: watchdog command
558 * @arg: argument pointer
560 * The watchdog API defines a common set of functions for all watchdogs
561 * according to their available features.
563 static long watchdog_ioctl(struct file *file, unsigned int cmd,
570 struct watchdog_info __user *ident;
574 uarg.i = (int __user *)arg;
577 case WDIOC_GETSUPPORT:
578 return copy_to_user(uarg.ident, &watchdog.ident,
579 sizeof(watchdog.ident)) ? -EFAULT : 0;
581 case WDIOC_GETSTATUS:
582 status = watchdog_get_status();
585 return put_user(status, uarg.i);
587 case WDIOC_GETBOOTSTATUS:
588 return put_user(0, uarg.i);
590 case WDIOC_SETOPTIONS:
591 if (get_user(new_options, uarg.i))
594 if (new_options & WDIOS_DISABLECARD)
597 if (new_options & WDIOS_ENABLECARD)
598 return watchdog_start();
601 case WDIOC_KEEPALIVE:
602 watchdog_keepalive();
605 case WDIOC_SETTIMEOUT:
606 if (get_user(new_timeout, uarg.i))
609 if (watchdog_set_timeout(new_timeout))
612 watchdog_keepalive();
615 case WDIOC_GETTIMEOUT:
616 return put_user(watchdog.timeout, uarg.i);
624 static int watchdog_notify_sys(struct notifier_block *this, unsigned long code,
627 if (code == SYS_DOWN || code == SYS_HALT)
632 static const struct file_operations watchdog_fops = {
633 .owner = THIS_MODULE,
635 .open = watchdog_open,
636 .release = watchdog_release,
637 .write = watchdog_write,
638 .unlocked_ioctl = watchdog_ioctl,
641 static struct miscdevice watchdog_miscdev = {
642 .minor = WATCHDOG_MINOR,
644 .fops = &watchdog_fops,
647 static struct notifier_block watchdog_notifier = {
648 .notifier_call = watchdog_notify_sys,
651 static int __init watchdog_init(int sioaddr)
653 int wdt_conf, err = 0;
655 /* No need to lock watchdog.lock here because no entry points
656 * into the module have been registered yet.
658 watchdog.sioaddr = sioaddr;
659 watchdog.ident.options = WDIOC_SETTIMEOUT
661 | WDIOF_KEEPALIVEPING;
663 snprintf(watchdog.ident.identity,
664 sizeof(watchdog.ident.identity), "%s watchdog",
665 f71808e_names[watchdog.type]);
667 err = superio_enter(sioaddr);
670 superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
672 wdt_conf = superio_inb(sioaddr, F71808FG_REG_WDT_CONF);
673 watchdog.caused_reboot = wdt_conf & BIT(F71808FG_FLAG_WDTMOUT_STS);
675 superio_exit(sioaddr);
677 err = watchdog_set_timeout(timeout);
680 err = watchdog_set_pulse_width(pulse_width);
684 err = register_reboot_notifier(&watchdog_notifier);
688 err = misc_register(&watchdog_miscdev);
690 pr_err("cannot register miscdev on minor=%d\n",
691 watchdog_miscdev.minor);
695 if (start_withtimeout) {
696 if (start_withtimeout <= 0
697 || start_withtimeout > max_timeout) {
698 pr_err("starting timeout out of range\n");
703 err = watchdog_start();
705 pr_err("cannot start watchdog timer\n");
709 mutex_lock(&watchdog.lock);
710 err = superio_enter(sioaddr);
713 superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
715 if (start_withtimeout > 0xff) {
716 /* select minutes for timer units */
717 superio_set_bit(sioaddr, F71808FG_REG_WDT_CONF,
718 F71808FG_FLAG_WD_UNIT);
719 superio_outb(sioaddr, F71808FG_REG_WD_TIME,
720 DIV_ROUND_UP(start_withtimeout, 60));
722 /* select seconds for timer units */
723 superio_clear_bit(sioaddr, F71808FG_REG_WDT_CONF,
724 F71808FG_FLAG_WD_UNIT);
725 superio_outb(sioaddr, F71808FG_REG_WD_TIME,
729 superio_exit(sioaddr);
730 mutex_unlock(&watchdog.lock);
733 __module_get(THIS_MODULE);
735 pr_info("watchdog started with initial timeout of %u sec\n",
742 mutex_unlock(&watchdog.lock);
744 misc_deregister(&watchdog_miscdev);
746 unregister_reboot_notifier(&watchdog_notifier);
751 static int __init f71808e_find(int sioaddr)
754 int err = superio_enter(sioaddr);
758 devid = superio_inw(sioaddr, SIO_REG_MANID);
759 if (devid != SIO_FINTEK_ID) {
760 pr_debug("Not a Fintek device\n");
765 devid = force_id ? force_id : superio_inw(sioaddr, SIO_REG_DEVID);
768 watchdog.type = f71808fg;
771 watchdog.type = f71862fg;
772 err = f71862fg_pin_configure(0); /* validate module parameter */
776 watchdog.type = f71869;
779 watchdog.type = f71882fg;
782 watchdog.type = f71889fg;
785 /* Confirmed (by datasheet) not to have a watchdog. */
789 watchdog.type = f81865;
792 pr_info("Unrecognized Fintek device: %04x\n",
793 (unsigned int)devid);
798 pr_info("Found %s watchdog chip, revision %d\n",
799 f71808e_names[watchdog.type],
800 (int)superio_inb(sioaddr, SIO_REG_DEVREV));
802 superio_exit(sioaddr);
806 static int __init f71808e_init(void)
808 static const unsigned short addrs[] = { 0x2e, 0x4e };
812 for (i = 0; i < ARRAY_SIZE(addrs); i++) {
813 err = f71808e_find(addrs[i]);
817 if (i == ARRAY_SIZE(addrs))
820 return watchdog_init(addrs[i]);
823 static void __exit f71808e_exit(void)
825 if (watchdog_is_running()) {
826 pr_warn("Watchdog timer still running, stopping it\n");
829 misc_deregister(&watchdog_miscdev);
830 unregister_reboot_notifier(&watchdog_notifier);
833 MODULE_DESCRIPTION("F71808E Watchdog Driver");
834 MODULE_AUTHOR("Giel van Schijndel <me@mortis.eu>");
835 MODULE_LICENSE("GPL");
837 module_init(f71808e_init);
838 module_exit(f71808e_exit);