drivers/watchdog/atlas7_wdt.c

   1 /*
   2  * Watchdog driver for CSR Atlas7
   3  *
   4  * Copyright (c) 2015 Cambridge Silicon Radio Limited, a CSR plc group company.
   5  *
   6  * Licensed under GPLv2.
   7  */
   8
   9 #include <linux/clk.h>
  10 #include <linux/io.h>
  11 #include <linux/module.h>
  12 #include <linux/moduleparam.h>
  13 #include <linux/of.h>
  14 #include <linux/platform_device.h>
  15 #include <linux/watchdog.h>
  16
  17 #define ATLAS7_TIMER_WDT_INDEX          5
  18 #define ATLAS7_WDT_DEFAULT_TIMEOUT      20
  19
  20 #define ATLAS7_WDT_CNT_CTRL     (0 + 4 * ATLAS7_TIMER_WDT_INDEX)
  21 #define ATLAS7_WDT_CNT_MATCH    (0x18 + 4 * ATLAS7_TIMER_WDT_INDEX)
  22 #define ATLAS7_WDT_CNT          (0x48 +  4 * ATLAS7_TIMER_WDT_INDEX)
  23 #define ATLAS7_WDT_CNT_EN       (BIT(0) | BIT(1))
  24 #define ATLAS7_WDT_EN           0x64
  25
  26 static unsigned int timeout = ATLAS7_WDT_DEFAULT_TIMEOUT;
  27 static bool nowayout = WATCHDOG_NOWAYOUT;
  28
  29 module_param(timeout, uint, 0);
  30 module_param(nowayout, bool, 0);
  31
  32 MODULE_PARM_DESC(timeout, "Default watchdog timeout (in seconds)");
  33 MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
  34                         __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
  35
  36 struct atlas7_wdog {
  37         struct device *dev;
  38         void __iomem *base;
  39         unsigned long tick_rate;
  40         struct clk *clk;
  41 };
  42
  43 static unsigned int atlas7_wdt_gettimeleft(struct watchdog_device *wdd)
  44 {
  45         struct atlas7_wdog *wdt = watchdog_get_drvdata(wdd);
  46         u32 counter, match, delta;
  47
  48         counter = readl(wdt->base + ATLAS7_WDT_CNT);
  49         match = readl(wdt->base + ATLAS7_WDT_CNT_MATCH);
  50         delta = match - counter;
  51
  52         return  delta / wdt->tick_rate;
  53 }
  54
  55 static int atlas7_wdt_ping(struct watchdog_device *wdd)
  56 {
  57         struct atlas7_wdog *wdt = watchdog_get_drvdata(wdd);
  58         u32 counter, match, delta;
  59
  60         counter = readl(wdt->base + ATLAS7_WDT_CNT);
  61         delta = wdd->timeout * wdt->tick_rate;
  62         match = counter + delta;
  63
  64         writel(match, wdt->base + ATLAS7_WDT_CNT_MATCH);
  65
  66         return 0;
  67 }
  68
  69 static int atlas7_wdt_enable(struct watchdog_device *wdd)
  70 {
  71         struct atlas7_wdog *wdt = watchdog_get_drvdata(wdd);
  72
  73         atlas7_wdt_ping(wdd);
  74
  75         writel(readl(wdt->base + ATLAS7_WDT_CNT_CTRL) | ATLAS7_WDT_CNT_EN,
  76               wdt->base + ATLAS7_WDT_CNT_CTRL);
  77         writel(1, wdt->base + ATLAS7_WDT_EN);
  78
  79         return 0;
  80 }
  81
  82 static int atlas7_wdt_disable(struct watchdog_device *wdd)
  83 {
  84         struct atlas7_wdog *wdt = watchdog_get_drvdata(wdd);
  85
  86         writel(0, wdt->base + ATLAS7_WDT_EN);
  87         writel(readl(wdt->base + ATLAS7_WDT_CNT_CTRL) & ~ATLAS7_WDT_CNT_EN,
  88               wdt->base + ATLAS7_WDT_CNT_CTRL);
  89
  90         return 0;
  91 }
  92
  93 static int atlas7_wdt_settimeout(struct watchdog_device *wdd, unsigned int to)
  94 {
  95         wdd->timeout = to;
  96
  97         return 0;
  98 }
  99
 100 #define OPTIONS (WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE)
 101
 102 static const struct watchdog_info atlas7_wdt_ident = {
 103         .options = OPTIONS,
 104         .firmware_version = 0,
 105         .identity = "atlas7 Watchdog",
 106 };
 107
 108 static const struct watchdog_ops atlas7_wdt_ops = {
 109         .owner = THIS_MODULE,
 110         .start = atlas7_wdt_enable,
 111         .stop = atlas7_wdt_disable,
 112         .get_timeleft = atlas7_wdt_gettimeleft,
 113         .ping = atlas7_wdt_ping,
 114         .set_timeout = atlas7_wdt_settimeout,
 115 };
 116
 117 static struct watchdog_device atlas7_wdd = {
 118         .info = &atlas7_wdt_ident,
 119         .ops = &atlas7_wdt_ops,
 120         .timeout = ATLAS7_WDT_DEFAULT_TIMEOUT,
 121 };
 122
 123 static const struct of_device_id atlas7_wdt_ids[] = {
 124         { .compatible = "sirf,atlas7-tick"},
 125         {}
 126 };
 127
 128 static void atlas7_clk_disable_unprepare(void *data)
 129 {
 130         clk_disable_unprepare(data);
 131 }
 132
 133 static int atlas7_wdt_probe(struct platform_device *pdev)
 134 {
 135         struct device *dev = &pdev->dev;
 136         struct atlas7_wdog *wdt;
 137         struct clk *clk;
 138         int ret;
 139
 140         wdt = devm_kzalloc(dev, sizeof(*wdt), GFP_KERNEL);
 141         if (!wdt)
 142                 return -ENOMEM;
 143         wdt->base = devm_platform_ioremap_resource(pdev, 0);
 144         if (IS_ERR(wdt->base))
 145                 return PTR_ERR(wdt->base);
 146
 147         clk = devm_clk_get(dev, NULL);
 148         if (IS_ERR(clk))
 149                 return PTR_ERR(clk);
 150         ret = clk_prepare_enable(clk);
 151         if (ret) {
 152                 dev_err(dev, "clk enable failed\n");
 153                 return ret;
 154         }
 155         ret = devm_add_action_or_reset(dev, atlas7_clk_disable_unprepare, clk);
 156         if (ret)
 157                 return ret;
 158
 159         /* disable watchdog hardware */
 160         writel(0, wdt->base + ATLAS7_WDT_CNT_CTRL);
 161
 162         wdt->tick_rate = clk_get_rate(clk);
 163         if (!wdt->tick_rate)
 164                 return -EINVAL;
 165
 166         wdt->clk = clk;
 167         atlas7_wdd.min_timeout = 1;
 168         atlas7_wdd.max_timeout = UINT_MAX / wdt->tick_rate;
 169
 170         watchdog_init_timeout(&atlas7_wdd, 0, dev);
 171         watchdog_set_nowayout(&atlas7_wdd, nowayout);
 172
 173         watchdog_set_drvdata(&atlas7_wdd, wdt);
 174         platform_set_drvdata(pdev, &atlas7_wdd);
 175
 176         watchdog_stop_on_reboot(&atlas7_wdd);
 177         watchdog_stop_on_unregister(&atlas7_wdd);
 178         return devm_watchdog_register_device(dev, &atlas7_wdd);
 179 }
 180
 181 static int __maybe_unused atlas7_wdt_suspend(struct device *dev)
 182 {
 183         /*
 184          * NOTE:timer controller registers settings are saved
 185          * and restored back by the timer-atlas7.c
 186          */
 187         return 0;
 188 }
 189
 190 static int __maybe_unused atlas7_wdt_resume(struct device *dev)
 191 {
 192         struct watchdog_device *wdd = dev_get_drvdata(dev);
 193
 194         /*
 195          * NOTE: Since timer controller registers settings are saved
 196          * and restored back by the timer-atlas7.c, so we need not
 197          * update WD settings except refreshing timeout.
 198          */
 199         atlas7_wdt_ping(wdd);
 200
 201         return 0;
 202 }
 203
 204 static SIMPLE_DEV_PM_OPS(atlas7_wdt_pm_ops,
 205                 atlas7_wdt_suspend, atlas7_wdt_resume);
 206
 207 MODULE_DEVICE_TABLE(of, atlas7_wdt_ids);
 208
 209 static struct platform_driver atlas7_wdt_driver = {
 210         .driver = {
 211                 .name = "atlas7-wdt",
 212                 .pm = &atlas7_wdt_pm_ops,
 213                 .of_match_table = atlas7_wdt_ids,
 214         },
 215         .probe = atlas7_wdt_probe,
 216 };
 217 module_platform_driver(atlas7_wdt_driver);
 218
 219 MODULE_DESCRIPTION("CSRatlas7 watchdog driver");
 220 MODULE_AUTHOR("Guo Zeng <Guo.Zeng@csr.com>");
 221 MODULE_LICENSE("GPL v2");
 222 MODULE_ALIAS("platform:atlas7-wdt");