2 * linux/drivers/video/omap2/dss/rfbi.c
4 * Copyright (C) 2009 Nokia Corporation
5 * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
7 * Some code and ideas taken from drivers/video/omap/ driver
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License version 2 as published by
12 * the Free Software Foundation.
14 * This program is distributed in the hope that it will be useful, but WITHOUT
15 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
19 * You should have received a copy of the GNU General Public License along with
20 * this program. If not, see <http://www.gnu.org/licenses/>.
23 #define DSS_SUBSYS_NAME "RFBI"
25 #include <linux/kernel.h>
26 #include <linux/dma-mapping.h>
27 #include <linux/vmalloc.h>
28 #include <linux/clk.h>
30 #include <linux/delay.h>
31 #include <linux/kfifo.h>
32 #include <linux/ktime.h>
33 #include <linux/hrtimer.h>
34 #include <linux/seq_file.h>
36 #include <plat/display.h>
39 /*#define MEASURE_PERF*/
41 #define RFBI_BASE 0x48050800
43 struct rfbi_reg { u16 idx; };
45 #define RFBI_REG(idx) ((const struct rfbi_reg) { idx })
47 #define RFBI_REVISION RFBI_REG(0x0000)
48 #define RFBI_SYSCONFIG RFBI_REG(0x0010)
49 #define RFBI_SYSSTATUS RFBI_REG(0x0014)
50 #define RFBI_CONTROL RFBI_REG(0x0040)
51 #define RFBI_PIXEL_CNT RFBI_REG(0x0044)
52 #define RFBI_LINE_NUMBER RFBI_REG(0x0048)
53 #define RFBI_CMD RFBI_REG(0x004c)
54 #define RFBI_PARAM RFBI_REG(0x0050)
55 #define RFBI_DATA RFBI_REG(0x0054)
56 #define RFBI_READ RFBI_REG(0x0058)
57 #define RFBI_STATUS RFBI_REG(0x005c)
59 #define RFBI_CONFIG(n) RFBI_REG(0x0060 + (n)*0x18)
60 #define RFBI_ONOFF_TIME(n) RFBI_REG(0x0064 + (n)*0x18)
61 #define RFBI_CYCLE_TIME(n) RFBI_REG(0x0068 + (n)*0x18)
62 #define RFBI_DATA_CYCLE1(n) RFBI_REG(0x006c + (n)*0x18)
63 #define RFBI_DATA_CYCLE2(n) RFBI_REG(0x0070 + (n)*0x18)
64 #define RFBI_DATA_CYCLE3(n) RFBI_REG(0x0074 + (n)*0x18)
66 #define RFBI_VSYNC_WIDTH RFBI_REG(0x0090)
67 #define RFBI_HSYNC_WIDTH RFBI_REG(0x0094)
69 #define RFBI_CMD_FIFO_LEN_BYTES (16 * sizeof(struct update_param))
71 #define REG_FLD_MOD(idx, val, start, end) \
72 rfbi_write_reg(idx, FLD_MOD(rfbi_read_reg(idx), val, start, end))
74 /* To work around an RFBI transfer rate limitation */
75 #define OMAP_RFBI_RATE_LIMIT 1
77 enum omap_rfbi_cycleformat {
78 OMAP_DSS_RFBI_CYCLEFORMAT_1_1 = 0,
79 OMAP_DSS_RFBI_CYCLEFORMAT_2_1 = 1,
80 OMAP_DSS_RFBI_CYCLEFORMAT_3_1 = 2,
81 OMAP_DSS_RFBI_CYCLEFORMAT_3_2 = 3,
84 enum omap_rfbi_datatype {
85 OMAP_DSS_RFBI_DATATYPE_12 = 0,
86 OMAP_DSS_RFBI_DATATYPE_16 = 1,
87 OMAP_DSS_RFBI_DATATYPE_18 = 2,
88 OMAP_DSS_RFBI_DATATYPE_24 = 3,
91 enum omap_rfbi_parallelmode {
92 OMAP_DSS_RFBI_PARALLELMODE_8 = 0,
93 OMAP_DSS_RFBI_PARALLELMODE_9 = 1,
94 OMAP_DSS_RFBI_PARALLELMODE_12 = 2,
95 OMAP_DSS_RFBI_PARALLELMODE_16 = 3,
103 static int rfbi_convert_timings(struct rfbi_timings *t);
104 static void rfbi_get_clk_info(u32 *clk_period, u32 *max_clk_div);
105 static void process_cmd_fifo(void);
110 unsigned long l4_khz;
112 enum omap_rfbi_datatype datatype;
113 enum omap_rfbi_parallelmode parallelmode;
115 enum omap_rfbi_te_mode te_mode;
118 void (*framedone_callback)(void *data);
119 void *framedone_callback_data;
121 struct omap_dss_device *dssdev[2];
123 struct kfifo *cmd_fifo;
125 struct completion cmd_done;
126 atomic_t cmd_fifo_full;
127 atomic_t cmd_pending;
130 ktime_t perf_setup_time;
131 ktime_t perf_start_time;
135 struct update_region {
142 struct update_param {
147 struct update_region r;
148 struct completion *sync;
152 static inline void rfbi_write_reg(const struct rfbi_reg idx, u32 val)
154 __raw_writel(val, rfbi.base + idx.idx);
157 static inline u32 rfbi_read_reg(const struct rfbi_reg idx)
159 return __raw_readl(rfbi.base + idx.idx);
162 static void rfbi_enable_clocks(bool enable)
165 dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK1);
167 dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1);
170 void omap_rfbi_write_command(const void *buf, u32 len)
172 rfbi_enable_clocks(1);
173 switch (rfbi.parallelmode) {
174 case OMAP_DSS_RFBI_PARALLELMODE_8:
178 rfbi_write_reg(RFBI_CMD, *b++);
182 case OMAP_DSS_RFBI_PARALLELMODE_16:
186 for (; len; len -= 2)
187 rfbi_write_reg(RFBI_CMD, *w++);
191 case OMAP_DSS_RFBI_PARALLELMODE_9:
192 case OMAP_DSS_RFBI_PARALLELMODE_12:
196 rfbi_enable_clocks(0);
198 EXPORT_SYMBOL(omap_rfbi_write_command);
200 void omap_rfbi_read_data(void *buf, u32 len)
202 rfbi_enable_clocks(1);
203 switch (rfbi.parallelmode) {
204 case OMAP_DSS_RFBI_PARALLELMODE_8:
208 rfbi_write_reg(RFBI_READ, 0);
209 *b++ = rfbi_read_reg(RFBI_READ);
214 case OMAP_DSS_RFBI_PARALLELMODE_16:
218 for (; len; len -= 2) {
219 rfbi_write_reg(RFBI_READ, 0);
220 *w++ = rfbi_read_reg(RFBI_READ);
225 case OMAP_DSS_RFBI_PARALLELMODE_9:
226 case OMAP_DSS_RFBI_PARALLELMODE_12:
230 rfbi_enable_clocks(0);
232 EXPORT_SYMBOL(omap_rfbi_read_data);
234 void omap_rfbi_write_data(const void *buf, u32 len)
236 rfbi_enable_clocks(1);
237 switch (rfbi.parallelmode) {
238 case OMAP_DSS_RFBI_PARALLELMODE_8:
242 rfbi_write_reg(RFBI_PARAM, *b++);
246 case OMAP_DSS_RFBI_PARALLELMODE_16:
250 for (; len; len -= 2)
251 rfbi_write_reg(RFBI_PARAM, *w++);
255 case OMAP_DSS_RFBI_PARALLELMODE_9:
256 case OMAP_DSS_RFBI_PARALLELMODE_12:
261 rfbi_enable_clocks(0);
263 EXPORT_SYMBOL(omap_rfbi_write_data);
265 void omap_rfbi_write_pixels(const void __iomem *buf, int scr_width,
269 int start_offset = scr_width * y + x;
270 int horiz_offset = scr_width - w;
273 rfbi_enable_clocks(1);
275 if (rfbi.datatype == OMAP_DSS_RFBI_DATATYPE_16 &&
276 rfbi.parallelmode == OMAP_DSS_RFBI_PARALLELMODE_8) {
277 const u16 __iomem *pd = buf;
281 for (i = 0; i < w; ++i) {
282 const u8 __iomem *b = (const u8 __iomem *)pd;
283 rfbi_write_reg(RFBI_PARAM, __raw_readb(b+1));
284 rfbi_write_reg(RFBI_PARAM, __raw_readb(b+0));
289 } else if (rfbi.datatype == OMAP_DSS_RFBI_DATATYPE_24 &&
290 rfbi.parallelmode == OMAP_DSS_RFBI_PARALLELMODE_8) {
291 const u32 __iomem *pd = buf;
295 for (i = 0; i < w; ++i) {
296 const u8 __iomem *b = (const u8 __iomem *)pd;
297 rfbi_write_reg(RFBI_PARAM, __raw_readb(b+2));
298 rfbi_write_reg(RFBI_PARAM, __raw_readb(b+1));
299 rfbi_write_reg(RFBI_PARAM, __raw_readb(b+0));
304 } else if (rfbi.datatype == OMAP_DSS_RFBI_DATATYPE_16 &&
305 rfbi.parallelmode == OMAP_DSS_RFBI_PARALLELMODE_16) {
306 const u16 __iomem *pd = buf;
310 for (i = 0; i < w; ++i) {
311 rfbi_write_reg(RFBI_PARAM, __raw_readw(pd));
320 rfbi_enable_clocks(0);
322 EXPORT_SYMBOL(omap_rfbi_write_pixels);
325 static void perf_mark_setup(void)
327 rfbi.perf_setup_time = ktime_get();
330 static void perf_mark_start(void)
332 rfbi.perf_start_time = ktime_get();
335 static void perf_show(const char *name)
337 ktime_t t, setup_time, trans_time;
339 u32 setup_us, trans_us, total_us;
343 setup_time = ktime_sub(rfbi.perf_start_time, rfbi.perf_setup_time);
344 setup_us = (u32)ktime_to_us(setup_time);
348 trans_time = ktime_sub(t, rfbi.perf_start_time);
349 trans_us = (u32)ktime_to_us(trans_time);
353 total_us = setup_us + trans_us;
355 total_bytes = rfbi.perf_bytes;
357 DSSINFO("%s update %u us + %u us = %u us (%uHz), %u bytes, "
363 1000*1000 / total_us,
365 total_bytes * 1000 / total_us);
368 #define perf_mark_setup()
369 #define perf_mark_start()
373 void rfbi_transfer_area(u16 width, u16 height,
374 void (callback)(void *data), void *data)
378 /*BUG_ON(callback == 0);*/
379 BUG_ON(rfbi.framedone_callback != NULL);
381 DSSDBG("rfbi_transfer_area %dx%d\n", width, height);
383 dispc_set_lcd_size(width, height);
385 dispc_enable_lcd_out(1);
387 rfbi.framedone_callback = callback;
388 rfbi.framedone_callback_data = data;
390 rfbi_enable_clocks(1);
392 rfbi_write_reg(RFBI_PIXEL_CNT, width * height);
394 l = rfbi_read_reg(RFBI_CONTROL);
395 l = FLD_MOD(l, 1, 0, 0); /* enable */
396 if (!rfbi.te_enabled)
397 l = FLD_MOD(l, 1, 4, 4); /* ITE */
401 rfbi_write_reg(RFBI_CONTROL, l);
404 static void framedone_callback(void *data, u32 mask)
406 void (*callback)(void *data);
408 DSSDBG("FRAMEDONE\n");
412 REG_FLD_MOD(RFBI_CONTROL, 0, 0, 0);
414 rfbi_enable_clocks(0);
416 callback = rfbi.framedone_callback;
417 rfbi.framedone_callback = NULL;
419 /*callback(rfbi.framedone_callback_data);*/
421 atomic_set(&rfbi.cmd_pending, 0);
427 static void rfbi_print_timings(void)
432 l = rfbi_read_reg(RFBI_CONFIG(0));
433 time = 1000000000 / rfbi.l4_khz;
437 DSSDBG("Tick time %u ps\n", time);
438 l = rfbi_read_reg(RFBI_ONOFF_TIME(0));
439 DSSDBG("CSONTIME %d, CSOFFTIME %d, WEONTIME %d, WEOFFTIME %d, "
440 "REONTIME %d, REOFFTIME %d\n",
441 l & 0x0f, (l >> 4) & 0x3f, (l >> 10) & 0x0f, (l >> 14) & 0x3f,
442 (l >> 20) & 0x0f, (l >> 24) & 0x3f);
444 l = rfbi_read_reg(RFBI_CYCLE_TIME(0));
445 DSSDBG("WECYCLETIME %d, RECYCLETIME %d, CSPULSEWIDTH %d, "
447 (l & 0x3f), (l >> 6) & 0x3f, (l >> 12) & 0x3f,
451 static void rfbi_print_timings(void) {}
457 static u32 extif_clk_period;
459 static inline unsigned long round_to_extif_ticks(unsigned long ps, int div)
461 int bus_tick = extif_clk_period * div;
462 return (ps + bus_tick - 1) / bus_tick * bus_tick;
465 static int calc_reg_timing(struct rfbi_timings *t, int div)
469 t->cs_on_time = round_to_extif_ticks(t->cs_on_time, div);
471 t->we_on_time = round_to_extif_ticks(t->we_on_time, div);
472 t->we_off_time = round_to_extif_ticks(t->we_off_time, div);
473 t->we_cycle_time = round_to_extif_ticks(t->we_cycle_time, div);
475 t->re_on_time = round_to_extif_ticks(t->re_on_time, div);
476 t->re_off_time = round_to_extif_ticks(t->re_off_time, div);
477 t->re_cycle_time = round_to_extif_ticks(t->re_cycle_time, div);
479 t->access_time = round_to_extif_ticks(t->access_time, div);
480 t->cs_off_time = round_to_extif_ticks(t->cs_off_time, div);
481 t->cs_pulse_width = round_to_extif_ticks(t->cs_pulse_width, div);
483 DSSDBG("[reg]cson %d csoff %d reon %d reoff %d\n",
484 t->cs_on_time, t->cs_off_time, t->re_on_time, t->re_off_time);
485 DSSDBG("[reg]weon %d weoff %d recyc %d wecyc %d\n",
486 t->we_on_time, t->we_off_time, t->re_cycle_time,
488 DSSDBG("[reg]rdaccess %d cspulse %d\n",
489 t->access_time, t->cs_pulse_width);
491 return rfbi_convert_timings(t);
494 static int calc_extif_timings(struct rfbi_timings *t)
499 rfbi_get_clk_info(&extif_clk_period, &max_clk_div);
500 for (div = 1; div <= max_clk_div; div++) {
501 if (calc_reg_timing(t, div) == 0)
505 if (div <= max_clk_div)
508 DSSERR("can't setup timings\n");
513 void rfbi_set_timings(int rfbi_module, struct rfbi_timings *t)
518 r = calc_extif_timings(t);
520 DSSERR("Failed to calc timings\n");
523 BUG_ON(!t->converted);
525 rfbi_enable_clocks(1);
526 rfbi_write_reg(RFBI_ONOFF_TIME(rfbi_module), t->tim[0]);
527 rfbi_write_reg(RFBI_CYCLE_TIME(rfbi_module), t->tim[1]);
529 /* TIMEGRANULARITY */
530 REG_FLD_MOD(RFBI_CONFIG(rfbi_module),
531 (t->tim[2] ? 1 : 0), 4, 4);
533 rfbi_print_timings();
534 rfbi_enable_clocks(0);
537 static int ps_to_rfbi_ticks(int time, int div)
539 unsigned long tick_ps;
542 /* Calculate in picosecs to yield more exact results */
543 tick_ps = 1000000000 / (rfbi.l4_khz) * div;
545 ret = (time + tick_ps - 1) / tick_ps;
550 #ifdef OMAP_RFBI_RATE_LIMIT
551 unsigned long rfbi_get_max_tx_rate(void)
553 unsigned long l4_rate, dss1_rate;
554 int min_l4_ticks = 0;
557 /* According to TI this can't be calculated so make the
558 * adjustments for a couple of known frequencies and warn for
561 static const struct {
562 unsigned long l4_clk; /* HZ */
563 unsigned long dss1_clk; /* HZ */
564 unsigned long min_l4_ticks;
566 { 55, 132, 7, }, /* 7.86 MPix/s */
567 { 110, 110, 12, }, /* 9.16 MPix/s */
568 { 110, 132, 10, }, /* 11 Mpix/s */
569 { 120, 120, 10, }, /* 12 Mpix/s */
570 { 133, 133, 10, }, /* 13.3 Mpix/s */
573 l4_rate = rfbi.l4_khz / 1000;
574 dss1_rate = dss_clk_get_rate(DSS_CLK_FCK1) / 1000000;
576 for (i = 0; i < ARRAY_SIZE(ftab); i++) {
577 /* Use a window instead of an exact match, to account
578 * for different DPLL multiplier / divider pairs.
580 if (abs(ftab[i].l4_clk - l4_rate) < 3 &&
581 abs(ftab[i].dss1_clk - dss1_rate) < 3) {
582 min_l4_ticks = ftab[i].min_l4_ticks;
586 if (i == ARRAY_SIZE(ftab)) {
587 /* Can't be sure, return anyway the maximum not
588 * rate-limited. This might cause a problem only for the
589 * tearing synchronisation.
591 DSSERR("can't determine maximum RFBI transfer rate\n");
592 return rfbi.l4_khz * 1000;
594 return rfbi.l4_khz * 1000 / min_l4_ticks;
597 int rfbi_get_max_tx_rate(void)
599 return rfbi.l4_khz * 1000;
603 static void rfbi_get_clk_info(u32 *clk_period, u32 *max_clk_div)
605 *clk_period = 1000000000 / rfbi.l4_khz;
609 static int rfbi_convert_timings(struct rfbi_timings *t)
612 int reon, reoff, weon, weoff, cson, csoff, cs_pulse;
613 int actim, recyc, wecyc;
614 int div = t->clk_div;
616 if (div <= 0 || div > 2)
619 /* Make sure that after conversion it still holds that:
620 * weoff > weon, reoff > reon, recyc >= reoff, wecyc >= weoff,
621 * csoff > cson, csoff >= max(weoff, reoff), actim > reon
623 weon = ps_to_rfbi_ticks(t->we_on_time, div);
624 weoff = ps_to_rfbi_ticks(t->we_off_time, div);
632 reon = ps_to_rfbi_ticks(t->re_on_time, div);
633 reoff = ps_to_rfbi_ticks(t->re_off_time, div);
641 cson = ps_to_rfbi_ticks(t->cs_on_time, div);
642 csoff = ps_to_rfbi_ticks(t->cs_off_time, div);
645 if (csoff < max(weoff, reoff))
646 csoff = max(weoff, reoff);
661 actim = ps_to_rfbi_ticks(t->access_time, div);
667 wecyc = ps_to_rfbi_ticks(t->we_cycle_time, div);
673 recyc = ps_to_rfbi_ticks(t->re_cycle_time, div);
679 cs_pulse = ps_to_rfbi_ticks(t->cs_pulse_width, div);
697 /* xxx FIX module selection missing */
698 int omap_rfbi_setup_te(enum omap_rfbi_te_mode mode,
699 unsigned hs_pulse_time, unsigned vs_pulse_time,
700 int hs_pol_inv, int vs_pol_inv, int extif_div)
706 hs = ps_to_rfbi_ticks(hs_pulse_time, 1);
707 vs = ps_to_rfbi_ticks(vs_pulse_time, 1);
710 if (mode == OMAP_DSS_RFBI_TE_MODE_2)
712 else /* OMAP_DSS_RFBI_TE_MODE_1 */
719 DSSDBG("setup_te: mode %d hs %d vs %d hs_inv %d vs_inv %d\n",
720 mode, hs, vs, hs_pol_inv, vs_pol_inv);
722 rfbi_enable_clocks(1);
723 rfbi_write_reg(RFBI_HSYNC_WIDTH, hs);
724 rfbi_write_reg(RFBI_VSYNC_WIDTH, vs);
726 l = rfbi_read_reg(RFBI_CONFIG(0));
735 rfbi_enable_clocks(0);
739 EXPORT_SYMBOL(omap_rfbi_setup_te);
741 /* xxx FIX module selection missing */
742 int omap_rfbi_enable_te(bool enable, unsigned line)
746 DSSDBG("te %d line %d mode %d\n", enable, line, rfbi.te_mode);
747 if (line > (1 << 11) - 1)
750 rfbi_enable_clocks(1);
751 l = rfbi_read_reg(RFBI_CONFIG(0));
755 l |= rfbi.te_mode << 2;
758 rfbi_write_reg(RFBI_CONFIG(0), l);
759 rfbi_write_reg(RFBI_LINE_NUMBER, line);
760 rfbi_enable_clocks(0);
764 EXPORT_SYMBOL(omap_rfbi_enable_te);
767 static void rfbi_enable_config(int enable1, int enable2)
777 rfbi_enable_clocks(1);
779 l = rfbi_read_reg(RFBI_CONTROL);
781 l = FLD_MOD(l, cs, 3, 2);
782 l = FLD_MOD(l, 0, 1, 1);
784 rfbi_write_reg(RFBI_CONTROL, l);
787 l = rfbi_read_reg(RFBI_CONFIG(0));
788 l = FLD_MOD(l, 0, 3, 2); /* TRIGGERMODE: ITE */
789 /*l |= FLD_VAL(2, 8, 7); */ /* L4FORMAT, 2pix/L4 */
790 /*l |= FLD_VAL(0, 8, 7); */ /* L4FORMAT, 1pix/L4 */
792 l = FLD_MOD(l, 0, 16, 16); /* A0POLARITY */
793 l = FLD_MOD(l, 1, 20, 20); /* TE_VSYNC_POLARITY */
794 l = FLD_MOD(l, 1, 21, 21); /* HSYNCPOLARITY */
796 l = FLD_MOD(l, OMAP_DSS_RFBI_PARALLELMODE_8, 1, 0);
797 rfbi_write_reg(RFBI_CONFIG(0), l);
799 rfbi_enable_clocks(0);
803 int rfbi_configure(int rfbi_module, int bpp, int lines)
806 int cycle1 = 0, cycle2 = 0, cycle3 = 0;
807 enum omap_rfbi_cycleformat cycleformat;
808 enum omap_rfbi_datatype datatype;
809 enum omap_rfbi_parallelmode parallelmode;
813 datatype = OMAP_DSS_RFBI_DATATYPE_12;
816 datatype = OMAP_DSS_RFBI_DATATYPE_16;
819 datatype = OMAP_DSS_RFBI_DATATYPE_18;
822 datatype = OMAP_DSS_RFBI_DATATYPE_24;
828 rfbi.datatype = datatype;
832 parallelmode = OMAP_DSS_RFBI_PARALLELMODE_8;
835 parallelmode = OMAP_DSS_RFBI_PARALLELMODE_9;
838 parallelmode = OMAP_DSS_RFBI_PARALLELMODE_12;
841 parallelmode = OMAP_DSS_RFBI_PARALLELMODE_16;
847 rfbi.parallelmode = parallelmode;
849 if ((bpp % lines) == 0) {
850 switch (bpp / lines) {
852 cycleformat = OMAP_DSS_RFBI_CYCLEFORMAT_1_1;
855 cycleformat = OMAP_DSS_RFBI_CYCLEFORMAT_2_1;
858 cycleformat = OMAP_DSS_RFBI_CYCLEFORMAT_3_1;
864 } else if ((2 * bpp % lines) == 0) {
865 if ((2 * bpp / lines) == 3)
866 cycleformat = OMAP_DSS_RFBI_CYCLEFORMAT_3_2;
876 switch (cycleformat) {
877 case OMAP_DSS_RFBI_CYCLEFORMAT_1_1:
881 case OMAP_DSS_RFBI_CYCLEFORMAT_2_1:
886 case OMAP_DSS_RFBI_CYCLEFORMAT_3_1:
892 case OMAP_DSS_RFBI_CYCLEFORMAT_3_2:
894 cycle2 = (lines / 2) | ((lines / 2) << 16);
895 cycle3 = (lines << 16);
899 rfbi_enable_clocks(1);
901 REG_FLD_MOD(RFBI_CONTROL, 0, 3, 2); /* clear CS */
904 l |= FLD_VAL(parallelmode, 1, 0);
905 l |= FLD_VAL(0, 3, 2); /* TRIGGERMODE: ITE */
906 l |= FLD_VAL(0, 4, 4); /* TIMEGRANULARITY */
907 l |= FLD_VAL(datatype, 6, 5);
908 /* l |= FLD_VAL(2, 8, 7); */ /* L4FORMAT, 2pix/L4 */
909 l |= FLD_VAL(0, 8, 7); /* L4FORMAT, 1pix/L4 */
910 l |= FLD_VAL(cycleformat, 10, 9);
911 l |= FLD_VAL(0, 12, 11); /* UNUSEDBITS */
912 l |= FLD_VAL(0, 16, 16); /* A0POLARITY */
913 l |= FLD_VAL(0, 17, 17); /* REPOLARITY */
914 l |= FLD_VAL(0, 18, 18); /* WEPOLARITY */
915 l |= FLD_VAL(0, 19, 19); /* CSPOLARITY */
916 l |= FLD_VAL(1, 20, 20); /* TE_VSYNC_POLARITY */
917 l |= FLD_VAL(1, 21, 21); /* HSYNCPOLARITY */
918 rfbi_write_reg(RFBI_CONFIG(rfbi_module), l);
920 rfbi_write_reg(RFBI_DATA_CYCLE1(rfbi_module), cycle1);
921 rfbi_write_reg(RFBI_DATA_CYCLE2(rfbi_module), cycle2);
922 rfbi_write_reg(RFBI_DATA_CYCLE3(rfbi_module), cycle3);
925 l = rfbi_read_reg(RFBI_CONTROL);
926 l = FLD_MOD(l, rfbi_module+1, 3, 2); /* Select CSx */
927 l = FLD_MOD(l, 0, 1, 1); /* clear bypass */
928 rfbi_write_reg(RFBI_CONTROL, l);
931 DSSDBG("RFBI config: bpp %d, lines %d, cycles: 0x%x 0x%x 0x%x\n",
932 bpp, lines, cycle1, cycle2, cycle3);
934 rfbi_enable_clocks(0);
938 EXPORT_SYMBOL(rfbi_configure);
940 static int rfbi_find_display(struct omap_dss_device *dssdev)
942 if (dssdev == rfbi.dssdev[0])
945 if (dssdev == rfbi.dssdev[1])
953 static void signal_fifo_waiters(void)
955 if (atomic_read(&rfbi.cmd_fifo_full) > 0) {
956 /* DSSDBG("SIGNALING: Fifo not full for waiter!\n"); */
957 complete(&rfbi.cmd_done);
958 atomic_dec(&rfbi.cmd_fifo_full);
962 /* returns 1 for async op, and 0 for sync op */
963 static int do_update(struct omap_dss_device *dssdev, struct update_region *upd)
972 if (dssdev->manager->caps & OMAP_DSS_OVL_MGR_CAP_DISPC) {
973 /*dssdev->driver->enable_te(dssdev, 1); */
974 dss_setup_partial_planes(dssdev, &x, &y, &w, &h);
978 rfbi.perf_bytes = w * h * 2; /* XXX always 16bit */
981 dssdev->driver->setup_update(dssdev, x, y, w, h);
983 if (dssdev->manager->caps & OMAP_DSS_OVL_MGR_CAP_DISPC) {
984 rfbi_transfer_area(w, h, NULL, NULL);
987 struct omap_overlay *ovl;
991 ovl = dssdev->manager->overlays[0];
992 scr_width = ovl->info.screen_width;
993 addr = ovl->info.vaddr;
995 omap_rfbi_write_pixels(addr, scr_width, x, y, w, h);
1003 static void process_cmd_fifo(void)
1006 struct update_param p;
1007 struct omap_dss_device *dssdev;
1008 unsigned long flags;
1010 if (atomic_inc_return(&rfbi.cmd_pending) != 1)
1014 spin_lock_irqsave(rfbi.cmd_fifo->lock, flags);
1016 len = __kfifo_get(rfbi.cmd_fifo, (unsigned char *)&p,
1017 sizeof(struct update_param));
1019 DSSDBG("nothing more in fifo\n");
1020 atomic_set(&rfbi.cmd_pending, 0);
1021 spin_unlock_irqrestore(rfbi.cmd_fifo->lock, flags);
1025 /* DSSDBG("fifo full %d\n", rfbi.cmd_fifo_full.counter);*/
1027 spin_unlock_irqrestore(rfbi.cmd_fifo->lock, flags);
1029 BUG_ON(len != sizeof(struct update_param));
1030 BUG_ON(p.rfbi_module > 1);
1032 dssdev = rfbi.dssdev[p.rfbi_module];
1034 if (p.cmd == RFBI_CMD_UPDATE) {
1035 if (do_update(dssdev, &p.par.r))
1036 break; /* async op */
1037 } else if (p.cmd == RFBI_CMD_SYNC) {
1038 DSSDBG("Signaling SYNC done!\n");
1039 complete(p.par.sync);
1044 signal_fifo_waiters();
1047 static void rfbi_push_cmd(struct update_param *p)
1052 unsigned long flags;
1055 spin_lock_irqsave(rfbi.cmd_fifo->lock, flags);
1056 available = RFBI_CMD_FIFO_LEN_BYTES -
1057 __kfifo_len(rfbi.cmd_fifo);
1059 /* DSSDBG("%d bytes left in fifo\n", available); */
1060 if (available < sizeof(struct update_param)) {
1061 DSSDBG("Going to wait because FIFO FULL..\n");
1062 spin_unlock_irqrestore(rfbi.cmd_fifo->lock, flags);
1063 atomic_inc(&rfbi.cmd_fifo_full);
1064 wait_for_completion(&rfbi.cmd_done);
1065 /*DSSDBG("Woke up because fifo not full anymore\n");*/
1069 ret = __kfifo_put(rfbi.cmd_fifo, (unsigned char *)p,
1070 sizeof(struct update_param));
1071 /* DSSDBG("pushed %d bytes\n", ret);*/
1073 spin_unlock_irqrestore(rfbi.cmd_fifo->lock, flags);
1075 BUG_ON(ret != sizeof(struct update_param));
1081 static void rfbi_push_update(int rfbi_module, int x, int y, int w, int h)
1083 struct update_param p;
1085 p.rfbi_module = rfbi_module;
1086 p.cmd = RFBI_CMD_UPDATE;
1093 DSSDBG("RFBI pushed %d,%d %dx%d\n", x, y, w, h);
1100 static void rfbi_push_sync(int rfbi_module, struct completion *sync_comp)
1102 struct update_param p;
1104 p.rfbi_module = rfbi_module;
1105 p.cmd = RFBI_CMD_SYNC;
1106 p.par.sync = sync_comp;
1110 DSSDBG("RFBI sync pushed to cmd fifo\n");
1115 void rfbi_dump_regs(struct seq_file *s)
1117 #define DUMPREG(r) seq_printf(s, "%-35s %08x\n", #r, rfbi_read_reg(r))
1119 dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK1);
1121 DUMPREG(RFBI_REVISION);
1122 DUMPREG(RFBI_SYSCONFIG);
1123 DUMPREG(RFBI_SYSSTATUS);
1124 DUMPREG(RFBI_CONTROL);
1125 DUMPREG(RFBI_PIXEL_CNT);
1126 DUMPREG(RFBI_LINE_NUMBER);
1128 DUMPREG(RFBI_PARAM);
1131 DUMPREG(RFBI_STATUS);
1133 DUMPREG(RFBI_CONFIG(0));
1134 DUMPREG(RFBI_ONOFF_TIME(0));
1135 DUMPREG(RFBI_CYCLE_TIME(0));
1136 DUMPREG(RFBI_DATA_CYCLE1(0));
1137 DUMPREG(RFBI_DATA_CYCLE2(0));
1138 DUMPREG(RFBI_DATA_CYCLE3(0));
1140 DUMPREG(RFBI_CONFIG(1));
1141 DUMPREG(RFBI_ONOFF_TIME(1));
1142 DUMPREG(RFBI_CYCLE_TIME(1));
1143 DUMPREG(RFBI_DATA_CYCLE1(1));
1144 DUMPREG(RFBI_DATA_CYCLE2(1));
1145 DUMPREG(RFBI_DATA_CYCLE3(1));
1147 DUMPREG(RFBI_VSYNC_WIDTH);
1148 DUMPREG(RFBI_HSYNC_WIDTH);
1150 dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1);
1159 spin_lock_init(&rfbi.cmd_lock);
1160 rfbi.cmd_fifo = kfifo_alloc(RFBI_CMD_FIFO_LEN_BYTES, GFP_KERNEL,
1162 if (IS_ERR(rfbi.cmd_fifo))
1165 init_completion(&rfbi.cmd_done);
1166 atomic_set(&rfbi.cmd_fifo_full, 0);
1167 atomic_set(&rfbi.cmd_pending, 0);
1169 rfbi.base = ioremap(RFBI_BASE, SZ_256);
1171 DSSERR("can't ioremap RFBI\n");
1175 rfbi_enable_clocks(1);
1179 rfbi.l4_khz = dss_clk_get_rate(DSS_CLK_ICK) / 1000;
1181 /* Enable autoidle and smart-idle */
1182 l = rfbi_read_reg(RFBI_SYSCONFIG);
1183 l |= (1 << 0) | (2 << 3);
1184 rfbi_write_reg(RFBI_SYSCONFIG, l);
1186 rev = rfbi_read_reg(RFBI_REVISION);
1187 printk(KERN_INFO "OMAP RFBI rev %d.%d\n",
1188 FLD_GET(rev, 7, 4), FLD_GET(rev, 3, 0));
1190 rfbi_enable_clocks(0);
1195 void rfbi_exit(void)
1197 DSSDBG("rfbi_exit\n");
1199 kfifo_free(rfbi.cmd_fifo);
1204 /* struct omap_display support */
1205 static int rfbi_display_update(struct omap_dss_device *dssdev,
1206 u16 x, u16 y, u16 w, u16 h)
1210 if (w == 0 || h == 0)
1213 rfbi_module = rfbi_find_display(dssdev);
1215 rfbi_push_update(rfbi_module, x, y, w, h);
1220 static int rfbi_display_sync(struct omap_dss_device *dssdev)
1222 struct completion sync_comp;
1225 rfbi_module = rfbi_find_display(dssdev);
1227 init_completion(&sync_comp);
1228 rfbi_push_sync(rfbi_module, &sync_comp);
1229 DSSDBG("Waiting for SYNC to happen...\n");
1230 wait_for_completion(&sync_comp);
1231 DSSDBG("Released from SYNC\n");
1235 static int rfbi_display_enable_te(struct omap_dss_device *dssdev, bool enable)
1237 dssdev->driver->enable_te(dssdev, enable);
1241 static int rfbi_display_enable(struct omap_dss_device *dssdev)
1245 r = omap_dss_start_device(dssdev);
1247 DSSERR("failed to start device\n");
1251 r = omap_dispc_register_isr(framedone_callback, NULL,
1252 DISPC_IRQ_FRAMEDONE);
1254 DSSERR("can't get FRAMEDONE irq\n");
1258 dispc_set_lcd_display_type(OMAP_DSS_LCD_DISPLAY_TFT);
1260 dispc_set_parallel_interface_mode(OMAP_DSS_PARALLELMODE_RFBI);
1262 dispc_set_tft_data_lines(dssdev->ctrl.pixel_size);
1264 rfbi_configure(dssdev->phy.rfbi.channel,
1265 dssdev->ctrl.pixel_size,
1266 dssdev->phy.rfbi.data_lines);
1268 rfbi_set_timings(dssdev->phy.rfbi.channel,
1269 &dssdev->ctrl.rfbi_timings);
1272 if (dssdev->driver->enable) {
1273 r = dssdev->driver->enable(dssdev);
1280 omap_dispc_unregister_isr(framedone_callback, NULL,
1281 DISPC_IRQ_FRAMEDONE);
1283 omap_dss_stop_device(dssdev);
1288 static void rfbi_display_disable(struct omap_dss_device *dssdev)
1290 dssdev->driver->disable(dssdev);
1291 omap_dispc_unregister_isr(framedone_callback, NULL,
1292 DISPC_IRQ_FRAMEDONE);
1293 omap_dss_stop_device(dssdev);
1296 int rfbi_init_display(struct omap_dss_device *dssdev)
1298 dssdev->enable = rfbi_display_enable;
1299 dssdev->disable = rfbi_display_disable;
1300 dssdev->update = rfbi_display_update;
1301 dssdev->sync = rfbi_display_sync;
1302 dssdev->enable_te = rfbi_display_enable_te;
1304 rfbi.dssdev[dssdev->phy.rfbi.channel] = dssdev;
1306 dssdev->caps = OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE;