2 * drivers/video/pvr2fb.c
4 * Frame buffer and fbcon support for the NEC PowerVR2 found within the Sega
7 * Copyright (c) 2001 M. R. Brown <mrbrown@0xd6.org>
8 * Copyright (c) 2001 - 2008 Paul Mundt <lethal@linux-sh.org>
10 * This driver is mostly based on the excellent amifb and vfb sources. It uses
11 * an odd scheme for converting hardware values to/from framebuffer values,
12 * here are some hacked-up formulas:
14 * The Dreamcast has screen offsets from each side of its four borders and
15 * the start offsets of the display window. I used these values to calculate
16 * 'pseudo' values (think of them as placeholders) for the fb video mode, so
17 * that when it came time to convert these values back into their hardware
18 * values, I could just add mode- specific offsets to get the correct mode
21 * left_margin = diwstart_h - borderstart_h;
22 * right_margin = borderstop_h - (diwstart_h + xres);
23 * upper_margin = diwstart_v - borderstart_v;
24 * lower_margin = borderstop_v - (diwstart_h + yres);
26 * hsync_len = borderstart_h + (hsync_total - borderstop_h);
27 * vsync_len = borderstart_v + (vsync_total - borderstop_v);
29 * Then, when it's time to convert back to hardware settings, the only
30 * constants are the borderstart_* offsets, all other values are derived from
34 * borderstart_h = 116;
37 * borderstop_h = borderstart_h + hsync_total - hsync_len;
39 * diwstart_v = borderstart_v - upper_margin;
41 * However, in the current implementation, the borderstart values haven't had
42 * the benefit of being fully researched, so some modes may be broken.
47 #include <linux/module.h>
48 #include <linux/kernel.h>
49 #include <linux/errno.h>
50 #include <linux/string.h>
52 #include <linux/slab.h>
53 #include <linux/delay.h>
54 #include <linux/interrupt.h>
56 #include <linux/init.h>
57 #include <linux/pci.h>
59 #ifdef CONFIG_SH_DREAMCAST
60 #include <asm/machvec.h>
61 #include <mach-dreamcast/mach/sysasic.h>
64 #ifdef CONFIG_PVR2_DMA
65 #include <linux/pagemap.h>
70 #ifdef CONFIG_SH_STORE_QUEUES
71 #include <linux/uaccess.h>
75 #ifndef PCI_DEVICE_ID_NEC_NEON250
76 # define PCI_DEVICE_ID_NEC_NEON250 0x0067
79 /* 2D video registers */
80 #define DISP_BASE par->mmio_base
81 #define DISP_BRDRCOLR (DISP_BASE + 0x40)
82 #define DISP_DIWMODE (DISP_BASE + 0x44)
83 #define DISP_DIWADDRL (DISP_BASE + 0x50)
84 #define DISP_DIWADDRS (DISP_BASE + 0x54)
85 #define DISP_DIWSIZE (DISP_BASE + 0x5c)
86 #define DISP_SYNCCONF (DISP_BASE + 0xd0)
87 #define DISP_BRDRHORZ (DISP_BASE + 0xd4)
88 #define DISP_SYNCSIZE (DISP_BASE + 0xd8)
89 #define DISP_BRDRVERT (DISP_BASE + 0xdc)
90 #define DISP_DIWCONF (DISP_BASE + 0xe8)
91 #define DISP_DIWHSTRT (DISP_BASE + 0xec)
92 #define DISP_DIWVSTRT (DISP_BASE + 0xf0)
93 #define DISP_PIXDEPTH (DISP_BASE + 0x108)
95 /* Pixel clocks, one for TV output, doubled for VGA output */
99 /* This is for 60Hz - the VTOTAL is doubled for interlaced modes */
100 #define PAL_HTOTAL 863
101 #define PAL_VTOTAL 312
102 #define NTSC_HTOTAL 857
103 #define NTSC_VTOTAL 262
105 /* Supported cable types */
106 enum { CT_VGA, CT_NONE, CT_RGB, CT_COMPOSITE };
108 /* Supported video output types */
109 enum { VO_PAL, VO_NTSC, VO_VGA };
111 /* Supported palette types */
112 enum { PAL_ARGB1555, PAL_RGB565, PAL_ARGB4444, PAL_ARGB8888 };
114 struct pvr2_params { unsigned int val; char *name; };
115 static struct pvr2_params cables[] = {
116 { CT_VGA, "VGA" }, { CT_RGB, "RGB" }, { CT_COMPOSITE, "COMPOSITE" },
119 static struct pvr2_params outputs[] = {
120 { VO_PAL, "PAL" }, { VO_NTSC, "NTSC" }, { VO_VGA, "VGA" },
124 * This describes the current video mode
127 static struct pvr2fb_par {
128 unsigned int hsync_total; /* Clocks/line */
129 unsigned int vsync_total; /* Lines/field */
130 unsigned int borderstart_h;
131 unsigned int borderstop_h;
132 unsigned int borderstart_v;
133 unsigned int borderstop_v;
134 unsigned int diwstart_h; /* Horizontal offset of the display field */
135 unsigned int diwstart_v; /* Vertical offset of the display field, for
136 interlaced modes, this is the long field */
137 unsigned long disp_start; /* Address of image within VRAM */
138 unsigned char is_interlaced; /* Is the display interlaced? */
139 unsigned char is_doublescan; /* Are scanlines output twice? (doublescan) */
140 unsigned char is_lowres; /* Is horizontal pixel-doubling enabled? */
142 void __iomem *mmio_base; /* MMIO base */
146 static struct fb_info *fb_info;
148 static struct fb_fix_screeninfo pvr2_fix = {
149 .id = "NEC PowerVR2",
150 .type = FB_TYPE_PACKED_PIXELS,
151 .visual = FB_VISUAL_TRUECOLOR,
154 .accel = FB_ACCEL_NONE,
157 static const struct fb_var_screeninfo pvr2_var = {
164 .green = { 5, 6, 0 },
166 .activate = FB_ACTIVATE_NOW,
169 .vmode = FB_VMODE_NONINTERLACED,
172 static int cable_type = CT_VGA;
173 static int video_output = VO_VGA;
175 static int nopan = 0;
176 static int nowrap = 1;
179 * We do all updating, blanking, etc. during the vertical retrace period
181 static unsigned int do_vmode_full = 0; /* Change the video mode */
182 static unsigned int do_vmode_pan = 0; /* Update the video mode */
183 static short do_blank = 0; /* (Un)Blank the screen */
185 static unsigned int is_blanked = 0; /* Is the screen blanked? */
187 #ifdef CONFIG_SH_STORE_QUEUES
188 static unsigned long pvr2fb_map;
191 #ifdef CONFIG_PVR2_DMA
192 static unsigned int shdma = PVR2_CASCADE_CHAN;
193 static unsigned int pvr2dma = ONCHIP_NR_DMA_CHANNELS;
196 static struct fb_videomode pvr2_modedb[] = {
198 * Broadcast video modes (PAL and NTSC). I'm unfamiliar with
199 * PAL-M and PAL-N, but from what I've read both modes parallel PAL and
200 * NTSC, so it shouldn't be a problem (I hope).
204 /* 640x480 @ 60Hz interlaced (NTSC) */
205 "ntsc_640x480i", 60, 640, 480, TV_CLK, 38, 33, 0, 18, 146, 26,
206 FB_SYNC_BROADCAST, FB_VMODE_INTERLACED | FB_VMODE_YWRAP
208 /* 640x240 @ 60Hz (NTSC) */
209 /* XXX: Broken! Don't use... */
210 "ntsc_640x240", 60, 640, 240, TV_CLK, 38, 33, 0, 0, 146, 22,
211 FB_SYNC_BROADCAST, FB_VMODE_YWRAP
213 /* 640x480 @ 60hz (VGA) */
214 "vga_640x480", 60, 640, 480, VGA_CLK, 38, 33, 0, 18, 146, 26,
219 #define NUM_TOTAL_MODES ARRAY_SIZE(pvr2_modedb)
221 #define DEFMODE_NTSC 0
222 #define DEFMODE_PAL 0
223 #define DEFMODE_VGA 2
225 static int defmode = DEFMODE_NTSC;
226 static char *mode_option = NULL;
228 static inline void pvr2fb_set_pal_type(unsigned int type)
230 struct pvr2fb_par *par = (struct pvr2fb_par *)fb_info->par;
232 fb_writel(type, par->mmio_base + 0x108);
235 static inline void pvr2fb_set_pal_entry(struct pvr2fb_par *par,
239 fb_writel(val, par->mmio_base + 0x1000 + (4 * regno));
242 static int pvr2fb_blank(int blank, struct fb_info *info)
244 do_blank = blank ? blank : -1;
248 static inline unsigned long get_line_length(int xres_virtual, int bpp)
250 return (unsigned long)((((xres_virtual*bpp)+31)&~31) >> 3);
253 static void set_color_bitfields(struct fb_var_screeninfo *var)
255 switch (var->bits_per_pixel) {
256 case 16: /* RGB 565 */
257 pvr2fb_set_pal_type(PAL_RGB565);
258 var->red.offset = 11; var->red.length = 5;
259 var->green.offset = 5; var->green.length = 6;
260 var->blue.offset = 0; var->blue.length = 5;
261 var->transp.offset = 0; var->transp.length = 0;
263 case 24: /* RGB 888 */
264 var->red.offset = 16; var->red.length = 8;
265 var->green.offset = 8; var->green.length = 8;
266 var->blue.offset = 0; var->blue.length = 8;
267 var->transp.offset = 0; var->transp.length = 0;
269 case 32: /* ARGB 8888 */
270 pvr2fb_set_pal_type(PAL_ARGB8888);
271 var->red.offset = 16; var->red.length = 8;
272 var->green.offset = 8; var->green.length = 8;
273 var->blue.offset = 0; var->blue.length = 8;
274 var->transp.offset = 24; var->transp.length = 8;
279 static int pvr2fb_setcolreg(unsigned int regno, unsigned int red,
280 unsigned int green, unsigned int blue,
281 unsigned int transp, struct fb_info *info)
283 struct pvr2fb_par *par = (struct pvr2fb_par *)info->par;
286 if (regno > info->cmap.len)
290 * We only support the hardware palette for 16 and 32bpp. It's also
291 * expected that the palette format has been set by the time we get
292 * here, so we don't waste time setting it again.
294 switch (info->var.bits_per_pixel) {
295 case 16: /* RGB 565 */
296 tmp = (red & 0xf800) |
297 ((green & 0xfc00) >> 5) |
298 ((blue & 0xf800) >> 11);
300 pvr2fb_set_pal_entry(par, regno, tmp);
302 case 24: /* RGB 888 */
303 red >>= 8; green >>= 8; blue >>= 8;
304 tmp = (red << 16) | (green << 8) | blue;
306 case 32: /* ARGB 8888 */
307 red >>= 8; green >>= 8; blue >>= 8;
308 tmp = (transp << 24) | (red << 16) | (green << 8) | blue;
310 pvr2fb_set_pal_entry(par, regno, tmp);
313 pr_debug("Invalid bit depth %d?!?\n", info->var.bits_per_pixel);
318 ((u32*)(info->pseudo_palette))[regno] = tmp;
324 * Determine the cable type and initialize the cable output format. Don't do
325 * anything if the cable type has been overidden (via "cable:XX").
328 #define PCTRA ((void __iomem *)0xff80002c)
329 #define PDTRA ((void __iomem *)0xff800030)
330 #define VOUTC ((void __iomem *)0xa0702c00)
332 static int pvr2_init_cable(void)
334 if (cable_type < 0) {
335 fb_writel((fb_readl(PCTRA) & 0xfff0ffff) | 0x000a0000,
337 cable_type = (fb_readw(PDTRA) >> 8) & 3;
340 /* Now select the output format (either composite or other) */
341 /* XXX: Save the previous val first, as this reg is also AICA
343 if (cable_type == CT_COMPOSITE)
344 fb_writel(3 << 8, VOUTC);
345 else if (cable_type == CT_RGB)
346 fb_writel(1 << 9, VOUTC);
353 static int pvr2fb_set_par(struct fb_info *info)
355 struct pvr2fb_par *par = (struct pvr2fb_par *)info->par;
356 struct fb_var_screeninfo *var = &info->var;
357 unsigned long line_length;
361 * XXX: It's possible that a user could use a VGA box, change the cable
362 * type in hardware (i.e. switch from VGA<->composite), then change
363 * modes (i.e. switching to another VT). If that happens we should
364 * automagically change the output format to cope, but currently I
365 * don't have a VGA box to make sure this works properly.
367 cable_type = pvr2_init_cable();
368 if (cable_type == CT_VGA && video_output != VO_VGA)
369 video_output = VO_VGA;
371 var->vmode &= FB_VMODE_MASK;
372 if (var->vmode & FB_VMODE_INTERLACED && video_output != VO_VGA)
373 par->is_interlaced = 1;
375 * XXX: Need to be more creative with this (i.e. allow doublecan for
378 if (var->vmode & FB_VMODE_DOUBLE && video_output == VO_VGA)
379 par->is_doublescan = 1;
381 par->hsync_total = var->left_margin + var->xres + var->right_margin +
383 par->vsync_total = var->upper_margin + var->yres + var->lower_margin +
386 if (var->sync & FB_SYNC_BROADCAST) {
387 vtotal = par->vsync_total;
388 if (par->is_interlaced)
390 if (vtotal > (PAL_VTOTAL + NTSC_VTOTAL)/2) {
391 /* XXX: Check for start values here... */
392 /* XXX: Check hardware for PAL-compatibility */
393 par->borderstart_h = 116;
394 par->borderstart_v = 44;
396 /* NTSC video output */
397 par->borderstart_h = 126;
398 par->borderstart_v = 18;
402 /* XXX: What else needs to be checked? */
404 * XXX: We have a little freedom in VGA modes, what ranges
405 * should be here (i.e. hsync/vsync totals, etc.)?
407 par->borderstart_h = 126;
408 par->borderstart_v = 40;
411 /* Calculate the remainding offsets */
412 par->diwstart_h = par->borderstart_h + var->left_margin;
413 par->diwstart_v = par->borderstart_v + var->upper_margin;
414 par->borderstop_h = par->diwstart_h + var->xres +
416 par->borderstop_v = par->diwstart_v + var->yres +
419 if (!par->is_interlaced)
420 par->borderstop_v /= 2;
421 if (info->var.xres < 640)
424 line_length = get_line_length(var->xres_virtual, var->bits_per_pixel);
425 par->disp_start = info->fix.smem_start + (line_length * var->yoffset) * line_length;
426 info->fix.line_length = line_length;
430 static int pvr2fb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
432 struct pvr2fb_par *par = (struct pvr2fb_par *)info->par;
433 unsigned int vtotal, hsync_total;
434 unsigned long line_length;
436 if (var->pixclock != TV_CLK && var->pixclock != VGA_CLK) {
437 pr_debug("Invalid pixclock value %d\n", var->pixclock);
445 if (var->xres_virtual < var->xres)
446 var->xres_virtual = var->xres;
447 if (var->yres_virtual < var->yres)
448 var->yres_virtual = var->yres;
450 if (var->bits_per_pixel <= 16)
451 var->bits_per_pixel = 16;
452 else if (var->bits_per_pixel <= 24)
453 var->bits_per_pixel = 24;
454 else if (var->bits_per_pixel <= 32)
455 var->bits_per_pixel = 32;
457 set_color_bitfields(var);
459 if (var->vmode & FB_VMODE_YWRAP) {
460 if (var->xoffset || var->yoffset < 0 ||
461 var->yoffset >= var->yres_virtual) {
462 var->xoffset = var->yoffset = 0;
464 if (var->xoffset > var->xres_virtual - var->xres ||
465 var->yoffset > var->yres_virtual - var->yres ||
466 var->xoffset < 0 || var->yoffset < 0)
467 var->xoffset = var->yoffset = 0;
470 var->xoffset = var->yoffset = 0;
474 * XXX: Need to be more creative with this (i.e. allow doublecan for
477 if (var->yres < 480 && video_output == VO_VGA)
478 var->vmode |= FB_VMODE_DOUBLE;
480 if (video_output != VO_VGA) {
481 var->sync |= FB_SYNC_BROADCAST;
482 var->vmode |= FB_VMODE_INTERLACED;
484 var->sync &= ~FB_SYNC_BROADCAST;
485 var->vmode &= ~FB_VMODE_INTERLACED;
486 var->vmode |= FB_VMODE_NONINTERLACED;
489 if ((var->activate & FB_ACTIVATE_MASK) != FB_ACTIVATE_TEST) {
490 var->right_margin = par->borderstop_h -
491 (par->diwstart_h + var->xres);
492 var->left_margin = par->diwstart_h - par->borderstart_h;
493 var->hsync_len = par->borderstart_h +
494 (par->hsync_total - par->borderstop_h);
496 var->upper_margin = par->diwstart_v - par->borderstart_v;
497 var->lower_margin = par->borderstop_v -
498 (par->diwstart_v + var->yres);
499 var->vsync_len = par->borderstop_v +
500 (par->vsync_total - par->borderstop_v);
503 hsync_total = var->left_margin + var->xres + var->right_margin +
505 vtotal = var->upper_margin + var->yres + var->lower_margin +
508 if (var->sync & FB_SYNC_BROADCAST) {
509 if (var->vmode & FB_VMODE_INTERLACED)
511 if (vtotal > (PAL_VTOTAL + NTSC_VTOTAL)/2) {
512 /* PAL video output */
513 /* XXX: Should be using a range here ... ? */
514 if (hsync_total != PAL_HTOTAL) {
515 pr_debug("invalid hsync total for PAL\n");
519 /* NTSC video output */
520 if (hsync_total != NTSC_HTOTAL) {
521 pr_debug("invalid hsync total for NTSC\n");
527 /* Check memory sizes */
528 line_length = get_line_length(var->xres_virtual, var->bits_per_pixel);
529 if (line_length * var->yres_virtual > info->fix.smem_len)
535 static void pvr2_update_display(struct fb_info *info)
537 struct pvr2fb_par *par = (struct pvr2fb_par *) info->par;
538 struct fb_var_screeninfo *var = &info->var;
540 /* Update the start address of the display image */
541 fb_writel(par->disp_start, DISP_DIWADDRL);
542 fb_writel(par->disp_start +
543 get_line_length(var->xoffset+var->xres, var->bits_per_pixel),
548 * Initialize the video mode. Currently, the 16bpp and 24bpp modes aren't
549 * very stable. It's probably due to the fact that a lot of the 2D video
550 * registers are still undocumented.
553 static void pvr2_init_display(struct fb_info *info)
555 struct pvr2fb_par *par = (struct pvr2fb_par *) info->par;
556 struct fb_var_screeninfo *var = &info->var;
557 unsigned int diw_height, diw_width, diw_modulo = 1;
558 unsigned int bytesperpixel = var->bits_per_pixel >> 3;
560 /* hsync and vsync totals */
561 fb_writel((par->vsync_total << 16) | par->hsync_total, DISP_SYNCSIZE);
563 /* column height, modulo, row width */
564 /* since we're "panning" within vram, we need to offset things based
565 * on the offset from the virtual x start to our real gfx. */
566 if (video_output != VO_VGA && par->is_interlaced)
567 diw_modulo += info->fix.line_length / 4;
568 diw_height = (par->is_interlaced ? var->yres / 2 : var->yres);
569 diw_width = get_line_length(var->xres, var->bits_per_pixel) / 4;
570 fb_writel((diw_modulo << 20) | (--diw_height << 10) | --diw_width,
573 /* display address, long and short fields */
574 fb_writel(par->disp_start, DISP_DIWADDRL);
575 fb_writel(par->disp_start +
576 get_line_length(var->xoffset+var->xres, var->bits_per_pixel),
579 /* border horizontal, border vertical, border color */
580 fb_writel((par->borderstart_h << 16) | par->borderstop_h, DISP_BRDRHORZ);
581 fb_writel((par->borderstart_v << 16) | par->borderstop_v, DISP_BRDRVERT);
582 fb_writel(0, DISP_BRDRCOLR);
584 /* display window start position */
585 fb_writel(par->diwstart_h, DISP_DIWHSTRT);
586 fb_writel((par->diwstart_v << 16) | par->diwstart_v, DISP_DIWVSTRT);
589 fb_writel((0x16 << 16) | par->is_lowres, DISP_DIWCONF);
591 /* clock doubler (for VGA), scan doubler, display enable */
592 fb_writel(((video_output == VO_VGA) << 23) |
593 (par->is_doublescan << 1) | 1, DISP_DIWMODE);
596 fb_writel(fb_readl(DISP_DIWMODE) | (--bytesperpixel << 2), DISP_DIWMODE);
597 fb_writel(bytesperpixel << 2, DISP_PIXDEPTH);
599 /* video enable, color sync, interlace,
600 * hsync and vsync polarity (currently unused) */
601 fb_writel(0x100 | ((par->is_interlaced /*|4*/) << 4), DISP_SYNCCONF);
604 /* Simulate blanking by making the border cover the entire screen */
606 #define BLANK_BIT (1<<3)
608 static void pvr2_do_blank(void)
610 struct pvr2fb_par *par = currentpar;
611 unsigned long diwconf;
613 diwconf = fb_readl(DISP_DIWCONF);
615 fb_writel(diwconf | BLANK_BIT, DISP_DIWCONF);
617 fb_writel(diwconf & ~BLANK_BIT, DISP_DIWCONF);
619 is_blanked = do_blank > 0 ? do_blank : 0;
622 static irqreturn_t __maybe_unused pvr2fb_interrupt(int irq, void *dev_id)
624 struct fb_info *info = dev_id;
626 if (do_vmode_pan || do_vmode_full)
627 pvr2_update_display(info);
629 pvr2_init_display(info);
641 #ifdef CONFIG_PVR2_DMA
642 static ssize_t pvr2fb_write(struct fb_info *info, const char *buf,
643 size_t count, loff_t *ppos)
645 unsigned long dst, start, end, len;
646 unsigned int nr_pages;
650 nr_pages = (count + PAGE_SIZE - 1) >> PAGE_SHIFT;
652 pages = kmalloc_array(nr_pages, sizeof(struct page *), GFP_KERNEL);
656 ret = get_user_pages_fast((unsigned long)buf, nr_pages, FOLL_WRITE, pages);
657 if (ret < nr_pages) {
663 dma_configure_channel(shdma, 0x12c1);
665 dst = (unsigned long)fb_info->screen_base + *ppos;
666 start = (unsigned long)page_address(pages[0]);
667 end = (unsigned long)page_address(pages[nr_pages]);
668 len = nr_pages << PAGE_SHIFT;
670 /* Half-assed contig check */
671 if (start + len == end) {
672 /* As we do this in one shot, it's either all or nothing.. */
673 if ((*ppos + len) > fb_info->fix.smem_len) {
678 dma_write(shdma, start, 0, len);
679 dma_write(pvr2dma, 0, dst, len);
680 dma_wait_for_completion(pvr2dma);
685 /* Not contiguous, writeout per-page instead.. */
686 for (i = 0; i < nr_pages; i++, dst += PAGE_SIZE) {
687 if ((*ppos + (i << PAGE_SHIFT)) > fb_info->fix.smem_len) {
692 dma_write_page(shdma, (unsigned long)page_address(pages[i]), 0);
693 dma_write_page(pvr2dma, 0, dst);
694 dma_wait_for_completion(pvr2dma);
702 for (i = 0; i < nr_pages; i++)
709 #endif /* CONFIG_PVR2_DMA */
711 static struct fb_ops pvr2fb_ops = {
712 .owner = THIS_MODULE,
713 .fb_setcolreg = pvr2fb_setcolreg,
714 .fb_blank = pvr2fb_blank,
715 .fb_check_var = pvr2fb_check_var,
716 .fb_set_par = pvr2fb_set_par,
717 #ifdef CONFIG_PVR2_DMA
718 .fb_write = pvr2fb_write,
720 .fb_fillrect = cfb_fillrect,
721 .fb_copyarea = cfb_copyarea,
722 .fb_imageblit = cfb_imageblit,
725 static int pvr2_get_param_val(const struct pvr2_params *p, const char *s,
730 for (i = 0; i < size; i++) {
731 if (!strncasecmp(p[i].name, s, strlen(s)))
737 static char *pvr2_get_param_name(const struct pvr2_params *p, int val,
742 for (i = 0; i < size; i++) {
752 * Common init code for the PVR2 chips.
754 * This mostly takes care of the common aspects of the fb setup and
755 * registration. It's expected that the board-specific init code has
756 * already setup pvr2_fix with something meaningful at this point.
758 * Device info reporting is also done here, as well as picking a sane
759 * default from the modedb. For board-specific modelines, simply define
760 * a per-board modedb.
762 * Also worth noting is that the cable and video output types are likely
763 * always going to be VGA for the PCI-based PVR2 boards, but we leave this
764 * in for flexibility anyways. Who knows, maybe someone has tv-out on a
765 * PCI-based version of these things ;-)
767 static int __maybe_unused pvr2fb_common_init(void)
769 struct pvr2fb_par *par = currentpar;
770 unsigned long modememused, rev;
772 fb_info->screen_base = ioremap_nocache(pvr2_fix.smem_start,
775 if (!fb_info->screen_base) {
776 printk(KERN_ERR "pvr2fb: Failed to remap smem space\n");
780 par->mmio_base = ioremap_nocache(pvr2_fix.mmio_start,
782 if (!par->mmio_base) {
783 printk(KERN_ERR "pvr2fb: Failed to remap mmio space\n");
787 fb_memset(fb_info->screen_base, 0, pvr2_fix.smem_len);
789 pvr2_fix.ypanstep = nopan ? 0 : 1;
790 pvr2_fix.ywrapstep = nowrap ? 0 : 1;
792 fb_info->fbops = &pvr2fb_ops;
793 fb_info->fix = pvr2_fix;
794 fb_info->par = currentpar;
795 fb_info->pseudo_palette = currentpar->palette;
796 fb_info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN;
798 if (video_output == VO_VGA)
799 defmode = DEFMODE_VGA;
802 mode_option = "640x480@60";
804 if (!fb_find_mode(&fb_info->var, fb_info, mode_option, pvr2_modedb,
805 NUM_TOTAL_MODES, &pvr2_modedb[defmode], 16))
806 fb_info->var = pvr2_var;
808 fb_alloc_cmap(&fb_info->cmap, 256, 0);
810 if (register_framebuffer(fb_info) < 0)
812 /*Must write PIXDEPTH to register before anything is displayed - so force init */
813 pvr2_init_display(fb_info);
815 modememused = get_line_length(fb_info->var.xres_virtual,
816 fb_info->var.bits_per_pixel);
817 modememused *= fb_info->var.yres_virtual;
819 rev = fb_readl(par->mmio_base + 0x04);
821 fb_info(fb_info, "%s (rev %ld.%ld) frame buffer device, using %ldk/%ldk of video memory\n",
822 fb_info->fix.id, (rev >> 4) & 0x0f, rev & 0x0f,
824 (unsigned long)(fb_info->fix.smem_len >> 10));
825 fb_info(fb_info, "Mode %dx%d-%d pitch = %ld cable: %s video output: %s\n",
826 fb_info->var.xres, fb_info->var.yres,
827 fb_info->var.bits_per_pixel,
828 get_line_length(fb_info->var.xres, fb_info->var.bits_per_pixel),
829 pvr2_get_param_name(cables, cable_type, 3),
830 pvr2_get_param_name(outputs, video_output, 3));
832 #ifdef CONFIG_SH_STORE_QUEUES
833 fb_notice(fb_info, "registering with SQ API\n");
835 pvr2fb_map = sq_remap(fb_info->fix.smem_start, fb_info->fix.smem_len,
836 fb_info->fix.id, PAGE_SHARED);
838 fb_notice(fb_info, "Mapped video memory to SQ addr 0x%lx\n",
845 if (fb_info->screen_base)
846 iounmap(fb_info->screen_base);
848 iounmap(par->mmio_base);
853 #ifdef CONFIG_SH_DREAMCAST
854 static int __init pvr2fb_dc_init(void)
856 if (!mach_is_dreamcast())
859 /* Make a guess at the monitor based on the attached cable */
860 if (pvr2_init_cable() == CT_VGA) {
861 fb_info->monspecs.hfmin = 30000;
862 fb_info->monspecs.hfmax = 70000;
863 fb_info->monspecs.vfmin = 60;
864 fb_info->monspecs.vfmax = 60;
866 /* Not VGA, using a TV (taken from acornfb) */
867 fb_info->monspecs.hfmin = 15469;
868 fb_info->monspecs.hfmax = 15781;
869 fb_info->monspecs.vfmin = 49;
870 fb_info->monspecs.vfmax = 51;
874 * XXX: This needs to pull default video output via BIOS or other means
876 if (video_output < 0) {
877 if (cable_type == CT_VGA) {
878 video_output = VO_VGA;
880 video_output = VO_NTSC;
885 * Nothing exciting about the DC PVR2 .. only a measly 8MiB.
887 pvr2_fix.smem_start = 0xa5000000; /* RAM starts here */
888 pvr2_fix.smem_len = 8 << 20;
890 pvr2_fix.mmio_start = 0xa05f8000; /* registers start here */
891 pvr2_fix.mmio_len = 0x2000;
893 if (request_irq(HW_EVENT_VSYNC, pvr2fb_interrupt, IRQF_SHARED,
894 "pvr2 VBL handler", fb_info)) {
898 #ifdef CONFIG_PVR2_DMA
899 if (request_dma(pvr2dma, "pvr2") != 0) {
900 free_irq(HW_EVENT_VSYNC, fb_info);
905 return pvr2fb_common_init();
908 static void __exit pvr2fb_dc_exit(void)
910 if (fb_info->screen_base) {
911 iounmap(fb_info->screen_base);
912 fb_info->screen_base = NULL;
914 if (currentpar->mmio_base) {
915 iounmap(currentpar->mmio_base);
916 currentpar->mmio_base = NULL;
919 free_irq(HW_EVENT_VSYNC, fb_info);
920 #ifdef CONFIG_PVR2_DMA
924 #endif /* CONFIG_SH_DREAMCAST */
927 static int pvr2fb_pci_probe(struct pci_dev *pdev,
928 const struct pci_device_id *ent)
932 ret = pci_enable_device(pdev);
934 printk(KERN_ERR "pvr2fb: PCI enable failed\n");
938 ret = pci_request_regions(pdev, "pvr2fb");
940 printk(KERN_ERR "pvr2fb: PCI request regions failed\n");
945 * Slightly more exciting than the DC PVR2 .. 16MiB!
947 pvr2_fix.smem_start = pci_resource_start(pdev, 0);
948 pvr2_fix.smem_len = pci_resource_len(pdev, 0);
950 pvr2_fix.mmio_start = pci_resource_start(pdev, 1);
951 pvr2_fix.mmio_len = pci_resource_len(pdev, 1);
953 fb_info->device = &pdev->dev;
955 return pvr2fb_common_init();
958 static void pvr2fb_pci_remove(struct pci_dev *pdev)
960 if (fb_info->screen_base) {
961 iounmap(fb_info->screen_base);
962 fb_info->screen_base = NULL;
964 if (currentpar->mmio_base) {
965 iounmap(currentpar->mmio_base);
966 currentpar->mmio_base = NULL;
969 pci_release_regions(pdev);
972 static const struct pci_device_id pvr2fb_pci_tbl[] = {
973 { PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_NEON250,
974 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
978 MODULE_DEVICE_TABLE(pci, pvr2fb_pci_tbl);
980 static struct pci_driver pvr2fb_pci_driver = {
982 .id_table = pvr2fb_pci_tbl,
983 .probe = pvr2fb_pci_probe,
984 .remove = pvr2fb_pci_remove,
987 static int __init pvr2fb_pci_init(void)
989 return pci_register_driver(&pvr2fb_pci_driver);
992 static void __exit pvr2fb_pci_exit(void)
994 pci_unregister_driver(&pvr2fb_pci_driver);
996 #endif /* CONFIG_PCI */
999 * Parse command arguments. Supported arguments are:
1000 * inverse Use inverse color maps
1001 * cable:composite|rgb|vga Override the video cable type
1002 * output:NTSC|PAL|VGA Override the video output format
1004 * <xres>x<yres>[-<bpp>][@<refresh>] or,
1005 * <name>[-<bpp>][@<refresh>] Startup using this video mode
1009 static int __init pvr2fb_setup(char *options)
1013 char output_arg[80];
1015 if (!options || !*options)
1018 while ((this_opt = strsep(&options, ","))) {
1021 if (!strcmp(this_opt, "inverse")) {
1023 } else if (!strncmp(this_opt, "cable:", 6)) {
1024 strcpy(cable_arg, this_opt + 6);
1025 } else if (!strncmp(this_opt, "output:", 7)) {
1026 strcpy(output_arg, this_opt + 7);
1027 } else if (!strncmp(this_opt, "nopan", 5)) {
1029 } else if (!strncmp(this_opt, "nowrap", 6)) {
1032 mode_option = this_opt;
1037 cable_type = pvr2_get_param_val(cables, cable_arg, 3);
1039 video_output = pvr2_get_param_val(outputs, output_arg, 3);
1045 static struct pvr2_board {
1049 } board_driver[] __refdata = {
1050 #ifdef CONFIG_SH_DREAMCAST
1051 { pvr2fb_dc_init, pvr2fb_dc_exit, "Sega DC PVR2" },
1054 { pvr2fb_pci_init, pvr2fb_pci_exit, "PCI PVR2" },
1059 static int __init pvr2fb_init(void)
1061 int i, ret = -ENODEV;
1064 char *option = NULL;
1066 if (fb_get_options("pvr2fb", &option))
1068 pvr2fb_setup(option);
1071 fb_info = framebuffer_alloc(sizeof(struct pvr2fb_par), NULL);
1074 printk(KERN_ERR "Failed to allocate memory for fb_info\n");
1079 currentpar = fb_info->par;
1081 for (i = 0; i < ARRAY_SIZE(board_driver); i++) {
1082 struct pvr2_board *pvr_board = board_driver + i;
1084 if (!pvr_board->init)
1087 ret = pvr_board->init();
1090 printk(KERN_ERR "pvr2fb: Failed init of %s device\n",
1092 framebuffer_release(fb_info);
1100 static void __exit pvr2fb_exit(void)
1104 for (i = 0; i < ARRAY_SIZE(board_driver); i++) {
1105 struct pvr2_board *pvr_board = board_driver + i;
1107 if (pvr_board->exit)
1111 #ifdef CONFIG_SH_STORE_QUEUES
1112 sq_unmap(pvr2fb_map);
1115 unregister_framebuffer(fb_info);
1116 framebuffer_release(fb_info);
1119 module_init(pvr2fb_init);
1120 module_exit(pvr2fb_exit);
1122 MODULE_AUTHOR("Paul Mundt <lethal@linux-sh.org>, M. R. Brown <mrbrown@0xd6.org>");
1123 MODULE_DESCRIPTION("Framebuffer driver for NEC PowerVR 2 based graphics boards");
1124 MODULE_LICENSE("GPL");