OMAPDSS: HDMI: split PLL enable & config
[linux-2.6-block.git] / drivers / video / fbdev / omap2 / dss / hdmi4.c
1 /*
2  * HDMI interface DSS driver for TI's OMAP4 family of SoCs.
3  * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com/
4  * Authors: Yong Zhi
5  *      Mythri pk <mythripk@ti.com>
6  *
7  * This program is free software; you can redistribute it and/or modify it
8  * under the terms of the GNU General Public License version 2 as published by
9  * the Free Software Foundation.
10  *
11  * This program is distributed in the hope that it will be useful, but WITHOUT
12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
14  * more details.
15  *
16  * You should have received a copy of the GNU General Public License along with
17  * this program.  If not, see <http://www.gnu.org/licenses/>.
18  */
19
20 #define DSS_SUBSYS_NAME "HDMI"
21
22 #include <linux/kernel.h>
23 #include <linux/module.h>
24 #include <linux/err.h>
25 #include <linux/io.h>
26 #include <linux/interrupt.h>
27 #include <linux/mutex.h>
28 #include <linux/delay.h>
29 #include <linux/string.h>
30 #include <linux/platform_device.h>
31 #include <linux/pm_runtime.h>
32 #include <linux/clk.h>
33 #include <linux/gpio.h>
34 #include <linux/regulator/consumer.h>
35 #include <video/omapdss.h>
36
37 #include "hdmi4_core.h"
38 #include "dss.h"
39 #include "dss_features.h"
40
41 static struct {
42         struct mutex lock;
43         struct platform_device *pdev;
44
45         struct hdmi_wp_data     wp;
46         struct hdmi_pll_data    pll;
47         struct hdmi_phy_data    phy;
48         struct hdmi_core_data   core;
49
50         struct hdmi_config cfg;
51
52         struct clk *sys_clk;
53         struct regulator *vdda_hdmi_dac_reg;
54
55         bool core_enabled;
56
57         struct omap_dss_device output;
58 } hdmi;
59
60 static int hdmi_runtime_get(void)
61 {
62         int r;
63
64         DSSDBG("hdmi_runtime_get\n");
65
66         r = pm_runtime_get_sync(&hdmi.pdev->dev);
67         WARN_ON(r < 0);
68         if (r < 0)
69                 return r;
70
71         return 0;
72 }
73
74 static void hdmi_runtime_put(void)
75 {
76         int r;
77
78         DSSDBG("hdmi_runtime_put\n");
79
80         r = pm_runtime_put_sync(&hdmi.pdev->dev);
81         WARN_ON(r < 0 && r != -ENOSYS);
82 }
83
84 static irqreturn_t hdmi_irq_handler(int irq, void *data)
85 {
86         struct hdmi_wp_data *wp = data;
87         u32 irqstatus;
88
89         irqstatus = hdmi_wp_get_irqstatus(wp);
90         hdmi_wp_set_irqstatus(wp, irqstatus);
91
92         if ((irqstatus & HDMI_IRQ_LINK_CONNECT) &&
93                         irqstatus & HDMI_IRQ_LINK_DISCONNECT) {
94                 /*
95                  * If we get both connect and disconnect interrupts at the same
96                  * time, turn off the PHY, clear interrupts, and restart, which
97                  * raises connect interrupt if a cable is connected, or nothing
98                  * if cable is not connected.
99                  */
100                 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_OFF);
101
102                 hdmi_wp_set_irqstatus(wp, HDMI_IRQ_LINK_CONNECT |
103                                 HDMI_IRQ_LINK_DISCONNECT);
104
105                 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON);
106         } else if (irqstatus & HDMI_IRQ_LINK_CONNECT) {
107                 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_TXON);
108         } else if (irqstatus & HDMI_IRQ_LINK_DISCONNECT) {
109                 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON);
110         }
111
112         return IRQ_HANDLED;
113 }
114
115 static int hdmi_init_regulator(void)
116 {
117         int r;
118         struct regulator *reg;
119
120         if (hdmi.vdda_hdmi_dac_reg != NULL)
121                 return 0;
122
123         reg = devm_regulator_get(&hdmi.pdev->dev, "vdda");
124
125         if (IS_ERR(reg)) {
126                 if (PTR_ERR(reg) != -EPROBE_DEFER)
127                         DSSERR("can't get VDDA regulator\n");
128                 return PTR_ERR(reg);
129         }
130
131         if (regulator_can_change_voltage(reg)) {
132                 r = regulator_set_voltage(reg, 1800000, 1800000);
133                 if (r) {
134                         devm_regulator_put(reg);
135                         DSSWARN("can't set the regulator voltage\n");
136                         return r;
137                 }
138         }
139
140         hdmi.vdda_hdmi_dac_reg = reg;
141
142         return 0;
143 }
144
145 static int hdmi_power_on_core(struct omap_dss_device *dssdev)
146 {
147         int r;
148
149         r = regulator_enable(hdmi.vdda_hdmi_dac_reg);
150         if (r)
151                 return r;
152
153         r = hdmi_runtime_get();
154         if (r)
155                 goto err_runtime_get;
156
157         /* Make selection of HDMI in DSS */
158         dss_select_hdmi_venc_clk_source(DSS_HDMI_M_PCLK);
159
160         hdmi.core_enabled = true;
161
162         return 0;
163
164 err_runtime_get:
165         regulator_disable(hdmi.vdda_hdmi_dac_reg);
166
167         return r;
168 }
169
170 static void hdmi_power_off_core(struct omap_dss_device *dssdev)
171 {
172         hdmi.core_enabled = false;
173
174         hdmi_runtime_put();
175         regulator_disable(hdmi.vdda_hdmi_dac_reg);
176 }
177
178 static int hdmi_power_on_full(struct omap_dss_device *dssdev)
179 {
180         int r;
181         struct omap_video_timings *p;
182         struct omap_overlay_manager *mgr = hdmi.output.manager;
183         struct hdmi_wp_data *wp = &hdmi.wp;
184
185         r = hdmi_power_on_core(dssdev);
186         if (r)
187                 return r;
188
189         /* disable and clear irqs */
190         hdmi_wp_clear_irqenable(wp, 0xffffffff);
191         hdmi_wp_set_irqstatus(wp, 0xffffffff);
192
193         p = &hdmi.cfg.timings;
194
195         DSSDBG("hdmi_power_on x_res= %d y_res = %d\n", p->x_res, p->y_res);
196
197         hdmi_pll_compute(&hdmi.pll, clk_get_rate(hdmi.sys_clk), p->pixelclock);
198
199         r = hdmi_pll_enable(&hdmi.pll);
200         if (r) {
201                 DSSERR("Failed to enable PLL\n");
202                 goto err_pll_enable;
203         }
204
205         r = hdmi_pll_set_config(&hdmi.pll);
206         if (r) {
207                 DSSERR("Failed to configure PLL\n");
208                 goto err_pll_cfg;
209         }
210
211         r = hdmi_phy_configure(&hdmi.phy, hdmi.pll.info.clkdco,
212                 hdmi.pll.info.clkout);
213         if (r) {
214                 DSSDBG("Failed to configure PHY\n");
215                 goto err_phy_cfg;
216         }
217
218         r = hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON);
219         if (r)
220                 goto err_phy_pwr;
221
222         hdmi4_configure(&hdmi.core, &hdmi.wp, &hdmi.cfg);
223
224         /* bypass TV gamma table */
225         dispc_enable_gamma_table(0);
226
227         /* tv size */
228         dss_mgr_set_timings(mgr, p);
229
230         r = hdmi_wp_video_start(&hdmi.wp);
231         if (r)
232                 goto err_vid_enable;
233
234         r = dss_mgr_enable(mgr);
235         if (r)
236                 goto err_mgr_enable;
237
238         hdmi_wp_set_irqenable(wp,
239                 HDMI_IRQ_LINK_CONNECT | HDMI_IRQ_LINK_DISCONNECT);
240
241         return 0;
242
243 err_mgr_enable:
244         hdmi_wp_video_stop(&hdmi.wp);
245 err_vid_enable:
246 err_phy_cfg:
247         hdmi_wp_set_phy_pwr(&hdmi.wp, HDMI_PHYPWRCMD_OFF);
248 err_phy_pwr:
249 err_pll_cfg:
250         hdmi_pll_disable(&hdmi.pll);
251 err_pll_enable:
252         hdmi_power_off_core(dssdev);
253         return -EIO;
254 }
255
256 static void hdmi_power_off_full(struct omap_dss_device *dssdev)
257 {
258         struct omap_overlay_manager *mgr = hdmi.output.manager;
259
260         hdmi_wp_clear_irqenable(&hdmi.wp, 0xffffffff);
261
262         dss_mgr_disable(mgr);
263
264         hdmi_wp_video_stop(&hdmi.wp);
265
266         hdmi_wp_set_phy_pwr(&hdmi.wp, HDMI_PHYPWRCMD_OFF);
267
268         hdmi_pll_disable(&hdmi.pll);
269
270         hdmi_power_off_core(dssdev);
271 }
272
273 static int hdmi_display_check_timing(struct omap_dss_device *dssdev,
274                                         struct omap_video_timings *timings)
275 {
276         struct omap_dss_device *out = &hdmi.output;
277
278         if (!dispc_mgr_timings_ok(out->dispc_channel, timings))
279                 return -EINVAL;
280
281         return 0;
282 }
283
284 static void hdmi_display_set_timing(struct omap_dss_device *dssdev,
285                 struct omap_video_timings *timings)
286 {
287         mutex_lock(&hdmi.lock);
288
289         hdmi.cfg.timings = *timings;
290
291         dispc_set_tv_pclk(timings->pixelclock);
292
293         mutex_unlock(&hdmi.lock);
294 }
295
296 static void hdmi_display_get_timings(struct omap_dss_device *dssdev,
297                 struct omap_video_timings *timings)
298 {
299         *timings = hdmi.cfg.timings;
300 }
301
302 static void hdmi_dump_regs(struct seq_file *s)
303 {
304         mutex_lock(&hdmi.lock);
305
306         if (hdmi_runtime_get()) {
307                 mutex_unlock(&hdmi.lock);
308                 return;
309         }
310
311         hdmi_wp_dump(&hdmi.wp, s);
312         hdmi_pll_dump(&hdmi.pll, s);
313         hdmi_phy_dump(&hdmi.phy, s);
314         hdmi4_core_dump(&hdmi.core, s);
315
316         hdmi_runtime_put();
317         mutex_unlock(&hdmi.lock);
318 }
319
320 static int read_edid(u8 *buf, int len)
321 {
322         int r;
323
324         mutex_lock(&hdmi.lock);
325
326         r = hdmi_runtime_get();
327         BUG_ON(r);
328
329         r = hdmi4_read_edid(&hdmi.core,  buf, len);
330
331         hdmi_runtime_put();
332         mutex_unlock(&hdmi.lock);
333
334         return r;
335 }
336
337 static int hdmi_display_enable(struct omap_dss_device *dssdev)
338 {
339         struct omap_dss_device *out = &hdmi.output;
340         int r = 0;
341
342         DSSDBG("ENTER hdmi_display_enable\n");
343
344         mutex_lock(&hdmi.lock);
345
346         if (out == NULL || out->manager == NULL) {
347                 DSSERR("failed to enable display: no output/manager\n");
348                 r = -ENODEV;
349                 goto err0;
350         }
351
352         r = hdmi_power_on_full(dssdev);
353         if (r) {
354                 DSSERR("failed to power on device\n");
355                 goto err0;
356         }
357
358         mutex_unlock(&hdmi.lock);
359         return 0;
360
361 err0:
362         mutex_unlock(&hdmi.lock);
363         return r;
364 }
365
366 static void hdmi_display_disable(struct omap_dss_device *dssdev)
367 {
368         DSSDBG("Enter hdmi_display_disable\n");
369
370         mutex_lock(&hdmi.lock);
371
372         hdmi_power_off_full(dssdev);
373
374         mutex_unlock(&hdmi.lock);
375 }
376
377 static int hdmi_core_enable(struct omap_dss_device *dssdev)
378 {
379         int r = 0;
380
381         DSSDBG("ENTER omapdss_hdmi_core_enable\n");
382
383         mutex_lock(&hdmi.lock);
384
385         r = hdmi_power_on_core(dssdev);
386         if (r) {
387                 DSSERR("failed to power on device\n");
388                 goto err0;
389         }
390
391         mutex_unlock(&hdmi.lock);
392         return 0;
393
394 err0:
395         mutex_unlock(&hdmi.lock);
396         return r;
397 }
398
399 static void hdmi_core_disable(struct omap_dss_device *dssdev)
400 {
401         DSSDBG("Enter omapdss_hdmi_core_disable\n");
402
403         mutex_lock(&hdmi.lock);
404
405         hdmi_power_off_core(dssdev);
406
407         mutex_unlock(&hdmi.lock);
408 }
409
410 static int hdmi_get_clocks(struct platform_device *pdev)
411 {
412         struct clk *clk;
413
414         clk = devm_clk_get(&pdev->dev, "sys_clk");
415         if (IS_ERR(clk)) {
416                 DSSERR("can't get sys_clk\n");
417                 return PTR_ERR(clk);
418         }
419
420         hdmi.sys_clk = clk;
421
422         return 0;
423 }
424
425 static int hdmi_connect(struct omap_dss_device *dssdev,
426                 struct omap_dss_device *dst)
427 {
428         struct omap_overlay_manager *mgr;
429         int r;
430
431         r = hdmi_init_regulator();
432         if (r)
433                 return r;
434
435         mgr = omap_dss_get_overlay_manager(dssdev->dispc_channel);
436         if (!mgr)
437                 return -ENODEV;
438
439         r = dss_mgr_connect(mgr, dssdev);
440         if (r)
441                 return r;
442
443         r = omapdss_output_set_device(dssdev, dst);
444         if (r) {
445                 DSSERR("failed to connect output to new device: %s\n",
446                                 dst->name);
447                 dss_mgr_disconnect(mgr, dssdev);
448                 return r;
449         }
450
451         return 0;
452 }
453
454 static void hdmi_disconnect(struct omap_dss_device *dssdev,
455                 struct omap_dss_device *dst)
456 {
457         WARN_ON(dst != dssdev->dst);
458
459         if (dst != dssdev->dst)
460                 return;
461
462         omapdss_output_unset_device(dssdev);
463
464         if (dssdev->manager)
465                 dss_mgr_disconnect(dssdev->manager, dssdev);
466 }
467
468 static int hdmi_read_edid(struct omap_dss_device *dssdev,
469                 u8 *edid, int len)
470 {
471         bool need_enable;
472         int r;
473
474         need_enable = hdmi.core_enabled == false;
475
476         if (need_enable) {
477                 r = hdmi_core_enable(dssdev);
478                 if (r)
479                         return r;
480         }
481
482         r = read_edid(edid, len);
483
484         if (need_enable)
485                 hdmi_core_disable(dssdev);
486
487         return r;
488 }
489
490 #if defined(CONFIG_OMAP4_DSS_HDMI_AUDIO)
491 static int hdmi_audio_enable(struct omap_dss_device *dssdev)
492 {
493         int r;
494
495         mutex_lock(&hdmi.lock);
496
497         if (!hdmi_mode_has_audio(hdmi.cfg.hdmi_dvi_mode)) {
498                 r = -EPERM;
499                 goto err;
500         }
501
502         r = hdmi_wp_audio_enable(&hdmi.wp, true);
503         if (r)
504                 goto err;
505
506         mutex_unlock(&hdmi.lock);
507         return 0;
508
509 err:
510         mutex_unlock(&hdmi.lock);
511         return r;
512 }
513
514 static void hdmi_audio_disable(struct omap_dss_device *dssdev)
515 {
516         hdmi_wp_audio_enable(&hdmi.wp, false);
517 }
518
519 static int hdmi_audio_start(struct omap_dss_device *dssdev)
520 {
521         return hdmi4_audio_start(&hdmi.core, &hdmi.wp);
522 }
523
524 static void hdmi_audio_stop(struct omap_dss_device *dssdev)
525 {
526         hdmi4_audio_stop(&hdmi.core, &hdmi.wp);
527 }
528
529 static bool hdmi_audio_supported(struct omap_dss_device *dssdev)
530 {
531         bool r;
532
533         mutex_lock(&hdmi.lock);
534
535         r = hdmi_mode_has_audio(hdmi.cfg.hdmi_dvi_mode);
536
537         mutex_unlock(&hdmi.lock);
538         return r;
539 }
540
541 static int hdmi_audio_config(struct omap_dss_device *dssdev,
542                 struct omap_dss_audio *audio)
543 {
544         int r;
545         u32 pclk = hdmi.cfg.timings.pixelclock;
546
547         mutex_lock(&hdmi.lock);
548
549         if (!hdmi_mode_has_audio(hdmi.cfg.hdmi_dvi_mode)) {
550                 r = -EPERM;
551                 goto err;
552         }
553
554         r = hdmi4_audio_config(&hdmi.core, &hdmi.wp, audio, pclk);
555         if (r)
556                 goto err;
557
558         mutex_unlock(&hdmi.lock);
559         return 0;
560
561 err:
562         mutex_unlock(&hdmi.lock);
563         return r;
564 }
565 #else
566 static int hdmi_audio_enable(struct omap_dss_device *dssdev)
567 {
568         return -EPERM;
569 }
570
571 static void hdmi_audio_disable(struct omap_dss_device *dssdev)
572 {
573 }
574
575 static int hdmi_audio_start(struct omap_dss_device *dssdev)
576 {
577         return -EPERM;
578 }
579
580 static void hdmi_audio_stop(struct omap_dss_device *dssdev)
581 {
582 }
583
584 static bool hdmi_audio_supported(struct omap_dss_device *dssdev)
585 {
586         return false;
587 }
588
589 static int hdmi_audio_config(struct omap_dss_device *dssdev,
590                 struct omap_dss_audio *audio)
591 {
592         return -EPERM;
593 }
594 #endif
595
596 static int hdmi_set_infoframe(struct omap_dss_device *dssdev,
597                 const struct hdmi_avi_infoframe *avi)
598 {
599         hdmi.cfg.infoframe = *avi;
600         return 0;
601 }
602
603 static int hdmi_set_hdmi_mode(struct omap_dss_device *dssdev,
604                 bool hdmi_mode)
605 {
606         hdmi.cfg.hdmi_dvi_mode = hdmi_mode ? HDMI_HDMI : HDMI_DVI;
607         return 0;
608 }
609
610 static const struct omapdss_hdmi_ops hdmi_ops = {
611         .connect                = hdmi_connect,
612         .disconnect             = hdmi_disconnect,
613
614         .enable                 = hdmi_display_enable,
615         .disable                = hdmi_display_disable,
616
617         .check_timings          = hdmi_display_check_timing,
618         .set_timings            = hdmi_display_set_timing,
619         .get_timings            = hdmi_display_get_timings,
620
621         .read_edid              = hdmi_read_edid,
622         .set_infoframe          = hdmi_set_infoframe,
623         .set_hdmi_mode          = hdmi_set_hdmi_mode,
624
625         .audio_enable           = hdmi_audio_enable,
626         .audio_disable          = hdmi_audio_disable,
627         .audio_start            = hdmi_audio_start,
628         .audio_stop             = hdmi_audio_stop,
629         .audio_supported        = hdmi_audio_supported,
630         .audio_config           = hdmi_audio_config,
631 };
632
633 static void hdmi_init_output(struct platform_device *pdev)
634 {
635         struct omap_dss_device *out = &hdmi.output;
636
637         out->dev = &pdev->dev;
638         out->id = OMAP_DSS_OUTPUT_HDMI;
639         out->output_type = OMAP_DISPLAY_TYPE_HDMI;
640         out->name = "hdmi.0";
641         out->dispc_channel = OMAP_DSS_CHANNEL_DIGIT;
642         out->ops.hdmi = &hdmi_ops;
643         out->owner = THIS_MODULE;
644
645         omapdss_register_output(out);
646 }
647
648 static void __exit hdmi_uninit_output(struct platform_device *pdev)
649 {
650         struct omap_dss_device *out = &hdmi.output;
651
652         omapdss_unregister_output(out);
653 }
654
655 static int hdmi_probe_of(struct platform_device *pdev)
656 {
657         struct device_node *node = pdev->dev.of_node;
658         struct device_node *ep;
659         int r;
660
661         ep = omapdss_of_get_first_endpoint(node);
662         if (!ep)
663                 return 0;
664
665         r = hdmi_parse_lanes_of(pdev, ep, &hdmi.phy);
666         if (r)
667                 goto err;
668
669         of_node_put(ep);
670         return 0;
671
672 err:
673         of_node_put(ep);
674         return r;
675 }
676
677 /* HDMI HW IP initialisation */
678 static int omapdss_hdmihw_probe(struct platform_device *pdev)
679 {
680         int r;
681         int irq;
682
683         hdmi.pdev = pdev;
684
685         mutex_init(&hdmi.lock);
686
687         if (pdev->dev.of_node) {
688                 r = hdmi_probe_of(pdev);
689                 if (r)
690                         return r;
691         }
692
693         r = hdmi_wp_init(pdev, &hdmi.wp);
694         if (r)
695                 return r;
696
697         r = hdmi_pll_init(pdev, &hdmi.pll, &hdmi.wp);
698         if (r)
699                 return r;
700
701         r = hdmi_phy_init(pdev, &hdmi.phy);
702         if (r)
703                 return r;
704
705         r = hdmi4_core_init(pdev, &hdmi.core);
706         if (r)
707                 return r;
708
709         r = hdmi_get_clocks(pdev);
710         if (r) {
711                 DSSERR("can't get clocks\n");
712                 return r;
713         }
714
715         irq = platform_get_irq(pdev, 0);
716         if (irq < 0) {
717                 DSSERR("platform_get_irq failed\n");
718                 return -ENODEV;
719         }
720
721         r = devm_request_threaded_irq(&pdev->dev, irq,
722                         NULL, hdmi_irq_handler,
723                         IRQF_ONESHOT, "OMAP HDMI", &hdmi.wp);
724         if (r) {
725                 DSSERR("HDMI IRQ request failed\n");
726                 return r;
727         }
728
729         pm_runtime_enable(&pdev->dev);
730
731         hdmi_init_output(pdev);
732
733         dss_debugfs_create_file("hdmi", hdmi_dump_regs);
734
735         return 0;
736 }
737
738 static int __exit omapdss_hdmihw_remove(struct platform_device *pdev)
739 {
740         hdmi_uninit_output(pdev);
741
742         pm_runtime_disable(&pdev->dev);
743
744         return 0;
745 }
746
747 static int hdmi_runtime_suspend(struct device *dev)
748 {
749         clk_disable_unprepare(hdmi.sys_clk);
750
751         dispc_runtime_put();
752
753         return 0;
754 }
755
756 static int hdmi_runtime_resume(struct device *dev)
757 {
758         int r;
759
760         r = dispc_runtime_get();
761         if (r < 0)
762                 return r;
763
764         clk_prepare_enable(hdmi.sys_clk);
765
766         return 0;
767 }
768
769 static const struct dev_pm_ops hdmi_pm_ops = {
770         .runtime_suspend = hdmi_runtime_suspend,
771         .runtime_resume = hdmi_runtime_resume,
772 };
773
774 static const struct of_device_id hdmi_of_match[] = {
775         { .compatible = "ti,omap4-hdmi", },
776         {},
777 };
778
779 static struct platform_driver omapdss_hdmihw_driver = {
780         .probe          = omapdss_hdmihw_probe,
781         .remove         = __exit_p(omapdss_hdmihw_remove),
782         .driver         = {
783                 .name   = "omapdss_hdmi",
784                 .owner  = THIS_MODULE,
785                 .pm     = &hdmi_pm_ops,
786                 .of_match_table = hdmi_of_match,
787                 .suppress_bind_attrs = true,
788         },
789 };
790
791 int __init hdmi4_init_platform_driver(void)
792 {
793         return platform_driver_register(&omapdss_hdmihw_driver);
794 }
795
796 void __exit hdmi4_uninit_platform_driver(void)
797 {
798         platform_driver_unregister(&omapdss_hdmihw_driver);
799 }