drivers/video/fbdev/amba-clcd.c

   1 /*
   2  *  linux/drivers/video/amba-clcd.c
   3  *
   4  * Copyright (C) 2001 ARM Limited, by David A Rusling
   5  * Updated to 2.5, Deep Blue Solutions Ltd.
   6  *
   7  * This file is subject to the terms and conditions of the GNU General Public
   8  * License.  See the file COPYING in the main directory of this archive
   9  * for more details.
  10  *
  11  *  ARM PrimeCell PL110 Color LCD Controller
  12  */
  13 #include <linux/dma-mapping.h>
  14 #include <linux/module.h>
  15 #include <linux/kernel.h>
  16 #include <linux/errno.h>
  17 #include <linux/string.h>
  18 #include <linux/slab.h>
  19 #include <linux/delay.h>
  20 #include <linux/mm.h>
  21 #include <linux/fb.h>
  22 #include <linux/init.h>
  23 #include <linux/ioport.h>
  24 #include <linux/list.h>
  25 #include <linux/amba/bus.h>
  26 #include <linux/amba/clcd.h>
  27 #include <linux/bitops.h>
  28 #include <linux/clk.h>
  29 #include <linux/hardirq.h>
  30 #include <linux/dma-mapping.h>
  31 #include <linux/of.h>
  32 #include <linux/of_address.h>
  33 #include <linux/of_graph.h>
  34 #include <video/display_timing.h>
  35 #include <video/of_display_timing.h>
  36 #include <video/videomode.h>
  37
  38 #include <asm/sizes.h>
  39
  40 #define to_clcd(info)   container_of(info, struct clcd_fb, fb)
  41
  42 /* This is limited to 16 characters when displayed by X startup */
  43 static const char *clcd_name = "CLCD FB";
  44
  45 /*
  46  * Unfortunately, the enable/disable functions may be called either from
  47  * process or IRQ context, and we _need_ to delay.  This is _not_ good.
  48  */
  49 static inline void clcdfb_sleep(unsigned int ms)
  50 {
  51         if (in_atomic()) {
  52                 mdelay(ms);
  53         } else {
  54                 msleep(ms);
  55         }
  56 }
  57
  58 static inline void clcdfb_set_start(struct clcd_fb *fb)
  59 {
  60         unsigned long ustart = fb->fb.fix.smem_start;
  61         unsigned long lstart;
  62
  63         ustart += fb->fb.var.yoffset * fb->fb.fix.line_length;
  64         lstart = ustart + fb->fb.var.yres * fb->fb.fix.line_length / 2;
  65
  66         writel(ustart, fb->regs + CLCD_UBAS);
  67         writel(lstart, fb->regs + CLCD_LBAS);
  68 }
  69
  70 static void clcdfb_disable(struct clcd_fb *fb)
  71 {
  72         u32 val;
  73
  74         if (fb->board->disable)
  75                 fb->board->disable(fb);
  76
  77         val = readl(fb->regs + fb->off_cntl);
  78         if (val & CNTL_LCDPWR) {
  79                 val &= ~CNTL_LCDPWR;
  80                 writel(val, fb->regs + fb->off_cntl);
  81
  82                 clcdfb_sleep(20);
  83         }
  84         if (val & CNTL_LCDEN) {
  85                 val &= ~CNTL_LCDEN;
  86                 writel(val, fb->regs + fb->off_cntl);
  87         }
  88
  89         /*
  90          * Disable CLCD clock source.
  91          */
  92         if (fb->clk_enabled) {
  93                 fb->clk_enabled = false;
  94                 clk_disable(fb->clk);
  95         }
  96 }
  97
  98 static void clcdfb_enable(struct clcd_fb *fb, u32 cntl)
  99 {
 100         /*
 101          * Enable the CLCD clock source.
 102          */
 103         if (!fb->clk_enabled) {
 104                 fb->clk_enabled = true;
 105                 clk_enable(fb->clk);
 106         }
 107
 108         /*
 109          * Bring up by first enabling..
 110          */
 111         cntl |= CNTL_LCDEN;
 112         writel(cntl, fb->regs + fb->off_cntl);
 113
 114         clcdfb_sleep(20);
 115
 116         /*
 117          * and now apply power.
 118          */
 119         cntl |= CNTL_LCDPWR;
 120         writel(cntl, fb->regs + fb->off_cntl);
 121
 122         /*
 123          * finally, enable the interface.
 124          */
 125         if (fb->board->enable)
 126                 fb->board->enable(fb);
 127 }
 128
 129 static int
 130 clcdfb_set_bitfields(struct clcd_fb *fb, struct fb_var_screeninfo *var)
 131 {
 132         u32 caps;
 133         int ret = 0;
 134
 135         if (fb->panel->caps && fb->board->caps)
 136                 caps = fb->panel->caps & fb->board->caps;
 137         else {
 138                 /* Old way of specifying what can be used */
 139                 caps = fb->panel->cntl & CNTL_BGR ?
 140                         CLCD_CAP_BGR : CLCD_CAP_RGB;
 141                 /* But mask out 444 modes as they weren't supported */
 142                 caps &= ~CLCD_CAP_444;
 143         }
 144
 145         /* Only TFT panels can do RGB888/BGR888 */
 146         if (!(fb->panel->cntl & CNTL_LCDTFT))
 147                 caps &= ~CLCD_CAP_888;
 148
 149         memset(&var->transp, 0, sizeof(var->transp));
 150
 151         var->red.msb_right = 0;
 152         var->green.msb_right = 0;
 153         var->blue.msb_right = 0;
 154
 155         switch (var->bits_per_pixel) {
 156         case 1:
 157         case 2:
 158         case 4:
 159         case 8:
 160                 /* If we can't do 5551, reject */
 161                 caps &= CLCD_CAP_5551;
 162                 if (!caps) {
 163                         ret = -EINVAL;
 164                         break;
 165                 }
 166
 167                 var->red.length         = var->bits_per_pixel;
 168                 var->red.offset         = 0;
 169                 var->green.length       = var->bits_per_pixel;
 170                 var->green.offset       = 0;
 171                 var->blue.length        = var->bits_per_pixel;
 172                 var->blue.offset        = 0;
 173                 break;
 174
 175         case 16:
 176                 /* If we can't do 444, 5551 or 565, reject */
 177                 if (!(caps & (CLCD_CAP_444 | CLCD_CAP_5551 | CLCD_CAP_565))) {
 178                         ret = -EINVAL;
 179                         break;
 180                 }
 181
 182                 /*
 183                  * Green length can be 4, 5 or 6 depending whether
 184                  * we're operating in 444, 5551 or 565 mode.
 185                  */
 186                 if (var->green.length == 4 && caps & CLCD_CAP_444)
 187                         caps &= CLCD_CAP_444;
 188                 if (var->green.length == 5 && caps & CLCD_CAP_5551)
 189                         caps &= CLCD_CAP_5551;
 190                 else if (var->green.length == 6 && caps & CLCD_CAP_565)
 191                         caps &= CLCD_CAP_565;
 192                 else {
 193                         /*
 194                          * PL110 officially only supports RGB555,
 195                          * but may be wired up to allow RGB565.
 196                          */
 197                         if (caps & CLCD_CAP_565) {
 198                                 var->green.length = 6;
 199                                 caps &= CLCD_CAP_565;
 200                         } else if (caps & CLCD_CAP_5551) {
 201                                 var->green.length = 5;
 202                                 caps &= CLCD_CAP_5551;
 203                         } else {
 204                                 var->green.length = 4;
 205                                 caps &= CLCD_CAP_444;
 206                         }
 207                 }
 208
 209                 if (var->green.length >= 5) {
 210                         var->red.length = 5;
 211                         var->blue.length = 5;
 212                 } else {
 213                         var->red.length = 4;
 214                         var->blue.length = 4;
 215                 }
 216                 break;
 217         case 32:
 218                 /* If we can't do 888, reject */
 219                 caps &= CLCD_CAP_888;
 220                 if (!caps) {
 221                         ret = -EINVAL;
 222                         break;
 223                 }
 224
 225                 var->red.length = 8;
 226                 var->green.length = 8;
 227                 var->blue.length = 8;
 228                 break;
 229         default:
 230                 ret = -EINVAL;
 231                 break;
 232         }
 233
 234         /*
 235          * >= 16bpp displays have separate colour component bitfields
 236          * encoded in the pixel data.  Calculate their position from
 237          * the bitfield length defined above.
 238          */
 239         if (ret == 0 && var->bits_per_pixel >= 16) {
 240                 bool bgr, rgb;
 241
 242                 bgr = caps & CLCD_CAP_BGR && var->blue.offset == 0;
 243                 rgb = caps & CLCD_CAP_RGB && var->red.offset == 0;
 244
 245                 if (!bgr && !rgb)
 246                         /*
 247                          * The requested format was not possible, try just
 248                          * our capabilities.  One of BGR or RGB must be
 249                          * supported.
 250                          */
 251                         bgr = caps & CLCD_CAP_BGR;
 252
 253                 if (bgr) {
 254                         var->blue.offset = 0;
 255                         var->green.offset = var->blue.offset + var->blue.length;
 256                         var->red.offset = var->green.offset + var->green.length;
 257                 } else {
 258                         var->red.offset = 0;
 259                         var->green.offset = var->red.offset + var->red.length;
 260                         var->blue.offset = var->green.offset + var->green.length;
 261                 }
 262         }
 263
 264         return ret;
 265 }
 266
 267 static int clcdfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
 268 {
 269         struct clcd_fb *fb = to_clcd(info);
 270         int ret = -EINVAL;
 271
 272         if (fb->board->check)
 273                 ret = fb->board->check(fb, var);
 274
 275         if (ret == 0 &&
 276             var->xres_virtual * var->bits_per_pixel / 8 *
 277             var->yres_virtual > fb->fb.fix.smem_len)
 278                 ret = -EINVAL;
 279
 280         if (ret == 0)
 281                 ret = clcdfb_set_bitfields(fb, var);
 282
 283         return ret;
 284 }
 285
 286 static int clcdfb_set_par(struct fb_info *info)
 287 {
 288         struct clcd_fb *fb = to_clcd(info);
 289         struct clcd_regs regs;
 290
 291         fb->fb.fix.line_length = fb->fb.var.xres_virtual *
 292                                  fb->fb.var.bits_per_pixel / 8;
 293
 294         if (fb->fb.var.bits_per_pixel <= 8)
 295                 fb->fb.fix.visual = FB_VISUAL_PSEUDOCOLOR;
 296         else
 297                 fb->fb.fix.visual = FB_VISUAL_TRUECOLOR;
 298
 299         fb->board->decode(fb, &regs);
 300
 301         clcdfb_disable(fb);
 302
 303         writel(regs.tim0, fb->regs + CLCD_TIM0);
 304         writel(regs.tim1, fb->regs + CLCD_TIM1);
 305         writel(regs.tim2, fb->regs + CLCD_TIM2);
 306         writel(regs.tim3, fb->regs + CLCD_TIM3);
 307
 308         clcdfb_set_start(fb);
 309
 310         clk_set_rate(fb->clk, (1000000000 / regs.pixclock) * 1000);
 311
 312         fb->clcd_cntl = regs.cntl;
 313
 314         clcdfb_enable(fb, regs.cntl);
 315
 316 #ifdef DEBUG
 317         printk(KERN_INFO
 318                "CLCD: Registers set to\n"
 319                "  %08x %08x %08x %08x\n"
 320                "  %08x %08x %08x %08x\n",
 321                 readl(fb->regs + CLCD_TIM0), readl(fb->regs + CLCD_TIM1),
 322                 readl(fb->regs + CLCD_TIM2), readl(fb->regs + CLCD_TIM3),
 323                 readl(fb->regs + CLCD_UBAS), readl(fb->regs + CLCD_LBAS),
 324                 readl(fb->regs + fb->off_ienb), readl(fb->regs + fb->off_cntl));
 325 #endif
 326
 327         return 0;
 328 }
 329
 330 static inline u32 convert_bitfield(int val, struct fb_bitfield *bf)
 331 {
 332         unsigned int mask = (1 << bf->length) - 1;
 333
 334         return (val >> (16 - bf->length) & mask) << bf->offset;
 335 }
 336
 337 /*
 338  *  Set a single color register. The values supplied have a 16 bit
 339  *  magnitude.  Return != 0 for invalid regno.
 340  */
 341 static int
 342 clcdfb_setcolreg(unsigned int regno, unsigned int red, unsigned int green,
 343                  unsigned int blue, unsigned int transp, struct fb_info *info)
 344 {
 345         struct clcd_fb *fb = to_clcd(info);
 346
 347         if (regno < 16)
 348                 fb->cmap[regno] = convert_bitfield(transp, &fb->fb.var.transp) |
 349                                   convert_bitfield(blue, &fb->fb.var.blue) |
 350                                   convert_bitfield(green, &fb->fb.var.green) |
 351                                   convert_bitfield(red, &fb->fb.var.red);
 352
 353         if (fb->fb.fix.visual == FB_VISUAL_PSEUDOCOLOR && regno < 256) {
 354                 int hw_reg = CLCD_PALETTE + ((regno * 2) & ~3);
 355                 u32 val, mask, newval;
 356
 357                 newval  = (red >> 11)  & 0x001f;
 358                 newval |= (green >> 6) & 0x03e0;
 359                 newval |= (blue >> 1)  & 0x7c00;
 360
 361                 /*
 362                  * 3.2.11: if we're configured for big endian
 363                  * byte order, the palette entries are swapped.
 364                  */
 365                 if (fb->clcd_cntl & CNTL_BEBO)
 366                         regno ^= 1;
 367
 368                 if (regno & 1) {
 369                         newval <<= 16;
 370                         mask = 0x0000ffff;
 371                 } else {
 372                         mask = 0xffff0000;
 373                 }
 374
 375                 val = readl(fb->regs + hw_reg) & mask;
 376                 writel(val | newval, fb->regs + hw_reg);
 377         }
 378
 379         return regno > 255;
 380 }
 381
 382 /*
 383  *  Blank the screen if blank_mode != 0, else unblank. If blank == NULL
 384  *  then the caller blanks by setting the CLUT (Color Look Up Table) to all
 385  *  black. Return 0 if blanking succeeded, != 0 if un-/blanking failed due
 386  *  to e.g. a video mode which doesn't support it. Implements VESA suspend
 387  *  and powerdown modes on hardware that supports disabling hsync/vsync:
 388  *    blank_mode == 2: suspend vsync
 389  *    blank_mode == 3: suspend hsync
 390  *    blank_mode == 4: powerdown
 391  */
 392 static int clcdfb_blank(int blank_mode, struct fb_info *info)
 393 {
 394         struct clcd_fb *fb = to_clcd(info);
 395
 396         if (blank_mode != 0) {
 397                 clcdfb_disable(fb);
 398         } else {
 399                 clcdfb_enable(fb, fb->clcd_cntl);
 400         }
 401         return 0;
 402 }
 403
 404 static int clcdfb_mmap(struct fb_info *info,
 405                        struct vm_area_struct *vma)
 406 {
 407         struct clcd_fb *fb = to_clcd(info);
 408         unsigned long len, off = vma->vm_pgoff << PAGE_SHIFT;
 409         int ret = -EINVAL;
 410
 411         len = info->fix.smem_len;
 412
 413         if (off <= len && vma->vm_end - vma->vm_start <= len - off &&
 414             fb->board->mmap)
 415                 ret = fb->board->mmap(fb, vma);
 416
 417         return ret;
 418 }
 419
 420 static struct fb_ops clcdfb_ops = {
 421         .owner          = THIS_MODULE,
 422         .fb_check_var   = clcdfb_check_var,
 423         .fb_set_par     = clcdfb_set_par,
 424         .fb_setcolreg   = clcdfb_setcolreg,
 425         .fb_blank       = clcdfb_blank,
 426         .fb_fillrect    = cfb_fillrect,
 427         .fb_copyarea    = cfb_copyarea,
 428         .fb_imageblit   = cfb_imageblit,
 429         .fb_mmap        = clcdfb_mmap,
 430 };
 431
 432 static int clcdfb_register(struct clcd_fb *fb)
 433 {
 434         int ret;
 435
 436         /*
 437          * ARM PL111 always has IENB at 0x1c; it's only PL110
 438          * which is reversed on some platforms.
 439          */
 440         if (amba_manf(fb->dev) == 0x41 && amba_part(fb->dev) == 0x111) {
 441                 fb->off_ienb = CLCD_PL111_IENB;
 442                 fb->off_cntl = CLCD_PL111_CNTL;
 443         } else {
 444 #ifdef CONFIG_ARCH_VERSATILE
 445                 fb->off_ienb = CLCD_PL111_IENB;
 446                 fb->off_cntl = CLCD_PL111_CNTL;
 447 #else
 448                 fb->off_ienb = CLCD_PL110_IENB;
 449                 fb->off_cntl = CLCD_PL110_CNTL;
 450 #endif
 451         }
 452
 453         fb->clk = clk_get(&fb->dev->dev, NULL);
 454         if (IS_ERR(fb->clk)) {
 455                 ret = PTR_ERR(fb->clk);
 456                 goto out;
 457         }
 458
 459         ret = clk_prepare(fb->clk);
 460         if (ret)
 461                 goto free_clk;
 462
 463         fb->fb.device           = &fb->dev->dev;
 464
 465         fb->fb.fix.mmio_start   = fb->dev->res.start;
 466         fb->fb.fix.mmio_len     = resource_size(&fb->dev->res);
 467
 468         fb->regs = ioremap(fb->fb.fix.mmio_start, fb->fb.fix.mmio_len);
 469         if (!fb->regs) {
 470                 printk(KERN_ERR "CLCD: unable to remap registers\n");
 471                 ret = -ENOMEM;
 472                 goto clk_unprep;
 473         }
 474
 475         fb->fb.fbops            = &clcdfb_ops;
 476         fb->fb.flags            = FBINFO_FLAG_DEFAULT;
 477         fb->fb.pseudo_palette   = fb->cmap;
 478
 479         strncpy(fb->fb.fix.id, clcd_name, sizeof(fb->fb.fix.id));
 480         fb->fb.fix.type         = FB_TYPE_PACKED_PIXELS;
 481         fb->fb.fix.type_aux     = 0;
 482         fb->fb.fix.xpanstep     = 0;
 483         fb->fb.fix.ypanstep     = 0;
 484         fb->fb.fix.ywrapstep    = 0;
 485         fb->fb.fix.accel        = FB_ACCEL_NONE;
 486
 487         fb->fb.var.xres         = fb->panel->mode.xres;
 488         fb->fb.var.yres         = fb->panel->mode.yres;
 489         fb->fb.var.xres_virtual = fb->panel->mode.xres;
 490         fb->fb.var.yres_virtual = fb->panel->mode.yres;
 491         fb->fb.var.bits_per_pixel = fb->panel->bpp;
 492         fb->fb.var.grayscale    = fb->panel->grayscale;
 493         fb->fb.var.pixclock     = fb->panel->mode.pixclock;
 494         fb->fb.var.left_margin  = fb->panel->mode.left_margin;
 495         fb->fb.var.right_margin = fb->panel->mode.right_margin;
 496         fb->fb.var.upper_margin = fb->panel->mode.upper_margin;
 497         fb->fb.var.lower_margin = fb->panel->mode.lower_margin;
 498         fb->fb.var.hsync_len    = fb->panel->mode.hsync_len;
 499         fb->fb.var.vsync_len    = fb->panel->mode.vsync_len;
 500         fb->fb.var.sync         = fb->panel->mode.sync;
 501         fb->fb.var.vmode        = fb->panel->mode.vmode;
 502         fb->fb.var.activate     = FB_ACTIVATE_NOW;
 503         fb->fb.var.nonstd       = 0;
 504         fb->fb.var.height       = fb->panel->height;
 505         fb->fb.var.width        = fb->panel->width;
 506         fb->fb.var.accel_flags  = 0;
 507
 508         fb->fb.monspecs.hfmin   = 0;
 509         fb->fb.monspecs.hfmax   = 100000;
 510         fb->fb.monspecs.vfmin   = 0;
 511         fb->fb.monspecs.vfmax   = 400;
 512         fb->fb.monspecs.dclkmin = 1000000;
 513         fb->fb.monspecs.dclkmax = 100000000;
 514
 515         /*
 516          * Make sure that the bitfields are set appropriately.
 517          */
 518         clcdfb_set_bitfields(fb, &fb->fb.var);
 519
 520         /*
 521          * Allocate colourmap.
 522          */
 523         ret = fb_alloc_cmap(&fb->fb.cmap, 256, 0);
 524         if (ret)
 525                 goto unmap;
 526
 527         /*
 528          * Ensure interrupts are disabled.
 529          */
 530         writel(0, fb->regs + fb->off_ienb);
 531
 532         fb_set_var(&fb->fb, &fb->fb.var);
 533
 534         dev_info(&fb->dev->dev, "%s hardware, %s display\n",
 535                  fb->board->name, fb->panel->mode.name);
 536
 537         ret = register_framebuffer(&fb->fb);
 538         if (ret == 0)
 539                 goto out;
 540
 541         printk(KERN_ERR "CLCD: cannot register framebuffer (%d)\n", ret);
 542
 543         fb_dealloc_cmap(&fb->fb.cmap);
 544  unmap:
 545         iounmap(fb->regs);
 546  clk_unprep:
 547         clk_unprepare(fb->clk);
 548  free_clk:
 549         clk_put(fb->clk);
 550  out:
 551         return ret;
 552 }
 553
 554 #ifdef CONFIG_OF
 555 static int clcdfb_of_get_dpi_panel_mode(struct device_node *node,
 556                 struct fb_videomode *mode)
 557 {
 558         int err;
 559         struct display_timing timing;
 560         struct videomode video;
 561
 562         err = of_get_display_timing(node, "panel-timing", &timing);
 563         if (err)
 564                 return err;
 565
 566         videomode_from_timing(&timing, &video);
 567
 568         err = fb_videomode_from_videomode(&video, mode);
 569         if (err)
 570                 return err;
 571
 572         return 0;
 573 }
 574
 575 static int clcdfb_snprintf_mode(char *buf, int size, struct fb_videomode *mode)
 576 {
 577         return snprintf(buf, size, "%ux%u@%u", mode->xres, mode->yres,
 578                         mode->refresh);
 579 }
 580
 581 static int clcdfb_of_get_mode(struct device *dev, struct device_node *endpoint,
 582                 struct fb_videomode *mode)
 583 {
 584         int err;
 585         struct device_node *panel;
 586         char *name;
 587         int len;
 588
 589         panel = of_graph_get_remote_port_parent(endpoint);
 590         if (!panel)
 591                 return -ENODEV;
 592
 593         /* Only directly connected DPI panels supported for now */
 594         if (of_device_is_compatible(panel, "panel-dpi"))
 595                 err = clcdfb_of_get_dpi_panel_mode(panel, mode);
 596         else
 597                 err = -ENOENT;
 598         if (err)
 599                 return err;
 600
 601         len = clcdfb_snprintf_mode(NULL, 0, mode);
 602         name = devm_kzalloc(dev, len + 1, GFP_KERNEL);
 603         clcdfb_snprintf_mode(name, len + 1, mode);
 604         mode->name = name;
 605
 606         return 0;
 607 }
 608
 609 static int clcdfb_of_init_tft_panel(struct clcd_fb *fb, u32 r0, u32 g0, u32 b0)
 610 {
 611         static struct {
 612                 unsigned int part;
 613                 u32 r0, g0, b0;
 614                 u32 caps;
 615         } panels[] = {
 616                 { 0x110, 1,  7, 13, CLCD_CAP_5551 },
 617                 { 0x110, 0,  8, 16, CLCD_CAP_888 },
 618                 { 0x111, 4, 14, 20, CLCD_CAP_444 },
 619                 { 0x111, 3, 11, 19, CLCD_CAP_444 | CLCD_CAP_5551 },
 620                 { 0x111, 3, 10, 19, CLCD_CAP_444 | CLCD_CAP_5551 |
 621                                     CLCD_CAP_565 },
 622                 { 0x111, 0,  8, 16, CLCD_CAP_444 | CLCD_CAP_5551 |
 623                                     CLCD_CAP_565 | CLCD_CAP_888 },
 624         };
 625         int i;
 626
 627         /* Bypass pixel clock divider, data output on the falling edge */
 628         fb->panel->tim2 = TIM2_BCD | TIM2_IPC;
 629
 630         /* TFT display, vert. comp. interrupt at the start of the back porch */
 631         fb->panel->cntl |= CNTL_LCDTFT | CNTL_LCDVCOMP(1);
 632
 633         fb->panel->caps = 0;
 634
 635         /* Match the setup with known variants */
 636         for (i = 0; i < ARRAY_SIZE(panels) && !fb->panel->caps; i++) {
 637                 if (amba_part(fb->dev) != panels[i].part)
 638                         continue;
 639                 if (g0 != panels[i].g0)
 640                         continue;
 641                 if (r0 == panels[i].r0 && b0 == panels[i].b0)
 642                         fb->panel->caps = panels[i].caps;
 643         }
 644
 645         return fb->panel->caps ? 0 : -EINVAL;
 646 }
 647
 648 static int clcdfb_of_init_display(struct clcd_fb *fb)
 649 {
 650         struct device_node *endpoint;
 651         int err;
 652         unsigned int bpp;
 653         u32 max_bandwidth;
 654         u32 tft_r0b0g0[3];
 655
 656         fb->panel = devm_kzalloc(&fb->dev->dev, sizeof(*fb->panel), GFP_KERNEL);
 657         if (!fb->panel)
 658                 return -ENOMEM;
 659
 660         endpoint = of_graph_get_next_endpoint(fb->dev->dev.of_node, NULL);
 661         if (!endpoint)
 662                 return -ENODEV;
 663
 664         err = clcdfb_of_get_mode(&fb->dev->dev, endpoint, &fb->panel->mode);
 665         if (err)
 666                 return err;
 667
 668         err = of_property_read_u32(fb->dev->dev.of_node, "max-memory-bandwidth",
 669                         &max_bandwidth);
 670         if (!err) {
 671                 /*
 672                  * max_bandwidth is in bytes per second and pixclock in
 673                  * pico-seconds, so the maximum allowed bits per pixel is
 674                  *   8 * max_bandwidth / (PICOS2KHZ(pixclock) * 1000)
 675                  * Rearrange this calculation to avoid overflow and then ensure
 676                  * result is a valid format.
 677                  */
 678                 bpp = max_bandwidth / (1000 / 8)
 679                         / PICOS2KHZ(fb->panel->mode.pixclock);
 680                 bpp = rounddown_pow_of_two(bpp);
 681                 if (bpp > 32)
 682                         bpp = 32;
 683         } else
 684                 bpp = 32;
 685         fb->panel->bpp = bpp;
 686
 687 #ifdef CONFIG_CPU_BIG_ENDIAN
 688         fb->panel->cntl |= CNTL_BEBO;
 689 #endif
 690         fb->panel->width = -1;
 691         fb->panel->height = -1;
 692
 693         if (of_property_read_u32_array(endpoint,
 694                         "arm,pl11x,tft-r0g0b0-pads",
 695                         tft_r0b0g0, ARRAY_SIZE(tft_r0b0g0)) == 0)
 696                 return clcdfb_of_init_tft_panel(fb, tft_r0b0g0[0],
 697                                  tft_r0b0g0[1],  tft_r0b0g0[2]);
 698
 699         return -ENOENT;
 700 }
 701
 702 static int clcdfb_of_vram_setup(struct clcd_fb *fb)
 703 {
 704         int err;
 705         struct device_node *memory;
 706         u64 size;
 707
 708         err = clcdfb_of_init_display(fb);
 709         if (err)
 710                 return err;
 711
 712         memory = of_parse_phandle(fb->dev->dev.of_node, "memory-region", 0);
 713         if (!memory)
 714                 return -ENODEV;
 715
 716         fb->fb.screen_base = of_iomap(memory, 0);
 717         if (!fb->fb.screen_base)
 718                 return -ENOMEM;
 719
 720         fb->fb.fix.smem_start = of_translate_address(memory,
 721                         of_get_address(memory, 0, &size, NULL));
 722         fb->fb.fix.smem_len = size;
 723
 724         return 0;
 725 }
 726
 727 static int clcdfb_of_vram_mmap(struct clcd_fb *fb, struct vm_area_struct *vma)
 728 {
 729         unsigned long off, user_size, kernel_size;
 730
 731
 732         off = vma->vm_pgoff << PAGE_SHIFT;
 733         user_size = vma->vm_end - vma->vm_start;
 734         kernel_size = fb->fb.fix.smem_len;
 735
 736         if (off >= kernel_size || user_size > (kernel_size - off))
 737                 return -ENXIO;
 738
 739         return remap_pfn_range(vma, vma->vm_start,
 740                         __phys_to_pfn(fb->fb.fix.smem_start) + vma->vm_pgoff,
 741                         user_size,
 742                         pgprot_writecombine(vma->vm_page_prot));
 743 }
 744
 745 static void clcdfb_of_vram_remove(struct clcd_fb *fb)
 746 {
 747         iounmap(fb->fb.screen_base);
 748 }
 749
 750 static int clcdfb_of_dma_setup(struct clcd_fb *fb)
 751 {
 752         unsigned long framesize;
 753         dma_addr_t dma;
 754         int err;
 755
 756         err = clcdfb_of_init_display(fb);
 757         if (err)
 758                 return err;
 759
 760         framesize = fb->panel->mode.xres * fb->panel->mode.yres *
 761                         fb->panel->bpp / 8;
 762         fb->fb.screen_base = dma_alloc_coherent(&fb->dev->dev, framesize,
 763                         &dma, GFP_KERNEL);
 764         if (!fb->fb.screen_base)
 765                 return -ENOMEM;
 766
 767         fb->fb.fix.smem_start = dma;
 768         fb->fb.fix.smem_len = framesize;
 769
 770         return 0;
 771 }
 772
 773 static int clcdfb_of_dma_mmap(struct clcd_fb *fb, struct vm_area_struct *vma)
 774 {
 775         return dma_mmap_writecombine(&fb->dev->dev, vma, fb->fb.screen_base,
 776                         fb->fb.fix.smem_start, fb->fb.fix.smem_len);
 777 }
 778
 779 static void clcdfb_of_dma_remove(struct clcd_fb *fb)
 780 {
 781         dma_free_coherent(&fb->dev->dev, fb->fb.fix.smem_len,
 782                         fb->fb.screen_base, fb->fb.fix.smem_start);
 783 }
 784
 785 static struct clcd_board *clcdfb_of_get_board(struct amba_device *dev)
 786 {
 787         struct clcd_board *board = devm_kzalloc(&dev->dev, sizeof(*board),
 788                         GFP_KERNEL);
 789         struct device_node *node = dev->dev.of_node;
 790
 791         if (!board)
 792                 return NULL;
 793
 794         board->name = of_node_full_name(node);
 795         board->caps = CLCD_CAP_ALL;
 796         board->check = clcdfb_check;
 797         board->decode = clcdfb_decode;
 798         if (of_find_property(node, "memory-region", NULL)) {
 799                 board->setup = clcdfb_of_vram_setup;
 800                 board->mmap = clcdfb_of_vram_mmap;
 801                 board->remove = clcdfb_of_vram_remove;
 802         } else {
 803                 board->setup = clcdfb_of_dma_setup;
 804                 board->mmap = clcdfb_of_dma_mmap;
 805                 board->remove = clcdfb_of_dma_remove;
 806         }
 807
 808         return board;
 809 }
 810 #else
 811 static struct clcd_board *clcdfb_of_get_board(struct amba_device *dev)
 812 {
 813         return NULL;
 814 }
 815 #endif
 816
 817 static int clcdfb_probe(struct amba_device *dev, const struct amba_id *id)
 818 {
 819         struct clcd_board *board = dev_get_platdata(&dev->dev);
 820         struct clcd_fb *fb;
 821         int ret;
 822
 823         if (!board)
 824                 board = clcdfb_of_get_board(dev);
 825
 826         if (!board)
 827                 return -EINVAL;
 828
 829         ret = dma_set_mask_and_coherent(&dev->dev, DMA_BIT_MASK(32));
 830         if (ret)
 831                 goto out;
 832
 833         ret = amba_request_regions(dev, NULL);
 834         if (ret) {
 835                 printk(KERN_ERR "CLCD: unable to reserve regs region\n");
 836                 goto out;
 837         }
 838
 839         fb = kzalloc(sizeof(struct clcd_fb), GFP_KERNEL);
 840         if (!fb) {
 841                 printk(KERN_INFO "CLCD: could not allocate new clcd_fb struct\n");
 842                 ret = -ENOMEM;
 843                 goto free_region;
 844         }
 845
 846         fb->dev = dev;
 847         fb->board = board;
 848
 849         dev_info(&fb->dev->dev, "PL%03x rev%u at 0x%08llx\n",
 850                 amba_part(dev), amba_rev(dev),
 851                 (unsigned long long)dev->res.start);
 852
 853         ret = fb->board->setup(fb);
 854         if (ret)
 855                 goto free_fb;
 856
 857         ret = clcdfb_register(fb);
 858         if (ret == 0) {
 859                 amba_set_drvdata(dev, fb);
 860                 goto out;
 861         }
 862
 863         fb->board->remove(fb);
 864  free_fb:
 865         kfree(fb);
 866  free_region:
 867         amba_release_regions(dev);
 868  out:
 869         return ret;
 870 }
 871
 872 static int clcdfb_remove(struct amba_device *dev)
 873 {
 874         struct clcd_fb *fb = amba_get_drvdata(dev);
 875
 876         clcdfb_disable(fb);
 877         unregister_framebuffer(&fb->fb);
 878         if (fb->fb.cmap.len)
 879                 fb_dealloc_cmap(&fb->fb.cmap);
 880         iounmap(fb->regs);
 881         clk_unprepare(fb->clk);
 882         clk_put(fb->clk);
 883
 884         fb->board->remove(fb);
 885
 886         kfree(fb);
 887
 888         amba_release_regions(dev);
 889
 890         return 0;
 891 }
 892
 893 static struct amba_id clcdfb_id_table[] = {
 894         {
 895                 .id     = 0x00041110,
 896                 .mask   = 0x000ffffe,
 897         },
 898         { 0, 0 },
 899 };
 900
 901 MODULE_DEVICE_TABLE(amba, clcdfb_id_table);
 902
 903 static struct amba_driver clcd_driver = {
 904         .drv            = {
 905                 .name   = "clcd-pl11x",
 906         },
 907         .probe          = clcdfb_probe,
 908         .remove         = clcdfb_remove,
 909         .id_table       = clcdfb_id_table,
 910 };
 911
 912 static int __init amba_clcdfb_init(void)
 913 {
 914         if (fb_get_options("ambafb", NULL))
 915                 return -ENODEV;
 916
 917         return amba_driver_register(&clcd_driver);
 918 }
 919
 920 module_init(amba_clcdfb_init);
 921
 922 static void __exit amba_clcdfb_exit(void)
 923 {
 924         amba_driver_unregister(&clcd_driver);
 925 }
 926
 927 module_exit(amba_clcdfb_exit);
 928
 929 MODULE_DESCRIPTION("ARM PrimeCell PL110 CLCD core driver");
 930 MODULE_LICENSE("GPL");