2 * Driver for AT91/AT32 LCD Controller
4 * Copyright (C) 2007 Atmel Corporation
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file COPYING in the main directory of this archive for
11 #include <linux/kernel.h>
12 #include <linux/platform_device.h>
13 #include <linux/dma-mapping.h>
14 #include <linux/interrupt.h>
15 #include <linux/clk.h>
17 #include <linux/init.h>
18 #include <linux/delay.h>
19 #include <linux/backlight.h>
20 #include <linux/gfp.h>
22 #include <mach/board.h>
24 #include <mach/gpio.h>
26 #include <video/atmel_lcdc.h>
28 #define lcdc_readl(sinfo, reg) __raw_readl((sinfo)->mmio+(reg))
29 #define lcdc_writel(sinfo, reg, val) __raw_writel((val), (sinfo)->mmio+(reg))
31 /* configurable parameters */
32 #define ATMEL_LCDC_CVAL_DEFAULT 0xc8
33 #define ATMEL_LCDC_DMA_BURST_LEN 8 /* words */
34 #define ATMEL_LCDC_FIFO_SIZE 512 /* words */
36 #if defined(CONFIG_ARCH_AT91)
37 #define ATMEL_LCDFB_FBINFO_DEFAULT (FBINFO_DEFAULT \
38 | FBINFO_PARTIAL_PAN_OK \
39 | FBINFO_HWACCEL_YPAN)
41 static inline void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
42 struct fb_var_screeninfo *var)
46 #elif defined(CONFIG_AVR32)
47 #define ATMEL_LCDFB_FBINFO_DEFAULT (FBINFO_DEFAULT \
48 | FBINFO_PARTIAL_PAN_OK \
49 | FBINFO_HWACCEL_XPAN \
50 | FBINFO_HWACCEL_YPAN)
52 static void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
53 struct fb_var_screeninfo *var)
58 pixeloff = (var->xoffset * var->bits_per_pixel) & 0x1f;
60 dma2dcfg = ((var->xres_virtual - var->xres) * var->bits_per_pixel) / 8;
61 dma2dcfg |= pixeloff << ATMEL_LCDC_PIXELOFF_OFFSET;
62 lcdc_writel(sinfo, ATMEL_LCDC_DMA2DCFG, dma2dcfg);
64 /* Update configuration */
65 lcdc_writel(sinfo, ATMEL_LCDC_DMACON,
66 lcdc_readl(sinfo, ATMEL_LCDC_DMACON)
67 | ATMEL_LCDC_DMAUPDT);
71 static const u32 contrast_ctr = ATMEL_LCDC_PS_DIV8
72 | ATMEL_LCDC_POL_POSITIVE
73 | ATMEL_LCDC_ENA_PWMENABLE;
75 #ifdef CONFIG_BACKLIGHT_ATMEL_LCDC
77 /* some bl->props field just changed */
78 static int atmel_bl_update_status(struct backlight_device *bl)
80 struct atmel_lcdfb_info *sinfo = bl_get_data(bl);
81 int power = sinfo->bl_power;
82 int brightness = bl->props.brightness;
84 /* REVISIT there may be a meaningful difference between
85 * fb_blank and power ... there seem to be some cases
86 * this doesn't handle correctly.
88 if (bl->props.fb_blank != sinfo->bl_power)
89 power = bl->props.fb_blank;
90 else if (bl->props.power != sinfo->bl_power)
91 power = bl->props.power;
93 if (brightness < 0 && power == FB_BLANK_UNBLANK)
94 brightness = lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
95 else if (power != FB_BLANK_UNBLANK)
98 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, brightness);
99 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR,
100 brightness ? contrast_ctr : 0);
102 bl->props.fb_blank = bl->props.power = sinfo->bl_power = power;
107 static int atmel_bl_get_brightness(struct backlight_device *bl)
109 struct atmel_lcdfb_info *sinfo = bl_get_data(bl);
111 return lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
114 static const struct backlight_ops atmel_lcdc_bl_ops = {
115 .update_status = atmel_bl_update_status,
116 .get_brightness = atmel_bl_get_brightness,
119 static void init_backlight(struct atmel_lcdfb_info *sinfo)
121 struct backlight_properties props;
122 struct backlight_device *bl;
124 sinfo->bl_power = FB_BLANK_UNBLANK;
126 if (sinfo->backlight)
129 memset(&props, 0, sizeof(struct backlight_properties));
130 props.type = BACKLIGHT_RAW;
131 props.max_brightness = 0xff;
132 bl = backlight_device_register("backlight", &sinfo->pdev->dev, sinfo,
133 &atmel_lcdc_bl_ops, &props);
135 dev_err(&sinfo->pdev->dev, "error %ld on backlight register\n",
139 sinfo->backlight = bl;
141 bl->props.power = FB_BLANK_UNBLANK;
142 bl->props.fb_blank = FB_BLANK_UNBLANK;
143 bl->props.brightness = atmel_bl_get_brightness(bl);
146 static void exit_backlight(struct atmel_lcdfb_info *sinfo)
148 if (sinfo->backlight)
149 backlight_device_unregister(sinfo->backlight);
154 static void init_backlight(struct atmel_lcdfb_info *sinfo)
156 dev_warn(&sinfo->pdev->dev, "backlight control is not available\n");
159 static void exit_backlight(struct atmel_lcdfb_info *sinfo)
165 static void init_contrast(struct atmel_lcdfb_info *sinfo)
167 /* have some default contrast/backlight settings */
168 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, contrast_ctr);
169 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, ATMEL_LCDC_CVAL_DEFAULT);
171 if (sinfo->lcdcon_is_backlight)
172 init_backlight(sinfo);
176 static struct fb_fix_screeninfo atmel_lcdfb_fix __initdata = {
177 .type = FB_TYPE_PACKED_PIXELS,
178 .visual = FB_VISUAL_TRUECOLOR,
182 .accel = FB_ACCEL_NONE,
185 static unsigned long compute_hozval(unsigned long xres, unsigned long lcdcon2)
189 if (!(cpu_is_at91sam9261() || cpu_is_at91sam9g10()
190 || cpu_is_at32ap7000()))
194 if ((lcdcon2 & ATMEL_LCDC_DISTYPE) != ATMEL_LCDC_DISTYPE_TFT) {
196 if ((lcdcon2 & ATMEL_LCDC_DISTYPE) == ATMEL_LCDC_DISTYPE_STNCOLOR) {
199 if ( (lcdcon2 & ATMEL_LCDC_IFWIDTH) == ATMEL_LCDC_IFWIDTH_4
200 || ( (lcdcon2 & ATMEL_LCDC_IFWIDTH) == ATMEL_LCDC_IFWIDTH_8
201 && (lcdcon2 & ATMEL_LCDC_SCANMOD) == ATMEL_LCDC_SCANMOD_DUAL ))
202 value = DIV_ROUND_UP(value, 4);
204 value = DIV_ROUND_UP(value, 8);
210 static void atmel_lcdfb_stop_nowait(struct atmel_lcdfb_info *sinfo)
212 /* Turn off the LCD controller and the DMA controller */
213 lcdc_writel(sinfo, ATMEL_LCDC_PWRCON,
214 sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET);
216 /* Wait for the LCDC core to become idle */
217 while (lcdc_readl(sinfo, ATMEL_LCDC_PWRCON) & ATMEL_LCDC_BUSY)
220 lcdc_writel(sinfo, ATMEL_LCDC_DMACON, 0);
223 static void atmel_lcdfb_stop(struct atmel_lcdfb_info *sinfo)
225 atmel_lcdfb_stop_nowait(sinfo);
227 /* Wait for DMA engine to become idle... */
228 while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY)
232 static void atmel_lcdfb_start(struct atmel_lcdfb_info *sinfo)
234 lcdc_writel(sinfo, ATMEL_LCDC_DMACON, sinfo->default_dmacon);
235 lcdc_writel(sinfo, ATMEL_LCDC_PWRCON,
236 (sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET)
240 static void atmel_lcdfb_update_dma(struct fb_info *info,
241 struct fb_var_screeninfo *var)
243 struct atmel_lcdfb_info *sinfo = info->par;
244 struct fb_fix_screeninfo *fix = &info->fix;
245 unsigned long dma_addr;
247 dma_addr = (fix->smem_start + var->yoffset * fix->line_length
248 + var->xoffset * var->bits_per_pixel / 8);
252 /* Set framebuffer DMA base address and pixel offset */
253 lcdc_writel(sinfo, ATMEL_LCDC_DMABADDR1, dma_addr);
255 atmel_lcdfb_update_dma2d(sinfo, var);
258 static inline void atmel_lcdfb_free_video_memory(struct atmel_lcdfb_info *sinfo)
260 struct fb_info *info = sinfo->info;
262 dma_free_writecombine(info->device, info->fix.smem_len,
263 info->screen_base, info->fix.smem_start);
267 * atmel_lcdfb_alloc_video_memory - Allocate framebuffer memory
268 * @sinfo: the frame buffer to allocate memory for
270 * This function is called only from the atmel_lcdfb_probe()
271 * so no locking by fb_info->mm_lock around smem_len setting is needed.
273 static int atmel_lcdfb_alloc_video_memory(struct atmel_lcdfb_info *sinfo)
275 struct fb_info *info = sinfo->info;
276 struct fb_var_screeninfo *var = &info->var;
277 unsigned int smem_len;
279 smem_len = (var->xres_virtual * var->yres_virtual
280 * ((var->bits_per_pixel + 7) / 8));
281 info->fix.smem_len = max(smem_len, sinfo->smem_len);
283 info->screen_base = dma_alloc_writecombine(info->device, info->fix.smem_len,
284 (dma_addr_t *)&info->fix.smem_start, GFP_KERNEL);
286 if (!info->screen_base) {
290 memset(info->screen_base, 0, info->fix.smem_len);
295 static const struct fb_videomode *atmel_lcdfb_choose_mode(struct fb_var_screeninfo *var,
296 struct fb_info *info)
298 struct fb_videomode varfbmode;
299 const struct fb_videomode *fbmode = NULL;
301 fb_var_to_videomode(&varfbmode, var);
302 fbmode = fb_find_nearest_mode(&varfbmode, &info->modelist);
304 fb_videomode_to_var(var, fbmode);
310 * atmel_lcdfb_check_var - Validates a var passed in.
311 * @var: frame buffer variable screen structure
312 * @info: frame buffer structure that represents a single frame buffer
314 * Checks to see if the hardware supports the state requested by
315 * var passed in. This function does not alter the hardware
316 * state!!! This means the data stored in struct fb_info and
317 * struct atmel_lcdfb_info do not change. This includes the var
318 * inside of struct fb_info. Do NOT change these. This function
319 * can be called on its own if we intent to only test a mode and
320 * not actually set it. The stuff in modedb.c is a example of
321 * this. If the var passed in is slightly off by what the
322 * hardware can support then we alter the var PASSED in to what
323 * we can do. If the hardware doesn't support mode change a
324 * -EINVAL will be returned by the upper layers. You don't need
325 * to implement this function then. If you hardware doesn't
326 * support changing the resolution then this function is not
327 * needed. In this case the driver would just provide a var that
328 * represents the static state the screen is in.
330 * Returns negative errno on error, or zero on success.
332 static int atmel_lcdfb_check_var(struct fb_var_screeninfo *var,
333 struct fb_info *info)
335 struct device *dev = info->device;
336 struct atmel_lcdfb_info *sinfo = info->par;
337 unsigned long clk_value_khz;
339 clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000;
341 dev_dbg(dev, "%s:\n", __func__);
343 if (!(var->pixclock && var->bits_per_pixel)) {
344 /* choose a suitable mode if possible */
345 if (!atmel_lcdfb_choose_mode(var, info)) {
346 dev_err(dev, "needed value not specified\n");
351 dev_dbg(dev, " resolution: %ux%u\n", var->xres, var->yres);
352 dev_dbg(dev, " pixclk: %lu KHz\n", PICOS2KHZ(var->pixclock));
353 dev_dbg(dev, " bpp: %u\n", var->bits_per_pixel);
354 dev_dbg(dev, " clk: %lu KHz\n", clk_value_khz);
356 if (PICOS2KHZ(var->pixclock) > clk_value_khz) {
357 dev_err(dev, "%lu KHz pixel clock is too fast\n", PICOS2KHZ(var->pixclock));
361 /* Do not allow to have real resoulution larger than virtual */
362 if (var->xres > var->xres_virtual)
363 var->xres_virtual = var->xres;
365 if (var->yres > var->yres_virtual)
366 var->yres_virtual = var->yres;
368 /* Force same alignment for each line */
369 var->xres = (var->xres + 3) & ~3UL;
370 var->xres_virtual = (var->xres_virtual + 3) & ~3UL;
372 var->red.msb_right = var->green.msb_right = var->blue.msb_right = 0;
373 var->transp.msb_right = 0;
374 var->transp.offset = var->transp.length = 0;
375 var->xoffset = var->yoffset = 0;
377 if (info->fix.smem_len) {
378 unsigned int smem_len = (var->xres_virtual * var->yres_virtual
379 * ((var->bits_per_pixel + 7) / 8));
380 if (smem_len > info->fix.smem_len)
384 /* Saturate vertical and horizontal timings at maximum values */
385 var->vsync_len = min_t(u32, var->vsync_len,
386 (ATMEL_LCDC_VPW >> ATMEL_LCDC_VPW_OFFSET) + 1);
387 var->upper_margin = min_t(u32, var->upper_margin,
388 ATMEL_LCDC_VBP >> ATMEL_LCDC_VBP_OFFSET);
389 var->lower_margin = min_t(u32, var->lower_margin,
391 var->right_margin = min_t(u32, var->right_margin,
392 (ATMEL_LCDC_HFP >> ATMEL_LCDC_HFP_OFFSET) + 1);
393 var->hsync_len = min_t(u32, var->hsync_len,
394 (ATMEL_LCDC_HPW >> ATMEL_LCDC_HPW_OFFSET) + 1);
395 var->left_margin = min_t(u32, var->left_margin,
398 /* Some parameters can't be zero */
399 var->vsync_len = max_t(u32, var->vsync_len, 1);
400 var->right_margin = max_t(u32, var->right_margin, 1);
401 var->hsync_len = max_t(u32, var->hsync_len, 1);
402 var->left_margin = max_t(u32, var->left_margin, 1);
404 switch (var->bits_per_pixel) {
409 var->red.offset = var->green.offset = var->blue.offset = 0;
410 var->red.length = var->green.length = var->blue.length
411 = var->bits_per_pixel;
415 if (sinfo->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) {
417 var->red.offset = 11;
418 var->blue.offset = 0;
419 var->green.length = 6;
420 } else if (sinfo->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB555) {
421 var->red.offset = 10;
422 var->blue.offset = 0;
423 var->green.length = 5;
427 var->blue.offset = 10;
428 var->green.length = 5;
430 var->green.offset = 5;
431 var->red.length = var->blue.length = 5;
434 var->transp.offset = 24;
435 var->transp.length = 8;
438 if (sinfo->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) {
440 var->red.offset = 16;
441 var->blue.offset = 0;
445 var->blue.offset = 16;
447 var->green.offset = 8;
448 var->red.length = var->green.length = var->blue.length = 8;
451 dev_err(dev, "color depth %d not supported\n",
452 var->bits_per_pixel);
462 static void atmel_lcdfb_reset(struct atmel_lcdfb_info *sinfo)
466 atmel_lcdfb_stop(sinfo);
467 atmel_lcdfb_start(sinfo);
471 * atmel_lcdfb_set_par - Alters the hardware state.
472 * @info: frame buffer structure that represents a single frame buffer
474 * Using the fb_var_screeninfo in fb_info we set the resolution
475 * of the this particular framebuffer. This function alters the
476 * par AND the fb_fix_screeninfo stored in fb_info. It doesn't
477 * not alter var in fb_info since we are using that data. This
478 * means we depend on the data in var inside fb_info to be
479 * supported by the hardware. atmel_lcdfb_check_var is always called
480 * before atmel_lcdfb_set_par to ensure this. Again if you can't
481 * change the resolution you don't need this function.
484 static int atmel_lcdfb_set_par(struct fb_info *info)
486 struct atmel_lcdfb_info *sinfo = info->par;
487 unsigned long hozval_linesz;
489 unsigned long clk_value_khz;
490 unsigned long bits_per_line;
491 unsigned long pix_factor = 2;
495 dev_dbg(info->device, "%s:\n", __func__);
496 dev_dbg(info->device, " * resolution: %ux%u (%ux%u virtual)\n",
497 info->var.xres, info->var.yres,
498 info->var.xres_virtual, info->var.yres_virtual);
500 atmel_lcdfb_stop_nowait(sinfo);
502 if (info->var.bits_per_pixel == 1)
503 info->fix.visual = FB_VISUAL_MONO01;
504 else if (info->var.bits_per_pixel <= 8)
505 info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
507 info->fix.visual = FB_VISUAL_TRUECOLOR;
509 bits_per_line = info->var.xres_virtual * info->var.bits_per_pixel;
510 info->fix.line_length = DIV_ROUND_UP(bits_per_line, 8);
512 /* Re-initialize the DMA engine... */
513 dev_dbg(info->device, " * update DMA engine\n");
514 atmel_lcdfb_update_dma(info, &info->var);
516 /* ...set frame size and burst length = 8 words (?) */
517 value = (info->var.yres * info->var.xres * info->var.bits_per_pixel) / 32;
518 value |= ((ATMEL_LCDC_DMA_BURST_LEN - 1) << ATMEL_LCDC_BLENGTH_OFFSET);
519 lcdc_writel(sinfo, ATMEL_LCDC_DMAFRMCFG, value);
521 /* Now, the LCDC core... */
523 /* Set pixel clock */
524 if (cpu_is_at91sam9g45() && !cpu_is_at91sam9g45es())
527 clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000;
529 value = DIV_ROUND_UP(clk_value_khz, PICOS2KHZ(info->var.pixclock));
531 if (value < pix_factor) {
532 dev_notice(info->device, "Bypassing pixel clock divider\n");
533 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, ATMEL_LCDC_BYPASS);
535 value = (value / pix_factor) - 1;
536 dev_dbg(info->device, " * programming CLKVAL = 0x%08lx\n",
538 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1,
539 value << ATMEL_LCDC_CLKVAL_OFFSET);
541 KHZ2PICOS(clk_value_khz / (pix_factor * (value + 1)));
542 dev_dbg(info->device, " updated pixclk: %lu KHz\n",
543 PICOS2KHZ(info->var.pixclock));
547 /* Initialize control register 2 */
548 value = sinfo->default_lcdcon2;
550 if (!(info->var.sync & FB_SYNC_HOR_HIGH_ACT))
551 value |= ATMEL_LCDC_INVLINE_INVERTED;
552 if (!(info->var.sync & FB_SYNC_VERT_HIGH_ACT))
553 value |= ATMEL_LCDC_INVFRAME_INVERTED;
555 switch (info->var.bits_per_pixel) {
556 case 1: value |= ATMEL_LCDC_PIXELSIZE_1; break;
557 case 2: value |= ATMEL_LCDC_PIXELSIZE_2; break;
558 case 4: value |= ATMEL_LCDC_PIXELSIZE_4; break;
559 case 8: value |= ATMEL_LCDC_PIXELSIZE_8; break;
560 case 15: /* fall through */
561 case 16: value |= ATMEL_LCDC_PIXELSIZE_16; break;
562 case 24: value |= ATMEL_LCDC_PIXELSIZE_24; break;
563 case 32: value |= ATMEL_LCDC_PIXELSIZE_32; break;
564 default: BUG(); break;
566 dev_dbg(info->device, " * LCDCON2 = %08lx\n", value);
567 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON2, value);
569 /* Vertical timing */
570 value = (info->var.vsync_len - 1) << ATMEL_LCDC_VPW_OFFSET;
571 value |= info->var.upper_margin << ATMEL_LCDC_VBP_OFFSET;
572 value |= info->var.lower_margin;
573 dev_dbg(info->device, " * LCDTIM1 = %08lx\n", value);
574 lcdc_writel(sinfo, ATMEL_LCDC_TIM1, value);
576 /* Horizontal timing */
577 value = (info->var.right_margin - 1) << ATMEL_LCDC_HFP_OFFSET;
578 value |= (info->var.hsync_len - 1) << ATMEL_LCDC_HPW_OFFSET;
579 value |= (info->var.left_margin - 1);
580 dev_dbg(info->device, " * LCDTIM2 = %08lx\n", value);
581 lcdc_writel(sinfo, ATMEL_LCDC_TIM2, value);
583 /* Horizontal value (aka line size) */
584 hozval_linesz = compute_hozval(info->var.xres,
585 lcdc_readl(sinfo, ATMEL_LCDC_LCDCON2));
588 value = (hozval_linesz - 1) << ATMEL_LCDC_HOZVAL_OFFSET;
589 value |= info->var.yres - 1;
590 dev_dbg(info->device, " * LCDFRMCFG = %08lx\n", value);
591 lcdc_writel(sinfo, ATMEL_LCDC_LCDFRMCFG, value);
593 /* FIFO Threshold: Use formula from data sheet */
594 value = ATMEL_LCDC_FIFO_SIZE - (2 * ATMEL_LCDC_DMA_BURST_LEN + 3);
595 lcdc_writel(sinfo, ATMEL_LCDC_FIFO, value);
597 /* Toggle LCD_MODE every frame */
598 lcdc_writel(sinfo, ATMEL_LCDC_MVAL, 0);
600 /* Disable all interrupts */
601 lcdc_writel(sinfo, ATMEL_LCDC_IDR, ~0UL);
602 /* Enable FIFO & DMA errors */
603 lcdc_writel(sinfo, ATMEL_LCDC_IER, ATMEL_LCDC_UFLWI | ATMEL_LCDC_OWRI | ATMEL_LCDC_MERI);
605 /* ...wait for DMA engine to become idle... */
606 while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY)
609 atmel_lcdfb_start(sinfo);
611 dev_dbg(info->device, " * DONE\n");
616 static inline unsigned int chan_to_field(unsigned int chan, const struct fb_bitfield *bf)
619 chan >>= 16 - bf->length;
620 return chan << bf->offset;
624 * atmel_lcdfb_setcolreg - Optional function. Sets a color register.
625 * @regno: Which register in the CLUT we are programming
626 * @red: The red value which can be up to 16 bits wide
627 * @green: The green value which can be up to 16 bits wide
628 * @blue: The blue value which can be up to 16 bits wide.
629 * @transp: If supported the alpha value which can be up to 16 bits wide.
630 * @info: frame buffer info structure
632 * Set a single color register. The values supplied have a 16 bit
633 * magnitude which needs to be scaled in this function for the hardware.
634 * Things to take into consideration are how many color registers, if
635 * any, are supported with the current color visual. With truecolor mode
636 * no color palettes are supported. Here a psuedo palette is created
637 * which we store the value in pseudo_palette in struct fb_info. For
638 * pseudocolor mode we have a limited color palette. To deal with this
639 * we can program what color is displayed for a particular pixel value.
640 * DirectColor is similar in that we can program each color field. If
641 * we have a static colormap we don't need to implement this function.
643 * Returns negative errno on error, or zero on success. In an
644 * ideal world, this would have been the case, but as it turns
645 * out, the other drivers return 1 on failure, so that's what
648 static int atmel_lcdfb_setcolreg(unsigned int regno, unsigned int red,
649 unsigned int green, unsigned int blue,
650 unsigned int transp, struct fb_info *info)
652 struct atmel_lcdfb_info *sinfo = info->par;
657 if (info->var.grayscale)
658 red = green = blue = (19595 * red + 38470 * green
659 + 7471 * blue) >> 16;
661 switch (info->fix.visual) {
662 case FB_VISUAL_TRUECOLOR:
664 pal = info->pseudo_palette;
666 val = chan_to_field(red, &info->var.red);
667 val |= chan_to_field(green, &info->var.green);
668 val |= chan_to_field(blue, &info->var.blue);
675 case FB_VISUAL_PSEUDOCOLOR:
677 val = ((red >> 11) & 0x001f);
678 val |= ((green >> 6) & 0x03e0);
679 val |= ((blue >> 1) & 0x7c00);
682 * TODO: intensity bit. Maybe something like
683 * ~(red[10] ^ green[10] ^ blue[10]) & 1
686 lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val);
691 case FB_VISUAL_MONO01:
693 val = (regno == 0) ? 0x00 : 0x1F;
694 lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val);
704 static int atmel_lcdfb_pan_display(struct fb_var_screeninfo *var,
705 struct fb_info *info)
707 dev_dbg(info->device, "%s\n", __func__);
709 atmel_lcdfb_update_dma(info, var);
714 static struct fb_ops atmel_lcdfb_ops = {
715 .owner = THIS_MODULE,
716 .fb_check_var = atmel_lcdfb_check_var,
717 .fb_set_par = atmel_lcdfb_set_par,
718 .fb_setcolreg = atmel_lcdfb_setcolreg,
719 .fb_pan_display = atmel_lcdfb_pan_display,
720 .fb_fillrect = cfb_fillrect,
721 .fb_copyarea = cfb_copyarea,
722 .fb_imageblit = cfb_imageblit,
725 static irqreturn_t atmel_lcdfb_interrupt(int irq, void *dev_id)
727 struct fb_info *info = dev_id;
728 struct atmel_lcdfb_info *sinfo = info->par;
731 status = lcdc_readl(sinfo, ATMEL_LCDC_ISR);
732 if (status & ATMEL_LCDC_UFLWI) {
733 dev_warn(info->device, "FIFO underflow %#x\n", status);
734 /* reset DMA and FIFO to avoid screen shifting */
735 schedule_work(&sinfo->task);
737 lcdc_writel(sinfo, ATMEL_LCDC_ICR, status);
742 * LCD controller task (to reset the LCD)
744 static void atmel_lcdfb_task(struct work_struct *work)
746 struct atmel_lcdfb_info *sinfo =
747 container_of(work, struct atmel_lcdfb_info, task);
749 atmel_lcdfb_reset(sinfo);
752 static int __init atmel_lcdfb_init_fbinfo(struct atmel_lcdfb_info *sinfo)
754 struct fb_info *info = sinfo->info;
757 info->var.activate |= FB_ACTIVATE_FORCE | FB_ACTIVATE_NOW;
759 dev_info(info->device,
760 "%luKiB frame buffer at %08lx (mapped at %p)\n",
761 (unsigned long)info->fix.smem_len / 1024,
762 (unsigned long)info->fix.smem_start,
765 /* Allocate colormap */
766 ret = fb_alloc_cmap(&info->cmap, 256, 0);
768 dev_err(info->device, "Alloc color map failed\n");
773 static void atmel_lcdfb_start_clock(struct atmel_lcdfb_info *sinfo)
776 clk_enable(sinfo->bus_clk);
777 clk_enable(sinfo->lcdc_clk);
780 static void atmel_lcdfb_stop_clock(struct atmel_lcdfb_info *sinfo)
783 clk_disable(sinfo->bus_clk);
784 clk_disable(sinfo->lcdc_clk);
788 static int __init atmel_lcdfb_probe(struct platform_device *pdev)
790 struct device *dev = &pdev->dev;
791 struct fb_info *info;
792 struct atmel_lcdfb_info *sinfo;
793 struct atmel_lcdfb_info *pdata_sinfo;
794 struct fb_videomode fbmode;
795 struct resource *regs = NULL;
796 struct resource *map = NULL;
799 dev_dbg(dev, "%s BEGIN\n", __func__);
802 info = framebuffer_alloc(sizeof(struct atmel_lcdfb_info), dev);
804 dev_err(dev, "cannot allocate memory\n");
810 if (dev->platform_data) {
811 pdata_sinfo = (struct atmel_lcdfb_info *)dev->platform_data;
812 sinfo->default_bpp = pdata_sinfo->default_bpp;
813 sinfo->default_dmacon = pdata_sinfo->default_dmacon;
814 sinfo->default_lcdcon2 = pdata_sinfo->default_lcdcon2;
815 sinfo->default_monspecs = pdata_sinfo->default_monspecs;
816 sinfo->atmel_lcdfb_power_control = pdata_sinfo->atmel_lcdfb_power_control;
817 sinfo->guard_time = pdata_sinfo->guard_time;
818 sinfo->smem_len = pdata_sinfo->smem_len;
819 sinfo->lcdcon_is_backlight = pdata_sinfo->lcdcon_is_backlight;
820 sinfo->lcd_wiring_mode = pdata_sinfo->lcd_wiring_mode;
822 dev_err(dev, "cannot get default configuration\n");
828 strcpy(info->fix.id, sinfo->pdev->name);
829 info->flags = ATMEL_LCDFB_FBINFO_DEFAULT;
830 info->pseudo_palette = sinfo->pseudo_palette;
831 info->fbops = &atmel_lcdfb_ops;
833 memcpy(&info->monspecs, sinfo->default_monspecs, sizeof(info->monspecs));
834 info->fix = atmel_lcdfb_fix;
836 /* Enable LCDC Clocks */
837 if (cpu_is_at91sam9261() || cpu_is_at91sam9g10()
838 || cpu_is_at32ap7000()) {
839 sinfo->bus_clk = clk_get(dev, "hck1");
840 if (IS_ERR(sinfo->bus_clk)) {
841 ret = PTR_ERR(sinfo->bus_clk);
845 sinfo->lcdc_clk = clk_get(dev, "lcdc_clk");
846 if (IS_ERR(sinfo->lcdc_clk)) {
847 ret = PTR_ERR(sinfo->lcdc_clk);
850 atmel_lcdfb_start_clock(sinfo);
852 ret = fb_find_mode(&info->var, info, NULL, info->monspecs.modedb,
853 info->monspecs.modedb_len, info->monspecs.modedb,
856 dev_err(dev, "no suitable video mode found\n");
861 regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
863 dev_err(dev, "resources unusable\n");
868 sinfo->irq_base = platform_get_irq(pdev, 0);
869 if (sinfo->irq_base < 0) {
870 dev_err(dev, "unable to get irq\n");
871 ret = sinfo->irq_base;
875 /* Initialize video memory */
876 map = platform_get_resource(pdev, IORESOURCE_MEM, 1);
878 /* use a pre-allocated memory buffer */
879 info->fix.smem_start = map->start;
880 info->fix.smem_len = map->end - map->start + 1;
881 if (!request_mem_region(info->fix.smem_start,
882 info->fix.smem_len, pdev->name)) {
887 info->screen_base = ioremap(info->fix.smem_start, info->fix.smem_len);
888 if (!info->screen_base)
892 * Don't clear the framebuffer -- someone may have set
896 /* alocate memory buffer */
897 ret = atmel_lcdfb_alloc_video_memory(sinfo);
899 dev_err(dev, "cannot allocate framebuffer: %d\n", ret);
905 info->fix.mmio_start = regs->start;
906 info->fix.mmio_len = regs->end - regs->start + 1;
908 if (!request_mem_region(info->fix.mmio_start,
909 info->fix.mmio_len, pdev->name)) {
914 sinfo->mmio = ioremap(info->fix.mmio_start, info->fix.mmio_len);
916 dev_err(dev, "cannot map LCDC registers\n");
920 /* Initialize PWM for contrast or backlight ("off") */
921 init_contrast(sinfo);
924 ret = request_irq(sinfo->irq_base, atmel_lcdfb_interrupt, 0, pdev->name, info);
926 dev_err(dev, "request_irq failed: %d\n", ret);
930 /* Some operations on the LCDC might sleep and
931 * require a preemptible task context */
932 INIT_WORK(&sinfo->task, atmel_lcdfb_task);
934 ret = atmel_lcdfb_init_fbinfo(sinfo);
936 dev_err(dev, "init fbinfo failed: %d\n", ret);
937 goto unregister_irqs;
941 * This makes sure that our colour bitfield
942 * descriptors are correctly initialised.
944 atmel_lcdfb_check_var(&info->var, info);
946 ret = fb_set_var(info, &info->var);
948 dev_warn(dev, "unable to set display parameters\n");
952 dev_set_drvdata(dev, info);
955 * Tell the world that we're ready to go
957 ret = register_framebuffer(info);
959 dev_err(dev, "failed to register framebuffer device: %d\n", ret);
963 /* add selected videomode to modelist */
964 fb_var_to_videomode(&fbmode, &info->var);
965 fb_add_videomode(&fbmode, &info->modelist);
967 /* Power up the LCDC screen */
968 if (sinfo->atmel_lcdfb_power_control)
969 sinfo->atmel_lcdfb_power_control(1);
971 dev_info(dev, "fb%d: Atmel LCDC at 0x%08lx (mapped at %p), irq %d\n",
972 info->node, info->fix.mmio_start, sinfo->mmio, sinfo->irq_base);
977 dev_set_drvdata(dev, NULL);
979 fb_dealloc_cmap(&info->cmap);
981 cancel_work_sync(&sinfo->task);
982 free_irq(sinfo->irq_base, info);
984 exit_backlight(sinfo);
985 iounmap(sinfo->mmio);
987 release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
990 iounmap(info->screen_base);
992 atmel_lcdfb_free_video_memory(sinfo);
996 release_mem_region(info->fix.smem_start, info->fix.smem_len);
998 atmel_lcdfb_stop_clock(sinfo);
999 clk_put(sinfo->lcdc_clk);
1002 clk_put(sinfo->bus_clk);
1004 framebuffer_release(info);
1006 dev_dbg(dev, "%s FAILED\n", __func__);
1010 static int __exit atmel_lcdfb_remove(struct platform_device *pdev)
1012 struct device *dev = &pdev->dev;
1013 struct fb_info *info = dev_get_drvdata(dev);
1014 struct atmel_lcdfb_info *sinfo;
1016 if (!info || !info->par)
1020 cancel_work_sync(&sinfo->task);
1021 exit_backlight(sinfo);
1022 if (sinfo->atmel_lcdfb_power_control)
1023 sinfo->atmel_lcdfb_power_control(0);
1024 unregister_framebuffer(info);
1025 atmel_lcdfb_stop_clock(sinfo);
1026 clk_put(sinfo->lcdc_clk);
1028 clk_put(sinfo->bus_clk);
1029 fb_dealloc_cmap(&info->cmap);
1030 free_irq(sinfo->irq_base, info);
1031 iounmap(sinfo->mmio);
1032 release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
1033 if (platform_get_resource(pdev, IORESOURCE_MEM, 1)) {
1034 iounmap(info->screen_base);
1035 release_mem_region(info->fix.smem_start, info->fix.smem_len);
1037 atmel_lcdfb_free_video_memory(sinfo);
1040 dev_set_drvdata(dev, NULL);
1041 framebuffer_release(info);
1048 static int atmel_lcdfb_suspend(struct platform_device *pdev, pm_message_t mesg)
1050 struct fb_info *info = platform_get_drvdata(pdev);
1051 struct atmel_lcdfb_info *sinfo = info->par;
1054 * We don't want to handle interrupts while the clock is
1055 * stopped. It may take forever.
1057 lcdc_writel(sinfo, ATMEL_LCDC_IDR, ~0UL);
1059 sinfo->saved_lcdcon = lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
1060 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, 0);
1061 if (sinfo->atmel_lcdfb_power_control)
1062 sinfo->atmel_lcdfb_power_control(0);
1064 atmel_lcdfb_stop(sinfo);
1065 atmel_lcdfb_stop_clock(sinfo);
1070 static int atmel_lcdfb_resume(struct platform_device *pdev)
1072 struct fb_info *info = platform_get_drvdata(pdev);
1073 struct atmel_lcdfb_info *sinfo = info->par;
1075 atmel_lcdfb_start_clock(sinfo);
1076 atmel_lcdfb_start(sinfo);
1077 if (sinfo->atmel_lcdfb_power_control)
1078 sinfo->atmel_lcdfb_power_control(1);
1079 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, sinfo->saved_lcdcon);
1081 /* Enable FIFO & DMA errors */
1082 lcdc_writel(sinfo, ATMEL_LCDC_IER, ATMEL_LCDC_UFLWI
1083 | ATMEL_LCDC_OWRI | ATMEL_LCDC_MERI);
1089 #define atmel_lcdfb_suspend NULL
1090 #define atmel_lcdfb_resume NULL
1093 static struct platform_driver atmel_lcdfb_driver = {
1094 .remove = __exit_p(atmel_lcdfb_remove),
1095 .suspend = atmel_lcdfb_suspend,
1096 .resume = atmel_lcdfb_resume,
1099 .name = "atmel_lcdfb",
1100 .owner = THIS_MODULE,
1104 static int __init atmel_lcdfb_init(void)
1106 return platform_driver_probe(&atmel_lcdfb_driver, atmel_lcdfb_probe);
1109 static void __exit atmel_lcdfb_exit(void)
1111 platform_driver_unregister(&atmel_lcdfb_driver);
1114 module_init(atmel_lcdfb_init);
1115 module_exit(atmel_lcdfb_exit);
1117 MODULE_DESCRIPTION("AT91/AT32 LCD Controller framebuffer driver");
1118 MODULE_AUTHOR("Nicolas Ferre <nicolas.ferre@atmel.com>");
1119 MODULE_LICENSE("GPL");